A branch prediction method and branch predictor applied to a processor

By combining the intermediate parameters of TAGE and GEHL predictors with PC values ​​and adding perceptual machine predictors, the accuracy of branch prediction is improved, the problems of insufficient accuracy and large hardware overhead in the prior art are solved, and the processor performance is improved.

CN115686639BActive Publication Date: 2025-08-29INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202211290962.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-21
Publication Date
2025-08-29
Estimated Expiration
2042-10-21

AI Technical Summary

Technical Problem

The prediction accuracy of the existing hybrid branch prediction strategy still needs to be improved in the processor, and the hardware design complexity and overhead of the existing branch predictor are relatively large. The accuracy of a single-mechanical predictor on different programs is not high, and address conflicts affect the prediction accuracy.

Method used

Combining the intermediate parameters of the TAGE predictor and the GEHL predictor and the predicted value are recombined with the PC value of the branch instruction, the confidence of the third predicted value is determined by combining the predictor, and the final predicted value is determined from the pattern history table using the query index, and a perceptron predictor is added to the perceptron predictor to use global and local history for further prediction.

Benefits of technology

Improves the accuracy of branch prediction, reduces the overhead caused by branch prediction errors, and improves processor performance.

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Abstract

The present invention provides a branch prediction method and a branch predictor applied to a processor. The branch prediction method comprises: obtaining a first intermediate parameter and a first prediction value for a TAGE predictor to perform branch prediction on a branch instruction; obtaining a second intermediate parameter and a second prediction value for a GEHL predictor to perform branch prediction on the branch instruction; utilizing a preset combined predictor to reorganize and determine a plurality of sub-indexes according to a predetermined rule based on a PC value, the first intermediate parameter, the first prediction value, the second intermediate parameter, and designated bits in the second prediction value corresponding to the branch instruction, and determining a corresponding third prediction value and a confidence level of the third prediction value based on the reorganized plurality of sub-indexes; generating a query index according to the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and utilizing the query index to determine a final prediction value corresponding to the branch instruction from a predetermined pattern history table, thereby improving branch prediction accuracy and processor efficiency.
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Description

Technical Field

[0001] The present invention relates to the field of computer architecture, in particular to the field of processor branch prediction technology, and more particularly to a branch prediction method and a branch predictor applied to a processor. Background Art

[0002] In computer architecture, a superscalar computer (i.e., a computer with multiple processing elements that can execute more than one instruction per clock cycle) is used for advanced, computationally intensive applications. Typically, a superscalar computer employs one or more pipelined processors to better handle certain computationally intensive computer programs.

[0003] Computer programs typically include numerous branch instructions. When a branch instruction is executed, an evaluation is performed to determine whether to continue executing the next instruction in memory or to jump to an instruction specified by the branch target address. A branch specified by a branch instruction is considered "taken" if the program jumps to the branch specified by the branch target address; otherwise, it is considered "not taken" if the program continues executing the next sequential instruction in memory. To avoid stalls caused by waiting for the actual evaluation of branch instructions, modern processors employ some form of branch prediction, which predicts the branch behavior of branch instructions early in the pipeline. This allows the processor to use unallocated computing resources (i.e., the pipeline) to begin speculatively executing the corresponding branch in advance, thus saving execution time. Therefore, in the development of processors, branch prediction technology, as an important method for improving the performance of general-purpose processors, has been a hot topic of research in the industry. It is widely used not only in high-performance processors but also in power-sensitive embedded processors.

[0004] The design and application of branch prediction strategies are crucial factors influencing processor performance and overhead. As modern processors evolve toward deep pipelines, superscalar architectures, and multi-core architectures, the penalties incurred by branch prediction unit mispredictions are becoming increasingly unacceptable. Furthermore, the branch prediction unit itself occupies a significant area and power consumption overhead within the processor front end, placing higher demands on its performance and overhead design.

[0005] The O-GEHL (Optimized Geometric History Length) branch predictor, proposed at the first branch prediction competition (Seznec, 2004), effectively utilizes a long global history of 100-200 bits. The O-GEHL predictor is an optimization of the GEHL predictor. In the competition, the 64Kbit O-GEHL predictor ranked second in prediction accuracy and won the Best Practice Award. The O-GEHL predictor uses a geometrically ordered history length to index a prediction table and uses a perceptron-like model to calculate predictions. This optimizes memory usage while demonstrating robustness to the choice of history length parameter. For demanding applications, the majority of the O-GEHL predictor's memory is dedicated to a table containing local history indices for the corresponding branch instruction. For less demanding applications, a table containing very long global history indices shared by multiple branch instructions is used.

[0006] The TAGE predictor contains multiple different prediction tables, each using different index histories with exponentially increasing lengths. During prediction, the base prediction table and other prediction tables are indexed simultaneously, and the prediction result from the prediction table with the longest index history is selected as the final prediction result. The TAGE predictor improves prediction speed and accuracy, but the hardware design is complex and has a large area overhead. Furthermore, the mixed address and history indexing mechanism used by a single TAGE predictor inevitably leads to interference caused by address conflicts, which affects prediction accuracy.

[0007] Branch prediction mechanisms rely heavily on program behavior, and single-mechanism predictors do not consistently achieve high accuracy for all programs. Compared to single-mechanism predictors, a multi-mechanism hybrid branch prediction strategy is a common approach in branch prediction design for high-performance processors. This hybrid approach can achieve higher prediction accuracy. However, the accuracy of current hybrid branch prediction strategies still needs to be improved. Summary of the Invention

[0008] Therefore, an object of the present invention is to overcome the above-mentioned defects of the prior art and provide a branch prediction method and a branch predictor applied to a processor.

[0009] The purpose of the present invention is achieved through the following technical solutions:

[0010] According to a first aspect of the present invention, a branch prediction method for a processor is provided, comprising: obtaining a first intermediate parameter and a first prediction value for a TAGE predictor to perform branch prediction on a branch instruction; obtaining a second intermediate parameter and a second prediction value for a GEHL predictor to perform branch prediction on the branch instruction; utilizing a preset combined predictor to reorganize and determine a plurality of sub-indexes according to a predetermined rule based on a PC value, the first intermediate parameter, the first prediction value, the second intermediate parameter, and designated bits in the second prediction value corresponding to the branch instruction, and determining a corresponding third prediction value and a confidence level of the third prediction value based on the reorganized plurality of sub-indexes; generating a query index based on the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and utilizing the query index to determine a final prediction value corresponding to the branch instruction from a predetermined pattern history table.

[0011] In some embodiments of the present invention, the combined predictor is configured as follows: a saturation counter is provided for the corresponding sub-index to indicate the historical branch situation of the corresponding sub-index, and the saturation counter corresponding to the sub-index associated with the branch instruction is updated after the branch result of the corresponding branch instruction is obtained; according to multiple sub-indexes corresponding to a branch instruction, a third prediction value and the confidence of the third prediction value are determined based on the sum of the count values ​​in the corresponding saturation counters.

[0012] In some embodiments of the present invention, the pattern history table stores historical branch situations of branch instructions corresponding to corresponding query indexes through a saturation counter; the method includes: determining the final prediction value corresponding to the branch instruction from the count value in the corresponding saturation counter based on the query index corresponding to the corresponding branch instruction; and updating the saturation counter corresponding to the query index associated with the branch instruction according to the corresponding final prediction value after obtaining the branch result of the branch instruction.

[0013] In some embodiments of the present invention, the first intermediate parameter includes the provided item, the valid bit of the provided item, and the candidate item corresponding to the branch prediction of the branch instruction by the TAGE predictor; the second intermediate parameter includes the summation result corresponding to the branch prediction of the branch instruction by the GEHL predictor, and the summation result is a reference for the GEHL predictor to determine the second prediction value; each sub-index selects the PC value, provided item, the valid bit of the provided item, the candidate item, and the specified bit in the summation result corresponding to the branch instruction according to a predetermined rule, and the specified bits used by any two sub-indexes are different.

[0014] In some embodiments of the present invention, the multiple sub-indexes include: a first sub-index, which is obtained by concatenating bits 0-7 of the second predicted value, the first predicted value, and the PC value; a second sub-index, which is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, and bits 0-2 of the PC value; a third sub-index, which is obtained by concatenating bits 0-4 of the sum result of the GEHL predictor and bits 0-4 of the PC value; a fourth sub-index, which is obtained by concatenating bits 0-4 of the sum result of the GEHL predictor, the second predicted value, the first predicted value, and bits 0-2 of the PC value; and a fifth sub-index, which is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, the second predicted value, the first predicted value, and bit 0 of the PC value.

[0015] In some embodiments of the present invention, the query index is obtained by sequentially concatenating the third prediction value, the confidence of the third prediction value, and bits 0-6 of the PC value from the lowest bit to the highest bit.

[0016] In some embodiments of the present invention, the method also includes: obtaining a fourth prediction value obtained by a preset perceptron predictor by performing branch prediction on a branch instruction based on the global history and local history records of the branch instruction; generating a query index based on the PC value, third prediction value, confidence level of the third prediction value, and fourth prediction value corresponding to the branch instruction, and determining the final prediction value corresponding to the branch instruction from a predetermined pattern history table based on the query index.

[0017] In some embodiments of the present invention, the preset perceptron predictor includes: a global history perceptron, which is used to provide a perceptual value indicating a branch direction obtained by perceiving based on a segmentation of the global history, which is obtained based on a global history training that records the overall branch results of all branch instructions; a local history perceptron, which is used to provide a perceptual value indicating a branch direction obtained by perceiving based on a segmentation of the local history, which is obtained based on a local history training that records the branch results of a specified branch instruction; wherein the fourth prediction value is obtained based on the perceptual value of the global history perceptron and the perceptual value of the local history perceptron.

[0018] According to a second aspect of the present invention, a branch predictor using the branch prediction method described in the first aspect is provided, comprising: a TAGE predictor for obtaining a first intermediate parameter and a first prediction value for branch prediction of a branch instruction; a GEHL predictor for obtaining a second intermediate parameter and a second prediction value for branch prediction of the branch instruction; a combined predictor for determining a plurality of sub-indexes by reorganizing according to a predetermined rule the PC value, the first intermediate parameter, the first prediction value, the second intermediate parameter, and designated bits in the second prediction value corresponding to the branch instruction, and determining a corresponding third prediction value and a confidence level of the third prediction value based on the reorganized plurality of sub-indexes; and a final predictor for generating a query index according to the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and determining a final prediction value corresponding to the branch instruction from a predetermined pattern history table using the query index.

[0019] In some embodiments of the present invention, the branch predictor also includes: a perceptron predictor, which is configured to: perform branch prediction on the branch instruction based on the global history and local history records of the branch instruction to obtain a fourth prediction value; wherein, the final predictor is used to generate a query index based on the PC value, third prediction value, confidence level of the third prediction value, and fourth prediction value corresponding to the branch instruction, and determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table based on the query index.

[0020] According to a third aspect of the present invention, a processor is provided, comprising: a branch predictor, configured to execute the branch prediction method as described in the first aspect on a branch instruction to be predicted to determine a final prediction value corresponding to the branch instruction; or, to use the branch predictor described in the second aspect to determine the final prediction value corresponding to the branch instruction to be predicted; and one or more processing units, configured to speculatively execute an executable instruction corresponding to the adopted branch based on the final prediction value corresponding to the branch instruction by the branch predictor.

[0021] According to a fourth aspect of the present invention, an electronic device is provided, comprising: one or more processors as described in the third aspect; and a memory, wherein the memory is used to store executable instructions; and the one or more processors are configured to execute corresponding executable instructions.

[0022] Compared with the prior art, the advantages of the present invention are:

[0023] The present invention, based on two existing branch predictors with relatively high prediction accuracy (i.e., TAGE predictor and GEHL predictor), simultaneously utilizes the intermediate parameters of the two existing branch predictors (intermediate products for generating prediction values, for the sake of distinction, the intermediate parameters corresponding to the TAGE predictor are referred to as first intermediate parameters, and the intermediate parameters corresponding to the GEHL predictor are referred to as second intermediate parameters) and their prediction values ​​(for the sake of distinction, the prediction value output by the TGAE predictor is referred to as the first prediction value, and the prediction value output by the GEHL predictor is referred to as the second prediction value) and the PC value corresponding to the branch instruction to reorganize multiple sub-indexes, and determines the corresponding third prediction value and the confidence level of the third prediction value based on the reorganized multiple sub-indexes; generates a query index based on the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and utilizes the query index to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table. In this way, the accuracy of branch prediction can be further improved, the overhead caused by branch prediction errors can be reduced, and the performance of the processor can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The embodiments of the present invention are further described below with reference to the accompanying drawings, in which:

[0025] Figure 1 1 is a flow chart of a branch prediction method according to an embodiment of the present invention;

[0026] Figure 2 2 is a schematic diagram of the structure of a perceptron according to an embodiment of the present invention;

[0027] Figure 3 Schematic diagram of the generation relationship of query indexes in the branch prediction method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below through specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0029] As mentioned in the background technology section, the prediction accuracy of the current hybrid branch prediction strategy still needs to be improved. The inventors found that the existing hybrid branch prediction strategy only uses the prediction values ​​finally output by some existing predictors. The address conflict of the combined index causes great interference, which affects the further improvement of branch prediction accuracy. Therefore, based on two existing branch predictors with higher prediction accuracy (i.e., TAGE predictor and GEHL predictor), the present invention simultaneously utilizes the intermediate parameters of the two existing branch predictors (intermediate products for generating prediction values. For the purpose of distinction, the intermediate parameters corresponding to the TAGE predictor are referred to as first intermediate parameters, and the intermediate parameters corresponding to the GEHL predictor are referred to as second intermediate parameters) and their prediction values ​​(for the purpose of distinction, the prediction value output by the TGAE predictor is referred to as first prediction value, and the prediction value output by the GEHL predictor is referred to as second prediction value) and the PC value corresponding to the branch instruction to reconstruct multiple sub-indexes, and determines the corresponding third prediction value and the confidence level of the third prediction value based on the reconstructed multiple sub-indexes; generates a query index based on the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and uses the query index to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table. This can further improve the accuracy of branch prediction, reduce the overhead caused by branch prediction errors, and thus improve processor performance.

[0030] Before describing the embodiments of the present invention in detail, some of the terms used therein are explained as follows:

[0031] A prediction value indicates whether a branch is predicted to be taken. A prediction value is an integer value, e.g., 1 indicates taken, and 0 indicates not taken. In other words, the prediction value is the result output by a predictor for a branch instruction, indicating whether the branch prediction resulted in a jump or no jump. Typically, 1 indicates a jump, and 0 indicates no jump. For purposes of distinction, the term "first prediction value" will be used to refer to the result output by the TAGE predictor; the term "second prediction value" will be used to refer to the result output by the GEHL predictor; and the term "final prediction value" will be used to refer to the result output by the branch prediction method or branch predictor of the present invention.

[0032] PC refers to the Program Counter, which is used to store the address of the instruction to be executed.

[0033] The PC value corresponding to the branch instruction refers to the program counter value of the branch instruction (Program Counter, or the value of the program counter, which records the address of the branch instruction).

[0034] The confidence level of the prediction value indicates the confidence level of whether a branch is predicted to be taken (taken corresponds to a jump, not taken corresponds to not jumping); it is usually represented by multiple bits, for example: 00 indicates strong not taken, 01 indicates weak not taken, 10 indicates weak taken, and 11 indicates strong taken.

[0035] The branch result refers to the actual result of whether the branch instruction jumps.

[0036] According to one embodiment of the present invention, see Figure 1 , provides a branch prediction method for a processor, comprising steps: S1, S2, S3, and S4. In order to better understand the present invention, each step is described in detail below in conjunction with specific embodiments.

[0037] In step S1 , a first intermediate parameter and a first prediction value of a TAGE predictor for performing branch prediction on a branch instruction are obtained.

[0038] According to one embodiment of the present invention, the PC (Program Count) value of a branch instruction is input into a TAGE predictor to obtain a corresponding first prediction value. Simultaneously, a corresponding first intermediate parameter also exists in the TAGE predictor, which can be used to construct a sub-index to improve prediction accuracy. Preferably, the first intermediate parameter includes a provider item, a valid bit of the provider item, and a candidate item corresponding to the TAGE predictor's branch prediction for the branch instruction. The provider item (usually referred to as "Provider") corresponding to the TAGE predictor's branch prediction for the branch instruction is the component with the longest tagged history length matched in the tag matching in the TAGE predictor. The valid bit of the provider item (hereinafter referred to as "Provider") of the TAGE predictor is the bit used to confirm whether the item matches the branch instruction, and is usually represented by a u-bit. The candidate item of the TAGE predictor (usually referred to as "Altprovider") is the component with the second longest tagged history length matched in the tag matching in the TAGE predictor.

[0039] In step S2, a second intermediate parameter and a second prediction value used by a GEHL predictor to perform branch prediction on the branch instruction are obtained.

[0040] According to one embodiment of the present invention, the PC (Program Count) value of a branch instruction is input into a GEHL predictor to obtain a corresponding second prediction value. The GEHL predictor also contains a corresponding second intermediate parameter that can be used to construct a sub-index to improve prediction accuracy. Preferably, the second intermediate parameter includes the summed result (commonly referred to as the Sum result) corresponding to the branch prediction performed by the GEHL predictor on the branch instruction. This summed result serves as a reference for the GEHL predictor to determine the second prediction value. This summed result is the sum of the record values ​​output by all prediction tables in the GEHL predictor, represented by multiple bits, and is used to determine the prediction value of the GEHL predictor. In embodiments of the present invention, the GEHL predictor may be an O-GEHL predictor or a GEHL predictor. However, preferably, the present invention employs the O-GEHL predictor to provide better prediction accuracy. The experimental data presented below was obtained using the O-GEHL predictor.

[0041] In step S3, a preset combined predictor is used to reorganize and determine a plurality of sub-indexes according to a predetermined rule based on the PC value corresponding to the branch instruction, the first intermediate parameter, the first predicted value, the second intermediate parameter, and designated bits in the second predicted value, and a corresponding third predicted value and a confidence level of the third predicted value are determined based on the reorganized plurality of sub-indexes;

[0042] According to one embodiment of the present invention, each sub-index is obtained by splicing the PC value, provided item, valid bit of the provided item, candidate item, and designated bits of the summation result corresponding to the branch instruction according to a predetermined rule, and the designated bits used by any two sub-indexes are different. It should be understood that the combined predictor is preset with multiple sub-pattern transfer tables, and each sub-index corresponds to a saturation counter in a sub-pattern transfer table that indicates the historical branch situation of the corresponding sub-index. The technical solution of this embodiment can at least achieve the following beneficial technical effects: in the process of generating sub-indexes, the present invention not only uses the final prediction results (predicted values) of the TAGE and GEHL predictors, but also uses the intermediate parameters for generating the final prediction results, thereby providing more effective information in the indexing process, reducing the impact of index address conflicts, and improving the accuracy of branch prediction.

[0043] To facilitate understanding of the composition of sub-indexes in the combined predictor, a schematic form of sub-indexes is given below. According to one embodiment of the present invention, the multiple sub-indexes include:

[0044] The first sub-index is obtained by concatenating the second predicted value, the first predicted value, and bits 0-7 of the PC value;

[0045] For example, the bits of the first sub-index corresponding to the first sub-mode transition table PHT1 are:

[0046] index0=prediction GEHL

[0047] index1=prediction TAGE

[0048] index 9:2 =PC 7:0

[0049] Among them, index0 represents the 0th bit of the sub-index, index1 represents the 1st bit of the sub-index, and index 9:2 Represents the 2nd to 9th digits of the sub-index (the definition of the number of digits of the sub-index in the following formula is similar and will not be repeated here), prediction GEHL Represents the second predicted value (i.e. the predicted value of the GEHL predictor), prediction TAGE represents the first prediction value (i.e., the prediction value of the TAGE predictor), PC 7:0 Indicates bits 0-7 of the PC value corresponding to the branch instruction.

[0050] The second sub-index is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, and bits 0-2 of the PC value;

[0051] For example, the bits of the second sub-index corresponding to the second sub-mode transition table PHT2 are:

[0052] index0=U

[0053] index 3:1 =alt_provider 2:0

[0054] index 6:4 =provider 2:0

[0055] index 9:7 =PC 2:0

[0056] Among them, U represents the valid bit of the provided item, alt_provider 2:0 0-2 digits representing the candidate, provider 2:0 Indicates the 0-2 bits of the provided item, PC 2:0 Indicates bits 0-2 in the PC value corresponding to the branch instruction.

[0057] The third sub-index is obtained by concatenating the 0-4 bits of the summation result of the GEHL predictor and the 0-4 bits of the PC value;

[0058] For example, the bits of the third sub-index corresponding to the third sub-mode transition table PHT3 are:

[0059] index 4:0 =GEHL-sum 4:0

[0060] index 9:5 =PC 4:0

[0061] Among them, GEHL-sum 4:0 Indicates the 0-4 bits of the summation result of the GEHL predictor, PC 4:0 Indicates bits 0-4 of the PC value corresponding to the branch instruction.

[0062] The fourth sub-index is obtained by concatenating bits 0-4 of the sum of the GEHL predictor, the second predicted value, the first predicted value, and bits 0-2 of the PC value.

[0063] For example, the bits of the fourth sub-index corresponding to the fourth sub-mode transition table PHT4 are:

[0064] index 4:0 =GEHL_sum 4:0

[0065] index5=prediction GEHL

[0066] index6=prediction TAGE

[0067] index 9:7 =PC 2:0

[0068] Among them, GEHL-sum 4:0 0-4 bits representing the summation result of the GEHL predictor, prediction GEHL Represents the second predicted value, prediction TAGE Indicates the first predicted value, PC 2:0 Indicates bits 0-2 in the PC value corresponding to the branch instruction.

[0069] The fifth sub-index is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, the second predicted value, the first predicted value, and bit 0 of the PC value.

[0070] For example, the bits of the fifth sub-index corresponding to the fifth sub-mode transition table PHT5 are:

[0071] index0=U

[0072] inde 3:1 =alt_provider 2:0

[0073] index 6:4 =provider 2:0

[0074] index7=prediction GEHL

[0075] inde8=prediction TAGE

[0076] index9=PC0

[0077] Among them, U represents the valid bit of the provided item, alt_provider 2:0 0-2 digits representing the candidate, provider 2:0 Indicates the 0-2 bits of the provided item, prediction GEHL Represents the second predicted value, prediction TAGE Represents the first prediction value, PC0 represents the 0th bit of the PC value corresponding to the branch instruction.

[0078] It is worth noting that the above sub-index format is merely an example of a specific bit position. The inventors determined the above sub-index format after multiple tests and adjustments. It should be understood that implementers may adjust it as needed during implementation to rationally utilize the PC value, the intermediate parameters of the two predictors, and the predicted value to construct a sub-index that is beneficial for improving branch prediction accuracy. For example, implementers may adjust the PC value and the specific bits used in the provided item, and select other applicable sub-index formats through testing.

[0079] According to one embodiment of the present invention, the combined predictor is configured as follows: a saturation counter indicating the historical branch situation of the corresponding sub-index is provided for the corresponding sub-index, and the saturation counter corresponding to the sub-index associated with the branch instruction is updated after the branch result of the corresponding branch instruction is obtained; according to multiple sub-indexes corresponding to a branch instruction, a third prediction value and the confidence of the third prediction value are determined based on the sum of the count values ​​in the corresponding saturation counters.

[0080] According to one embodiment of the present invention, a combined predictor includes a TAGE predictor, a GEHL predictor, and five sub-pattern transfer tables (Pattern History Tables). Each sub-index corresponding to each sub-pattern transfer table uses a 10-bit index width, and each item corresponds to a saturation counter of a predetermined bit width (e.g., 3 or 4 bits). Before reaching the maximum or minimum value that the saturation counter can record, the predictor is updated each time based on the branch result corresponding to the branch instruction. If the branch result is a jump, the result is +1, otherwise -1. The prediction process of the combined predictor is as follows:

[0081] 1. First, the intermediate parameters and predicted values ​​of the TAGE and GEHL predictors are obtained from the PC (Program Count) values. This part can be obtained based on the open source TAGE and GEHL predictors, so it will not be described in detail.

[0082] 2. Then, five sub-indexes are constructed by specifically combining the existing PC values, the intermediate parameters and predicted values ​​of the TAGE predictor, and the intermediate parameters and predicted values ​​of the GEHL predictor. The sub-prediction values ​​corresponding to each sub-pattern transition table are obtained from the five sub-pattern transition table indexes respectively.

[0083] 3. The sub-prediction values ​​matched by the five sub-indices (corresponding to the values ​​in the saturation counter) are subjected to a predetermined summation process to obtain the third prediction value output by the entire combined predictor and the confidence level of the third prediction value.

[0084] The above describes how multiple sub-indexes are derived from existing PC values, intermediate parameters of the TAGE predictor, the GEHL predictor, and the predicted value (prediction result). A third predicted value and its confidence level are calculated based on the count value indexed by the sub-index in the saturation counter corresponding to the sub-pattern transition table.

[0085] According to one embodiment of the present invention, the third prediction value is determined in the following manner:

[0086] The count values ​​indexed by the plurality of sub-indexes in the saturation counters of the corresponding sub-mode transition tables are summed according to a predetermined summation formula. When the sum is greater than or equal to 0, the third prediction value is a jump; otherwise, the third prediction value is no jump. The predetermined summation formula is:

[0087]

[0088] Where M represents the total number of sub-indexes. represents the mean offset (offset value) of the sum of the count values ​​indexed from the corresponding sub-mode transition table for the M sub-indexes, and C(i) represents the count value indexed from the corresponding sub-mode transition table according to the i-th sub-index. For example, if there are 5 sub-indexes as shown in the above embodiment, the corresponding predetermined summation formula is:

[0089]

[0090] in, It is the mean offset of the sum of the count values ​​indexed from the corresponding sub-pattern transfer table for the five sub-indexes. C(i) represents the count value indexed from the corresponding sub-pattern transfer table based on the i-th sub-index. When combinar_sum ≥ 0, it is predicted to jump; when combinar_sum < 0, it is predicted not to jump. As mentioned above, the saturation counter for the sub-index from the corresponding sub-pattern transfer table can use a 4-bit saturation counter. The value recorded therein is C(i). Before reaching the maximum or minimum value that the saturation counter can record, it is updated each time according to the branch result corresponding to the branch instruction. If the branch result is a jump, it is +1, otherwise -1.

[0091] The confidence level of the third prediction, SumType (and type), is calculated using the combined sum, as shown in the following formula. The threshold θ is updated each time a prediction is returned or the inference is updated, and SumType represents the confidence level of the prediction, which is passed as a parameter to the final predictor.

[0092]

[0093] Wherein, θ represents a predetermined threshold value. The threshold value θ can be a fixed value or a dynamically adjusted value. Preferably, the updating logic of the dynamically adjusted threshold value is as follows: when the third predicted value predicted by the combined predictor is confirmed to be a correct prediction, if the absolute value of the value currently calculated according to the predetermined summation formula is less than the threshold value θ, then the threshold value θ is automatically decremented by 1; otherwise, the threshold value θ remains unchanged; when the third predicted value predicted by the combined predictor is confirmed to be an incorrect prediction, the threshold value θ is automatically incremented (to reduce the confidence level for the next prediction).

[0094] In step S4, a query index is generated according to the PC value corresponding to the branch instruction, the third prediction value, and the confidence of the third prediction value, and the query index is used to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table.

[0095] According to one embodiment of the present invention, a predetermined pattern history table stores historical branch situations of branch instructions corresponding to corresponding query indexes through saturation counters; this is equivalent to ultimately constructing a predetermined pattern history table composed of corresponding query indexes and corresponding saturation counters, so as to further provide more effective information to improve the accuracy of branch prediction. The branch prediction method includes: determining the final prediction value corresponding to the branch instruction from the count value in the corresponding saturation counter based on the query index corresponding to the corresponding branch instruction; and updating the saturation counter corresponding to the query index associated with the branch instruction according to the corresponding final prediction value after obtaining the branch result of the branch instruction. According to one embodiment of the present invention, the update of the saturation counter corresponding to the query index can adopt a general update method, that is, before reaching the maximum or minimum value that the saturation counter can record, the count value of the saturation counter is updated each time according to the branch result corresponding to the branch instruction, wherein if the branch result is a jump, it is +1, otherwise -1.

[0096] According to one embodiment of the present invention, the query index is obtained by sequentially concatenating the third prediction value, the confidence of the third prediction value, and bits 0-6 of the PC value from the lowest to the highest bit. For example, the query index is represented as:

[0097] index0 = sign(combinar_sum)

[0098] index 2:1 =SumType

[0099] index 9:3 =PC 6:0

[0100] Among them, sign(combinar_sum) represents the third predicted value, SumType represents the confidence of the third predicted value, PC 6:0 Indicates bits 0-6 of the PC value corresponding to the branch instruction. sign(·) represents the sign function. When combinar_sum ≥ 0, it predicts a jump and outputs 1. Otherwise, it predicts no jump and outputs 0.

[0101] The inventors conducted experiments running the spec2006 benchmark on a simulator and found that the average conditional branch accuracy of the TAGE predictor, which uses 64KB of memory overhead, was 89.2%, while the average conditional branch accuracy of the GEHL predictor was 88.9%. The branch prediction method of the present invention combines the intermediate parameters and prediction values ​​of the two existing predictors, resulting in a third prediction value with an accuracy of 93.0%. This indicates that the method of the present invention effectively reduces index address conflicts and improves branch prediction accuracy.

[0102] In order to further improve the accuracy of branch prediction, the prediction value of the perceptron can also be added. According to one embodiment of the present invention, the branch prediction method further includes: obtaining a fourth prediction value obtained by a preset perceptron predictor based on the global history (generally referred to in the art as Global History) and local history (generally referred to in the art as Brach History) of the branch instruction to predict the branch instruction; generating a query index based on the PC value corresponding to the branch instruction, the third prediction value, the confidence of the third prediction value, and the fourth prediction value, and determining the final prediction value corresponding to the branch instruction from a predetermined pattern history table based on the query index. According to one embodiment of the present invention, the preset perceptron predictor includes: a global history perceptron for providing a perception value indicating a branch direction obtained by perception based on segmented global history, which is obtained based on global history training that records the overall branch results of all branch instructions; a local history perceptron for providing a perception value indicating a branch direction obtained by perception based on segmented local history, which is obtained based on local history training that records the branch results of a specified branch instruction; wherein the fourth prediction value is obtained based on the perception value of the global history perceptron and the perception value of the local history perceptron. The technical solution of this embodiment can at least achieve the following beneficial technical effects: the present invention uses the fourth prediction value predicted by the perceptron predictor based on global history and local history to provide further information, which can further improve the branch prediction accuracy.

[0103] According to one embodiment of the present invention, the structure of any one of the global history perceptron and the local history perceptron is as follows: the perceptron includes a bias vector table and multiple weight vector tables (each segment corresponds to a weight vector table) set for different segments of history (the global history perceptron corresponds to the global history, and the local history perceptron corresponds to the local history), wherein the perceptron is configured to: hash the PC value of the branch instruction to obtain a hash index, index the corresponding bias vector from the bias vector table according to the hash index, index the corresponding weight vector from the corresponding weight vector table according to the hash index obtained by hashing the PC value of the branch instruction and different segments of history to obtain multiple weight vectors; and sum the bias vector, the indexed multiple weight vectors and the predetermined mean offset to obtain the perception value of the perceptron. The perceptron is configured to update the bias vector as follows: if a branch results in a jump, the corresponding bias vector is incremented by 1; otherwise, it is decremented by 1. The perceptron is configured to update the weight vector as follows: if the branch direction indicated by the weight vector corresponding to a hash index and a historical segment is the same as the branch result, the weight vector is incremented by 1 toward the currently indicated branch direction; otherwise, it is decremented by 1. For example, if the weight vector corresponding to a hash index and a historical segment is greater than or equal to 0, it indicates that the indicated branch direction is a jump; otherwise, it indicates that the branch direction is not a jump. It should be understood that different value indexes of the same historical segment have different positions. For example, to simplify it: assuming the hash index is 11010014, and the length of each historical segment is 2 bits, the same historical segment has four cases: 00, 01, 10, and 11, which respectively form four different index values ​​of 1101001400, 1101001401, 1101001410, and 1101001411 with the hash index, and the corresponding weight vectors will be indexed from the four positions of the weight vector table respectively. The technical solution of this embodiment can at least achieve the following beneficial technical effects: the present invention uses a perceptron to correct the defect that the main predictor uses a short branch history when the number of cycles is large, and adopts a historical segmentation method. Compared with a simple perceptron predictor, it increases the length of the history that can be used while reducing hardware overhead. To illustrate the principle, refer to the following. Figure 2 Taking the global history perceptron as an example, its prediction steps are explained:

[0104] 1. Hash the PC value of the branch instruction to a hash index (hash_index);

[0105] 2. Use the hash index to find the corresponding bias vector w0 from the bias vector table W0, and use the hash index and the global history segmentation to index the corresponding weight vector from the weight vector table corresponding to each segment to obtain multiple weight vectors; for example, assuming that the length of a historical segment is step, GHR[step-1:0] represents the use of bits from 0 to step-1 in the global history. Correspondingly, the weight vector w1 can be indexed from the weight vector table W1 using the hash index of the PC value and GHR[step-1:0], and the weight vector w2 can be indexed from the weight vector table W2 using the hash index of the PC value and GHR[2*step-1:step], ..., the weight vector w2 can be indexed from the weight vector table W2 using the hash index of the PC value and GHR[n*step-1:(n-1)step]. n Index out the weight vector w n ;

[0106] 3. Calculate the global history perceptron output perception value y:

[0107]

[0108] Among them, w0 represents the bias vector, w i represents the i-th weight vector, n represents the number of weight vectors, Indicates the predetermined mean shift. Assuming GWIDTH is the history length used and step is the length of the segment, then The predetermined mean shift is

[0109] The process of updating the vectors of the global history perceptron (similar to the local history perceptron, but using local history) is the training process. All vectors are adjusted as follows:

[0110] 1.w0: If the branch result of the current branch instruction is a jump, the corresponding value of w0 is incremented by 1, otherwise it is decremented by 1;

[0111] 2.w i : If the branch direction indicated by the weight vector corresponding to a hash index and the historical segment is the same as the branch result, the weight vector is incremented by 1 toward the currently indicated branch direction, otherwise it is decremented by 1.

[0112] The structure and update method of the local history perceptron are similar to those of the global history perceptron. The only difference is that the historical information used is local history, which will not be described here.

[0113] In the case of the introduction of the perceptron predictor, see Figure 3According to one embodiment of the present invention, the query index is obtained by concatenating the fourth prediction value, the third prediction value, the confidence of the third prediction value, and bits 0-5 of the PC value from the lowest to the highest bit. For example, the query index is represented as:

[0114] index0 = sign(perc_sum)

[0115] index1 = sign(combinar_sum)

[0116] index 3:2 =SumType

[0117] index 9:4 =PC 5:0

[0118] Among them, sign(perc_sum) represents the fourth predicted value, sign(combinar_sum) represents the third predicted value, SumType represents the confidence of the third predicted value, PC 5:0 Represents bits 0-5 of the PC value corresponding to the branch instruction. perc_sum represents the sum of the perceptual value of the global history perceptron and the perceptual value of the local history perceptron. sign(perc_sum) indicates that when perc_sum ≥ 0, the output fourth prediction value is 1; otherwise, it is 0.

[0119] Through experiments, the inventors found that when the perceptron predictor of the present invention (including global history and local history perceptrons) is introduced, the branch prediction method proposed in the present invention can reduce the number of missed predictions per kilo-instructions (MPKI) to 4.5, and the prediction accuracy is further increased to 94.2%.

[0120] It should be understood that the above sub-index and two specific query index examples are for illustration only, and the present invention does not impose any limitations thereto. Those skilled in the art can utilize the principles of the present invention to adjust some of the PC values, first intermediate parameters, first predicted values, second intermediate parameters, and designated bits in the second predicted values ​​used to achieve similar effects.

[0121] According to one embodiment of the present invention, a branch predictor using the branch prediction method described in the aforementioned embodiment is provided, comprising: a TAGE predictor for obtaining a first intermediate parameter and a first prediction value for branch prediction of a branch instruction; a GEHL predictor for obtaining a second intermediate parameter and a second prediction value for branch prediction of the branch instruction; a combination predictor for determining a plurality of sub-indexes by reorganizing according to a predetermined rule the PC value, the first intermediate parameter, the first prediction value, the second intermediate parameter, and designated bits in the second prediction value corresponding to the branch instruction, and determining a corresponding third prediction value and a confidence level of the third prediction value based on the reorganized plurality of sub-indexes; and a final predictor for generating a query index according to the PC value, the third prediction value, and the confidence level of the third prediction value corresponding to the branch instruction, and determining a final prediction value corresponding to the branch instruction from a predetermined pattern history table using the query index. Preferably, the branch predictor further comprises: a perceptron predictor configured to: perform branch prediction on the branch instruction based on the global history and local history records of the branch instruction to obtain a fourth prediction value; wherein the final predictor is configured to generate a query index based on the PC value corresponding to the branch instruction, the third prediction value, the confidence level of the third prediction value, and the fourth prediction value, and to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table based on the query index. For the sake of brevity, the embodiments of the branch prediction method of the aforementioned embodiment serve as implementation details of the branch predictor and are not further described here.

[0122] According to one embodiment of the present invention, a processor is provided, comprising: a branch predictor of the aforementioned embodiment, configured to perform branch prediction on a branch instruction to be predicted to determine a corresponding final prediction value; and one or more processing units, configured to speculatively execute the corresponding executable instructions in the adopted branch based on the final prediction value corresponding to the branch instruction by the branch predictor.

[0123] According to one embodiment of the present invention, an electronic device is provided, comprising: one or more processors as described in the aforementioned embodiment; and a memory, wherein the memory is used to store executable instructions; the one or more processors are configured to execute corresponding executable instructions.

[0124] It should be noted that although the above describes the various steps in a specific order, it does not mean that the steps must be performed in the above specific order. In fact, some of these steps can be executed concurrently or even in a different order as long as the required functions can be achieved.

[0125] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0126] Computer-readable storage media can be a tangible device that holds and stores the instructions used by an instruction execution device. Computer-readable storage media can, for example, include, but are not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, a punch card or a raised structure in a groove on which instructions are stored, for example, and any suitable combination thereof.

[0127] While various embodiments of the present invention have been described above, the above descriptions are intended to be illustrative, non-exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A branch prediction method applied to a processor, characterized in that: include: Obtaining a first intermediate parameter and a first prediction value for a TAGE predictor to perform branch prediction on a branch instruction, wherein the first intermediate parameter includes a provided item, a valid bit of the provided item, and a candidate item corresponding to the TAGE predictor performing branch prediction on the branch instruction; Obtaining a second intermediate parameter and a second prediction value for a GEHL predictor to perform branch prediction on the branch instruction, wherein the second intermediate parameter includes a summation result corresponding to the branch prediction performed by the GEHL predictor on the branch instruction, and the summation result is a reference for the GEHL predictor to determine the second prediction value; A preset combination predictor is used to reorganize and determine multiple sub-indexes according to a predetermined rule based on the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter, and the designated bits in the second predicted value corresponding to the branch instruction, and determine the corresponding third predicted value and the confidence level of the third predicted value based on the reorganized multiple sub-indexes, wherein each sub-index is obtained by splicing the PC value, the provided item, the valid bit of the provided item, the candidate item, and the designated bits in the summation result corresponding to the branch instruction according to the predetermined rule, and the designated bits used by any two sub-indexes are different. The combination predictor is configured to: provide a saturation counter indicating the historical branch situation of the corresponding sub-index for the corresponding sub-index, and update the saturation counter corresponding to the sub-index associated with the branch instruction after obtaining the branch result of the corresponding branch instruction; determine the third predicted value and the confidence level of the third predicted value based on the sum of the count values ​​in the corresponding saturation counters according to the multiple sub-indexes corresponding to a branch instruction; A query index is generated based on the PC value, the third prediction value and the confidence of the third prediction value corresponding to the branch instruction, and the query index is used to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table, wherein the pattern history table stores historical branch situations of the branch instruction corresponding to the corresponding query index through a saturation counter.

2. The branch prediction method according to claim 1, wherein: The method comprises: Determine a final prediction value corresponding to the branch instruction from a count value in a corresponding saturation counter based on a query index corresponding to the corresponding branch instruction; and After the branch result of the branch instruction is obtained, the saturation counter corresponding to the query index associated with the branch instruction is updated according to the corresponding final prediction value.

3. The branch prediction method according to claim 1 , wherein the plurality of sub-indexes comprise: The first sub-index is obtained by concatenating the second predicted value, the first predicted value, and bits 0-7 of the PC value. The second sub-index is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, and bits 0-2 of the PC value. The third sub-index is obtained by concatenating the 0-4 bits of the summation result of the GEHL predictor and the 0-4 bits of the PC value. The fourth sub-index is obtained by concatenating bits 0-4 of the sum of the GEHL predictor, the second predicted value, the first predicted value, and bits 0-2 of the PC value. The fifth sub-index is obtained by concatenating the valid bit of the provided item, bits 0-2 of the candidate item, bits 0-2 of the provided item, the second predicted value, the first predicted value, and bit 0 of the PC value.

4. The branch prediction method according to claim 3, wherein the query index is obtained by sequentially concatenating the third prediction value, the confidence of the third prediction value, and bits 0-6 of the PC value from low to high.

5. The branch prediction method according to any one of claims 1 to 4, characterized in that: The method further comprises: Obtaining a fourth prediction value obtained by a preset perceptron predictor performing branch prediction on the branch instruction according to the global history and local history records of the branch instruction; A query index is generated according to the PC value, the third prediction value, the confidence of the third prediction value, and the fourth prediction value corresponding to the branch instruction, and a final prediction value corresponding to the branch instruction is determined from a predetermined pattern history table based on the query index.

6. The branch prediction method according to claim 5, characterized in that: The preset perceptron predictor includes: A global history perceptron, configured to provide a perception value indicating a branch direction based on segmented perception of the global history, trained on a global history that records the overall branch results of all branch instructions; A local history perceptron, configured to provide a perception value indicating a branch direction based on segmented perception of the local history, the perception value being trained based on a local history of branch outcomes of a specified branch instruction; The fourth prediction value is obtained according to the perception value of the global history perceptron and the perception value of the local history perceptron.

7. A branch predictor using the branch prediction method according to any one of claims 1 to 6, characterized in that: include: A TAGE predictor is configured to obtain a first intermediate parameter and a first prediction value for performing branch prediction on a branch instruction, wherein the first intermediate parameter includes a provided item, a valid bit of the provided item, and a candidate item corresponding to the branch prediction performed by the TAGE predictor on the branch instruction; A GEHL predictor is configured to obtain a second intermediate parameter and a second prediction value for performing branch prediction on the branch instruction, wherein the second intermediate parameter includes a summation result corresponding to the branch prediction performed by the GEHL predictor on the branch instruction, and the summation result is a reference for the GEHL predictor to determine the second prediction value; A combined predictor for determining a plurality of sub-indexes by recombining according to a predetermined rule a PC value, a first intermediate parameter, a first predicted value, a second intermediate parameter, and designated bits of the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence level of the third predicted value based on the recombined plurality of sub-indexes, wherein each sub-index is obtained by concatenating designated bits of the PC value, a provided item, a valid bit of the provided item, a candidate item, and a summed result corresponding to the branch instruction according to the predetermined rule, and wherein the designated bits utilized by any two sub-indexes differ, and the combined predictor is configured to: provide a saturation counter for each sub-index indicating a historical branch situation of the corresponding sub-index, and update the saturation counter corresponding to the sub-index associated with the branch instruction after obtaining a branch result of the corresponding branch instruction; determine a third predicted value and a confidence level of the third predicted value based on the sum of count values ​​in the corresponding saturation counters according to the plurality of sub-indexes corresponding to a branch instruction; and A final predictor is used to generate a query index based on the PC value corresponding to the branch instruction, the third prediction value and the confidence of the third prediction value, and use the query index to determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table, wherein the pattern history table stores historical branch situations indicating the branch instruction corresponding to the corresponding query index through a saturation counter.

8. The branch predictor according to claim 7, wherein: Also includes: A perceptron predictor, the perceptron predictor being configured to: perform branch prediction on the branch instruction according to the global history and local history records of the branch instruction to obtain a fourth prediction value; Among them, the final predictor is used to generate a query index according to the PC value, the third prediction value, the confidence of the third prediction value, and the fourth prediction value corresponding to the branch instruction, and determine the final prediction value corresponding to the branch instruction from a predetermined pattern history table based on the query index.

9. A processor, characterized in that: include: A branch predictor configured to execute the branch prediction method according to any one of claims 1 to 6 on a branch instruction to be predicted to determine a final prediction value corresponding to the branch instruction; or, the branch predictor according to claim 7 or 8, configured to determine a final prediction value corresponding to the branch instruction to be predicted; One or more processing units are configured to speculatively execute executable instructions corresponding to the taken branch based on a final prediction value corresponding to the branch instruction by the branch predictor.

10. An electronic device, characterized in that: include: One or more processors as claimed in claim 9; as well as a memory, wherein the memory is used to store executable instructions; The one or more processors are configured to execute corresponding executable instructions.

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