Method, system and computer device for matching isomorphic subgraphs of a scheduling topology graph

By iteratively matching isomorphic subgraphs of a preset ontology in the scheduling topology graph and updating node attributes, the problem that the subgraph isomorphic algorithm cannot perform multiple non-repeating matches is solved, thus improving the efficiency of power system error prevention verification and matching accuracy.

CN115687710BActive Publication Date: 2026-03-20ALIBABA CLOUD COMPUTING CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-24
Publication Date
2026-03-20

AI Technical Summary

Technical Problem

Existing subgraph isomorphism algorithms cannot perform multiple non-repeating matches on a single subgraph in the scheduling topology graph, resulting in low matching efficiency.

Method used

By acquiring the power system's scheduling topology and a preset ontology, the system uses the node's attribute information to cyclically match the isomorphic subgraphs of the preset ontology in the scheduling topology. After each match, the system updates the attribute information of the matched nodes to ensure that nodes are not matched repeatedly. The system employs a hierarchical matching mechanism and a cyclic matching mechanism to improve matching efficiency.

Benefits of technology

This method enables multiple non-repeating matches of a single subgraph in the scheduling topology graph, improving matching efficiency, avoiding duplicate node matches, and ensuring the uniqueness and accuracy of the matches.

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Abstract

The application relates to a method and system for matching isomorphic subgraphs of a scheduling topology graph, and a computer device and a non-transient computer readable medium. The method comprises: obtaining a scheduling topology graph of a power system and a preset ontology; according to first attribute information of each node in the scheduling topology graph, matching isomorphic subgraphs of the preset ontology in the scheduling topology graph in a loop, and updating the first attribute information of the matched nodes in the scheduling topology graph according to the matching result after each matching, so that the matched nodes are no longer matched or the number of times of being allowed to be matched is reduced by one, wherein the first attribute information is used for marking whether the nodes are allowed to be matched or the number of times of being allowed to be matched; and outputting all the matched isomorphic subgraphs. Through the application, the problem that the subgraph isomorphism algorithm in the related art cannot repeatedly match a single subgraph in the scheduling topology graph for multiple times is solved, confusion in matching is avoided, and the matching efficiency is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power dispatching, and in particular to a same-subgraph matching method and system for a dispatching topology graph, a computer device, and a non-transitory computer readable medium. BACKGROUND

[0002] For a given data graph G and a query graph Q, subgraph isomorphism is to find all subgraphs in G that have the same structure as Q. In a dispatching topology graph, matching an ontology with a preset structure can use a subgraph isomorphism algorithm.

[0003] VF2 is a classic subgraph isomorphism algorithm. The VF2 algorithm ends after obtaining a matching result for a single subgraph. However, in a dispatching topology graph, there are a large number of similar structures, and therefore multiple non-repeated matching results need to be matched for a single subgraph when performing subgraph matching.

[0004] The subgraph isomorphism algorithm of the related technology cannot perform multiple non-repeated matching for a single subgraph in a dispatching topology graph. SUMMARY

[0005] The embodiments provide a same-subgraph matching method and system for a dispatching topology graph, a computer device, and a non-transitory computer readable medium to solve the problem that the subgraph isomorphism algorithm of the related technology cannot perform multiple non-repeated matching for a single subgraph in a dispatching topology graph.

[0006] A same-subgraph matching method for a dispatching topology graph includes:

[0007] Obtaining a dispatching topology graph of a power system and a preset ontology, wherein the dispatching topology graph includes an abstract model of a device, and the preset ontology includes a device structure and a wiring mode;

[0008] According to first attribute information of each node in the dispatching topology graph, matching a same-subgraph of the preset ontology in the dispatching topology graph in a loop, and updating the first attribute information of a matched node in the dispatching topology graph according to a matching result after each matching to make the matched node no longer be matched or the number of times of being allowed to be matched decrease by one, wherein the first attribute information is used to mark whether a node is allowed to be matched or the number of times of being allowed to be matched;

[0009] Outputting all same-subgraphs matched in the loop.

[0010] In some embodiments, according to the first attribute information of each node in the dispatching topology graph, matching the same-subgraph of the preset ontology in the dispatching topology graph in the loop includes:

[0011] Obtaining a to-be-matched node in the preset ontology;

[0012] obtain a candidate node from the scheduling topology graph;

[0013] in a case where the topology constraints of the node to be matched and the candidate node are consistent, determine whether the candidate node is allowed to be matched according to first attribute information of the candidate node;

[0014] in a case where the candidate node is allowed to be matched, determine that the candidate node is successfully matched with the node to be matched.

[0015] In some embodiments, the node to be matched further includes second attribute information; and the cyclically matching the isomorphic subgraphs of the preset ontology in the scheduling topology graph further includes:

[0016] determine whether a neighboring node of the candidate node is marked with the second attribute information;

[0017] in a case where the neighboring node of the candidate node is marked with the second attribute information, determine that the candidate node is successfully matched with the node to be matched.

[0018] In some embodiments, the scheduling topology graph includes a plurality of levels of topology structures; and the method further includes:

[0019] performing matching of isomorphic subgraphs layer by layer from low to high in the plurality of levels of the scheduling topology graph; and wherein the second attribute information is added to a node of the isomorphic subgraph when the isomorphic subgraph is successfully matched in a topology structure of a next level.

[0020] In some embodiments, the second attribute information corresponds to a preset ontology used for successfully matching the isomorphic subgraph in the topology structure of the next level.

[0021] In some embodiments, after outputting all the isomorphic subgraphs cyclically matched, the method further includes:

[0022] fusing the isomorphic subgraphs of the scheduling topology graph with information of the preset ontology to obtain an error-proof knowledge graph, wherein the information of the preset ontology includes device structures, wiring modes, and preset error-proof rules.

[0023] A system for matching isomorphic subgraphs of a scheduling topology graph, comprising:

[0024] a graph database configured to obtain a scheduling topology graph of a power system, wherein the scheduling topology graph includes an abstract model of a device;

[0025] a preset ontology library including a plurality of preset ontologies, wherein the preset ontologies include device structures and wiring modes;

[0026] The isomorphic subgraph matching module is configured to match the isomorphic subgraph of the preset ontology in the scheduling topology graph according to the first attribute information of each node in the scheduling topology graph, and update the first attribute information of the matched node in the scheduling topology graph according to the matching result after each matching, so that the matched node is no longer matched or the number of times of being allowed to be matched is reduced by one, wherein the first attribute information is used to mark whether the node is allowed to be matched or the number of times of being allowed to be matched.

[0027] The output module is configured to output all the matched isomorphic subgraphs.

[0028] In some embodiments, the isomorphic subgraph matching module comprises:

[0029] The first obtaining unit is configured to obtain a to-be-matched node in the preset ontology;

[0030] The second obtaining unit is configured to obtain a candidate node from the scheduling topology graph;

[0031] The first judging unit is configured to, when the topology constraint of the to-be-matched node and the candidate node is consistent, judge whether the candidate node is allowed to be matched according to the first attribute information of the candidate node;

[0032] The determining unit is configured to, when the candidate node is allowed to be matched, determine that the candidate node is successfully matched with the to-be-matched node.

[0033] The updating unit is configured to update the first attribute information of the candidate node.

[0034] In some embodiments, the to-be-matched node further comprises second attribute information, and the isomorphic subgraph matching module further comprises:

[0035] The second judging unit is configured to judge whether the candidate node is marked with the second attribute information;

[0036] The determining unit is further configured to, when the candidate node is marked with the second attribute information, determine that the candidate node is successfully matched with the to-be-matched node.

[0037] In some embodiments, the scheduling topology graph comprises a plurality of hierarchical topology structures, and the isomorphic subgraph matching module is configured to:

[0038] Match the isomorphic subgraph layer by layer from low to high in the plurality of hierarchical topology structures of the scheduling topology graph, wherein the second attribute information is added to the candidate node after successfully matching the isomorphic subgraph in the topology structure of the next level.

[0039] In some embodiments, the second attribute information corresponds to a preset ontology used for successfully matching the isomorphic subgraph in the next level of the topology structure.

[0040] In some embodiments, the system further comprises:

[0041] a graph fusion module configured to fuse information of the preset ontology into the isomorphic subgraph of the scheduling topology graph to obtain an error-proof knowledge graph, wherein the information of the preset ontology comprises device structure and wiring mode.

[0042] A computer device comprising a memory and a processor, the memory storing a computer program, and the processor configured to execute the computer program to perform the isomorphic subgraph matching method of the scheduling topology graph.

[0043] A non-transitory computer readable medium storing a computer program, wherein the computer program is configured to execute the isomorphic subgraph matching method of the scheduling topology graph when executed.

[0044] Compared with the related art, the isomorphic subgraph matching method of the scheduling topology graph, the system, the computer device and the non-transitory computer readable medium provided in the present embodiment, by obtaining a scheduling topology graph of a power system and a preset ontology, wherein the scheduling topology graph comprises an abstract model of a device, and the preset ontology comprises device structure and wiring mode; according to first attribute information of each node in the scheduling topology graph, the isomorphic subgraph of the preset ontology is matched in the scheduling topology graph in a loop, and the first attribute information of the matched node in the scheduling topology graph is updated according to the matching result after each matching, so that the matched node is no longer matched or the number of times of being allowed to be matched is reduced by one, wherein the first attribute information is used to mark whether the node is allowed to be matched or the number of times of being allowed to be matched; and all isomorphic subgraphs matched in the loop are output, the problem that the subgraph isomorphism algorithm of the related art cannot be matched multiple times without repetition for a single subgraph in the scheduling topology graph is solved, multiple times of matching without repetition for a single subgraph in the scheduling topology graph are realized, and the matching efficiency is improved.

[0045] The details of one or more embodiments of the present application are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the present application will be apparent from the description of the embodiments and from the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0046] The accompanying drawings, which form a part of the present application, are intended to provide further understanding of the present application, and are used to interpret the illustrative embodiments of the present application and their descriptions, and do not constitute improper limitations on the present application. In the drawings:

[0047] Figure 1 is a flowchart of the error-proof checking method of the power system of the present embodiment.

[0048] Figure 2 is a flowchart of the isomorphic subgraph matching method of the dispatching topology graph of the present embodiment.

[0049] Figure 3 is an optional flowchart of the isomorphic subgraph matching method of the dispatching topology graph of the present embodiment.

[0050] Figure 4 is a structural schematic diagram of the dispatching topology graph with multiple levels of the present embodiment.

[0051] Figure 5 is a structural schematic diagram of the isomorphic subgraph matching system of the dispatching topology graph of the present embodiment.

[0052] Figure 6 is an optional structural schematic diagram of the isomorphic subgraph matching system of the dispatching topology graph of the present embodiment.

[0053] Figure 7 is a hardware structural schematic diagram of the computer device of the present embodiment. DETAILED DESCRIPTION

[0054] In order to more clearly understand the purpose, technical solution and advantages of the present application, the present application is described and explained below in conjunction with the drawings and embodiments.

[0055] In the field of power dispatching, operation tickets are used for power dispatching. The review and order of the operation ticket need to be checked according to specific rules to ensure that the operation does not violate the relevant rules of power. These rules come from the relevant procedures and specification documents in dispatching, which are called anti-misoperation rules. The correctness and error-free checking of the operation ticket is the anti-misoperation checking.

[0056] The checking of the operation ticket is one of the core work of the dispatching departments at all levels of the power grid. The correctness of the operation order in the operation ticket is directly related to whether the power grid maintenance work can proceed normally, and even affects the safety of power grid operation and the personal safety of the operating personnel. Therefore, in the dispatching business at all levels of the power, the operation ticket needs to be audited.

[0057] In the operation ticket anti-misoperation system of the related art, the electrical main wiring mode and the device type are mostly realized by the way of "manual analysis + hard-coded", which does not have replicability, and has the disadvantages of re-delivery and re-maintenance, poor expansibility, etc.

[0058] Therefore, in the present embodiment, an anti-misoperation checking method based on an anti-misoperation knowledge graph is adopted. Figure 1 is a flowchart of the anti-misoperation checking method of the power system of the present embodiment, as shown in Figure 1 The flowchart includes the following steps:

[0059] In step S101, a dispatching topology graph of the power system is acquired, wherein the dispatching topology graph comprises an abstract model of devices and real-time data of the devices.

[0060] In step S102, a preset ontology in a preset ontology library is matched on the dispatching topology graph, wherein the preset ontology comprises a device structure and a wiring mode, and each preset ontology corresponds to a preset misoperation prevention rule.

[0061] In step S103, the device structure, the wiring mode and the preset misoperation prevention rule corresponding to the matched preset ontology are fused into the dispatching topology graph to obtain a misoperation prevention knowledge graph.

[0062] In step S104, an operation order of the power system is checked for misoperation prevention according to the misoperation prevention knowledge graph.

[0063] Different from the relational database used in the related art, the above steps fuse the preset misoperation prevention rule on the dispatching topology graph in a manner of matching the preset ontology, so as to form the misoperation prevention knowledge graph. Compared with the generation of the relational database for a new power system in the related art which needs a large amount of manual work, the above steps can quickly and easily automatically generate the misoperation prevention knowledge graph based on the dispatching topology graph by pre-setting the ontology library, thereby reducing the input of manual work. Moreover, the preset ontology library formed can also be used to generate the misoperation prevention knowledge graph for the subsequent power system. In addition, when the topology structure and other information of the power system change or a new ontology appears, the above steps can also realize the rapid evolution of the misoperation prevention knowledge graph.

[0064] In addition, the above misoperation prevention checking method is based on the dispatching topology graph and the misoperation prevention ontology, uses a matching algorithm to decouple the knowledge data and the calculation of power, loads the knowledge into the graph to form the misoperation prevention knowledge graph through offline matching, and improves the efficiency of real-time checking.

[0065] The above dispatching topology graph comprises a topology graph constituted by an abstract model of devices, and further comprises real-time data of each device in the topology graph. In the power system, a common information model (CIM) of power is usually used to represent the topology structure of the power system. The power CIM is an object-oriented data model, which comprises public classes, attributes, relationships and the like, and is an abstract model representing all main devices of a power enterprise. The power CIM represents the public classes and attributes of the devices and the relationship therebetween. The CIM model uses a universal modeling language (UML) to describe, maps a traditional entity-relationship diagram (ER diagram) into a complete object-oriented expression, so as to ensure the unity of the data model and improve the openness of the model. The CIM model describes the static relationship between the devices and does not contain dynamic information such as the real-time state of the devices.

[0066] The above-mentioned equipment refers to each participant in the power system, including but not limited to various conductive equipment objects, such as reactors, capacitors, switches, loads, lines, buses, transformers, generators, and the like. In addition, the equipment of the CIM can also include objects for describing companies, regions, transactions, sections, and tie lines.

[0067] The real-time data of the equipment refers to data for indicating the real-time state of the entity state. For example, the real-time data of the equipment can include remote signaling data and remote measurement data. The remote signaling data refers to the on-off state of the remote communication data, such as the on-off state of a circuit breaker or disconnector, the action / reset state of a protection signal, the input / output state of an automatic generation control (AGC) / automatic voltage control (AVC) function, and the like, which is usually represented by 1 or 2 binary bits. The remote measurement data refers to real-time data received by a telemetering terminal through a sensor, which comes from a telemetering object and reflects the digital characteristics or state of the telemetering object.

[0068] The dispatching topology diagram is a topology diagram including the static relationship between the equipment of the power system and the real-time data of each equipment. In some embodiments, the dispatching topology diagram can be obtained by combining the power CIM model with the remote signaling data and the remote measurement data. For example, the power common information model of the power system is obtained, and the power common information model is simplified and normalized to obtain a simplified power common information model, wherein the simplified power common information model includes an abstract model of the equipment; the remote signaling data and the remote measurement data of each equipment in the power system are obtained; and the remote signaling data and the remote measurement data are fused with the equipment in the simplified power common information model to obtain the dispatching topology diagram.

[0069] In the above-mentioned manner, the dispatching topology diagram can be automatically obtained. In the above-mentioned embodiments, the simplification and normalization of the power common information model refers to topology calculation of the power common information model, and removal of equipment irrelevant to the anti-misoperation check (such as objects for describing companies, regions, transactions, and the like), so as to reduce the size of the dispatching topology diagram and shorten the time required for the subsequent matching process.

[0070] The preset ontology library is composed of a preset ontology and a preset anti-misoperation rule specified for each ontology. The ontology of the present embodiment includes an equipment structure and a wiring mode, wherein the equipment structure is also composed of a plurality of equipment and a static relationship of the equipment, and therefore, the equipment structure is also a topology diagram like the power CIM. The preset ontology is usually composed of a typical equipment structure, and the power CIM of an actual power system can be regarded as being composed of typical equipment structures as combination units.

[0071] The matching process in the step S102 can use graph simulation, subgraph isomorphism, etc. For example, the subgraph isomorphism algorithm can be VF2 algorithm or UIImann algorithm. For the isomorphism problem of graphs, the UIImann algorithm uses enumeration to find subgraph isomorphism, and the purpose is to find all subgraphs isomorphic to a given preset graph in an original graph. In the embodiment, the preset graph is each preset ontology in the preset ontology library, and the original graph is the scheduling topology graph. In some embodiments, matching the preset ontology in the preset ontology library on the scheduling topology graph includes searching and matching the subgraph isomorphic to the preset ontology in the preset ontology library on the scheduling topology graph, and establishing a corresponding relationship between the matched preset ontology and the subgraph of the scheduling topology graph.

[0072] However, there are some similar structures in the scheduling topology graph, and the traditional subgraph isomorphism algorithm cannot match the similar structures in the scheduling topology graph without repetition. Therefore, the embodiment provides a scheduling topology graph isomorphic subgraph matching method. Figure 2 is a flowchart of the scheduling topology graph isomorphic subgraph matching method of the embodiment, as shown in Figure 2 The flowchart includes the following steps:

[0073] In step S201, the scheduling topology graph of the power system and the preset ontology are obtained, wherein the scheduling topology graph includes the abstract model of the device, and the preset ontology includes the device structure and the wiring mode.

[0074] In step S202, the isomorphic subgraph of the preset ontology is matched in the scheduling topology graph according to the first attribute information of each node in the scheduling topology graph, and the first attribute information of the matched node in the scheduling topology graph is updated according to the matching result after each matching, so that the matched node is no longer matched or the number of times of being allowed to be matched is reduced by one, wherein the first attribute information is used to mark whether the node is allowed to be matched or the number of times of being allowed to be matched.

[0075] In step S203, all the isomorphic subgraphs matched in the cycle are output.

[0076] Through the above steps, the first attribute information of whether the node is allowed to be matched or the number of times of being allowed to be matched is marked at each node of the scheduling topology graph, and the first attribute information is updated after each isomorphic subgraph is matched, and then the next isomorphic subgraph matching is performed in the cycle. The above steps can not only match multiple isomorphic subgraphs to a single preset ontology through cycle matching, but also avoid repeated matching of the matched nodes by marking the first attribute information of the nodes to indicate whether the nodes are allowed to be matched or the number of times of being allowed to be matched in the subsequent cycle matching.

[0077] Among them, the device structure includes alternating current and direct current device types, which refers to the specific types of alternating current devices and direct current devices in the power primary device, such as line ground knife, high resistance knife switch, series compensation, line switch, etc. in alternating current; pole, converter, pole bus, grounding pole bus, etc. in direct current.

[0078] Among them, the wiring mode: the electrical primary device (such as generator, transformer, circuit breaker, etc.) is connected together in a specific form by wire, cable to form a loop, called electrical main wiring. Typical electrical wiring modes include single busbar wiring, double busbar wiring, 3 / 2 series wiring, bridge type wiring, unit wiring, four corner wiring, etc.

[0079] In this embodiment, in order to enable the preset body to represent the electrical wiring mode, the alternating current device type and the direct current device type, the preset body object of the embodiment can include the following attribute information:

[0080] Object name: the structure name of the object, such as "3 / 2 series wiring".

[0081] Field: alternating current (AC) / direct current (DC).

[0082] Type: describes the type of the structure.

[0083] Subtype: describes the subtype of the structure.

[0084] Node: the node contained in the structure and the type.

[0085] Edge: the connection relationship of the edge contained in the structure.

[0086] No repeated matching point: after successful matching, no repeated matching point cannot continue to match in the subsequent process, to ensure the uniqueness of the matching.

[0087] Positioning node: part of the node is used for positioning of the structure, but does not belong to the structure. Used to ensure the accuracy of the matching.

[0088] Attribute update: the attribute to be updated after matching.

[0089] Rule ID: the anti-misoperation checking rule ID linked with the structure, used for subsequent anti-misoperation checking.

[0090] Among them, in the isomorphic subgraph matching method provided in this embodiment, the object name, field, type, subtype, node, edge and no repeated matching point attribute are necessary items; the positioning node, attribute update and rule ID are optional items.

[0091] The preset ontology object can uniformly identify information of electrical wiring modes, direct current and alternating current device types, and the ontology object is a general design and does not contain any specific device information, and has good expansibility and generalization.

[0092] For the three core scenes of electrical wiring mode, alternating current device type identification and direct current device type identification, the preset ontology of the embodiment can be one of the following:

[0093] Alternating current scene: double busbar wiring, single busbar wiring, unit wiring, 3 / 2 series wiring, 4 / 3 series wiring, incomplete series wiring, bridge type wiring, four corner wiring, filter unit, switch unit, line switch unit, line ground knife unit, line knife gap unit, series compensation unit, series resistance unit, bus tie switch unit, line single-sided combination, line double-sided combination.

[0094] Direct current scene: converter unit, tie bus unit, pole bus unit, direct current line unit, direct current busbar unit, conversion bus knife gap unit, direct current neutral bus unit, metal return switch unit, filter unit, grounding bus unit, grounding pole large ground return unit, high-speed grounding switch unit, grounding pole line unit, pole address knife gap unit, converter state unit, filter state unit, grounding pole line state unit, grounding pole bus state unit, pole state unit, direct current line state unit, pole operation mode state unit.

[0095] In the step S202, according to the first attribute information of each node in the scheduling topology graph, the step of cyclically matching the isomorphic subgraph of the preset ontology in the scheduling topology graph can include the following steps: obtaining a to-be-matched node in the preset ontology; obtaining a candidate node from the scheduling topology graph; in the case that the topological constraints of the to-be-matched node and the candidate node are consistent, judging whether the candidate node is allowed to be matched according to the first attribute information of the candidate node; and in the case that the candidate node is allowed to be matched, determining that the candidate node is successfully matched with the to-be-matched node.

[0096] In the attribute information of the preset ontology, the non-repeated matching point attribute is the first attribute information of the above embodiment. The first attribute information can represent the number of times that the candidate node can be matched, and the number of times that the candidate node can be matched is reduced by one after each successful matching, until the first attribute information is zero, indicating that the candidate node cannot be matched again. The first attribute information can also represent whether the candidate node is in a matchable state, for example, Y represents a matchable state and N represents an unmatchable state. After each successful matching, how to update the first attribute information can be determined based on the attribute information of the "attribute update" in the preset ontology, for example, the first attribute information of the candidate node is modified from Y to N after one successful matching, or the first attribute information of the candidate node is modified from Y to N after a preset number of successful matchings.

[0097] Figure 3 is an optional flow chart of the isomorphic subgraph matching method of the scheduling topology graph of the present embodiment, as shown in the figure, the flow comprises the following steps: Figure 3

[0098] Step S301, input the scheduling topology graph G and the preset ontology g.

[0099] Step S302, obtain all the nodes to be matched in the preset ontology g.

[0100] Step S303, judge whether the nodes to be matched are traversed, if there are untraversed nodes to be matched, execute step S304, otherwise execute step S309.

[0101] Step S304, obtain the candidate node from the scheduling topology graph G, and form a candidate node pair with the node to be matched.

[0102] Step S305, judge whether the candidate node pair is traversed, if there are untraversed candidate node pairs, execute step S306, otherwise execute step S302.

[0103] Step S306, node topology constraint consistency judgment.

[0104] Step S307, node attribute constraint consistency judgment.

[0105] Step S308, candidate node matching success, execute step S304, and match the next candidate node pair.

[0106] Step S309, all the nodes to be matched of the preset ontology g are matched, judge whether the subgraph is matched, if the subgraph is matched, execute step S311, otherwise execute step S310.

[0107] Step S310, output all the matched subgraphs, or the intermediate result of the unmatched subgraph.

[0108] Step S311, update the attribute information of the matched nodes in the scheduling topology graph G, so as to continue searching the preset ontology g in other nodes.

[0109] ​In the dispatching topology of the power system, there are cases where the same structures exist between different connection modes / equipment types, which can cause matching confusion errors. Therefore, in the present embodiment, a second attribute information can be added in the to-be-matched node of the preset ontology to avoid matching confusion. In this case, in step S202, when the isomorphic subgraph of the preset ontology is matched in the dispatching topology, in addition to the topological constraint consistency judgment and the first attribute information check, it can also be judged whether the adjacent node of the candidate node is marked with the second attribute information; in the case where the adjacent node of the candidate node is marked with the second attribute information, it is determined that the candidate node and the to-be-matched node are successfully matched. The second attribute information of the present embodiment is the "positioning node" attribute information in the preset ontology described above.

[0110] Compared with randomly selecting nodes for matching in all nodes in the related art, in order to improve the matching efficiency, a hierarchical matching manner is adopted in the present embodiment. The dispatching topology includes multiple levels of topological structures. Figure 4 is a structural diagram of the dispatching topology with multiple levels of the present embodiment, as Figure 4 shown, the structure of the upper layer includes structure 1, the structure of the lower layer includes structure a and structure b, and structure a and structure b and the edges connected thereto constitute structure 1.

[0111] When performing hierarchical matching, the present embodiment performs matching of isomorphic subgraphs from low to high layer by layer from the multiple levels of the dispatching topology; that is, matching of structure a and structure b is performed first, and after the matching is completed, matching of the upper layer structure 1 is performed. The second attribute information is added to the nodes of the isomorphic subgraph when the isomorphic subgraph is successfully matched in the topological structure of the next level.

[0112] The above hierarchical matching manner uses the information (i.e., the second attribute information) obtained by matching in the next level to position and constrain, for example, after the lower layer completes the matching, the nodes that are successfully matched are updated with a specific attribute, such as attribute A=1; in the matching of the upper layer, A=1 of the lower layer unit can be used to constrain and position, because there can be many similar structures (with different business meanings) in the lower layer, but there is only one with A=1, so it can prevent confused matching, effectively improving the accuracy and flexibility of matching. In some of the embodiments, the second attribute information corresponds to the preset ontology used for successfully matching the isomorphic subgraph in the topological structure of the next level. For example, if the second attribute information corresponding to the preset ontology is A=1, after successfully matching the isomorphic subgraph, the second attribute information of the nodes in the isomorphic subgraph is updated to A=1.

[0113] The matching method of the isomorphic subgraph provided in the embodiment can effectively solve the problems that the traditional subgraph isomorphism algorithm cannot be matched multiple times and the original structure is easily confused in matching, and improve the matching efficiency.

[0114] In some embodiments, after step S203, the information of the preset ontology is fused into the isomorphic subgraph of the dispatching topology graph to obtain an error prevention knowledge graph, where the information of the preset ontology includes device structure, wiring mode and preset error prevention rules. Through the above manner, the ontology matching can be automatically performed on the dispatching topology graph, and the wiring mode, device structure and other information of the ontology can be fused into the dispatching topology graph without manual analysis and customized development, which can greatly improve the efficiency and quickly realize the identification of new wiring mode and new device type as the system structure evolves.

[0115] The embodiment further provides an isomorphic subgraph matching system of a dispatching topology graph. Figure 5 FIG. 1 is a structural schematic diagram of the isomorphic subgraph matching system of the dispatching topology graph according to the embodiment, as shown in the figure, the system includes: Figure 5

[0116] a graph database 51, configured to acquire a dispatching topology graph of a power system, where the dispatching topology graph includes an abstract model of a device.

[0117] a preset ontology library 52, including a plurality of preset ontologies, and each preset ontology including device structure and wiring mode.

[0118] an isomorphic subgraph matching module 53, configured to cyclically match isomorphic subgraphs of the preset ontologies in the dispatching topology graph according to first attribute information of each node in the dispatching topology graph, and update the first attribute information of the matched nodes in the dispatching topology graph according to the matching result after each matching, so that the matched nodes are no longer matched or the number of times of being allowed to be matched is reduced by one, where the first attribute information is used to mark whether the node is allowed to be matched or the number of times of being allowed to be matched.

[0119] an output module 54, configured to output all the isomorphic subgraphs matched in the cycle.

[0120] In some embodiments, the isomorphic subgraph matching module 53 includes: a first acquisition unit, configured to acquire a to-be-matched node in the preset ontology; a second acquisition unit, configured to acquire a candidate node from the dispatching topology graph; a first judgment unit, configured to judge whether the candidate node is allowed to be matched according to the first attribute information of the candidate node in the case that the topological constraints of the to-be-matched node and the candidate node are consistent; a determination unit, configured to determine that the candidate node is successfully matched with the to-be-matched node in the case that the candidate node is allowed to be matched; and an update unit, configured to update the first attribute information of the candidate node. ​

[0121] In some embodiments, the node to be matched further includes second attribute information; the isomorphic subgraph matching module further includes: a second judgment unit, used to judge whether the candidate node is marked with second attribute information; and a determination unit, used to determine that the candidate node and the node to be matched are successfully matched when the candidate node is marked with second attribute information.

[0122] In some embodiments, the scheduling topology graph includes a multi-level topology structure; the isomorphic subgraph matching module is used to: match isomorphic subgraphs from the multiple levels of the scheduling topology graph layer by layer from low to high; wherein, the second attribute information is added to the candidate node after a successful matching of an isomorphic subgraph in the next level of the topology structure.

[0123] In some of these embodiments, the second attribute information corresponds to a preset ontology used to successfully match isomorphic subgraphs in the next level of topology.

[0124] Figure 6 This is a schematic diagram of an optional structure of the isomorphic subgraph matching system of the scheduling topology graph in this embodiment, such as... Figure 6 As shown, in some embodiments, the system further includes: a graph fusion module 55, used to fuse information of a preset ontology in the isomorphic subgraph of the scheduling topology graph to obtain a mis-prevention knowledge graph, wherein the information of the preset ontology includes: device structure and wiring method.

[0125] This embodiment also provides a computer device. Figure 7 This is a schematic diagram of the hardware structure of the computer device in this embodiment, as shown below. Figure 7 As shown, the computer device may include a processor 71 and a memory 72 storing computer program instructions.

[0126] Specifically, the processor 71 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0127] The memory 72 can include a mass storage for data or instructions. By way of example, and without limitation, the memory 72 can include a hard disk drive (HDD), a floppy disk drive, a solid-state drive (SSD), a flash drive, a compact disc (CD) or DVD, a tape, a magnetic or optical or magneto-optical storage or a combination of two or more of these. The memory 72 can be removable and / or built-in (or fixed) where appropriate. The memory 72 can be internal or external at appropriate. In particular embodiments, the memory 72 is a nonvolatile memory. In particular embodiments, the memory 72 includes a Read-Only Memory (ROM) and a Random-Access Memory (RAM). Where appropriate, this ROM can be mask programmed ROM, Programmable ROM (PROM), Erasable Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), Electrically Alterable ROM (EAROM), or FLASH memory or a combination of two or more of these. Where appropriate, this RAM can be Static Random-Access Memory (SRAM) or Dynamic Random-Access Memory (DRAM), which can be Fast Page Mode Dynamic Random-Access Memory (FPMDRAM), Extended Data Output Dynamic Random-Access Memory (EDODRAM), Synchronous Dynamic Random-Access Memory (SDRAM), or the like.

[0128] The memory 72 can be used to store or buffer various data files needed for processing and / or communication, and possible computer program instructions executed by the processor 72.

[0129] In some embodiments, the computer device can further include a communication interface 73 and the bus 70. In which, as shown, the processor 71, the memory 72, the communication interface 73 are connected through the bus 70 and complete the communication between each other. Figure 7

[0130] The communication interface 73 is used to realize the communication between each module, device, unit and / or equipment in the embodiments of the present application. The communication interface 73 can also realize the data communication between other components, such as: external devices, image / data acquisition devices, databases, external storage and image / data processing workstations, etc.

[0131] ​Bus 70 includes hardware, software, or both, to couple components of the computer device to each other and to couple components to other components in the environment. Bus 70 includes, but is not limited to, at least one of the following: a data bus, an address bus, a control bus, an expansion bus, a local bus, etc. By way of example and not limitation, bus 70 can include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or another suitable bus or combination of two or more of these. Where appropriate, bus 70 can include one or more buses. Although the present embodiments describe and show a particular bus, the present embodiments contemplate any suitable bus or interconnect.

[0132] The computer device implements the isomorphic subgraph matching method of the scheduling topology graph in the above embodiments by running a computer program through the processor 71.

[0133] It should be noted that the specific examples in the present embodiment can refer to the examples described in the above embodiments and optional implementation manners, which will not be described herein again.

[0134] In addition, in combination with the isomorphic subgraph matching method of the scheduling topology graph provided in the above-mentioned embodiments, in the present embodiment, a non-transient computer readable medium can also be provided for implementation. The medium has a computer program stored thereon; the computer program is executed by a processor to implement any one of the isomorphic subgraph matching methods of the scheduling topology graph in the above-mentioned embodiments.

[0135] It should be understood that the specific embodiments described herein are merely exemplary and are not intended to limit the application. According to the embodiments provided in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0136] Obviously, the drawings are only some examples or embodiments of the present application, and those skilled in the art can also apply the present application to other similar situations without creative labor according to the drawings. In addition, it can be understood that although the work done in the development process can be complex and long, certain design, manufacture or production changes made by those skilled in the art according to the technical content disclosed in the present application are only routine technical means and should not be regarded as insufficient disclosure of the present application.

[0137] The term "embodiment" in the present application means that the specific features, structures or characteristics described in combination with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily mean the same embodiment, nor does it mean independence or alternatives to other embodiments. It can be clearly or implicitly understood by those skilled in the art that the embodiments described in the present application can be combined with other embodiments without conflict.

[0138] Unless otherwise defined, technical terms or scientific terms used in the present application shall have the same meaning as those commonly understood by one of ordinary skill in the art to which the present application belongs. The terms "one", "a", "an", "the", "these", and similar terms in the present application do not mean "only one" or "exactly one", but can mean "one or more". The terms "include", "contain", "have", and any variation thereof in the present application are intended to cover inclusive not exclusive inclusion; for example, processes, methods and systems, products or devices containing a series of steps or modules (units) are not limited to the listed steps or modules (units), but can include steps or modules (units) not listed, or can include other steps or modules (units) inherent to the processes, methods, products or devices. The terms "connect", "connected", "couple" and similar terms in the present application are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The term "multiple" in the present application means two or more. The term "and / or" describes the relationship between the associated objects, which means that there can be three relationships, for example, "A and / or B" can mean that A exists alone, A and B exist together, and B exists alone. Generally, the character " / " represents an "or" relationship between the associated objects. The terms "first", "second", "third" and the like in the present application are only used to distinguish similar objects, and do not represent a specific order for the objects.

[0139] The above embodiments only express several embodiments of the present application, which are described in detail and specifically, but should not be understood as a limitation on the scope of patent protection. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of the present application. Therefore, the scope of protection of the present application should be subject to the appended claims.

Claims

1. A method for matching isomorphic subgraphs in a scheduling topology graph, characterized in that, include: Obtain the dispatch topology diagram and preset entity of the power system, wherein the dispatch topology diagram includes an abstract model of the equipment, and the preset entity includes the equipment structure and wiring method; Based on the first attribute information of each node in the scheduling topology graph, the isomorphic subgraph of the preset ontology is cyclically matched in the scheduling topology graph, and the first attribute information of the matched node in the scheduling topology graph is updated according to the matching result after each match, so that the matched node is no longer matched or the number of times it is allowed to be matched is reduced by one. The first attribute information is used to mark whether the node is allowed to be matched or the number of times it is allowed to be matched. Output all isomorphic subgraphs matched in the loop.

2. The method according to claim 1, characterized in that, Based on the first attribute information of each node in the scheduling topology graph, the isomorphic subgraph of the preset ontology is cyclically matched in the scheduling topology graph, including: Obtain the node to be matched within the preset body; Candidate nodes are obtained from the scheduling topology graph; If the topological constraints of the node to be matched and the candidate node are consistent, it is determined whether the candidate node is allowed to be matched based on the first attribute information of the candidate node. If the candidate node is allowed to be matched, it is determined that the candidate node and the node to be matched are successfully matched.

3. The method according to claim 2, characterized in that, The node to be matched further includes second attribute information; the isomorphic subgraph of the preset ontology in the scheduling topology graph also includes: Determine whether the neighboring nodes of the candidate node are marked with the second attribute information; If the neighboring nodes of the candidate node are marked with the second attribute information, it is determined that the candidate node and the node to be matched are successfully matched.

4. The method according to claim 3, characterized in that, The scheduling topology graph includes a multi-level topology structure; the method further includes: The matching of isomorphic subgraphs is performed layer by layer from low to high in the multiple levels of the scheduling topology graph; wherein, the second attribute information is added to the nodes of the isomorphic subgraph when a matching isomorphic subgraph is successfully performed in the topology of the next level.

5. The method according to claim 4, characterized in that, The second attribute information corresponds to the preset ontology used to successfully match the isomorphic subgraph in the next level of topology.

6. The method according to claim 1, characterized in that, After outputting all isomorphic subgraphs matched in the loop, the method further includes: By fusing the information of the preset ontology into the isomorphic subgraph of the scheduling topology, a mis-prevention knowledge graph is obtained, wherein the information of the preset ontology includes: equipment structure, wiring method and preset mis-prevention rules.

7. A system for matching isomorphic subgraphs of a scheduling topology graph, characterized in that... include: A graph database is used to obtain the scheduling topology diagram of a power system, wherein the scheduling topology diagram includes an abstract model of the equipment; A preset body library includes multiple preset bodies, each preset body including device structure and wiring method; The isomorphic subgraph matching module is used to cyclically match the isomorphic subgraphs of the preset ontology in the scheduling topology graph according to the first attribute information of each node in the scheduling topology graph, and update the first attribute information of the matched nodes in the scheduling topology graph according to the matching result after each matching, so that the matched nodes are no longer matched or the number of times they are allowed to be matched is reduced by one. The first attribute information is used to mark whether a node is allowed to be matched or the number of times it is allowed to be matched. The output module is used to output all isomorphic subgraphs matched in the loop.

8. The system according to claim 7, characterized in that, The isomorphic subgraph matching module includes: The first acquisition unit is used to acquire the node to be matched within the preset body; The second acquisition unit is used to acquire candidate nodes from the scheduling topology graph; The first judgment unit is used to determine whether the candidate node is allowed to be matched based on the first attribute information of the candidate node when the topological constraints of the node to be matched and the candidate node are consistent. The determining unit determines that, if the candidate node is allowed to be matched, the candidate node is successfully matched with the node to be matched; An update unit is used to update the first attribute information of the candidate node.

9. The system according to claim 8, characterized in that, The node to be matched further includes second attribute information; the isomorphic subgraph matching module further includes: The second judgment unit is used to determine whether the adjacent nodes of the candidate node are marked with the second attribute information; The determining unit is further configured to determine that the candidate node and the node to be matched are successfully matched when the adjacent nodes of the candidate node are marked with the second attribute information.

10. The system according to claim 9, characterized in that, The scheduling topology graph includes a multi-level topology structure; the isomorphic subgraph matching module is used for: The matching of isomorphic subgraphs is performed layer by layer from low to high in the multiple levels of the scheduling topology graph; wherein, the second attribute information is added to the candidate node after a successful matching of an isomorphic subgraph in the topology structure of the next level.

11. The system according to claim 10, characterized in that, The second attribute information corresponds to the preset ontology used to successfully match the isomorphic subgraph in the next level of topology.

12. The system according to claim 7, characterized in that, The system also includes: The graph fusion module is used to fuse the information of the preset ontology in the isomorphic subgraph of the scheduling topology graph to obtain a mis-prevention knowledge graph, wherein the information of the preset ontology includes: equipment structure and wiring method.

13. A computer device, comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the isomorphic subgraph matching method for the scheduling topology graph according to any one of claims 1 to 6.

14. A non-transient computer-readable medium, characterized in that, The non-transient computer-readable medium stores a computer program, wherein the computer program is configured to execute, at runtime, the isomorphic subgraph matching method for the scheduling topology graph according to any one of claims 1 to 6.

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