ESD protection circuit of the chip

Abstract

The present application provides an electrostatic protection circuit for a chip, including: a monitoring unit configured to generate a trigger signal when there is an electrostatic pulse on a power pad; a discharge transistor located between the power pad and a ground pad and configured to conduct under the control of the trigger signal to discharge electrostatic charges to the ground pad; and a first controllable voltage dividing unit connected to the discharge transistor and configured to switch operating modes under the control of a control signal, where the operating modes include a voltage dividing mode, and when the controllable voltage dividing unit operates in the voltage dividing mode, it is configured to bear a part of the voltage applied to the discharge transistor by the electrostatic charges. By fabricating multiple chips in one chip run and setting the number of controllable voltage dividing units in the electrostatic protection circuit provided by this solution that are in the voltage dividing mode through the control signal, an electrostatic protection circuit adapted to different voltage levels can be obtained, reducing the manufacturing cost.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and particularly to an electrostatic protection circuit for a chip. Background Art

[0002] Electrostatic charges are everywhere. Without an electrostatic protection circuit, a chip will quickly be damaged by electrostatic charges introduced for various reasons and will almost be fatally damaged.

[0003] Therefore, an electrostatic protection circuit is usually provided in a chip. The electrostatic protection circuit is used to timely discharge electrostatic charges to prevent the protected circuit from failing or even burning out due to the high voltage brought by the electrostatic charges. Summary of the Invention

[0004] This application provides an electrostatic protection circuit for a chip, aiming to provide an electrostatic protection that adapts to different voltage levels.

[0005] An embodiment of this application provides an electrostatic protection circuit for a chip. The chip includes a power pad and a ground pad. The electrostatic protection circuit includes:

[0006] A monitoring unit for generating a trigger signal when there is an electrostatic pulse on the power pad;

[0007] A discharge transistor located between the power pad and the ground pad, for conducting under the control of the trigger signal to discharge the electrostatic charge to the ground pad;

[0008] A first controllable voltage division unit connected to the discharge transistor, for switching the working mode under the control of a control signal. Among them, the working mode includes a voltage division mode. When the controllable voltage division unit works in the voltage division mode, it is used to bear part of the voltage applied to the discharge transistor by the electrostatic charge.

[0009] In one embodiment, the electrostatic protection circuit further includes:

[0010] A second controllable voltage division unit connected to the first controllable voltage division unit, for switching the working mode under the control of a control signal. Among them, the working mode includes a voltage division mode.

[0011] In one embodiment, when the discharge transistor is a P-type transistor, its source is connected to the power pad, and its drain is connected to the first end of the first controllable voltage division unit;

[0012] The second end of the first controllable voltage division unit is connected to the first end of the second controllable unit, and the second end of the second controllable voltage division unit is connected to the ground pad.

[0013] In one embodiment, when the discharge transistor is an N-type transistor, its source is connected to the ground pad, and its drain is connected to the second end of the first controllable voltage division unit;

[0014] The first end of the first controllable voltage-dividing unit is connected to the second end of the second controllable unit, and the first end of the second controllable voltage-dividing unit is connected to the power supply pad.

[0015] In one embodiment, the first controllable voltage-dividing unit includes:

[0016] At least one voltage-dividing element having a first end and a second end. After being connected in sequence, the first end of the voltage-dividing element at the head end is the first end of the first controllable voltage-dividing unit, and the second end of the voltage-dividing element at the tail end after being connected in sequence is the second end of the first controllable voltage-dividing unit;

[0017] A control circuit connected to the first end of the voltage-dividing element at the head end and also connected to the second end of the voltage-dividing element at the tail end, for switching at least one voltage-dividing element from a voltage-dividing mode to a bypass mode or from a bypass mode to a voltage-dividing mode under the control of a control signal.

[0018] In one embodiment, the control circuit includes:

[0019] A first switch having a first end and a second end. Its first end is connected to the first end of the voltage-dividing element at the head end, and its second end is connected to the second end of the voltage-dividing element at the tail end.

[0020] In one embodiment, the control circuit includes:

[0021] A control transistor having a first end, a second end and a control end. Its first end is connected to the first end of the voltage-dividing element at the head end, and its second end is connected to the second end of the voltage-dividing element at the tail end;

[0022] A second switch having a first end and a second end. Its first end is connected to the power supply pad, and its second end is connected to the control end of the control transistor;

[0023] A third switch having a first end and a second end. Its first end is connected to the control end of the control transistor, and its second end is connected to the ground pad.

[0024] In one embodiment, the first switch to the third switch are one-time programmable memories.

[0025] In one embodiment, the first switch to the third switch are laser fuse devices.

[0026] In one embodiment, if the control transistor is a P-type transistor, the second switch is in a blown state, the third switch is in a non-blown state, and the first controllable voltage-dividing unit is in a bypass mode;

[0027] If the control transistor is a P-type transistor, the second switch is in a non-blown state, the third switch is in a blown state, and the first controllable voltage-dividing unit is in a voltage-dividing mode.

[0028] In one embodiment, if the control transistor is an N-type transistor, the second switch is in a blown state, the third switch is in a non-blown state, and the first controllable voltage dividing unit is in a voltage dividing mode;

[0029] If the control transistor is an N-type transistor, the second switch is in a non-blown state, the third switch is in a blown state, and the first controllable voltage dividing unit is in a bypass mode.

[0030] In one embodiment, the first switch is in a non-blown state, and the first controllable voltage dividing unit is in a bypass mode;

[0031] The first switch is in a blown state, and the first controllable voltage dividing unit is in a voltage dividing mode.

[0032] In one embodiment, the voltage dividing element includes:

[0033] A diode, whose positive electrode is the first end of the voltage dividing element and whose negative electrode is the second end of the voltage dividing element.

[0034] In one embodiment, the control end of the discharge transistor is connected to the monitoring unit.

[0035] In one embodiment, the circuit further includes a driving unit, and the control end of the discharge transistor is connected to the monitoring unit through the driving unit.

[0036] The present application provides an electrostatic protection circuit for a chip. The circuit includes a monitoring unit, a discharge transistor, and a first controllable voltage dividing unit. The monitoring unit is used to monitor electrostatic pulses and generate a trigger signal when there is an electrostatic pulse on the power supply pad. The discharge transistor is used to discharge the electrostatic charge on the power supply pad. The first controllable voltage dividing unit switches its working mode after receiving a control signal. When the first controllable voltage dividing unit operates in the voltage dividing mode, it is used to bear part of the voltage applied to the discharge transistor by the electrostatic charge. By fabricating multiple chips in one wafer, setting the working mode of the controllable voltage dividing unit in the chip according to the electrostatic voltage level used by the chip, so as to set the voltage caused by the electrostatic charge borne by the discharge transistor, an electrostatic protection circuit adapted to different electrostatic voltage levels can be obtained, reducing the chip manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0038] Figure 1 It is a structural block diagram of an electrostatic protection circuit for a chip provided by an embodiment of the present application;

[0039] Figure 2 It is a specific circuit diagram of an electrostatic protection circuit for a chip provided by another embodiment of the present application;

[0040] Figure 3 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0041] Figure 4 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0042] Figure 5 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0043] Figure 6 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0044] Figure 7 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0045] Figure 8 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0046] Figure 9 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application;

[0047] Figure 10 The specific circuit diagram of the electrostatic protection circuit of the chip provided in another embodiment of the present application.

[0048] Through the above-mentioned drawings, specific embodiments of the present application have been shown, and there will be more detailed descriptions hereinafter. These drawings and the written description are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed Description of the Embodiments

[0049] Here, the exemplary embodiments will be described in detail, and their examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0050] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include common general knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present application are pointed out by the following claims.

[0051] The present application provides another electrostatic protection circuit for a chip, aiming to reduce the manufacturing cost of the electrostatic protection circuit. The technical concept of the present application is: setting a plurality of controllable voltage-dividing units in the electrostatic protection circuit, fabricating multiple chips in one chip run, and setting the working modes of the respective controllable voltage-dividing units in the chip according to the electrostatic voltage protection level applied to the chip, so as to fabricate an electrostatic protection circuit adapted to different electrostatic voltage levels through one chip run, reducing the chip manufacturing cost.

[0052] As Figure 1 shown, an embodiment of the present application provides an electrostatic protection circuit for a chip, and the chip is provided with a power supply pad VDD and a ground pad VSS. Among them, the electrostatic protection circuit includes a monitoring unit 101, a discharge transistor 102, and a first controllable voltage-dividing unit 103-1.

[0053] Among them, the monitoring unit 101 is connected to the control end of the discharge transistor 102, and after the discharge transistor 102 is connected to the first controllable voltage-dividing unit 103-1, it is located between the power supply pad VDD and the ground pad VSS.

[0054] The monitoring unit 101 is used to monitor the static charges on the power supply pad VDD and generate a trigger signal after there are static charges on the power supply pad VDD. The discharge transistor 102 is used to conduct under the control of the trigger signal to discharge the static charges on the power supply pad VDD to the ground pad VSS.

[0055] The first controllable voltage-dividing unit 103-1 includes a voltage-dividing mode and a bypass mode. When the first controllable voltage-dividing unit 103-1 operates in the voltage-dividing mode, it is used to bear part of the voltage applied to the discharge transistor 102 by the static charges. When the first controllable voltage-dividing unit 103-1 operates in the bypass mode, the first controllable voltage-dividing unit 103-1 cannot bear part of the voltage applied to the discharge transistor 102 by the static charges.

[0056] The control signal is used to switch the working mode of the first controllable voltage-dividing unit 103-1, that is, the control signal can switch the first controllable voltage-dividing unit 103-1 from the voltage-dividing mode to the bypass mode. It can also switch the first controllable voltage-dividing unit 103-1 from the bypass mode to the voltage-dividing mode.

[0057] In one embodiment, the electrostatic protection circuit further includes a second controllable voltage dividing unit 103-2. The second controllable voltage dividing unit 103-2 is connected to the first controllable voltage dividing unit 103-1. The second controllable voltage dividing unit 103-2 is configured to switch operating modes under the control of a control signal. The operating modes of the second controllable voltage dividing unit 103-2 include a voltage dividing mode and a bypass mode, that is, the control signal can switch the second controllable voltage dividing unit 103-2 from operating in the voltage dividing mode to operating in the bypass mode, or switch the second controllable voltage dividing unit 103-2 from operating in the bypass mode to operating in the voltage dividing mode.

[0058] By switching the operating modes of the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 through a control signal, the number of controllable voltage dividing units in the electrostatic protection circuit operating in the voltage dividing mode can be set, and thus the voltage applied by the electrostatic charge to the discharge transistor 102 can be controlled.

[0059] For example, by setting both the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 to operate in the voltage dividing mode, more voltage applied to the discharge transistor 102 can be divided, thereby preventing the discharge transistor 102 from being broken down, that is, the electrostatic voltage level that the electrostatic protection circuit can withstand is higher.

[0060] By fabricating multiple chips in one chip manufacturing run and setting the number of controllable voltage dividing units in the electrostatic protection circuit operating in the voltage dividing mode through a control signal, electrostatic protection circuits suitable for different voltage levels can be obtained, thereby reducing the chip manufacturing cost.

[0061] In one embodiment, the electrostatic protection circuit may further include a third controllable voltage dividing unit, a fourth controllable voltage dividing unit,..., an Nth controllable voltage dividing unit. After connecting multiple controllable voltage dividing units in sequence and then connecting to the drain of the discharge transistor 102, and then connecting between the power supply pad VDD and the ground pad VSS, and then setting the number of controllable voltage dividing units in the electrostatic protection circuit operating in the voltage dividing mode through a control signal, the applicable voltage level range is wider.

[0062] The following describes the case where only two controllable voltage dividing units are included in the electrostatic protection circuit. The case where multiple controllable voltage dividing units are included in the electrostatic protection circuit is similar and will not be elaborated here.

[0063] In one embodiment, continue to refer to Figure 1, both the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 are provided with a first end and a second end. When the discharge transistor 102 is an N-type transistor, the source of the discharge transistor 102 is connected to the ground pad VSS, the drain of the discharge transistor 102 is connected to the second end of the first controllable voltage dividing unit 103-1, the first end of the first controllable voltage dividing unit 103-1 is connected to the second end of the second controllable voltage dividing unit 103-2, and the first end of the second controllable voltage dividing unit 103-2 is connected to the power supply pad VDD. That is, the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 adjust the voltage applied to the discharge transistor 102 between the drain of the discharge transistor 102 and the power supply pad VDD.

[0064] In one embodiment, referring to Figure 2 , when the discharge transistor 102 is a P-type transistor, the source of the discharge transistor 102 is connected to the power supply pad VDD, the drain of the discharge transistor 102 is connected to the first end of the first controllable voltage dividing unit 103-1, the second end of the first controllable voltage dividing unit 103-1 is connected to the first end of the second controllable voltage dividing unit 103-2, and the second end of the second controllable voltage dividing unit 103-2 is connected to the ground pad VSS. That is, the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 adjust the voltage applied to the discharge transistor 102 between the drain of the discharge transistor 102 and the ground pad VSS.

[0065] In one embodiment, the first controllable voltage dividing unit 103-1 includes at least one voltage dividing element and a control circuit. Wherein, each voltage dividing element is provided with a first end and a second end, and after they are connected in sequence, the first end of the voltage dividing element located at the first end is the first end of the first controllable voltage dividing unit 103-1, and the second end of the voltage dividing element located at the last end after they are connected in sequence is the second end of the first controllable voltage dividing unit 103-1.

[0066] For example: The first controllable voltage dividing unit 103-1 includes three voltage dividing elements, marked as the first voltage dividing element, the second voltage dividing element, and the third voltage dividing element. The second end of the first voltage dividing element is connected to the first end of the second voltage dividing element, the second end of the second voltage dividing element is connected to the first end of the third voltage dividing element, the first end of the first voltage dividing element located at the first end is the first end of the first controllable voltage dividing unit 103-1, and the second end of the third voltage dividing element located at the last end is the second end of the first controllable voltage dividing unit 103-1.

[0067] Wherein, the control circuit is connected to the first end of the voltage dividing element located at the first end, the control circuit is also connected to the second end of the voltage dividing element located at the last end, and the control circuit is used to switch at least one voltage dividing element from the voltage dividing mode to the bypass mode or from the bypass mode to the voltage dividing mode under the control of a control signal.

[0068] The control circuit is connected in parallel with at least one voltage-dividing element connected in sequence. After the control circuit receives a control signal, if the control circuit switches to the conducting state, the at least one voltage-dividing element connected in sequence is bypassed, thereby realizing the switching of the voltage-dividing element connected in sequence from the voltage-dividing mode to the bypass mode. After the control circuit receives a control signal, if the control circuit switches to the cut-off state, the at least one voltage-dividing element connected in sequence can pass an electrostatic current, thereby realizing the switching of the voltage-dividing element connected in sequence from the bypass mode to the voltage-dividing mode.

[0069] In the above technical solution, the electrostatic protection circuit includes at least one controllable voltage-dividing unit. After manufacturing multiple chips in one chip fabrication process, the number of controllable voltage-dividing units in the electrostatic protection circuit in the voltage-dividing state can be set, so as to obtain an electrostatic protection circuit adapted to different electrostatic voltage levels and reduce the chip manufacturing cost.

[0070] As Figures 3 to 6 shown, an embodiment of the present application provides an electrostatic protection circuit for a chip. The electrostatic protection circuit includes a monitoring unit 101, a discharge transistor 102, a first controllable voltage-dividing unit 103-1, and a second controllable voltage-dividing unit 103-2.

[0071] Among them, the first controllable voltage-dividing unit 103-1 and the second controllable voltage-dividing unit 103-2 are provided with a first end and a second end. After the first controllable voltage-dividing unit 103-1 and the second controllable voltage-dividing unit 103-2 are connected in series, they are connected to the drain of the discharge transistor 102.

[0072] The structures of the first controllable voltage-dividing unit 103-1 and the second controllable voltage-dividing unit 103-2 are the same. Here, the first controllable voltage-dividing unit 103-1 is taken as an example for description.

[0073] The first controllable voltage-dividing unit 103-1 includes at least one voltage-dividing element and a control circuit. After at least one voltage-dividing unit is connected in sequence, it is connected in parallel with the control circuit.

[0074] In one embodiment, referring to Figure 3 and Figure 4 , the control circuit includes a first switch K11. The first switch K11 is provided with a first end and a second end. The first end of the first switch K11 is connected to the first end of the voltage-dividing element at the head end, and the second end of the first switch K11 is connected to the second end of the voltage-dividing element at the tail end.

[0075] The control signal can switch the state of the first switch K11. When the control signal switches the state of the first switch K11 to the closed state, the first switch K11 bypasses the series-connected voltage-dividing elements, and the static electricity current flows through the first switch K11. When the control signal switches the state of the first switch K11 to the open state, the static electricity current flows through the series-connected voltage-dividing elements, and the series-connected voltage-dividing elements in the first controllable voltage-dividing unit 103-1 can divide the voltage caused by the static electricity charge with the discharge transistor 102.

[0076] In one embodiment, the voltage-dividing element is a diode. The positive electrode of the diode is the first end of the voltage-dividing element, and the negative electrode of the diode is the second end of the voltage-dividing element. After the diodes D11 to D1N are connected in series, the positive electrode of the diode D11 at the head end is used as the first end of the first controllable voltage-dividing unit 103-1, and the diode D1N at the tail end is used as the second end of the first controllable voltage-dividing unit 103-1. The diode can be composed of a PN structure or can be formed by short-circuiting the gate and drain of a MOS transistor. The specific structure of the diode is not limited in this application.

[0077] Since the diode has a certain clamping voltage, for example, the clamping voltage is 0.7V, the voltage at the drain of the discharge transistor 102 is VDD - 0.7*N, where N is the number of diodes, and the specific value of N is determined according to the breakdown voltage that the discharge transistor can withstand and the voltage VDD caused by the accumulation of static electricity charges.

[0078] In one embodiment, the first switch K11 includes a one-time programmable memory. Among them, the one-time programmable memory can be a laser fuse device.

[0079] Among them, when the first switch K11 is in the non-fused state, the first controllable voltage-dividing unit 103-1 is in the bypass mode. When the first switch K11 is subjected to the fuse treatment so that the first switch K11 is in the fused state, the first controllable voltage-dividing unit 103-1 is in the voltage-dividing mode.

[0080] Manufacturing multiple chips in one wafer and performing fuse treatment on the laser fuse devices in the electrostatic protection circuit can set the number of controllable voltage-dividing units in the electrostatic protection circuit in the voltage-dividing mode and set the level of static electricity charges that the electrostatic protection circuit can withstand.

[0081] Reference Figure 3 , the discharge transistor 102 is an N-type transistor. The source of the discharge transistor 102 is connected to the ground pad VSS. The drain of the discharge transistor 102 is connected to the second end of the first controllable voltage-dividing unit 103-1. The first end of the first controllable voltage-dividing unit 103-1 is connected to the second end of the second controllable voltage-dividing unit 103-2, and the first end of the second controllable voltage-dividing unit 103-2 is connected to the power supply pad VDD.

[0082] The monitoring unit 101 includes a monitoring capacitor C1 and a monitoring resistor R1. Both the monitoring capacitor C1 and the monitoring resistor R1 are provided with a first end and a second end. The first end of the monitoring capacitor C1 is connected to the power supply pad VDD. The second end of the monitoring capacitor C1 is connected to the first end of the monitoring resistor R1 and then connected to the control end of the discharge transistor 102. The second end of the monitoring resistor R1 is connected to the ground pad VSS.

[0083] When there is static electricity charge on the power supply pad VDD, the equivalent resistance value of the monitoring capacitor C1 decreases, the control end of the discharge transistor 102 is pulled up to a high level, and the discharge transistor 102 is turned on. The static electricity charge is discharged to the ground pad VSS through the second controllable voltage dividing unit 103-2, the first controllable voltage dividing unit 103-1, and the discharge transistor 102.

[0084] If the first controllable voltage dividing unit 103-1 and / or the second controllable voltage dividing unit 103-2 is in the voltage dividing mode, it can bear part of the voltage applied to the discharge transistor 102 by the static electricity charge. The voltage borne is determined according to the voltage dividing ability of the first controllable voltage dividing unit 103-1. The number of voltage dividing elements in the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 can be set to adjust their voltage dividing ability.

[0085] Reference Figure 4 , different from Figure 3 , the discharge transistor 102 is a P-type transistor. The source of the discharge transistor 102 is connected to the power supply pad VDD. The drain of the discharge transistor 102 is connected to the first end of the first controllable voltage dividing unit 103-1. The second end of the first controllable voltage dividing unit 103-1 is connected to the first end of the second controllable voltage dividing unit 103-2. The second end of the second controllable voltage dividing unit 103-2 is connected to the ground pad VSS.

[0086] The monitoring unit 101 includes a monitoring resistor R1 and a monitoring capacitor C1. Both the monitoring resistor R1 and the monitoring capacitor C1 are provided with a first end and a second end. The first end of the monitoring resistor R1 is connected to the power supply pad VDD. The second end of the monitoring resistor R1 is connected to the first end of the monitoring capacitor C1 and then connected to the control end of the discharge transistor 102. The second end of the monitoring capacitor C1 is connected to the ground pad VSS.

[0087] When there is static electricity charge on the power supply pad VDD, the equivalent resistance value of the monitoring capacitor C1 decreases, the control end of the discharge transistor 102 is pulled down to a low level, and the discharge transistor 102 is turned on. The static electricity charge is discharged to the ground pad VSS through the discharge transistor 102, the first controllable voltage dividing unit 103-1, and the second controllable voltage dividing unit 103-2.

[0088] In an embodiment, reference Figure 5 and Figure 6, the control circuit includes a control transistor 1031-1, a second switch K12, and a third switch K13. Among them, the control transistor 1031-1 has a first end, a second end, and a control end. The first end of the control transistor 1031-1 is connected to the first end of the voltage-dividing element located at the head end, and the second end of the control transistor 1031-1 is connected to the first end of the discharge transistor. The second switch K12 has a first end and a second end. The first end of the second switch K12 is connected to the power supply pad VDD, and the second end of the second switch K12 is connected to the control end of the control transistor 1031-1. The third switch K13 also has a first end and a second end. The first end of the third switch K13 is connected to the control end of the control transistor 1031-1, and the second end of the third switch K13 is connected to the ground pad VSS.

[0089] By controlling the signals to switch the states of the second switch K12 and the third switch K13, the control transistor 1031-1 can be switched from the conducting state to the cut-off state, or from the cut-off state to the conducting state. When the control transistor 1031-1 is switched to the conducting state, the control transistor 1031-1 causes the sequentially connected voltage-dividing elements to be in a bypass state, and the static current flows through the control transistor 1031-1. When the control transistor 1031-1 is switched to the cut-off state, the static current flows through the sequentially connected voltage-dividing elements, and the sequentially connected voltage-dividing elements in the first controllable voltage-dividing unit 103-1 can divide the static voltage with the discharge transistor 102.

[0090] In one embodiment, the second switch K12 and the third switch K13 include one-time programmable memories. Among them, the one-time programmable memory can be a laser fuse device. By performing laser fuse processing on the corresponding switches, the states of the second switch K12 and the third switch K13 can be switched.

[0091] In some embodiments, the control signals, switches, etc. are relatively broad concepts. For example, when the second switch K12 is a laser fuse device, the laser fuse device has two states. When the laser fuse device is not blown, it is equivalent to the switch being closed, and when the laser fuse device is blown, it is equivalent to the switch being open. The operation of blowing the laser fuse device can be regarded as a control signal for the laser fuse device.

[0092] Continue to refer to Figure 5 , the discharge transistor 102 is an N-type transistor, and the connection relationship between the discharge transistor 102 and the first controllable voltage-dividing unit 103-1, the second controllable voltage-dividing unit 103-2, and the monitoring unit 101 is the same as that in Figure 3 , which will not be elaborated here. The structure and working process of the monitoring unit 101 are also the same as those in Figure 3 , which will not be elaborated here.

[0093] The mode switching process of each controllable voltage dividing unit will be described below using the first controllable voltage dividing unit 103-1 as an example. When the discharging transistor 102 is an N-type transistor, the control transistor 1031-1 is a P-type transistor. When only the second switch K12 is fuse-processed so that the second switch K12 is in a fused state and the third switch K13 is in a non-fused state, the control terminal of the control transistor 1031-1 is connected to the ground pad VSS, the control transistor 1031-1 is in an on state, and the static current flows through the control transistor 1031-1. The first controllable voltage dividing unit 103-1 is in a bypass mode. When only the third switch K13 is fuse-processed so that the second switch K12 is in a non-fused state and the third switch K13 is in a fused state, the control terminal of the control transistor 1031-1 is connected to the power supply pad VDD, the control transistor 1031-1 is in an off state, and the current caused by the static charge flows through the control transistor 1031-1. The first controllable voltage dividing unit 103-1 is in a voltage dividing mode.

[0094] Continue to refer to Figure 6 , the discharging transistor 102 is a P-type transistor. The connection relationship between the discharging transistor 102, the first controllable voltage dividing unit 103-1, the second controllable voltage dividing unit 103-2, and the monitoring unit 101 is the same as that in Figure 4 , and will not be elaborated here. The structure and working process of the monitoring unit 101 are also the same as those in Figure 4 , and will not be elaborated here.

[0095] The mode switching process of each controllable voltage dividing unit will be described below using the first controllable voltage dividing unit 103-1 as an example. When the discharging transistor 102 is a P-type transistor, the control transistor 1031-1 is an N-type transistor. When only the second switch K12 is fuse-processed so that the second switch K12 is in a fused state and the third switch K13 is in a non-fused state, the control terminal of the control transistor 1031-1 is connected to the ground pad VSS, the control transistor 1031-1 is in an off state, and the static current flows through the diode. The first controllable voltage dividing unit 103-1 is in a voltage dividing mode. When only the third switch K13 is fuse-processed so that the second switch K12 is in a non-fused state and the third switch K13 is in a fused state, the control terminal of the control transistor 1031-1 is connected to the power supply pad VDD, the control transistor 1031-1 is in an on state, and the static current flows through the control transistor 1031-1. The first controllable voltage dividing unit 103-1 is in a bypass mode.

[0096] Multiple chips are fabricated in one chip run, and fuse processing is performed on the laser fuse devices in the electrostatic protection circuit. The number of controllable voltage dividing units in the electrostatic protection circuit in the voltage dividing mode can be set, and the level of static charge that the electrostatic protection circuit can withstand can be set.

[0097] As Figures 7 to 10As shown in the figure, an embodiment of the present application provides an electrostatic protection circuit for a chip. The electrostatic protection circuit includes a monitoring unit 101, a driving unit 104, a discharging transistor 102, a first controllable voltage dividing unit 103-1, and a second controllable voltage dividing unit 103-2.

[0098] The monitoring unit 101 is connected to the control terminal of the discharging transistor 102 through the driving unit 104. Refer to Figure 7 and Figure 9 , when the discharging transistor 102 is an N-type transistor, the source of the discharging transistor 102 is connected to the ground pad VSS, the drain of the discharging transistor 102 is connected to the second end of the first controllable voltage dividing unit 103-1, the first end of the first controllable voltage dividing unit 103-1 is connected to the second end of the second controllable voltage dividing unit 103-2, and the first end of the second controllable voltage dividing unit 103-2 is connected to the power supply pad VDD.

[0099] Continue to refer to Figure 7 and Figure 9 , when the discharging transistor 102 is an N-type transistor, the monitoring unit 101 includes a monitoring resistor R1 and a monitoring capacitor C1. Both the monitoring resistor R1 and the monitoring capacitor C1 are provided with a first end and a second end. The first end of the monitoring resistor R1 is connected to the power supply pad VDD, the second end of the monitoring resistor R1 is connected to the first end of the monitoring capacitor C1 and then connected to the control terminal of the discharging transistor 102, and the second end of the monitoring capacitor C1 is connected.

[0100] The driving unit 104 includes a first driving transistor P3 and a second driving transistor N3. The first end of the first driving transistor P3 is connected to the power supply pad VDD, the first end of the second driving transistor N3 is connected to the second end of the first driving transistor P3 and then to the control terminal of the discharging transistor 102, and the second end of the second driving transistor N3 is connected to the ground pad VSS. Among them, the first driving transistor P3 is a P-type transistor, and the second driving transistor N3 is an N-type transistor.

[0101] When there is static charge on the power supply pad VDD, the resistance value of the monitoring capacitor C1 decreases, the control terminal of the first driving transistor P3 is pulled down to a low level, the drain of the first driving transistor P3 is pulled up to a high level, the control terminal of the discharging transistor 102 is pulled up to a high level, and the discharging transistor 102 conducts. The static charge is discharged to the ground pad VSS through the discharging transistor 102, the first controllable voltage dividing unit 103-1, and the second controllable voltage dividing unit 103-2.

[0102] Refer to Figure 8 and Figure 10, the discharge transistor 102 is a P-type transistor. The source of the discharge transistor 102 is connected to the power supply pad VDD, the drain of the discharge transistor 102 is connected to the first end of the first controllable voltage dividing unit 103-1, the second end of the first controllable voltage dividing unit 103-1 is connected to the first end of the second controllable unit, and the second end of the second controllable voltage dividing unit 103-2 is connected to the ground pad VSS.

[0103] Continue to refer to Figure 8 and Figure 10 , the monitoring unit 101 includes a monitoring capacitor C1 and a monitoring resistor R1. Both the monitoring capacitor C1 and the monitoring resistor R1 are provided with a first end and a second end. The first end of the monitoring capacitor C1 is connected to the power supply pad VDD, the second end of the monitoring capacitor C1 is connected to the first end of the monitoring resistor R1 and then connected to the control end of the discharge transistor 102, and the second end of the monitoring resistor R1 is connected.

[0104] The structure of the driving unit 104 is the same as that in Figure 7 and Figure 9 and will not be elaborated here.

[0105] When there is static charge on the power supply pad VDD, the resistance value of the monitoring capacitor C1 decreases, the control end of the second driving transistor N3 is pulled up to a high level, the drain of the second driving transistor N3 is pulled down to a low level, the control end of the discharge transistor 102 is pulled down to a low level, and the discharge transistor 102 conducts. The static charge is discharged to the ground pad VSS through the second controllable voltage dividing unit 103-2, the first controllable voltage dividing unit 103-1, and the discharge transistor 102.

[0106] Figure 7 and Figure 8 The structures of the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 in Figure 3 and Figure 4 are the same as those in Figure 9 and Figure 10 The structures of the first controllable voltage dividing unit 103-1 and the second controllable voltage dividing unit 103-2 in Figure 5 and Figure 6 are the same as those in

[0107] In the above technical solution, by adding the driving unit 104 to the electrostatic protection circuit, the conduction rate of the discharge transistor 102 can be increased, thereby improving the discharge rate of the discharge transistor 102, and further enhancing the discharge capacity of the electrostatic protection circuit.

[0108] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.

Claims

1. An electrostatic protection circuit for a chip, characterized in that, The chip includes a power pad and a ground pad, and the electrostatic protection circuit includes: A monitoring unit for generating a trigger signal when there is an electrostatic pulse on the power pad; A discharge transistor located between the power pad and the ground pad, for conducting under the control of the trigger signal to discharge electrostatic charges to the ground pad; A first controllable voltage dividing unit connected to the discharge transistor, for switching operating modes under the control of a control signal, where the operating modes include a voltage dividing mode, and when the first controllable voltage dividing unit operates in the voltage dividing mode, it is used to bear part of the voltage applied to the discharge transistor by the electrostatic charges; The electrostatic protection circuit further includes: A second controllable voltage dividing unit connected to the first controllable voltage dividing unit, for switching operating modes under the control of a control signal, where the operating modes include a voltage dividing mode.

2. The circuit according to claim 1, wherein When the discharge transistor is a P-type transistor, its source is connected to the power pad, and its drain is connected to the first end of the first controllable voltage dividing unit; The second end of the first controllable voltage dividing unit is connected to the first end of the second controllable voltage dividing unit, and the second end of the second controllable voltage dividing unit is connected to the ground pad.

3. The circuit according to claim 1, wherein When the discharge transistor is an N-type transistor, its source is connected to the ground pad, and its drain is connected to the second end of the first controllable voltage dividing unit; The first end of the first controllable voltage dividing unit is connected to the second end of the second controllable voltage dividing unit, and the first end of the second controllable voltage dividing unit is connected to the power pad.

4. The circuit according to any one of claims 1 to 3, characterized in that, The first controllable voltage dividing unit includes: At least one voltage dividing element provided with a first end and a second end, which are connected in sequence, and the first end of the voltage dividing element at the head end after sequential connection is the first end of the first controllable voltage dividing unit, and the second end of the voltage dividing element at the tail end after sequential connection is the second end of the first controllable voltage dividing unit; A control circuit connected to the first end of the voltage dividing element at the head end and also connected to the second end of the voltage dividing element at the tail end, for switching the at least one voltage dividing element from the voltage dividing mode to the bypass mode or from the bypass mode to the voltage dividing mode under the control of the control signal.

5. The circuit according to claim 4, characterized in that, The control circuit includes: A first switch provided with a first end and a second end, whose first end is connected to the first end of the voltage dividing element at the head end, and whose second end is connected to the second end of the voltage dividing element at the tail end.

6. The circuit according to claim 5, wherein The control circuit includes: A control transistor provided with a first end, a second end and a control end, whose first end is connected to the first end of the voltage dividing element at the head end, and whose second end is connected to the second end of the voltage dividing element at the tail end; A second switch provided with a first end and a second end, whose first end is connected to the power pad, and whose second end is connected to the control end of the control transistor; A third switch provided with a first end and a second end, whose first end is connected to the control end of the control transistor, and whose second end is connected to the ground pad.

7. The circuit according to claim 6, wherein The first switch, the second switch and the third switch are one-time programmable memories.

8. The circuit according to claim 7, wherein The first switch, the second switch, and the third switch are laser fuse devices.

9. The circuit according to claim 8, wherein if the control transistor is a P-type transistor, the second switch is in a blown state, the third switch is in a non-blown state, and the first controllable voltage dividing unit is in a bypass mode; if the control transistor is a P-type transistor, the second switch is in a non-blown state, the third switch is in a blown state, and the first controllable voltage dividing unit is in a voltage dividing mode.

10. The circuit according to claim 8, wherein if the control transistor is an N-type transistor, the second switch is in a blown state, the third switch is in a non-blown state, and the first controllable voltage dividing unit is in a voltage dividing mode; if the control transistor is an N-type transistor, the second switch is in a non-blown state, the third switch is in a blown state, and the first controllable voltage dividing unit is in a bypass mode.

11. The circuit according to claim 8, wherein the first switch is in a non-blown state, and the first controllable voltage dividing unit is in a bypass mode; the first switch is in a blown state, and the first controllable voltage dividing unit is in a voltage dividing mode.

12. The circuit according to claim 4, wherein The voltage dividing element includes: a diode, whose anode is the first end of the voltage dividing element and whose cathode is the second end of the voltage dividing element.

13. The circuit according to claim 1, wherein The control end of the discharging transistor is connected to the monitoring unit.

14. The circuit according to claim 1, characterized in that, The circuit further includes a driving unit, and the control end of the discharging transistor is connected to the monitoring unit through the driving unit.

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