Substrate processing system, substrate processing method, and pattern making apparatus

Abstract

A substrate processing system includes a measurement device, a conveyance device, a map creation device, and an evaluation device. The measurement device measures an error of a substrate after a first process by a first processing device that performs a first process on the substrate. The conveyance device conveys the substrate among a plurality of devices including the first processing device, a second processing device that performs a second process on the substrate after the first process, and the measurement device. The map creation device creates, for each substrate, an error map that represents a distribution of errors on the substrate. The evaluation device calculates, for each substrate, an evaluation value that represents an importance of the errors based on the error map. The evaluation device instructs the conveyance device of a conveyance destination of the substrate after the first process based on a result of a determination of whether the evaluation value is equal to or greater than a first threshold value that is determined in advance.

Description

Substrate processing system, substrate processing method and pattern making apparatus Technical Field

[0001] Various aspects and embodiments of this disclosure relate to a substrate processing system, a substrate processing method, and a pattern making apparatus. Background Technology

[0002] Patent Document 1 discloses a technique that analyzes the distribution of defects based on the coordinates of the defect locations detected by an inspection device, and classifies them into any distribution characteristic type such as repetitive defects, dense defects, arc-shaped distribution defects, radial distribution defects, linear distribution defects, and ring / block distribution defects. Therefore, in the semiconductor wafer manufacturing process, defect distribution analysis can be performed based on defect data detected by the inspection device, making it easier to determine the causes of defects caused by the device or process.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2004-117229 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] This disclosure provides a substrate processing system, a substrate processing method, and a pattern making apparatus that can reduce processing waste.

[0008] Solution for solving the problem

[0009] One aspect of this disclosure is a substrate processing system comprising a measuring device, a conveying device, a pattern-making device, and an evaluation device. The measuring device measures errors on a substrate after a first process performed by a first processing device that performs a first process on the substrate. The conveying device transports the substrate between multiple devices including the first processing device, a second processing device, and the measuring device, wherein the second processing device performs a second process on the substrate after the first process. The pattern-making device creates an error map representing the distribution of errors on each substrate. The evaluation device calculates an evaluation value representing the importance of errors for each substrate based on the error map. The evaluation device indicates the conveying destination of the substrate after the first process to the conveying device based on a determination result indicating whether the evaluation value is above a predetermined first threshold.

[0010] The effects of the invention

[0011] According to various aspects and embodiments of this disclosure, waste in processing can be reduced. Attached Figure Description

[0012] Figure 1 is a system structure diagram illustrating an example of a substrate processing system according to one embodiment of the present disclosure.

[0013] Figure 2 is a block diagram showing an example of a diagram-making apparatus.

[0014] Figure 3 is a diagram illustrating an example of a method for determining the amount of error.

[0015] Figure 4 is a diagram illustrating an example of a method for determining the amount of error.

[0016] Figure 5 is a diagram showing an example of an error table.

[0017] Figure 6 is a diagram illustrating an example of an error quantity update method.

[0018] Figure 7 is a diagram illustrating an example of an error update method.

[0019] Figure 8 is a flowchart illustrating an example of the processing of the drawing production apparatus.

[0020] Figure 9 is a block diagram illustrating an example of an evaluation device.

[0021] Figure 10 is a diagram showing an example of a baseline chart.

[0022] Figure 11 is a diagram showing an example of an influence table.

[0023] Figure 12 is a diagram showing an example of an evaluation value table.

[0024] Figure 13 is a sequence diagram illustrating an example of the operation of a substrate processing system.

[0025] Figure 14 is a hardware structure diagram of an example of a computer that implements the functions of the evaluation device and the graph production device. Detailed Implementation

[0026] Hereinafter, embodiments of the substrate processing system, substrate processing method, and pattern making apparatus will be described in detail based on the accompanying drawings. However, the disclosed substrate processing system, substrate processing method, and pattern making apparatus are not limited by the following embodiments.

[0027] The manufacturing process of semiconductor devices includes multiple steps. In addition, generally, after all steps are completed, the substrate is inspected to check whether the number of particles is below a specified number and whether the electrical characteristics meet the specified standards.

[0028] Furthermore, if inspection is only performed after all processes are completed, it is not determined whether the substrate has become undesirable during intermediate processes. Therefore, even if the substrate has become undesirable during intermediate processes, processing continues until the final process. After final processing, the substrate is determined to be undesirable and is discarded. Subsequent processing of substrates that have become undesirable is wasteful. Therefore, the operating time of the semiconductor manufacturing equipment, the processing gases used, and the electricity are consumed meaninglessly.

[0029] Therefore, this disclosure provides a technique that can reduce waste in the process.

[0030] [Structure of substrate processing system 10]

[0031] Figure 1 is a system structure diagram showing an example of a substrate processing system 10 according to one embodiment of the present disclosure. The substrate processing system 10 includes an evaluation device 20 and processing groups 12-1 to 12-m (m is a natural number of 2 or more). The evaluation device 20 communicates with each processing group 12-1 to 12-m via a communication network 11 such as a LAN (Local Area Network). Each processing group 12-1 to 12-m is provided with a pattern making device 30-1 to 30-n (n is a natural number of 2 or more), a measuring device 40-1 to 40-n, a processing device 50-1 to 50-n, a conveying device 60-1 to 60-n, a receiving device 13, and a receiving device 14.

[0032] Furthermore, hereinafter, without distinguishing between the individual processing groups 12-1 to 12-m, they will be collectively referred to as processing group 12, and without distinguishing between the individual drawing devices 30-1 to 30-n, they will be collectively referred to as drawing device 30. Additionally, hereinafter, without distinguishing between the individual measuring devices 40-1 to 40-n, they will be collectively referred to as measuring device 40, and without distinguishing between the individual processing devices 50-1 to 50-n, they will be collectively referred to as processing device 50. Furthermore, hereinafter, without distinguishing between the individual conveying devices 60-1 to 60-n, they will be collectively referred to as conveying device 60.

[0033] Each processing unit 50 performs processes on the substrate W including cleaning, film formation, etching, modification, and CMP (Chemical Mechanical Polishing). Processing unit 50-1 performs a first process on the substrate W. Processing unit 50-2 performs a second process on the substrate W after the first process. Processing unit 50-n performs a nth process on the substrate W after the (n-1)th process. Each processing unit 50 can process the substrate W one by one, or it can process multiple substrates W at the same time. Processing unit 50-1 is an example of a first processing unit, and processing unit 50-2 is an example of a second processing unit.

[0034] Each measuring device 40 measures errors in each substrate W after it has been processed by the processing device 50. For example, measuring device 40-1 measures errors in the substrate W after it has undergone a first process by the processing device 50-1, and outputs the measured error information to the pattern making device 30-1. Additionally, for example, measuring device 40-n measures errors in the substrate W after it has undergone an nth process by the processing device 50-n, and outputs the measured error information to the pattern making device 30-n. Error information related to the substrate W may include, for example, information concerning particles on the substrate W, the thickness of films formed on the substrate W, and the electrical characteristics of devices (hereinafter, sometimes referred to as chips) formed on the substrate W.

[0035] Each pattern-making apparatus 30 creates an error map representing the distribution of errors on each substrate W based on error information output from the measuring device 40, and sends the created error map to the evaluation device 20 via the communication network 11. For example, pattern-making apparatus 30-1 creates an error map based on error information measured by the measuring device 40-1, and pattern-making apparatus 30-n creates an error map based on error information measured by the measuring device 40-n.

[0036] The housing device 13 houses substrates W processed in each processing group 12 that have an evaluation value for the severity of errors in each process that is less than a predetermined value, i.e., substrates W that meet the predetermined criteria. On the other hand, the housing device 14 houses substrates W processed in each processing group 12 that have an evaluation value greater than or equal to a predetermined value in any process, i.e., substrates W that do not meet the predetermined criteria. The substrates W housed in the housing device 14 are discarded.

[0037] Each conveying device 60 conveys the substrate W between the housing device 13, housing device 14, measuring device 40, and processing device 50 according to the instructions of the evaluation device 20. For example, conveying device 60-1 conveys the substrate W after it has undergone a first process in processing device 50-1 to measuring device 40-1, and conveys the substrate W after it has been measured by measuring device 40-1 to processing device 50-2 or housing device 14 according to the instructions from the evaluation device 20. In addition, conveying device 60-n conveys the substrate W after it has undergone an nth process in processing device 50-n to measuring device 40-n, and conveys the substrate W after it has been measured by measuring device 40-n to housing device 13 or housing device 14 according to the instructions from the evaluation device 20.

[0038] The evaluation device 20 receives error maps of each substrate W from each pattern-making device 30 via the communication network 11 and calculates an evaluation value based on the received error maps. Furthermore, for each substrate W, the evaluation device 20 controls the transport destination of the substrate W based on the calculated evaluation value. For example, the evaluation device 20 determines the transport destination of the substrate W based on a determination result showing whether the evaluation value calculated based on the error map of the substrate W received from the pattern-making device 30-1 is a predetermined value or higher. For example, if the evaluation value is lower than the predetermined value, the evaluation device 20 sends a control instruction to the transport device 60-1 instructing it to transport the substrate W to the processing device 50-2. On the other hand, if the evaluation value is higher than the predetermined value, the evaluation device 20 sends a control instruction to the transport device 60-1 instructing it to transport the substrate W to the housing device 14. Additionally, for example, if the evaluation value calculated based on the error map of the substrate W received from the pattern-making device 30-n is lower than the predetermined value, the evaluation device 20 sends a control instruction to the transport device 60-n instructing it to transport the substrate W to the housing device 13. On the other hand, if the evaluation value calculated based on the error map of the substrate W received from the drawing device 30-n is higher than a predetermined value, a control instruction is sent to the transfer device 60-n to instruct the substrate W to be transferred to the receiving device 14.

[0039] [Structure of the fabrication device 30]

[0040] Figure 2 is a block diagram showing an example of a graph production apparatus 30. The graph production apparatus 30 includes a DB (Data Base) 31, an error determination unit 32, an update unit 33, and a production unit 34.

[0041] The error determination unit 32 acquires chip pattern information, representing the arrangement of chips formed on the substrate W, from the evaluation device 20 via the communication network 11. Furthermore, the error determination unit 32 acquires error information from the measurement device 40 for each substrate W. Based on the chip pattern, the error determination unit 32 determines the numerical value representing the amount of error in each chip region for each substrate W, i.e., the error quantity. The error determination unit 32 then outputs the determined error quantity value for each chip region to the update unit 33.

[0042] For example, when the erroneous information is the coordinates of a particle on the substrate W, as shown in Figure 3, the number of particles 71 within chip region 70 is determined as the error quantity in chip region 70. In the example of Figure 3, since there are 6 particles 71 within chip region 70, the error quantity is determined to be "6".

[0043] Furthermore, for example, if the erroneous information is the difference between the measured film thickness and the target film thickness, as shown in FIG. 4, if the chip region 72 includes a measurement position 74 (e.g., n1) where the film thickness is to be measured, the absolute value of the measured value is determined as the error amount of the chip region 72. On the other hand, if the chip region 73 does not include a measurement position 74, the absolute value of the value calculated using the measured values ​​at the surrounding measurement positions 74 (n2 to n5) and the distances (d2 to d5) from the chip region 73 to each measurement position 74 is determined as the error amount of the chip region 73. In this case, the error amount determination unit 32 uses, for example, IDW (inverse distance weighting) to determine the error amount of the chip region 73.

[0044] Furthermore, for example, if the erroneous information per chip's electrical characteristics, the error amount in the chip region of a chip whose electrical characteristics meet predetermined conditions may be determined as "0". On the other hand, the error amount in the chip region of a chip whose electrical characteristics do not meet predetermined conditions may be determined as "1".

[0045] DB 31 stores an error table 310, as shown in Figure 5, for example. In the error table 310, the number of substrates W whose total error values ​​within a certain range are stored, in relation to the range of total error values. By referring to the data stored in the error table 310, it is possible to determine whether the total error value of the substrates W is included in a predetermined proportion in the frequency distribution of total error values, in descending order of error value. Furthermore, in the error table 310, data from several substrates W measured through experiments or the like are pre-stored in the initial state.

[0046] The update unit 33 calculates the total number of errors determined for each chip region for each substrate W. Furthermore, the update unit 33 refers to the error table 310 to determine the range of error amounts that includes the total number of calculated error amounts. Additionally, the update unit 33 increases the number of substrates associated with the determined range of error amounts by 1.

[0047] Next, the update unit 33 determines whether the total calculated error amount is included within a predetermined range in the population of the frequency distribution representing the total error amount of multiple substrates W stored in the error table 310. The predetermined range in the population is, for example, less than the average value of the frequency distribution + 3σ. "σ" is the standard deviation of the error amount distribution.

[0048] If the total number of errors is within a range less than the average value of the frequency distribution + 3σ, the update unit 33 sends the predetermined degradation level along with the product ID used to identify the product, the process ID used to identify the current process, and the substrate ID used to identify the substrate W to the evaluation device 20. The degradation level is a numerical value indicating the degree of degradation that causes the error. The predetermined degradation level is, for example, "0". Regarding the current process, in the drawing fabrication apparatus 30-1, it refers, for example, to the process performed in the processing device 50-1; in the drawing fabrication apparatus 30-n, it refers, for example, to the process performed in the processing device 50-n.

[0049] On the other hand, when the total error value of the substrate W is within the range of the average value of the frequency distribution + 3σ or more, the update unit 33 updates the error value for each chip region containing errors, that is, each chip region with an error value of 1 or more. By updating the error value of each chip region of the substrate W in this way when the total error value is the average value of the frequency distribution + 3σ or more, the error value update process can be reduced compared to the case of updating the error value of the entire substrate W.

[0050] For example, the update unit 33 updates the error amount of each chip region containing errors by using the sum of the error amount of the chip region and the error amounts of other chip regions adjacent to the same chip region. Furthermore, the update unit 33 outputs the updated error amount for each chip region to the manufacturing unit 34 for each substrate W.

[0051] For example, as shown in Figure 6, let's take the case where the error value of the target chip region 75 is "1", and the error values ​​of the other chip regions 76 adjacent to chip region 75 are "5", "3", "8", "10", "0", "2", "13", and "2" respectively as an example. The total value of the error value of chip region 75 and the error values ​​of the other chip regions 76 adjacent to chip region 75 is "44". Therefore, as shown in Figure 7, the update unit 33 updates the error value of the target chip region 75 to "44".

[0052] By adding the error amounts of other adjacent chip regions to each chip region containing an error, errors can be emphasized in error-dense areas on the substrate W. This emphasizes error-dense areas, thereby highlighting the characteristics of the error distribution.

[0053] For each substrate W, the manufacturing unit 34 determines a predetermined proportion of chip regions in descending order of error quantity among multiple chip regions based on the frequency distribution of error quantity in each chip region updated by the updating unit 33. The predetermined proportion is, for example, 3%. Furthermore, the manufacturing unit 34 creates an error map of the determined chip region distribution and sends the created error map, along with the product ID, process ID, and substrate ID, to the evaluation device 20 via the communication network 11.

[0054] [Processing of the fabrication device 30]

[0055] Figure 8 is a flowchart illustrating an example of the processing of the pattern making apparatus 30. The processing illustrated in Figure 8 is performed for each substrate W. For example, if error information is received from the measuring device 40, the pattern making apparatus 30 starts the processing illustrated in Figure 8. Furthermore, before starting the processing illustrated in Figure 8, the error quantity determination unit 32 receives the chip pattern from the evaluation device 20 via the communication network 11.

[0056] First, the error determination unit 32 determines the error quantity in each chip region based on the chip diagram (S100). Then, the error determination unit 32 outputs the determined error quantity value for each chip region to the update unit 33.

[0057] Next, the update unit 33 calculates the total value of the error amounts determined for each chip region, and determines the range of error amounts that includes the total value of the calculated error amounts by referring to the error table 310. Then, the update unit 33 increases the number of substrates associated with the determined range of error amounts by 1 (S101).

[0058] Next, the update unit 33 determines whether the total calculated error amount is within a predetermined range in the overall frequency distribution of the total error amount of multiple substrates W stored in the error table 310 (S102). If the total calculated error amount is within the predetermined range (S102: "Yes"), the update unit 33 sends the degradation level of the predetermined value along with the product ID, process ID, and substrate ID to the evaluation device 20 (S103). Then, the drawing production device 30 ends the process shown in this flowchart.

[0059] On the other hand, if the total calculated error amount is not included in the predetermined range (S102: "No"), the updating unit 33 adds the error amount of other chip regions adjacent to the chip region to each chip region containing errors, thereby updating the error amount (S104). Then, the updating unit 33 outputs the updated error amount for each chip region to the manufacturing unit 34.

[0060] Next, based on the frequency distribution of error amounts in each chip region updated by the update unit 33, the manufacturing unit 34 determines a predetermined proportion of chip regions in descending order of error amounts among multiple chip regions. Then, the manufacturing unit 34 creates an error map (S105) from the determined distribution of chip regions. Step S105 is an example of process (h). Then, the manufacturing unit 34 sends the created error map, along with the product ID, process ID, and substrate ID, to the evaluation device 20 via the communication network 11, and the manufacturing device 30 completes the process shown in this flowchart.

[0061] [Structure of evaluation device 20]

[0062] Figure 9 is a block diagram showing an example of the evaluation device 20. The evaluation device 20 includes an output unit 21, a DB 22, a chip pattern providing unit 23, a degradation level determination unit 24, and an evaluation value calculation unit 25.

[0063] The chip diagram for each product is stored in DB 22. Additionally, DB 22 stores a baseline chart, an impact table, and an evaluation value table. Figure 10 shows an example of the baseline chart 220. In the baseline chart 220, a separate table 222 is stored for each product ID 221. In the separate table 222, the degradation level, cause device, and cause are stored in association with the baseline chart. The baseline chart is an error map representing the distribution of a predetermined error. The degradation level is a numerical value representing the degree of degradation of the cause of the error corresponding to the baseline chart. The cause device represents the identification information of the device that causes the error. The cause represents the reason for the error. Furthermore, the chip diagram for each product may not necessarily be stored in DB 22; the evaluation device 20 may also obtain the corresponding product's chip diagram from a higher-level management server, etc., for each process of the product.

[0064] Figure 11 is a diagram illustrating an example of the influence table 223. In the influence table 223, a separate table 225 is maintained for each product ID 224. In the separate table 225, an influence degree, representing the magnitude of the impact if an error occurs in that process, is maintained in association with the process ID used to identify the process.

[0065] Figure 12 is a diagram illustrating an example of evaluation value table 226. In evaluation value table 226, a separate table 228 is stored for each product ID 227. In separate table 228, a separate table 230 is stored for each substrate ID 229. In separate table 230, associated with a process ID, the evaluation value calculated in the process corresponding to that process ID, the causative device used to identify the cause of an error in that process, and the cause are stored. Additionally, a total value of the evaluation values ​​is stored in separate table 230.

[0066] Returning to Figure 9 for further explanation. The chip pattern providing unit 23 provides the chip pattern of the product stored in DB 22 to each pattern making device 30 included in the processing group 12 that manufactures the product via the communication network 11.

[0067] When the degradation level determination unit 24 receives a product ID, process ID, and substrate ID from the pattern making apparatus 30 via the communication network 11, along with an error pattern, it determines a separate table 222 corresponding to the received product ID by referring to the reference chart 220 in the database 22. Then, the degradation level determination unit 24 determines a reference chart from the reference charts stored in the determined separate table 222 that has the highest similarity to the received error pattern. The degradation level determination unit 24 may use, for example, CNN (Convolutional Neural Network) or NMF (Non-negative Matrix Factorization) to determine a reference chart with the highest similarity to the received error pattern.

[0068] Then, the degradation level determination unit 24 refers to a separate table 222 to determine the degradation level, causative device, and cause associated with the determined reference diagram. Then, the degradation level determination unit 24 outputs the causative device, cause, product ID, process ID, and substrate ID associated with the determined degradation level, along with the degradation level, to the evaluation value calculation unit 25.

[0069] Furthermore, if the degradation level determination unit 24 receives the product ID, process ID, and substrate ID from the drawing production apparatus 30, along with a predetermined degradation level (e.g., "0"), it outputs the received degradation level along with the received product ID, process ID, and substrate ID to the evaluation value calculation unit 25. In this case, the cause device and cause are not output to the evaluation value calculation unit 25.

[0070] When the degradation level, product ID, process ID, and substrate ID are output from the degradation level determination unit 24, the evaluation value calculation unit 25 refers to the influence table 223 in DB 22 to determine a separate table 225 corresponding to the product ID. Then, the evaluation value calculation unit 25 refers to the determined separate table 225 to extract the influence associated with the process ID.

[0071] Then, the evaluation value calculation unit 25 calculates the product of the degradation level output from the degradation level determination unit 24 and the influence degree extracted from the individual table 225 as the evaluation value of the substrate W after it has undergone the process corresponding to the process ID. If the degradation level output from the degradation level determination unit 24 is, for example, "2" and the influence degree extracted from the individual table 225 is, for example, "3", the evaluation value calculation unit 25 calculates the evaluation value as, for example, "6".

[0072] Next, the evaluation value calculation unit 25 determines whether the calculated evaluation value is above a first threshold. If the calculated evaluation value is less than the first threshold, the evaluation value calculation unit 25 sends a control instruction to the transfer device 60, which is transferring the substrate W in the process corresponding to the process ID, to instruct the substrate W to be transferred to the processing device 50 for the next process. Furthermore, if the process corresponding to the process ID is the nth process, the evaluation value calculation unit 25 sends a control instruction to the transfer device 60-n to instruct the substrate W to be transferred to the housing device 13.

[0073] On the other hand, if the calculated evaluation value is above a first threshold, the evaluation value calculation unit 25 sends a control instruction to the transport device 60, which is transporting the substrate W in the process corresponding to the process ID, to instruct the substrate W to be transported to the receiving device 14. This discards the substrate W, preventing meaningless processing of a substrate W containing large errors. In this embodiment, the first threshold is, for example, "30".

[0074] Furthermore, if the calculated evaluation value is greater than or equal to a second threshold above the first threshold, the evaluation value calculation unit 25 also sends a control instruction to stop the processing device 50 performing the process corresponding to the process ID. This allows the processing device 50, which could cause large errors, to be stopped, preventing the manufacture of a substrate W containing defects. In this embodiment, the second threshold is, for example, "70". When the processing device 50 is stopped, the evaluation value calculation unit 25 can also notify the user of the evaluation device 20, etc., that the processing device 50 has been stopped.

[0075] Next, the evaluation value calculation unit 25 refers to the evaluation value table 226 in DB 22 to determine a separate table 228 corresponding to the product ID output from the degradation level determination unit 24. Then, in the determined separate table 228, the evaluation value calculation unit 25 determines a separate table 230 corresponding to the substrate ID output from the degradation level determination unit 24. Then, in the determined separate table 230, the evaluation value calculation unit 25 stores the calculated evaluation value in association with the process ID output from the degradation level determination unit 24.

[0076] Furthermore, when the cause device and cause are output together with the process ID from the degradation level determination unit 24, the evaluation value calculation unit 25 stores the cause device and cause together with the calculated evaluation value in a separate table 230 associated with the process ID. Then, when the process ID is the process ID corresponding to the last process, the evaluation value calculation unit 25 stores the total value of the evaluation values ​​for each process in the separate table 230. In addition, even when the substrate W is discarded or the processing device 50 is stopped, the evaluation value, cause device, and cause up to that process are stored in the separate table 230.

[0077] The output unit 21 outputs the data in the evaluation value table 226 to a management server that manages information about multiple substrates W. Alternatively, the output unit 21 can also output the data in the evaluation value table 226 to a monitor, printer, or other device connected to the evaluation device 20.

[0078] [Operation of the substrate processing system 10]

[0079] Next, Figure 13 is a sequence diagram showing an example of the operation of the substrate processing system 10.

[0080] First, the chip pattern providing unit 23 of the evaluation device 20 sends the chip pattern corresponding to the product to each pattern making device 30 in the processing group 12 that manufactures the product via the communication network 11 (S200). The pattern making device 30 acquires the chip pattern. Step S200 is an example of process (e).

[0081] Next, the processing apparatus 50 performs predetermined processing steps on the substrate W (S201). Then, the transfer device 60 transfers the substrate W from the processing apparatus 50 to the measuring device 40 (S202).

[0082] Next, the measuring device 40 measures the errors of each substrate W (S203). Step S203 is an example of process (a). Then, the measuring device 40 outputs the measured error information of each substrate W to the pattern making device 30 (S204).

[0083] Next, the error determination unit 32 of the pattern making apparatus 30 uses the chip pattern received from the evaluation device 20 and the error information output from the measurement device 40 to determine the error amount of each chip region for each substrate W (S205). Step S205 is an example of process (f).

[0084] Next, the update unit 33 determines whether the total value of the determined error amounts is within a predetermined range in the overall frequency distribution of the total value of the error amounts of multiple substrates W stored in the error table 310, thereby determining whether substrate W is a good product (S206). If substrate W is determined to be a good product (S206: "Yes"), the drawing production apparatus 30 notifies the evaluation device 20 of this intention. The evaluation device 20 instructs the transfer device 60 to transfer substrate W to the processing device 50 for the next process (S214). The transfer device 60 transfers substrate W, whose errors have been measured by the measuring device 40, to the processing device 50 for the next process.

[0085] On the other hand, if the substrate W is not determined to be a good product (S206: "No"), the updating unit 33 of the pattern fabrication apparatus 30 updates the error amount for each chip region containing errors for substrates W whose total error amount is within the range of average value + 3σ or higher in the distribution of the total error amount of multiple substrates W (S207). In step S207, for each chip region containing errors, the error amount of other chip regions adjacent to the chip region is added. Step S207 is an example of process (g).

[0086] Next, the fabrication unit 34 of the pattern fabrication apparatus 30 fabricates an error map for each substrate W (S208). Step S208 is an example of process (b). In step S208, the fabrication unit 34 determines a predetermined proportion of chip regions in multiple chip regions in descending order of error amount based on the distribution of error amount in each chip region updated by the update unit 33. Then, the fabrication unit 34 fabricates the determined chip region distribution into an error map and sends the fabricated error map, along with the product ID, process ID, and substrate ID, to the evaluation device 20 via the communication network 11 (S209).

[0087] Next, the degradation level determination unit 24 of the evaluation device 20 refers to the reference chart 220 in DB 22 to determine a reference chart with the highest similarity to the received error chart, and determines the degradation level associated with the determined reference chart (S210). Then, the degradation level determination unit 24 outputs the determined degradation level, the cause device associated with the degradation level, the cause, the product ID, the process ID, and the board ID to the evaluation value calculation unit 25.

[0088] Next, the evaluation value calculation unit 25 of the evaluation device 20 extracts the influence degree of the process for each substrate W by referring to the influence degree table 223 in DB 22. Then, the evaluation value calculation unit 25 calculates the product of the extracted influence degree and the degradation level as the evaluation value of the substrate W after the process has been performed (S211). Step S211 is an example of process (c).

[0089] Next, the evaluation value calculation unit 25 determines whether the calculated evaluation value is above the first threshold, and thereby determines whether to discard the substrate W (S212). If it is not determined that the substrate W should be discarded (S212: "No"), the process shown in step S214 is executed. Then, the evaluation value calculation unit 25 saves the evaluation value in DB 22.

[0090] On the other hand, if it is determined that the substrate W should be discarded, the evaluation value calculation unit 25 sends a control instruction to the transfer device 60 to instruct the substrate W to be transferred to the receiving device 14, thereby instructing the substrate W to be discarded (S213). Then, the evaluation value calculation unit 25 stores the evaluation value in DB 22. The transfer device 60 transfers the substrate W, which was erroneously measured by the measuring device 40, to the receiving device 14, thereby discarding the substrate W. The process of discarding the substrate W instead of transferring the substrate W with an evaluation value of more than the first threshold to the processing device 50 for the next process is an example of process (d).

[0091] [hardware]

[0092] The evaluation device 20 and the graph production device 30 are implemented, for example, by a computer 90 with the structure shown in FIG14. FIG14 is a diagram showing an example of a computer 90 that implements the functions of the evaluation device 20 and the graph production device 30. The computer 90 includes a CPU (Central Processing Unit) 91, RAM (Random Access Memory) 92, ROM (Read Only Memory) 93, auxiliary storage device 94, communication I / F (interface) 95, input / output I / F 96, and media I / F 97.

[0093] The CPU 91 operates based on programs stored in the ROM 93 or auxiliary storage device 94 to control various components. The ROM 93 stores the boot program executed by the CPU 91 when the computer 90 starts up, programs that depend on the hardware of the computer 90, etc.

[0094] The auxiliary storage device 94, such as an HDD (Hard Disk Drive) or SSD (Solid State Drive), stores the program executed by the CPU 91 and the data used by that program. The CPU 91 reads the program from the auxiliary storage device 94 and loads it into RAM 92 to execute the loaded program.

[0095] When the computer 90 functions as the evaluation device 20, the communication I / F 95 communicates with the graphing device 30 and the processing device 50 via the communication network 11. When the computer 90 functions as the graphing device 30, the communication I / F 95 communicates with the measuring device 40 and with the evaluation device 20 via the communication network 11. The communication I / F 95 receives data from other devices and sends it to the CPU 91, and also sends data generated by the CPU 91 to other devices.

[0096] The CPU 91 controls input devices such as a keyboard and output devices such as a display via the input / output I / O 96. The CPU 91 acquires signals from the input devices and sends them to the CPU 91 via the input / output I / O 96. In addition, the CPU 91 outputs the generated data to the output devices via the input / output I / O 96.

[0097] Media I / F 97 reads the program or data stored in the recording medium 98 and stores it in the auxiliary storage device 94. The recording medium 98 is, for example, an optical recording medium such as DVD (Digital Versatile Disc), PD (Phase Change Rewritable Disk), an optical-magnetic recording medium such as MO (Magneto-Optical Disk), tape media, magnetic recording media, or semiconductor memory.

[0098] When the computer 90 functions as the evaluation device 20, the CPU 91 of the computer 90 executes the program loaded into the RAM 92 to perform the functions of the output unit 21, the chip diagram providing unit 23, the degradation level determining unit 24, and the evaluation value calculation unit 25. The data in the DB 22 is stored in the RAM 92, ROM 93, or auxiliary storage device 94.

[0099] Furthermore, when the computer 90 functions as the graphics production device 30, the CPU 91 of the computer 90 executes programs loaded onto the RAM 92 to perform the functions of the error determination unit 32, the update unit 33, and the production unit 34. Data in the DB31 is stored in the RAM 92, ROM 93, or auxiliary storage device 94.

[0100] The CPU 91 of the computer 90 reads the program loaded onto the RAM 92 from the recording medium 98 and saves it in the auxiliary storage device 94. However, as another example, the program can also be obtained from other devices via a communication line and saved in the auxiliary storage device 94.

[0101] The first embodiment has been described above. As described above, the substrate processing system 10 in this embodiment includes a processing apparatus 50-1, a processing apparatus 50-2, a conveying apparatus 60-1, a measuring apparatus 40-1, a pattern making apparatus 30-1, and an evaluation apparatus 20. The processing apparatus 50-1 performs a first process on the substrate W. The processing apparatus 50-2 performs a second process on the substrate W after the first process. The conveying apparatus 60-1 conveys the substrate W, after the first process performed by the processing apparatus 50-1, to the processing apparatus 50-2. The measuring apparatus 40-1 measures the errors in the substrate W after the first process performed by the processing apparatus 50-1. The pattern making apparatus 30-1 creates an error map for each substrate W, showing the distribution of errors on the substrate W. The evaluation apparatus 20 calculates an evaluation value indicating the importance of errors for each substrate W based on the error map. The conveying apparatus 60-1 does not convey substrates W with an evaluation value of a predetermined first threshold or higher to the processing apparatus 50-2, but discards those substrates W. This reduces processing waste.

[0102] Furthermore, in the above embodiment, the pattern making apparatus 30-1 includes an error quantity determination unit 32, an update unit 33, and a making unit 34. The error quantity determination unit 32 determines an error quantity, representing the amount of error, for each chip region on the substrate W containing multiple arranged chips, for each substrate W. The update unit 33 updates the error quantity of each chip region containing errors by summing the error quantity of that chip region with the error quantities of other adjacent chip regions, for each substrate W. The making unit 34 determines a predetermined proportion of chip regions on the substrate W in descending order of error quantity among the multiple chip regions, and creates an error map of the determined chip region distribution. This allows for the emphasis of error-dense areas on the substrate W, thereby enabling the creation of an error map that emphasizes the characteristics of errors. By referring to the error map, the characteristics of errors can be easily identified.

[0103] Furthermore, in the above embodiment, the update unit 33 updates the error amount of the chip area for the substrate W where the total error amount determined for each chip area is greater than or equal to a predetermined value. This reduces the error amount during the update process.

[0104] Furthermore, in the above embodiment, the evaluation apparatus 20 includes a degradation level determination unit 24 and an evaluation value calculation unit 25. The degradation level determination unit 24, referring to data obtained by associating degradation levels with each of a predetermined plurality of different error maps, i.e., reference maps, determines for each substrate W a degradation level associated with the reference map that has the highest similarity to the error map produced by the same pattern making apparatus 30-1. This degradation level is a numerical value representing the degree of degradation that causes the distribution of errors in the reference map. The evaluation value calculation unit 25, for each substrate W, calculates the product of the degradation level and the influence of the first process as an evaluation value for the substrate W after the first process. This allows for the calculation of an evaluation value for each substrate W.

[0105] Furthermore, in the above embodiment, the degradation level determination unit 24, referring to data obtained by associating various reference maps of a predetermined plurality of different error maps (i.e., reference maps) with the cause of the error distribution of the reference map, further determines the cause associated with the reference map with the highest similarity to the error map produced by the same pattern making apparatus 30-1 for each substrate W. The evaluation apparatus 20 has an output unit 21, which outputs the cause determined by the degradation level determination unit 24 in association with the identification information of the substrate W. Thus, the user of the substrate processing system 10 and others can determine the reason why the substrate W is discarded.

[0106] Furthermore, in the above embodiment, if the evaluation value is greater than or equal to a second threshold above the first threshold, the evaluation value calculation unit 25 stops the processing device 50-1. This stops the processing device 50-1, which could lead to large errors, thereby preventing the manufacture of a substrate W containing errors.

[0107] Furthermore, in the above embodiment, the substrate processing method includes steps (a) to (d). In step (a), for each substrate W, the errors of the substrate W after the first step performed by the processing apparatus 50-1 are measured. In step (b), for each substrate W, an error map showing the distribution of errors on the substrate W is created. In step (c), for each substrate W, an evaluation value indicating the importance of the errors is calculated based on the error map. In step (d), substrates W with evaluation values ​​above a predetermined first threshold are not transferred to the processing apparatus 50-2, which performs the second step after the first step, and are discarded. This reduces processing waste.

[0108] Furthermore, in the above embodiment, the pattern making apparatus 30 includes an error quantity determination unit 32, an update unit 33, and a making unit 34. The error quantity determination unit 32 determines, for each substrate W, a numerical value representing the amount of error, i.e., an error quantity, for each chip region on the substrate W containing multiple arranged chips, i.e., a chip region. The update unit 33, for each substrate W, updates the error quantity of a chip region containing an error by summing the error quantity of that chip region with the error quantities of other chip regions adjacent to that chip region. The making unit 34, for each substrate W, determines a predetermined proportion of chip regions on the multiple chip regions on the substrate W in descending order of error quantity, and creates an error map of the determined chip region distribution. This allows for the emphasis of error-dense areas on the substrate W, thereby enabling the creation of an error map that emphasizes the characteristics of the error. By referring to the error map, the characteristics of the error can be easily identified.

[0109] [other]

[0110] Furthermore, the technology disclosed in this application is not limited to the above-described embodiments, and various modifications can be made within the scope of its spirit.

[0111] For example, in the above-described embodiments, each time a process step is performed, an error is measured on the substrate W, and the magnitude of the error determines whether to proceed to the next process step for the substrate W. However, the disclosed technology is not limited to this. For example, it is also possible to measure the error on the substrate W after performing multiple processes, and determine whether to proceed to the next process step for the substrate W based on the magnitude of the error. However, even in this case, the error on the substrate W is measured after performing at least one process step other than the last process, and the magnitude of the error determines whether to proceed to the next process step for the substrate W.

[0112] Furthermore, in the above embodiments, the evaluation device 20 and each of the drawing production devices 30 are implemented by separate devices, but the technology disclosed herein is not limited to this. The evaluation device 20 and each of the drawing production devices 30 can also be implemented by a single device.

[0113] Furthermore, the structural elements in the above embodiments are divided according to function based on the main processing content in order to make the structure of the substrate processing system 10 easier to understand. Therefore, the invention of this application is not limited by the method of dividing structural elements or the names of structural elements. The structure of the substrate processing system 10 according to this embodiment can be divided into more structural elements according to the processing content, or it can be divided into one structural element to perform more processing.

[0114] Furthermore, all points in the disclosed embodiments should be considered illustrative rather than restrictive. In fact, the above embodiments can be implemented in various ways. Additionally, the above embodiments can be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit.

[0115] Explanation of reference numerals in the attached figures

[0116] W: Substrate; 10: Substrate processing system; 11: Communication network; 12: Processing group; 13: Housing device; 14: Housing device; 20: Evaluation device; 21: Output unit; 22: DB; 220: Benchmark chart; 221: Product ID; 222: Individual table; 223: Impact table; 224: Product ID; 225: Individual table; 226: Evaluation value table; 227: Product ID; 228: Individual table; 229: Substrate ID; 230: Individual table; 23: Chip pattern providing unit; 24: Degradation level determination unit; 25: Evaluation value calculation unit; 30: Chart Manufacturing apparatus; 31: DB; 310: Error table; 32: Error quantity determination unit; 33: Update unit; 34: Manufacturing unit; 40: Measuring device; 50: Processing device; 60: Conveying device; 70: Chip area; 71: Microparticle; 72: Chip area; 73: Chip area; 74: Measuring position; 75: Chip area; 76: Chip area; 90: Computer; 91: CPU; 92: RAM; 93: ROM; 94: Auxiliary storage device; 95: Communication I / F; 96: Input / output I / F; 97: Medium I / F; 98: Recording medium.

Claims

1. A substrate processing system comprising: a measuring device for measuring errors in the substrate after the substrate has undergone a first processing device that has performed a first processing step on the substrate; a conveying device for conveying the substrate between a plurality of devices including the first processing device, a second processing device, and the measuring device, wherein the second processing device performs a second processing step on the substrate after the first processing step; and a drawing apparatus for drawing an error map representing the distribution of the errors on the substrate for each substrate. And an evaluation device, which, for each of the substrates, calculates an evaluation value representing the importance of the error based on the error map, wherein, The evaluation device indicates the transport destination of the substrate after the first process to the transport device based on the determination result of whether the evaluation value is above a predetermined first threshold. The pattern making device has an error quantity determination unit, which determines a value representing the amount of error, i.e., an error quantity, for each substrate and for each chip area of ​​the substrate with multiple configured chips, i.e., chip area. An update unit, for each substrate, updates the error amount of the chip region containing the error by using the sum of the error amount of the chip region and the error amounts of other chip regions adjacent to the chip region; and a fabrication unit, for each substrate, determines a predetermined proportion of chip regions in a plurality of chip regions on the substrate in descending order of error amount, and fabricates the distribution of the determined chip regions as an error map.

2. The substrate processing system according to claim 1, characterized in that, If the evaluation device determines that the evaluation value is above a predetermined first threshold, it instructs the conveying device not to convey the substrate that has undergone the first process to the second processing device, and instead discards the substrate.

3. The substrate processing system according to claim 1, characterized in that, The updating unit updates the error amount of the chip region for substrates where the total error amount determined for each chip region is above a predetermined value.

4. A substrate processing system comprising: a measuring device for measuring errors in the substrate after it has undergone a first processing device that has performed a first processing step on the substrate; a conveying device for conveying the substrate among a plurality of devices including the first processing device, a second processing device, and the measuring device, wherein the second processing device performs a second processing step on the substrate after the first processing step; a mapping device for generating an error map representing the distribution of errors on the substrate for each substrate; and an evaluation device for calculating, for each substrate, an evaluation value representing the importance of the errors based on the error map, wherein... The evaluation device indicates the transport destination of the substrate after the first process to the transport device based on a determination result that the evaluation value is above a predetermined first threshold. The evaluation device includes: a degradation level determination unit, which determines for each substrate a degradation level associated with the reference map that has the highest similarity to the same error map produced by the pattern making device, by referring to data obtained by associating degradation levels with each of a predetermined plurality of different error maps, i.e., reference maps, whereby the degradation level is a numerical value representing the degree of degradation that causes the distribution of errors in the reference map; and an evaluation value calculation unit, which calculates for each substrate the product of the degradation level and the influence of the first process as an evaluation value of the substrate after the first process.

5. The substrate processing system according to claim 4, characterized in that, The degradation level determination unit refers to data obtained by associating each of the various predetermined error maps, i.e., reference maps, with the error cause of the distribution of the reference map, to further determine the cause associated with the reference map with the highest similarity to the error map produced by the pattern making apparatus for each substrate. The evaluation device has an output unit that outputs the cause determined by the degradation level determination unit in association with the identification information of the substrate.

6. The substrate processing system according to claim 4 or 5, characterized in that, If the evaluation value is greater than or equal to a second threshold that is greater than the first threshold, the evaluation value calculation unit stops the first processing device.

7. A substrate processing method, comprising the following steps: step (a), for each substrate, measuring the errors of the substrate after being processed by a first processing device in a first step; step (b), for each substrate, creating an error map representing the distribution of the errors on the substrate; step (c), for each substrate, calculating an evaluation value representing the importance of the errors based on the error map; step (d), determining the transport destination of the substrate after the first step based on a determination result of whether the evaluation value is above a predetermined first threshold; step (e), for each substrate, acquiring a plurality of configuration chips. The information of the area on the substrate, i.e. the chip area; step (f), for each substrate, determining a numerical value representing the amount of error, i.e., the error amount, for each chip area; step (g), for each substrate, updating the error amount of the chip area containing the error by the sum of the error amount of the chip area and the error amounts of other chip areas adjacent to the chip area; and step (h), for each substrate, determining a predetermined proportion of chip areas in descending order of error amount among the plurality of chip areas on the substrate, and creating an error map of the distribution of the determined chip areas.

8. A pattern making apparatus comprising: an error quantity determination unit, which determines, for each substrate, a numerical value representing the amount of error, i.e., an error quantity, for each chip region on the substrate, i.e., a chip region, of which, for each substrate, a predetermined proportion of chip regions are determined in descending order of error quantity among the plurality of chip regions on the substrate, and the determined distribution of chip regions is made into an error pattern; and an update unit, which, for each substrate, updates the error quantity of a chip region containing an error by using the sum of the error quantity of the chip region and the error quantities of other chip regions adjacent to the chip region.

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