Power semiconductor module

Abstract

An object is to provide a power semiconductor module having a small on-resistance and capable of high-frequency operation. The power semiconductor module includes: a semiconductor chip (2) for power supply, on which a voltage-driven switching element is formed and a gate electrode (20G) is provided on a main surface; a heat sink (3) disposed opposite to the main surface of the semiconductor chip (2) to dissipate heat of the semiconductor chip (2); a wiring substrate (4) disposed between the semiconductor chip (2) and the heat sink (3) and having a gate wiring pattern (40G) connected to an external terminal (6S); an interposer (5) having a gate resistor (50) formed on a plate-like base material disposed between the semiconductor chip (2) and the wiring substrate (4) and interposed between the gate electrode (20G) and the gate wiring pattern (40G); and a resin case (7) for sealing the semiconductor chip (2), the wiring substrate (4), and the interposer (5).

Description

Technical Field

[0001] The present invention relates to a power semiconductor module, and more particularly to a power semiconductor module in which a voltage-controlled semiconductor chip is resin-sealed. Background Art

[0002] Since a semiconductor chip for power supply conducts a large current, heat loss is very large and heat dissipation processing is required. Therefore, a power semiconductor module in which a semiconductor chip is resin-sealed and has a heat sink for discharging the heat of the semiconductor chip to the outside of the resin case is widely used.

[0003] SiC-MOSFET or insulated gate bipolar transistor (IGBT) formed on a silicon carbide substrate and having a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) has the following characteristics: a small on-resistance and a fast switching speed. By using such a switching element, a power semiconductor module that can be used in a high-frequency region can be realized.

[0004] However, when a power supply switching element is to be operated in a high-frequency region, there is a problem as follows: the loss in the gate resistance increases significantly and exceeds the allowable loss of a general resistance element.

[0005] MOSFET or IGBT is a voltage-driven switching element having a high input impedance. In order to suppress inrush current and ringing (damped oscillation), a voltage-driven switching element needs to adjust the switching time, and a gate resistance is connected to the gate terminal. For example, a gate drive circuit and a gate resistance are arranged on a printed circuit board, and the gate drive circuit is connected to the power semiconductor module via the gate resistance.

[0006] If the gate capacitance of the semiconductor chip is Qg, the gate voltage is Vg, and the operating frequency is fc, the power consumed in the gate resistance is P = Qg × fc × Vg.

[0007] For example, in a power supply switching element that processes a large current of 100 A or more, by ensuring a large chip size, the on-resistance is reduced and the loss during conduction is suppressed. Therefore, according to the chip size, the gate capacitance Qg becomes a large value. In addition, for example, when performing high-frequency continuous operation of 100 kHz or more, the operating frequency fc also becomes a large value.

[0008] Therefore, if the switching element for power supply is to operate continuously at high frequency, the loss in the gate resistor increases significantly, reaching several watts, exceeding the allowable loss of general resistor elements. As a result, there are problems such as the following: for example, by connecting multiple resistor elements in parallel or installing a heat sink on the resistor element, it is necessary to increase the allowable loss, resulting in the enlargement of the power supply device and the increase in cost. Summary of the Invention

[0009] Problems to be Solved by the Invention

[0010] The present invention has been completed in view of the above circumstances, and its object is to provide a power semiconductor module having a small on-resistance and capable of operating at high frequency.

[0011] Solutions to the Problems

[0012] The power semiconductor module according to the first embodiment of the present invention is configured to include: a semiconductor chip for power supply, on which a voltage-driven switching element is formed, and a gate electrode is provided on the main surface; a heat sink disposed opposite to the main surface of the semiconductor chip for dissipating heat of the semiconductor chip; a wiring substrate disposed between the semiconductor chip and the heat sink, on which a gate wiring connected to a first external terminal is formed; an insertion plate on which a gate resistor is formed between the gate electrode and the gate wiring on a plate-like base material disposed between the semiconductor chip and the wiring substrate; and a resin frame for sealing the semiconductor chip, the wiring substrate, and the insertion plate.

[0013] By adopting such a structure, it is possible to dispose the heat sink on the gate electrode side of the semiconductor chip and dispose the gate resistor on the heat dissipation path from the semiconductor chip to the heat sink. Therefore, it is also possible to dissipate heat of the gate resistor by using the heat sink for the semiconductor chip, and it is possible to increase the allowable loss of the gate resistor without significantly increasing the manufacturing cost and the device size. In addition, by using an insertion plate having a gate resistor and by combining insertion plates having different resistance values of the same semiconductor chip and gate resistor, it is possible to suppress the manufacturing cost and provide a power semiconductor module corresponding to various operating conditions.

[0014] The power semiconductor module according to the second embodiment of the present invention, in addition to the above structure, is configured such that the gate resistor is a resistance region of the plate-like base material formed so as to penetrate the plate-like base material in the thickness direction, the gate resistor is connected to the gate electrode on one main surface of the plate-like substrate, and the gate wiring is connected to the other main surface.

[0015] By adopting such a structure, heat dissipation of the gate resistor can be effectively carried out without significantly reducing the heat dissipation efficiency of the semiconductor chip. In addition, an increase in inductance caused by the setting of the gate resistor can be suppressed, and good high-frequency characteristics can be obtained.

[0016] In addition to the above structure, the power semiconductor module according to the third embodiment of the present invention is configured such that the plate-shaped base material is a semiconductor substrate, and the gate resistor is an impurity diffusion region formed in the semiconductor substrate.

[0017] By adopting such a structure, an interposer can be fabricated using semiconductor manufacturing technology. Therefore, a highly reliable power semiconductor module can be provided at low cost.

[0018] In addition to the above structure, the power semiconductor module according to the fourth embodiment of the present invention is configured such that one or more controlled electrodes are formed on the main surface of the semiconductor chip, a power supply wiring connected to a second external terminal is formed on the wiring substrate, a wiring connection portion for connecting the controlled electrode to the power supply wiring is formed on the interposer, and the gate resistor has a higher resistance value than the wiring connection portion.

[0019] By adopting such a structure, the power semiconductor module can be miniaturized, and in addition, it can be provided at low cost.

[0020] In addition to the above structure, the power semiconductor module according to the fifth embodiment of the present invention is configured such that the plate-shaped base material is a semiconductor substrate, and both the gate resistor and the wiring connection portion are impurity diffusion regions formed in the semiconductor substrate so as to penetrate the plate-shaped base material in the thickness direction.

[0021] By adopting such a structure, heat dissipation of the gate resistor can be effectively carried out without significantly reducing the heat dissipation efficiency of the semiconductor chip. In addition, an increase in inductance caused by the setting of the gate resistor and the wiring connection portion can be suppressed, and good high-frequency characteristics can be obtained. Furthermore, since the interposer can be fabricated using semiconductor manufacturing technology, a highly reliable power semiconductor module can be provided at low cost.

[0022] In addition to the above structure, the power semiconductor module according to the sixth embodiment of the present invention is configured such that the semiconductor chip is composed of a silicon carbide substrate, and the plate-shaped base material is a silicon substrate.

[0023] By adopting such a structure, damage to the semiconductor chip caused by a difference in thermal expansion coefficient between the gate wiring or the power supply wiring can be suppressed.

[0024] Advantages of the Invention

[0025] According to the present invention, a power semiconductor module with a small on-resistance and capable of high-frequency operation can be provided. In particular, such a power semiconductor module can be miniaturized and provided at a low cost. In addition, damage to the semiconductor chip due to the difference in the coefficient of thermal expansion can be suppressed, and the reliability of the power semiconductor module can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a cross-sectional view showing a structural example of a power semiconductor module 100 according to an embodiment of the present invention;

[0027] Figure 2 is an exploded perspective view showing main components constituting the power semiconductor module 100 according to an embodiment of the present invention;

[0028] Figure 3 is a view showing Figure 2 the state after assembling the components. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification, for convenience, a power semiconductor module having a heat sink on the lower side will be described, but the posture of the semiconductor module of the present invention during use is not limited.

[0030] Figure 1 is a view showing a structural example of a power semiconductor module 100 according to an embodiment of the present invention, and is a cross-sectional view schematically showing the state when cut along a cross-section orthogonal to the semiconductor chip 2. The power semiconductor module 100 includes a semiconductor chip 2, a heat sink 3, a wiring substrate 4, an interposer 5, external terminals 6G, 6S, 6D, and a resin housing 7.

[0031] The semiconductor chip 2, the heat sink 3, the wiring substrate 4, and the interposer 5 are substantially parallel to each other and are all horizontally arranged so as to overlap when viewed from above. The wiring substrate 4 is arranged between the semiconductor chip 2 and the heat sink 3, and the interposer 5 is arranged between the semiconductor chip 2 and the wiring substrate 4.

[0032] The semiconductor chip 2 is a semiconductor device including a switching element 20 for power supply, and a voltage-driven switching element, such as a SiC-MOSFET, is used in the switching element for power supply. The SiC-MOSFET is a MOSFET formed on a silicon carbide (SiC) substrate, has a small on-resistance, and a fast switching speed. Therefore, a large current can be supplied, and high-frequency operation can be performed.

[0033] The MOSFET has a gate electrode 20G, a source electrode 20S, and a drain electrode 20D. The gate electrode 20G is a control terminal with a sufficiently high input impedance, and the source electrode 20S and the drain electrode 20D are controlled terminals whose conduction or non-conduction between the electrodes is controlled by the gate voltage. The gate electrode 20G and the source electrode 20S are formed on the lower surface of the semiconductor chip 2, and the drain electrode 20D is formed on the upper surface of the semiconductor chip 2.

[0034] The heat sink 3 is a member for discharging the heat generated in the resin housing 7 to the outside, and is, for example, a metal plate such as copper Cu or aluminum Al. The lower surface of the heat sink 3 is a heat dissipation surface exposed from the resin housing 7, and by bringing this heat dissipation surface into close contact with the installation surface on which the power semiconductor module 100 is installed, the heat in the resin housing 7 is discharged. The heat of the semiconductor chip 2 is conducted to the heat sink 3 via the interposer 5 and the wiring substrate 4 and discharged to the outside. Similarly, the heat of the wiring connection portion 50G is also conducted to the heat sink 3 via the wiring substrate 4 and discharged to the outside.

[0035] The wiring substrate 4 is an insulating substrate on which a wiring pattern 40 for connecting the semiconductor chip 2 and the external terminals 6G, 6S is formed, and is, for example, a ceramic plate. The wiring pattern 40 is formed by patterning a copper plate attached to the upper surface of the wiring substrate 4 using a lithography technique. The wiring pattern 40 includes a gate wiring pattern 40G connected to the gate electrode 20G and a source wiring pattern 40S connected to the source electrode 20S. The source wiring pattern 40S is a power supply wiring through which a supply current flows.

[0036] In addition, the wiring substrate 4 is disposed between the heat sink 3 and the interposer 5 to insulate the heat sink 3. The lower surface of the wiring substrate 4 is joined to the upper surface of the heat sink 3 via a solder layer 8. A copper plate 42 is used to improve the wettability of the solder on the lower surface of the wiring substrate 4 and is attached to the entire lower surface of the wiring substrate 4.

[0037] The interposer 5 is composed of a plate-like base material in which wiring connection portions 50G, 50S penetrating in the thickness direction are formed, and is disposed between the semiconductor chip 2 and the wiring substrate 4 as a wiring connection portion. The wiring connection portion 50G is a resistance element interposed between the gate electrode 20G and the gate wiring pattern 40G and is used as a gate resistance. The wiring connection portion 50S is a wiring connecting the source electrode 20S and the source wiring pattern 40S. That is, the wiring connection portion 50G functions as a gate resistance, and on the other hand, the wiring connection portion 50S functions as a wiring having a resistance value sufficiently smaller than that of the gate resistance and through which a supply current flows. For example, the resistance value of the wiring connection portion 50G is 1 Ω or more, and in contrast, the resistance value of the wiring connection portion 50S is 1 mΩ or less.

[0038] The interpolation board 5 can be manufactured using known techniques for manufacturing semiconductor devices. For example, by doping a part of the main surface of a semiconductor substrate such as a silicon substrate with impurities such as phosphorus and boron, a conduction region penetrating in the thickness direction can be formed. The conduction region formed in this way can be used as the wiring connection portions 50G and 50S. The resistance values of the wiring connection portions 50G and 50S can be controlled using the impurity concentration. Compared with the wiring connection portion 50G, the wiring connection portion 50S is formed to have a sufficiently small resistance value by increasing the impurity concentration.

[0039] The lower ends of the wiring connection portions 50G and 50S are connected to the wiring patterns 40G and 40S of the wiring substrate 4 by soldering. In addition, the upper ends of the wiring connection portions 50G and 50S are connected to the electrodes 20G and 20S of the semiconductor chip 2 by soldering. That is, the lower surface of the interpolation board 5 is joined to the upper surface of the wiring substrate 4 with a solder layer 8 interposed therebetween, and the upper surface of the interpolation board 5 is joined to the lower surface of the semiconductor chip 2 with a solder layer 8 interposed therebetween.

[0040] The external terminals 6G, 6S, and 6D are terminals that lead out the electrodes 20G, 20S, and 20D of the semiconductor chip 2 to the outside of the resin housing 7, and a part thereof is exposed from the resin housing 7. The external terminal 6G is connected to the gate wiring pattern 40G, the external terminal 6S is connected to the source wiring pattern 40S, and the external terminal 6D is connected to the drain electrode 20D of the semiconductor chip 2.

[0041] The resin housing 7 seals the semiconductor chip 2, the heat sink 3, the wiring substrate 4, the interpolation board 5, and the external terminals 6G, 6S, and 6D in such a manner that the lower surface of the heat sink 3 and a part of the external terminals 6G, 6S, and 6D are exposed from the resin housing 7.

[0042] The heat generated in the semiconductor chip 2 is propagated to the heat sink 3 via the interpolation board 5 and the wiring substrate 4, and is discharged to the outside of the power semiconductor module 100 from the lower surface of the heat sink 3. In addition, the heat generated in the gate resistor (wiring connection portion 50G) is also propagated to the heat sink 3 via the wiring substrate 4 in the same manner, and is discharged to the outside of the power semiconductor module 100 from the lower surface of the heat sink 3. That is, by adopting a structure in which the wiring substrate 4 is disposed between the semiconductor chip 2 and the heat sink 3, and further the interpolation board 5 is disposed between the semiconductor chip 2 and the wiring substrate 4 and the interpolation board 5 has a gate resistor, the heat dissipation path of the semiconductor chip 2 can be utilized, and the heat dissipation of the gate resistor can also be performed in the same direction as the heat dissipation of the semiconductor chip 2. Therefore, the allowable loss of the gate resistor can be increased without increasing the size of the power supply device or significantly increasing the manufacturing cost.

[0043] In addition, since the gate resistor is formed to penetrate the wiring connection portion 50G of the interposer 5, an increase in inductance caused by routing of the wiring can be suppressed, and good high-frequency characteristics can be obtained.

[0044] In addition, instead of providing the gate resistor on the semiconductor chip 2, the gate resistor is provided on the interposer 5. Thus, power semiconductor modules with different operating conditions can be manufactured using the same semiconductor chip. Therefore, power semiconductor modules can be provided at a lower cost.

[0045] In addition, by providing the interposer 5, damage to the semiconductor chip 2 caused by temperature cycling can be suppressed, and the reliability of the power semiconductor module 100 can be improved. The heat sink 3 and the wiring pattern 40 are made of a metal material such as copper (Cu) or aluminum (Al). In contrast, the semiconductor chip 2 is made of silicon carbide (SiC). Therefore, their coefficients of linear expansion are quite different. Thus, in a conventional power semiconductor module without the interposer 5, large stress is generated on the semiconductor chip 2 at high temperatures. In particular, large stress is generated on the lower surface of the semiconductor chip 2 where the wiring pattern 40 is directly welded.

[0046] In contrast, by disposing the interposer 5 made of a material having a coefficient of thermal expansion closer to that of the semiconductor chip 2 between the semiconductor chip 2 and the wiring substrate 4, damage to the semiconductor chip 2 caused by temperature cycling can be suppressed, and the reliability of the power semiconductor module can be improved. Furthermore, since the coefficients of linear expansion of silicon (Si) and silicon carbide (SiC) are relatively close, it is preferable to use a silicon substrate as the plate-shaped base material of the interposer 5.

[0047] Figure 2 FIG. is an exploded perspective view showing the main components of the power semiconductor module 100 according to an embodiment of the present invention. In addition, Figure 3 is a perspective view showing the state after assembling the Figure 2 components. Furthermore, in these figures, the external terminals 6D and the resin housing 7 are omitted.

[0048] The semiconductor chip 2 includes one semiconductor switching element, and one gate electrode 20G and three source electrodes 20S are formed on its lower surface. Furthermore, the three source electrodes 20S are formed by branching the same electrode 20S of the same semiconductor switching element 20 within the semiconductor chip 2.

[0049] Corresponding to the four electrodes 20G, 20S of the semiconductor chip 2, one wiring connection portion 50G and three wiring connection portions 50S are respectively formed on the interposer 5, and one gate wiring pattern 40G and three source wiring patterns 40S are respectively formed on the wiring substrate 4.

[0050] In the above-described embodiment, the case where the semiconductor switching element 20 is a SIC-MOSFET has been described, but the present invention is not limited to such a case. For example, the present invention can also be applied when the semiconductor switching element 20 is an insulated gate bipolar transistor (IGBT). In this case, a silicon substrate is used in the semiconductor chip 2.

[0051] In addition, in the above-described embodiment, the case where the interposer 5 has three wiring connection portions 50S has been described, but the present invention is not limited to such a case. For example, an interposer 5 having one or more wiring connection portions 50S can be used. In addition, an interposer 5 having only the wiring connection portion 50G and not having the wiring connection portion 50S can also be used.

[0052] Description of Reference Numerals

[0053] 100 Power semiconductor module

[0054] 2 Semiconductor chip

[0055] 20 Switching element for power supply

[0056] 20G Gate electrode

[0057] 20S Source electrode

[0058] 20D Drain electrode

[0059] 3 Heat sink

[0060] 4 Wiring substrate

[0061] 40 Wiring pattern

[0062] 40G Wiring pattern for gate

[0063] 40S Wiring pattern for source

[0064] 42 Copper plate

[0065] 5 Interposer

[0066] 50G Wiring connection portion (gate resistor)

[0067] 50S Wiring connection portion

[0068] 6G, 6S, 6D External terminals

[0069] 7 Resin housing.

Claims

1. A power semiconductor module, characterized in that, it comprises: a semiconductor chip for power supply, which forms a voltage-driven switching element and has a gate electrode provided on the main surface; a heat sink, which is disposed opposite to the main surface of the semiconductor chip to dissipate heat of the semiconductor chip; a wiring substrate, which is disposed between the semiconductor chip and the heat sink and forms a gate wiring connected to a first external terminal; an interposer, which is disposed between the semiconductor chip and the wiring substrate; and a resin housing, which seals the semiconductor chip, the wiring substrate and the interposer, wherein the interposer is composed of a plate-shaped base material, a gate resistor is formed in the plate-shaped base material between the gate electrode and the gate wiring, and the gate resistor is a resistance region of the plate-shaped base material formed in a manner of penetrating the plate-shaped base material in the thickness direction.

2. The power semiconductor module according to claim 1, characterized in that, the gate resistor is connected to the gate electrode on one main surface of the plate-shaped base material and the gate wiring is connected on the other main surface.

3. The power semiconductor module according to claim 2, characterized in that, the plate-shaped base material is a semiconductor substrate, and the gate resistor is an impurity diffusion region formed in the semiconductor substrate.

4. The power semiconductor module according to claim 1, characterized in that, one or more controlled electrodes are formed on the main surface of the semiconductor chip, a power supply wiring connected to a second external terminal is formed on the wiring substrate, a wiring connection portion for connecting the controlled electrode to the power supply wiring is formed on the interposer, and the gate resistor has a higher resistance value than the wiring connection portion.

5. The power semiconductor module according to claim 4, characterized in that, the plate-shaped base material is a semiconductor substrate, and both the gate resistor and the wiring connection portion are impurity diffusion regions formed in the semiconductor substrate in a manner of penetrating the plate-shaped base material in the thickness direction.

6. The power semiconductor module according to any one of claims 1 to 5, characterized in that, the semiconductor chip is composed of a silicon carbide substrate, and the plate-shaped base material is a silicon substrate.

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