Memory-based data migration method and apparatus

Abstract

The embodiment of the present application relates to the technical field of computer storage, and discloses a memory-based data migration method and device, which comprises the following steps: first and second queues corresponding to a volatile first internal memory and a non-volatile second internal memory are respectively established; state information of a logical page is updated according to read and write operations on the logical page, and the state information is adjusted in a first storage position of the first queue or the second queue; a first logical page is loaded from an external memory into the first internal memory according to a storage condition of the first internal memory, and state information of the first logical page is stored into the first queue; and the first logical page is loaded from the first internal memory into the second internal memory according to a storage condition of the second internal memory, and the state information of the first logical page is stored into the second queue. Through the above method, the performance of a storage system can be improved, the number of write operations on the non-volatile internal memory is reduced, and the service life of the non-volatile internal memory is prolonged.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of computer storage, and particularly relate to a data migration method and device based on memory. BACKGROUND

[0002] In a computer storage system, an internal memory has characteristics of high access performance, volatility and small capacity, and an external memory has characteristics of low access performance, non-volatility and large capacity. A traditional storage controller is based on a two-layer architecture of internal memory-external memory, and performs data migration in units of data pages to improve the performance of the storage system. With the development of non-volatile internal memory, its characteristics of higher access performance, non-volatility, higher capacity and lower life span trigger the upgrade of the storage system. In a common storage system of hybrid internal memory, non-volatile internal memory and external memory, the data page reading path is usually to migrate the data page from the external memory to the non-volatile internal memory and then to the internal memory, and the data page writing path is usually the opposite, that is, to migrate the data page from the internal memory to the non-volatile internal memory and then to the external memory.

[0003] The prior art uses the characteristics of non-volatile storage to improve the performance of the storage system, and uses a wear algorithm to evenly distribute the write load to the non-volatile storage to prolong the service life. The existing method does not consider the whole migration path of the data page globally, and there is repeated migration of hot and cold data, resulting in loss of storage performance and non-volatile storage life. SUMMARY

[0004] In view of the above problems, embodiments of the present application provide a data migration method and device based on memory, which overcomes the above problems or at least partially solves the above problems.

[0005] According to an aspect of the embodiments of the present application, a memory-based data migration method is provided. The method comprises: establishing a first queue and a second queue corresponding to a first internal memory and a second internal memory respectively, the first queue and the second queue being used to record state information of logical pages in the first internal memory and the second internal memory respectively, the state information including at least page number, operation frequency and modification flag of the logical pages; updating the state information of a first logical page according to read / write operation on the first logical page, and adjusting the first storage position of the state information in the first queue or the second queue; if the first logical page needs to be stored in the first internal memory, loading the first logical page from an external memory to the first internal memory according to the storage condition of the first internal memory, and storing the state information of the first logical page in the first queue; if the first logical page needs to be stored in the second internal memory, loading the first logical page from the first internal memory to the second internal memory according to the storage condition of the second internal memory, and storing the state information of the first logical page in the second queue, while deleting the state information of the first logical page in the first queue; if a second logical page needs to be migrated from the first internal memory or the second internal memory, migrating the second logical page corresponding to the end position of the first queue or the second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page in the first queue or the second queue.

[0006] In an alternative way, the first queue and the second queue corresponding to the first internal memory and the second internal memory respectively are established, and further comprising: dividing the first queue and the second queue into high-frequency area and low-frequency area respectively; storing the state information of the logical pages in the corresponding high-frequency area or low-frequency area of the first queue or the second queue according to the operation frequency; establishing a page directory table, the page directory table storing the first storage position of the logical pages in the first queue or the second queue with the page number of the logical pages as index.

[0007] In an alternative way, the state information of the first logical page is updated according to the read-write operation of the first logical page, and the state information is adjusted in the first storage position of the first queue or the second queue, comprising: judging whether the first logical page to be read is stored in the first internal memory or the second internal memory according to the page directory table; if the first logical page is not stored in the first internal memory and the second internal memory, performing the step of loading the first logical page from the external memory to the first internal memory according to the storage condition of the first internal memory, and storing the state information of the first logical page into the first queue; if the first logical page is stored in the first internal memory or the second internal memory, reading the first logical page from the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, and adjusting the state information in the first storage position of the first queue or the second queue according to the updated operation frequency; or, writing the first logical page into the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, setting the modified flag as modified, and adjusting the state information in the first storage position of the first queue or the second queue according to the updated operation frequency.

[0008] In an alternative way, the state information is adjusted in the first storage position of the first queue or the second queue according to the operation frequency, comprising: if the updated operation frequency is greater than or equal to the preset frequency, updating the first logical page to the start position of the high-frequency area; if the updated operation frequency is less than the preset frequency, updating the first logical page to the start position of the low-frequency area.

[0009] In an alternative way, the second logical page corresponding to the end position of the first queue or the second queue is migrated out according to the modified flag of the second logical page, and the state information of the second logical page corresponding to the first queue or the second queue is deleted, comprising: if the modified flag in the state information is modified, loading the second logical page at the end position of the low-frequency area of the second queue into the external memory, and deleting the state information of the second logical page in the second queue; or, loading the second logical page at the end position of the low-frequency area of the first queue into the second internal memory, deleting the state information of the second logical page in the first queue, and adding the state information of the second logical page in the second queue; if the modified flag is not modified, directly discarding the second logical page at the end position of the low-frequency area of the first queue or the second queue, and deleting the state information of the second logical page corresponding to the first queue or the second queue.

[0010] In an alternative, the first logical page is loaded from the outer memory into the first inner memory according to the storage condition of the first inner memory, and the state information of the first logical page is stored into the first queue, including: if the first inner memory is full of logical pages, the step of migrating out the second logical page corresponding to the end position of the first queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the position in the first queue or the second queue is performed; if the first inner memory is not full of logical pages, the first logical page is loaded from the outer memory into the first inner memory, the second storage position of the first logical page in the first inner memory is stored in the state information of the first logical page, and the state information is inserted into the start position of the low frequency area of the first queue.

[0011] In an alternative, the first logical page is loaded from the outer memory into the first inner memory according to the storage condition of the first inner memory, and the state information of the first logical page is stored into the first queue, including: if the first inner memory is full of logical pages, the step of migrating out the second logical page corresponding to the end position of the first queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the position in the first queue or the second queue is performed; if the first inner memory is not full of logical pages, the first logical page is loaded from the outer memory into the first inner memory, the second storage position of the first logical page in the first inner memory is stored in the state information of the first logical page, and the state information is inserted into the start position of the low frequency area of the first queue.

[0012] According to another aspect of the embodiments of the present application, a memory-based data migration device is provided, the device comprising: a queue creating unit configured to establish a first queue and a second queue corresponding to a first volatile memory and a second non-volatile memory respectively, the first queue and the second queue being configured to record state information of logical pages in the first memory and the second memory respectively, the state information including at least page number, operation frequency and modification flag of the logical pages; a read-write unit configured to update the state information of a first logical page according to a read-write operation on the first logical page, and adjust the first storage position of the state information in the first queue or the second queue; a first loading unit configured to load the first logical page from an external memory to the first memory and load the state information of the first logical page to the first queue according to the storage condition of the first memory if the first logical page needs to be stored in the first memory; a second loading unit configured to load the first logical page from the first memory to the second memory and store the state information of the first logical page in the second queue while deleting the state information of the first logical page in the first queue according to the storage condition of the second memory if the first logical page needs to be stored in the second memory; and a migration unit configured to migrate a second logical page at the end position of the corresponding first queue or second queue according to the modification flag of the second logical page and delete the state information of the second logical page in the corresponding first queue or second queue if the second logical page needs to be migrated from the first memory or the second memory.

[0013] According to another aspect of the embodiments of the present application, a computing device is provided, comprising: a processor, a memory, a communication interface and a communication bus, the processor, the memory and the communication interface being capable of communicating with each other through the communication bus.

[0014] The memory is configured to store at least one executable instruction, the executable instruction enabling the processor to perform the steps of the above-mentioned memory-based data migration method.

[0015] According to yet another aspect of the embodiments of the present application, a computer storage medium is provided, the computer storage medium storing at least one executable instruction, the executable instruction enabling the processor to perform the steps of the above-mentioned memory-based data migration method.

[0016] The embodiment of the present application establishes a first queue and a second queue corresponding to a first internal memory and a second internal memory respectively, the first queue and the second queue are used for recording state information of a logical page in the first internal memory and the second internal memory respectively, the state information at least includes a page number of the logical page, an operation frequency and a modification flag; the state information of the first logical page is updated according to a read-write operation on the first logical page, and the state information is adjusted in a first storage position of the first queue or the second queue; if the first logical page needs to be stored in the first internal memory, the first logical page is loaded from an external memory to the first internal memory according to a storage condition of the first internal memory, and the state information of the first logical page is stored in the first queue; if the first logical page needs to be stored in the second internal memory, the first logical page is loaded from the first internal memory to the second internal memory according to a storage condition of the second internal memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page located in the first queue is deleted; if the second logical page needs to be migrated from the first internal memory or the second internal memory, the second logical page corresponding to an end position of the first queue or the second queue is migrated according to a modification flag of the second logical page, and the state information of the second logical page located in the first queue or the second queue is deleted, so that the performance of the storage system can be improved, the write times of the non-volatile internal memory are reduced, and the service life of the non-volatile internal memory is prolonged.

[0017] The above description is only a summary of the technical scheme of the embodiment of the present application, in order to more clearly understand the technical means of the embodiment of the present application, the content of the specification can be implemented, and in order to make the above and other purposes, characteristics and advantages of the embodiment of the present application more obvious and easy to understand, the specific embodiment of the present application is described below. BRIEF DESCRIPTION OF DRAWINGS

[0018] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The accompanying drawings are intended to depict only preferred embodiments of the application, and therefore should not be considered to limit the scope of the application in any way. Similarly, like reference numerals are used to indicate like parts throughout the several views. Some embodiments are now described more fully hereinafter with reference to the accompanying drawings, in which:

[0019] Figure 1 A flowchart of a memory-based data migration method provided by the embodiment of the present application is shown;

[0020] Figure 2 A structural schematic diagram of a storage system of the memory-based data migration method provided by the embodiment of the present application is shown;

[0021] Figure 3 A structural schematic diagram of the first queue or the second queue of the memory-based data migration method provided by the embodiment of the present application is shown;

[0022] Figure 4 An insertion diagram of the first queue and the second queue of the memory-based data migration method provided by the embodiment of the present application is shown;

[0023] Figure 5 An operation diagram of the first logical page of the memory-based data migration method provided by the embodiment of the present application is shown;

[0024] Figure 6 A read diagram of the first logical page of the memory-based data migration method provided by the embodiment of the present application is shown;

[0025] Figure 7 A load diagram of the first logical page of the memory-based data migration method provided by the embodiment of the present application is shown;

[0026] Figure 8 A structure diagram of the memory-based data migration device provided by the embodiment of the present application is shown;

[0027] Figure 9 A structure diagram of the computing device provided by the embodiment of the present application is shown. DETAILED DESCRIPTION

[0028] Exemplary embodiments of the present application will be described herein below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that the present application can be more thoroughly understood and so that the scope of the present application can be completely conveyed to those skilled in the art.

[0029] Figure 1 A flow diagram of the memory-based data migration method provided by the embodiment of the present application is shown. The memory-based data migration method is applied to an electronic device, such as a notebook computer, a computer, etc. Figure 1 As shown, the memory-based data migration method includes:

[0030] Step S11: first and second queues corresponding to a first memory and a second memory are respectively established, the first queue and the second queue are respectively used to record state information of logical pages in the first memory and the second memory, and the state information at least includes a page number, an operation frequency and a modification flag of the logical pages.

[0031] In the embodiment of the present application, the electronic device can be a notebook computer, a computer, etc. The first logical page is a data unit for data operation, and is preferably a data page. The storage system of the embodiment of the present application is shown in FIG. 1. Figure 2As shown, the system includes a storage controller, volatile internal memory, non-volatile internal memory, and external memory, migrating data between these memory locations in units of logical pages. The underlying external memory is responsible for persisting large amounts of logical pages. The non-volatile internal memory maintains a fixed-size cache pool to provide persistence and read / write operations for logical pages. The internal memory maintains a fixed-size cache pool to provide read / write operations for volatile logical pages. The storage controller maintains the state information of logical pages in the internal memory and maintains a first queue and a second queue corresponding to the two cache pools, respectively managing and controlling the cache pools.

[0032] In step S11, the first internal memory is Figure 2 The first queue is a volatile internal memory, and the second internal memory is a non-volatile internal memory. Optionally, the first queue and the second queue are respectively divided into a high-frequency region and a low-frequency region; the state information of the logical page is stored in the high-frequency region or the low-frequency region according to the operation frequency. The first queue and the second queue are cold and hot queues used to characterize hot and cold data, and their structures are as follows: Figure 3 As shown, the first queue and the second queue are queues of fixed size L. The first and second queues arrange logical pages according to their frequency of operation (hot or cold). Data with high operation frequency is considered hot data, and data with low operation frequency is considered cold data. Preferably, the first and second queues are divided into a high-frequency zone and a low-frequency zone from left to right based on the data's frequency (hot to cold), containing logical pages of 2 / 3L and 1 / 3L queue lengths respectively. Logical pages in the cache pool with an operation frequency greater than or equal to a preset number are defined as high-frequency logical pages. The leftmost end of the high-frequency zone is the starting position, and the rightmost end is the ending position. Similarly, the leftmost end of the low-frequency zone is the starting position, and the rightmost end is the ending position. The rightmost logical page in the first and second queues is the corresponding cold data page to be evicted in the next round in the cache pool, while the insertion point of the logical page in the first and second queues is located at the leftmost position of the low-frequency zone. The preset number of operations can be set as needed, preferably 3 times.

[0033] In step S11, optionally, a page directory table is also established, which stores the first storage location of the logical page in the first queue or the second queue using the page number of the logical page as an index. For example... Figure 4As shown, the page directory table is used to record the logical pages that have been cached in the cache pool of the main memory and the cache pool of the non-volatile memory, and to quickly search whether the logical pages exist in the cache pool. The first queue and the second queue respectively identify the hot and cold data of the logical pages in the main memory and the non-volatile memory, and each time the logical pages are evicted, the rightmost logical page in the first queue or the second queue is evicted. The page directory table is stored with the page number of the logical page as the index, and the stored content is <the page number of the logical page, the first storage position of the state information of the logical page in the first queue or the second queue>. The content of the state information of the logical page in the first queue and the second queue is <the page number of the logical page, the operation frequency of the logical page, the modification flag of the logical page, and the second storage position of the logical page in the cache pool of the first main memory or the second main memory>.

[0034] Step S12: updating the state information of the first logical page according to the read and write operation of the first logical page, and adjusting the first storage position of the state information in the first queue or the second queue.

[0035] In the embodiment of the present application, the data operation in the storage system is as follows Figure 5 As shown, arrow 1 and arrow 2 represent the read operation of the data page of the main memory and the non-volatile memory, and arrow 4 and arrow 5 represent the write operation of the data page of the main memory and the non-volatile memory. Arrow 3, arrow 6 and arrow 7 represent the loading and migration process of the data page in the storage system in the present application.

[0036] The complete process of reading the logical page in the storage system is as follows Figure 6 As shown, it is first judged whether the first logical page exists in the first main memory. If the first logical page exists in the first main memory, the first logical page is directly read from the main memory. If the first logical page does not exist in the first main memory, it is judged whether the first logical page exists in the second main memory. If the first logical page exists in the second main memory, the first logical page is directly read from the second main memory. If the first logical page does not exist in the second main memory, the first logical page is loaded from the external storage into the first main memory, and then the first logical page is read from the first main memory. The data page is loaded into the main memory instead of the non-volatile memory, which avoids the process of loading the data page that is only read but not modified into the non-volatile memory, and reduces the number of write operations to the non-volatile storage area.

[0037] When reading a first logical page from the first internal memory or the second internal memory, optionally, the page directory table is first used to determine whether the first logical page to be read is stored in the first internal memory or the second internal memory. The page directory table maintains information about whether the first logical page is in the first internal memory or the second internal memory, and the page directory table is stored in an index structure. By retrieving the logical page using its page number, it can be confirmed whether the first logical page is in the cache pool of the first internal memory or the second internal memory. If it exists, the state information of the first logical page can be obtained from its first storage location in the first queue or the second queue, and then the state information of the first logical page, including the operation frequency and modification flag, can be obtained.

[0038] If the first logical page is not stored in the first internal memory and the second internal memory, then the steps of loading the first logical page from the external memory into the first internal memory according to the storage status of the first internal memory, and storing the status information of the first logical page in the first queue are performed, and then the first logical page is read from the internal memory. If the first logical page is stored in the first internal memory or the second internal memory, then the first logical page is read from the first internal memory or the second internal memory, the operation frequency in the status information is incremented by 1, and the first storage position of the status information in the first queue or the second queue is adjusted according to the updated operation frequency. That is, the first logical page is first loaded into the first internal memory, and then the first logical page is read from the first internal memory. Since the second internal memory has relatively high read performance and can be directly read, if the first logical page is in the second internal memory, then... Figure 5 The migration arrow 2 in the diagram indicates a direct read of the first logical page from the second internal memory. Direct reading of the first logical page from the second internal memory eliminates the need to load the first logical page from non-volatile internal memory into volatile internal memory, reducing the risk of cold data replacing hot data on internal memory.

[0039] When writing a first logical page to the first internal memory or the second internal memory, the second internal memory has relatively high write performance and can be directly written to. Optionally, when writing a first logical page to the first internal memory or the second internal memory, the first logical page is written to the first internal memory or the second internal memory, the operation frequency in the status information is incremented by 1, the modification flag is set to modified, and the first storage position of the status information in the first queue or the second queue is adjusted according to the updated operation frequency. Figure 5 The migration arrow 5 in the diagram indicates that the first logical page is directly written to the non-volatile internal memory. Direct writing of data pages to the non-volatile internal memory completes the data persistence operation with higher performance than external memory.

[0040] Each time the first logical page in the first queue or the second queue is operated, the operation frequency of the first logical page is updated, if the updated operation frequency is greater than or equal to a preset frequency, the first logical page is updated to the start position of the high-frequency area; if the updated operation frequency is less than the preset frequency, the first logical page is updated to the start position of the low-frequency area.

[0041] Step S13: If it is needed to store the first logical page in the first internal memory, the first logical page is loaded from the external memory to the first internal memory according to the storage condition of the first internal memory, and the state information of the first logical page is stored in the first queue.

[0042] In step S13, optionally, if the first internal memory is full of logical pages, the step of migrating out the second logical page corresponding to the end position of the first queue according to the modification flag of the second logical page and deleting the state information of the second logical page located in the first queue is performed; then the first logical page is loaded into the first internal memory. If the first internal memory is not full of logical pages, the first logical page is loaded from the external memory to the first internal memory, the state information of the first logical page is set, wherein the operation frequency in the state information is initialized as 1, the modification flag is initialized as unmodified, the second storage position of the first logical page in the first internal memory is recorded, the state information is inserted into the start position of the low-frequency area of the first queue, and the index information of the first logical page is inserted into the page directory table to store the first storage position of the state information of the first logical page in the first queue.

[0043] Step S14: If it is needed to store the first logical page in the second internal memory, the first logical page is loaded from the first internal memory to the second internal memory according to the storage condition of the second internal memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page located in the first queue is deleted.

[0044] In the embodiment of the present application, optionally, if the second internal memory is full of logical pages, the step of migrating out the second logical page corresponding to the end position of the second queue according to the modification flag of the second logical page and deleting the state information of the second logical page located in the second queue is performed; then the first logical page is loaded from the first internal memory to the second internal memory.

[0045] If the second memory is not full, the first logical page is loaded from the first memory to the second memory, the second storage location of the first logical page in the second memory is stored in the state information of the first logical page, and the state information of the first logical page is inserted into the start position of the low-frequency area of the second queue, while the state information of the first logical page in the first queue is deleted.

[0046] The embodiment of the present application directly uses the non-volatile memory to complete reading and writing without using the internal memory, and directly loads the data page into the internal memory in the page fault scenario without completing the transfer through the non-volatile internal memory, thereby optimizing the performance of the storage system by using the performance characteristics of the non-volatile internal memory, reducing the number of writes to the non-volatile internal memory, and prolonging the service life of the non-volatile internal memory.

[0047] Step S15: If it is necessary to migrate out the second logical page from the first memory or the second memory, the second logical page corresponding to the end position of the first queue or the second queue is migrated out according to the modification flag of the second logical page, and the state information of the second logical page in the first queue or the second queue is deleted.

[0048] Optionally, if the modification flag is modified, the second logical page located at the end position of the low-frequency area of the second queue is loaded into the external memory, and the state information of the second logical page in the second queue is deleted. Alternatively, the second logical page located at the end position of the low-frequency area of the first queue is loaded into the second memory, the state information of the second logical page in the first queue is deleted, and the state information of the second logical page is added in the second queue. If the modification flag is not modified, the second logical page at the end position of the low-frequency area of the first queue or the second queue is directly discarded, and the state information of the second logical page in the first queue or the second queue is deleted.

[0049] The embodiment of the present application adopts the hierarchical storage structure of internal memory-non-volatile internal memory-external memory, and uses the hot-cold queue based on high frequency-low frequency to control the migration of hot-cold data pages, and reduces the migration probability of hot data pages in combination with the migration path of the data pages, thereby improving the access performance of the entire storage system.

[0050] In the embodiment of the present application, the logical page replacement and the persistence process are triggered in the process of loading the logical page of the external memory into the internal memory or the regular cold data archiving process. The complete process of the logical page replacement and the logical page persistence is as shown in Figure 7 , which includes:

[0051] Step S701: judge whether the first internal memory is full of logical pages. If not, execute step S702; if yes, execute step S703.

[0052] If the first logical page in the external memory needs to be loaded into the first internal memory, first judge whether the first internal memory is full of logical pages. If the first internal memory is full of logical pages, it means that the first logical page cannot be directly loaded into the first internal memory, and part of the logical pages in the first internal memory needs to be evicted first. If the first internal memory is not full of logical pages, it means that the first logical page can be directly loaded into the second internal memory.

[0053] Step S702: directly load the first logical page from the external memory into the first internal memory.

[0054] If the first internal memory is not full of logical pages, load the first logical page from the external memory into the first internal memory, store the second storage position of the first logical page in the first internal memory in the state information of the first logical page, and insert the state information into the starting position of the low frequency area of the first queue, that is, the insertion point of Figure 4 , and add the index information of the first logical page in the page directory table at the same time.

[0055] Step S703: evict the second logical page located at the end position of the low frequency area in the first queue.

[0056] If the first internal memory is full of logical pages, first evict the second logical page located at the end position of the low frequency area in the first queue, so that the first internal memory is not full of logical pages, and then load the first logical page from the external memory into the first internal memory.

[0057] Step S704: judge whether the second logical page to be evicted is modified. If not, execute step S705; if yes, execute step S706.

[0058] When the second logical page located at the end position of the low frequency area in the first queue is evicted, first judge whether the second logical page to be evicted is modified. Preferably, the judgment is made according to the state information of the second logical page. If the modified flag in the state information of the second logical page is set to modified, it means that the second logical page has been modified, and the second logical page needs to be loaded into the second internal memory to complete the persistence.

[0059] Step S705: directly evict the second logical page, and load the first logical page from the external memory into the first internal memory.

[0060] If the modified flag in the state information of the second logical page is not modified, the second logical page is directly evicted, i.e. the second logical page is directly deleted from the first internal memory, and the state information of the first logical page in the first queue and the index information of the first logical page in the page directory table are also deleted. Then the first logical page is loaded from the external memory to the first internal memory.

[0061] Step S706: It is judged whether the second internal memory is full of logical pages. If not, step S707 is executed; if yes, step S708 is executed.

[0062] If the modified flag in the state information of the second logical page is modified, and the second logical page needs to be loaded into the second internal memory to complete the persistency, it is first judged whether the second internal memory is full of logical pages. If the second internal memory is full of logical pages, it is indicated that the first logical page cannot be directly loaded into the second internal memory, and part of the logical pages in the second internal memory need to be evicted first. If the second internal memory is not full of logical pages, it is indicated that the logical page can be directly loaded into the second internal memory.

[0063] Step S707: The second logical page is persisted to the second internal memory.

[0064] If the second internal memory is not full of logical pages, the second logical page located at the end position of the low frequency area in the first queue is evicted to the second internal memory first, the storage position in the state information of the second logical page is changed to the second storage position in the second internal memory, and the state information is stored in the start position of the low frequency area of the second queue, while the index information of the second logical page in the page directory table is updated, and the state information of the second logical page is deleted from the first queue.

[0065] Then the first logical page is loaded into the first internal memory, and the state information of the first logical page is added to the start position of the low frequency area of the first queue, and the index of the first logical page in the page directory table is added.

[0066] Step S708: The third logical page in the second internal memory is evicted to the external memory, and the second logical page is persisted to the second internal memory.

[0067] If the second internal memory is full of logical pages, the third logical page located at the end position of the low frequency area in the second queue is evicted to the external memory first, and the state information of the second logical page is deleted from the first queue, and the index information of the second logical page is deleted from the page directory table.

[0068] Then, the second logical page at the end of the low frequency area in the first queue is evicted to the second memory, the storage location in the state information of the second logical page is changed to the second storage location in the second memory, the state information is stored in the start location of the low frequency area of the second queue, the index information of the second logical page in the page directory table is updated, and the state information of the second logical page in the first queue is deleted.

[0069] Finally, the first logical page is loaded into the first memory, and the state information of the first logical page is set, wherein the modification flag in the state information is initially set as unmodified, the storage location is set as the second storage location of the first logical page in the first memory, the operation frequency is initially set as 1, the state information is stored in the start location of the low frequency area of the first queue, and the index information of the first logical page in the page directory table is added.

[0070] The embodiment of the present application establishes the first queue and the second queue corresponding to the volatile first memory and the non-volatile second memory respectively, the first queue and the second queue are used for recording the state information of the logical pages in the first memory and the second memory respectively, the state information at least includes the page number, the operation frequency and the modification flag of the logical page; the state information of the first logical page is updated according to the read-write operation of the first logical page, and the first storage location of the state information in the first queue or the second queue is adjusted; if the first logical page needs to be stored in the first memory, the first logical page is loaded from the external memory into the first memory according to the storage condition of the first memory, and the state information of the first logical page is stored in the first queue; if the first logical page needs to be stored in the second memory, the first logical page is loaded from the first memory into the second memory according to the storage condition of the second memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page in the first queue is deleted; if the second logical page needs to be migrated from the first memory or the second memory, the second logical page at the end of the corresponding first queue or second queue is migrated according to the modification flag of the second logical page, and the state information of the second logical page in the corresponding first queue or second queue is deleted, which can improve the performance of the storage system, reduce the write times of the non-volatile memory, and prolong the service life of the non-volatile memory.

[0071] Figure 8 The structure schematic diagram of the memory-based data migration device of the embodiment of the present application is shown. Figure 8As shown, the memory-based data migration device is arranged in a storage controller of a storage system, and includes a queue creating unit 801, a read-write unit 802, a first loading unit 803, a second loading unit 804, and a migration unit 805.

[0072] The queue creating unit 801 is configured to establish a first queue and a second queue corresponding to a first volatile memory and a second non-volatile memory respectively, the first queue and the second queue being used to record state information of logical pages in the first memory and the second memory respectively, the state information including at least page number, operation frequency, and modification flag of the logical pages; the read-write unit 802 is configured to update the state information of a first logical page according to read-write operations on the first logical page, and adjust the first storage position of the state information in the first queue or the second queue; the first loading unit 803 is configured to load the first logical page from an external memory to the first memory according to the storage condition of the first memory if the first logical page needs to be stored in the first memory, and load the state information of the first logical page to the first queue; the second loading unit 804 is configured to load the first logical page from the first memory to the second memory according to the storage condition of the second memory if the first logical page needs to be stored in the second memory, and store the state information of the first logical page in the second queue, while deleting the state information of the first logical page in the first queue; and the migration unit 805 is configured to migrate a second logical page from the first queue or the second queue according to the modification flag of the second logical page if the second logical page needs to be migrated from the first memory or the second memory, and delete the state information of the second logical page in the first queue or the second queue.

[0073] In an optional manner, the queue creating unit 801 is configured to divide the first queue and the second queue into a high-frequency area and a low-frequency area respectively, store the state information of the logical pages in the corresponding high-frequency area or low-frequency area of the first queue or the second queue according to the operation frequency, and establish a page directory table, the page directory table storing the first storage position of the logical pages in the first queue or the second queue with the page number of the logical pages as an index.

[0074] In an alternative, the read-write unit 802 is configured to determine whether the first logical page to be read is stored in the first internal memory or the second internal memory according to the page directory table; if the first logical page is not stored in the first internal memory or the second internal memory, perform the step of loading the first logical page from the external memory into the first internal memory according to the storage condition of the first internal memory, and storing the state information of the first logical page into the first queue; if the first logical page is stored in the first internal memory or the second internal memory, read the first logical page from the first internal memory or the second internal memory, increase the operation frequency in the state information by 1, and adjust the first storage position of the state information in the first queue or the second queue according to the updated operation frequency; or, write the first logical page into the first internal memory or the second internal memory, increase the operation frequency in the state information by 1, set the modification flag as modified, and adjust the first storage position of the state information in the first queue or the second queue according to the updated operation frequency.

[0075] In an alternative, the read-write unit 802 is configured to, if the updated operation frequency is greater than or equal to a preset frequency, update the first logical page to the start position of the high-frequency area; and if the updated operation frequency is less than the preset frequency, update the first logical page to the start position of the low-frequency area.

[0076] In an alternative, the migration-out unit 805 is configured to, if the modification flag in the state information is modified, load the second logical page located at the end position of the low-frequency area of the second queue into the external memory, and delete the state information of the second logical page in the second queue; or, load the second logical page located at the end position of the low-frequency area of the first queue into the second internal memory, delete the state information of the second logical page in the first queue, and add the state information of the second logical page in the second queue; if the modification flag is not modified, directly discard the second logical page located at the end position of the low-frequency area of the first queue or the second queue, and delete the corresponding state information of the second logical page located in the first queue or the second queue.

[0077] In an alternative, the first loading unit 803 is arranged to: if the first internal memory is full of logical pages, perform the step of evicting the second logical page corresponding to the second end position of the first queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the first queue or the second queue; and if the first internal memory is not full of logical pages, load the first logical page from the external memory into the first internal memory, store the second storage position of the first logical page in the first internal memory in the state information of the first logical page, and insert the state information into the start position of the low frequency area of the first queue.

[0078] In an alternative, the second loading unit 804 is arranged to: if the second internal memory is full of logical pages according to the base station, perform the step of evicting the second logical page corresponding to the second end position of the second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the second queue; and if the second internal memory is not full of logical pages, load the first logical page from the first internal memory into the second internal memory, store the second storage position of the first logical page in the second internal memory in the state information of the first logical page, and insert the state information of the first logical page into the start position of the low frequency area of the second queue, while deleting the state information of the first logical page corresponding to the first queue.

[0079] The embodiment of the present application establishes a first queue and a second queue corresponding to a first internal memory and a second internal memory respectively, the first queue and the second queue are used for recording state information of a logical page in the first internal memory and the second internal memory respectively, the state information at least includes a page number, an operation frequency and a modification flag of the logical page; the state information of the first logical page is updated according to a read-write operation of the first logical page, and the first storage position of the state information in the first queue or the second queue is adjusted; if the first logical page needs to be stored in the first internal memory, the first logical page is loaded from an external memory to the first internal memory according to the storage condition of the first internal memory, and the state information of the first logical page is stored in the first queue; if the first logical page needs to be stored in the second internal memory, the first logical page is loaded from the first internal memory to the second internal memory according to the storage condition of the second internal memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page in the first queue is deleted; if a second logical page needs to be migrated from the first internal memory or the second internal memory, the second logical page corresponding to the end position of the first queue or the second queue is migrated according to the modification flag of the second logical page, and the state information of the second logical page in the first queue or the second queue is deleted, so that the performance of the storage system is improved, the write times of the non-volatile internal memory are reduced, and the service life of the non-volatile internal memory is prolonged.

[0080] The embodiment of the present application provides a non-volatile computer storage medium, the computer storage medium stores at least one executable instruction, and the computer executable instruction can execute the memory-based data migration method in any method embodiment.

[0081] The executable instruction can be specifically used for causing the processor to execute the following operations:

[0082] A first queue and a second queue corresponding to a first internal memory and a second internal memory respectively are established, the first queue and the second queue are used for recording state information of a logical page in the first internal memory and the second internal memory respectively, the state information at least includes a page number, an operation frequency and a modification flag of the logical page;

[0083] The state information of the first logical page is updated according to a read-write operation of the first logical page, and the first storage position of the state information in the first queue or the second queue is adjusted;

[0084] if the first logical page needs to be stored in the first internal memory, loading the first logical page from external memory into the first internal memory according to the storage condition of the first internal memory, and storing the state information of the first logical page into the first queue;

[0085] if the first logical page needs to be stored in the second internal memory, loading the first logical page from the first internal memory into the second internal memory according to the storage condition of the second internal memory, storing the state information of the first logical page into the second queue, and deleting the state information of the first logical page in the first queue;

[0086] if a second logical page needs to be migrated from the first internal memory or the second internal memory, migrating the second logical page at the end of the corresponding first queue or second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page in the corresponding first queue or second queue.

[0087] In an optional manner, the executable instructions cause the processor to perform the following operations:

[0088] dividing the first queue and the second queue into high-frequency areas and low-frequency areas respectively;

[0089] storing the state information of the logical page in the corresponding high-frequency area or low-frequency area of the first queue or second queue according to the operation frequency;

[0090] establishing a page directory table, the page directory table storing the first storage position of the logical page in the first queue or second queue with the page number as an index.

[0091] In an optional manner, the executable instructions cause the processor to perform the following operations:

[0092] determining whether the first logical page to be read is stored in the first internal memory or the second internal memory according to the page directory table;

[0093] if the first logical page is not stored in the first internal memory and the second internal memory, performing the step of loading the first logical page from external memory into the first internal memory according to the storage condition of the first internal memory, and storing the state information of the first logical page into the first queue;

[0094] If the first logical page is stored in the first internal memory or the second internal memory, reading the first logical page from the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, and adjusting the first storage position of the state information in the first queue or the second queue according to the updated operation frequency; or, writing the first logical page into the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, setting the modification flag as modified, and adjusting the first storage position of the state information in the first queue or the second queue according to the updated operation frequency.

[0095] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0096] If the updated operation frequency is greater than or equal to a preset frequency, updating the first logical page to a start position of the high-frequency area;

[0097] If the updated operation frequency is less than the preset frequency, updating the first logical page to a start position of the low-frequency area.

[0098] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0099] If the modification flag in the state information is modified, loading the second logical page at the end position of the low-frequency area of the second queue into the external memory and deleting the state information of the second logical page in the second queue; or, loading the second logical page at the end position of the low-frequency area of the first queue into the second internal memory, deleting the state information of the second logical page in the first queue, and adding the state information of the second logical page in the second queue;

[0100] If the modification flag is not modified, directly discarding the second logical page at the end position of the low-frequency area of the first queue or the second queue and deleting the corresponding state information of the second logical page in the first queue or the second queue.

[0101] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0102] If the first internal memory is full of logical pages, performing the step of migrating out the second logical page at the end position of the corresponding first queue according to the modification flag of the second logical page and deleting the corresponding state information of the second logical page in the first queue or the second queue;

[0103] if the first inner memory is not full of logical pages, then loading the first logical page from the outer memory into the first inner memory, storing a second storage location of the first logical page in the first inner memory in the state information of the first logical page, and inserting the state information into a start location of a low frequency area of the first queue.

[0104] In an alternative way, the executable instructions cause the processor to perform the following operations:

[0105] if the second inner memory is full of the logical pages, then performing the step of migrating out the second logical page corresponding to the end location of the second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the second queue.

[0106] if the second inner memory is not full of the logical pages, then loading the first logical page from the first inner memory into the second inner memory, storing a second storage location of the first logical page in the second inner memory in the state information of the first logical page, and inserting the state information of the first logical page into a start location of a low frequency area of the second queue, while deleting the state information of the first logical page in the first queue.

[0107] The embodiment of the present application can improve the performance of the storage system, reduce the write times of the non-volatile memory storage, and prolong the service life of the non-volatile memory storage.

[0108] The embodiment of the present application provides a computer program product, the computer program product comprises a computer program stored on a computer storage medium, the computer program comprises program instructions, when the program instructions are executed by a computer, the computer executes the memory-based data migration method in any method embodiment.

[0109] The executable instructions can be specifically used for causing the processor to perform the following operations:

[0110] The first queue and the second queue corresponding to the first volatile memory and the second non-volatile memory are respectively established, the first queue and the second queue are respectively used for recording state information of a logical page in the first memory and the second memory, and the state information at least comprises a page number, an operation frequency and a modification flag of the logical page;

[0111] The state information of the first logical page is updated according to the read-write operation of the first logical page, and the first storage position of the state information in the first queue or the second queue is adjusted.

[0112] if the first logical page needs to be stored in the first inner memory, loading the first logical page from the outer memory into the first inner memory according to the storage condition of the first inner memory, and storing the state information of the first logical page into the first queue;

[0113] if the first logical page needs to be stored in the second inner memory, loading the first logical page from the first inner memory into the second inner memory according to the storage condition of the second inner memory, storing the state information of the first logical page into the second queue, and deleting the state information of the first logical page in the first queue;

[0114] if a second logical page needs to be migrated from the first inner memory or the second inner memory, migrating the second logical page at the end of the corresponding first queue or second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page in the corresponding first queue or second queue.

[0115] In an optional manner, the executable instructions cause the processor to perform the following operations:

[0116] dividing the first queue and the second queue into high-frequency areas and low-frequency areas respectively;

[0117] storing the state information of the logical page in the corresponding high-frequency area or low-frequency area of the first queue or second queue according to the operation frequency;

[0118] establishing a page directory table, which stores the first storage position of the logical page in the first queue or second queue with the page number as an index.

[0119] In an optional manner, the executable instructions cause the processor to perform the following operations:

[0120] determining whether the first logical page to be read is stored in the first inner memory or the second inner memory according to the page directory table;

[0121] if the first logical page is not stored in the first inner memory and the second inner memory, performing the step of loading the first logical page from the outer memory into the first inner memory according to the storage condition of the first inner memory, and storing the state information of the first logical page into the first queue;

[0122] If the first logical page is stored in the first internal memory or the second internal memory, reading the first logical page from the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, and adjusting the first storage position of the state information in the first queue or the second queue according to the updated operation frequency; or, writing the first logical page into the first internal memory or the second internal memory, adding 1 to the operation frequency in the state information, setting the modification flag as modified, and adjusting the first storage position of the state information in the first queue or the second queue according to the updated operation frequency.

[0123] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0124] If the updated operation frequency is greater than or equal to a preset frequency, updating the first logical page to a starting position of the high-frequency area;

[0125] If the updated operation frequency is less than the preset frequency, updating the first logical page to a starting position of the low-frequency area.

[0126] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0127] If the modification flag in the state information is modified, loading the second logical page at the end position of the low-frequency area of the second queue into the external memory and deleting the state information of the second logical page in the second queue; or, loading the second logical page at the end position of the low-frequency area of the first queue into the second internal memory, deleting the state information of the second logical page in the first queue, and adding the state information of the second logical page in the second queue;

[0128] If the modification flag is not modified, directly discarding the second logical page at the end position of the low-frequency area of the first queue or the second queue and deleting the corresponding state information of the second logical page in the first queue or the second queue.

[0129] In an optional mode, the executable instructions cause the processor to perform the following operations:

[0130] If the first internal memory is full of logical pages, performing the step of migrating out the second logical page at the end position of the corresponding first queue according to the modification flag of the second logical page and deleting the corresponding state information of the second logical page in the first queue or the second queue;

[0131] if the first inner memory is not full of logical pages, then loading the first logical page from the outer memory into the first inner memory, storing a second storage location of the first logical page in the first inner memory in the state information of the first logical page, and inserting the state information into a start location of a low frequency area of the first queue.

[0132] In an alternative way, the executable instructions cause the processor to perform the following operations:

[0133] if the second inner memory is full of the logical pages, then performing the step of migrating out the second logical page corresponding to the end location of the second queue according to the modification flag of the second logical page, and deleting the state information of the second logical page corresponding to the second queue.

[0134] if the second inner memory is not full of the logical pages, then loading the first logical page from the first inner memory into the second inner memory, storing a second storage location of the first logical page in the second inner memory in the state information of the first logical page, and inserting the state information of the first logical page into a start location of a low frequency area of the second queue, while deleting the state information of the first logical page in the first queue.

[0135] The embodiment of the present application establishes a first queue and a second queue corresponding to a first internal memory and a second internal memory respectively, the first queue and the second queue are used for recording state information of a logical page in the first internal memory and the second internal memory respectively, the state information at least includes a page number, an operation frequency and a modification flag of the logical page; the state information of the first logical page is updated according to a read-write operation of the first logical page, and the state information is adjusted in a first storage position of the first queue or the second queue; if the first logical page needs to be stored in the first internal memory, the first logical page is loaded from an external memory to the first internal memory according to a storage condition of the first internal memory, and the state information of the first logical page is stored in the first queue; if the first logical page needs to be stored in the second internal memory, the first logical page is loaded from the first internal memory to the second internal memory according to a storage condition of the second internal memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page in the first queue is deleted; if a second logical page needs to be migrated from the first internal memory or the second internal memory, the second logical page corresponding to a tail position of the first queue or the second queue is migrated according to the modification flag of the second logical page, and the state information of the second logical page in the first queue or the second queue is deleted, which can improve the performance of the storage system, reduce the write times of the non-volatile internal memory, and prolong the service life of the non-volatile internal memory.

[0136] Figure 9 The structural schematic diagram of the computing device provided by the embodiment of the present application is shown, and the embodiment of the present application does not limit the specific implementation of the device.

[0137] As shown in Figure 9 , the computing device can include a processor 902, a communications interface 904, a memory 906, and a communications bus 908.

[0138] The processor 902, the communications interface 904, and the memory 906 complete mutual communication through the communications bus 908. The communications interface 904 is used for communication with network elements of other devices, such as clients or other servers. The processor 902 is used for executing the program 910, and specifically can execute related steps in the above 9G base station planning method embodiment.

[0139] Specifically, the program 910 can include program code including computer operation instructions.

[0140] The processor 902 can be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to perform the functions of the embodiments of the present application. The device can include one or more processors of the same type, such as one or more CPUs, or processors of different types, such as one or more CPUs and one or more ASICs.

[0141] The memory 906 is used to store a program 910. The memory 906 can include a high-speed RAM memory, and can also include a non-volatile memory, such as at least one disk memory.

[0142] The program 910 can be specifically used to cause the processor 902 to perform the following operations:

[0143] A first queue and a second queue corresponding to a first volatile internal memory and a second non-volatile internal memory are respectively established, and the first queue and the second queue are respectively used to record state information of logical pages in the first internal memory and the second internal memory, and the state information at least includes a page number, an operation frequency and a modification flag of the logical page;

[0144] The state information of the first logical page is updated according to read and write operations of the first logical page, and a first storage position of the state information in the first queue or the second queue is adjusted;

[0145] If the first logical page needs to be stored in the first internal memory, the first logical page is loaded from an external memory into the first internal memory according to a storage condition of the first internal memory, and the state information of the first logical page is stored in the first queue;

[0146] If the first logical page needs to be stored in the second internal memory, the first logical page is loaded from the first internal memory into the second internal memory according to a storage condition of the second internal memory, and the state information of the first logical page is stored in the second queue, and the state information of the first logical page located in the first queue is deleted;

[0147] If a second logical page needs to be migrated out from the first internal memory or the second internal memory, the second logical page corresponding to the end position of the first queue or the second queue is migrated out according to the modification flag of the second logical page, and the state information of the second logical page in the first queue or the second queue is deleted.

[0148] In an alternative way, the program 910 causes the processor to perform the following operations:

[0149] The first queue and the second queue are respectively divided into a high frequency area and a low frequency area;

[0150] The state information of the logical page is stored in the corresponding high frequency area or low frequency area of the first queue or the second queue according to the operation frequency;

[0151] A page directory table is established, which stores the first storage position of the logical page in the first queue or the second queue with the page number as an index.

[0152] In an alternative way, the program 910 causes the processor to perform the following operations:

[0153] According to the page directory table, it is judged whether the first logical page to be read is stored in the first internal memory or the second internal memory;

[0154] If the first logical page is not stored in the first internal memory and the second internal memory, the step of loading the first logical page from an external memory into the first internal memory according to the storage condition of the first internal memory and storing the state information of the first logical page into the first queue is performed;

[0155] If the first logical page is stored in the first internal memory or the second internal memory, the first logical page is read from the first internal memory or the second internal memory, the operation frequency in the state information is increased by 1, and the first storage position of the state information in the first queue or the second queue is adjusted according to the updated operation frequency; or, the first logical page is written into the first internal memory or the second internal memory, the operation frequency in the state information is increased by 1, the modification flag is set as modified, and the first storage position of the state information in the first queue or the second queue is adjusted according to the updated operation frequency.

[0156] In an alternative way, the program 910 causes the processor to perform the following operations:

[0157] If the updated operation frequency is greater than or equal to the preset frequency, the first logical page is updated to the start position of the high frequency area;

[0158] If the updated operation frequency is less than the preset frequency, the first logical page is updated to the start position of the low frequency area.

[0159] In an alternative way, the program 910 causes the processor to perform the following operations:

[0160] If the modification flag in the state information is modified, the second logical page at the end position of the low frequency area in the second queue is loaded into the external memory, and the state information of the second logical page in the second queue is deleted; or the second logical page at the end position of the low frequency area in the first queue is loaded into the second internal memory, the state information of the second logical page in the first queue is deleted, and the state information of the second logical page is added in the second queue;

[0161] If the modification flag is not modified, the second logical page at the end position of the low frequency area in the first queue or the second queue is directly discarded, and the corresponding state information of the second logical page in the first queue or the second queue is deleted.

[0162] In an alternative way, the program 910 causes the processor to perform the following operations:

[0163] If the first internal memory is full of logical pages, the step of migrating out the second logical page at the end position of the corresponding first queue according to the modification flag of the second logical page, and deleting the corresponding state information of the second logical page in the first queue or the second queue is performed;

[0164] If the first internal memory is not full of logical pages, the first logical page is loaded from the external memory into the first internal memory, the second storage position of the first logical page in the first internal memory is stored in the state information of the first logical page, and the state information is inserted into the start position of the low frequency area of the first queue.

[0165] In an alternative way, the program 910 causes the processor to perform the following operations:

[0166] If the second internal memory is full of the logical pages, the step of migrating out the second logical page at the end position of the corresponding second queue according to the modification flag of the second logical page, and deleting the corresponding state information of the second logical page in the second queue is performed;

[0167] If the second memory is not full, the first logical page is loaded from the first memory to the second memory, the second storage location of the first logical page in the second memory is stored in the state information of the first logical page, and the state information of the first logical page is inserted into the start position of the low frequency area of the second queue, while the state information of the first logical page in the first queue is deleted.

[0168] The embodiment of the present application establishes a first queue and a second queue corresponding to a volatile first memory and a non-volatile second memory respectively, the first queue and the second queue are used to record state information of logical pages in the first memory and the second memory respectively, the state information at least includes page number, operation frequency and modification flag of the logical page; the state information of the first logical page is updated according to read and write operations of the first logical page, and the first storage location of the state information in the first queue or the second queue is adjusted; if the first logical page needs to be stored in the first memory, the first logical page is loaded from an external memory to the first memory according to the storage condition of the first memory, and the state information of the first logical page is stored in the first queue; if the first logical page needs to be stored in the second memory, the first logical page is loaded from the first memory to the second memory according to the storage condition of the second memory, and the state information of the first logical page is stored in the second queue, while the state information of the first logical page in the first queue is deleted; if the second logical page needs to be migrated from the first memory or the second memory, the second logical page corresponding to the end position of the first queue or the second queue is migrated according to the modification flag of the second logical page, and the state information of the second logical page corresponding to the first queue or the second queue is deleted, which can improve the performance of the storage system, reduce the write times of the non-volatile memory, and prolong the service life of the non-volatile memory.

[0169] The algorithms and displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Various general purpose systems can be used with programs in accordance with the teachings herein, or it can prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will be apparent from the description above. In addition, the present embodiment is not intended to be limited to any particular programming language. It will be appreciated that a variety of programming languages can be used to implement the teachings of the present application as described herein, and any references below to specific languages are provided for disclosure of enablement only.

[0170] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application can be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been described in detail in order not to obscure the understanding of this description.

[0171] Similarly, it is to be understood that the embodiments of the application can be adapted to other applications and that their features can be interchanged in any way. In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application can be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been described in detail in order not to obscure the understanding of this description.

[0172] Those skilled in the art will appreciate that the modules in the apparatuses in the embodiments can be adapted and arranged in one or more apparatuses other than the embodiments. The modules or units or components in the embodiments can be combined into one module or unit or component, and further can be divided into more sub-modules or sub-units or sub-components. In addition to the fact that at least some of such features and / or processes or units are mutually exclusive, all features disclosed in this specification (including the accompanying claims, abstract and drawings) and all processes or units of any method or apparatus disclosed thus can be combined in any combination. Unless explicitly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) can be replaced by an alternative feature providing the same, equivalent or similar purpose.

[0173] It is to be noticed that the above-mentioned embodiments illustrate rather than limit the application, and that one skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word 'comprising' does not exclude the presence of elements or steps other than those listed in a claim. The word 'a' or 'an' preceding an element does not exclude the presence of a plurality of such elements. The application can be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In a unit claim, several devices can be listed, even though they are not, in fact, incoporated into a single physical device. The use of the word 'at least' followed by a list of one or more items does not exclude additional such items. The use of the terms 'first','second' and 'third', etc. does not limit the scope of the application, but merely identifies a name of an element. Steps in the methods provided herein do not have to be performed in the exact order disclosed, unless explicitly stated.

Claims

1. A memory-based data migration method, characterized in that, The method includes: A first queue and a second queue are established corresponding to the volatile first internal memory and the non-volatile second internal memory, respectively. The first queue and the second queue are used to record the status information of logical pages in the first internal memory and the second internal memory, respectively. The status information includes at least the page number, operation frequency and modification flag of the logical page. Update the status information of the first logical page according to the read and write operations on the first logical page, and adjust the first storage position of the status information in the first queue or the second queue. If it is necessary to store the first logical page in the first internal memory, the first logical page is loaded from the external memory into the first internal memory according to the storage status of the first internal memory, and the status information of the first logical page is stored in the first queue. If it is necessary to store the first logical page in the second internal memory, the first logical page is loaded from the first internal memory into the second internal memory according to the storage status of the second internal memory, and the status information of the first logical page is stored in the second queue, while the status information of the first logical page located in the first queue is deleted. If it is necessary to remove a second logical page from the first internal memory or the second internal memory, the second logical page at the end of the corresponding first queue or the second queue is removed according to the modification flag of the second logical page, and the status information of the corresponding second logical page located in the first queue or the second queue is deleted. The step of establishing a first queue and a second queue corresponding to a volatile first internal memory and a non-volatile second internal memory, respectively, further includes: The first queue and the second queue are respectively divided into a high-frequency zone and a low-frequency zone; The state information of the logical page is stored in the high-frequency area or the low-frequency area corresponding to the first queue or the second queue according to the operation frequency. A page directory table is established, which stores the first storage location of the logical page in the first queue or the second queue using the page number as an index.

2. The method according to claim 1, characterized in that, The step of updating the state information of the first logical page according to read and write operations on the first logical page, and adjusting the first storage location of the state information in the first queue or the second queue, includes: Determine whether the first logical page to be read is stored in the first internal memory or the second internal memory based on the page directory table; If the first logical page is not stored in the first internal memory and the second internal memory, then the steps of loading the first logical page from the external memory into the first internal memory according to the storage status of the first internal memory and storing the status information of the first logical page into the first queue are executed. If the first logical page is stored in the first internal memory or the second internal memory, then the first logical page is read from the first internal memory or the second internal memory, the operation frequency in the status information is incremented by 1, and the first storage position of the status information in the first queue or the second queue is adjusted according to the updated operation frequency; or, the first logical page is written to the first internal memory or the second internal memory, the operation frequency in the status information is incremented by 1, the modification flag is set to modified, and the first storage position of the status information in the first queue or the second queue is adjusted according to the updated operation frequency.

3. The method according to claim 2, characterized in that, The step of adjusting the first storage location of the status information in the first queue or the second queue according to the operation frequency includes: If the frequency of the updated operation is greater than or equal to the preset frequency, then the first logical page is updated to the starting position of the high-frequency zone; If the frequency of the update operation is less than the preset frequency, then the first logical page is updated to the starting position of the low-frequency zone.

4. The method according to claim 2, characterized in that, The step of removing the second logical page from the end position of the corresponding first queue or second queue according to the modification flag of the second logical page, and deleting the status information of the corresponding second logical page located in the first queue or second queue, includes: If the modification flag in the status information is modified, then the second logical page located at the end of the low-frequency zone of the second queue is loaded into the external memory, and the status information of the second logical page in the second queue is deleted; or, the second logical page located at the end of the low-frequency zone of the first queue is loaded into the second internal memory, the status information of the second logical page in the first queue is deleted, and the status information of the second logical page is added to the second queue. If the modification flag is not modified, the second logical page at the end of the low-frequency zone of the first queue or the second queue is directly eliminated, and the status information of the corresponding second logical page located in the first queue or the second queue is deleted.

5. The method according to claim 1, characterized in that, The step of loading the first logical page from the external memory into the first internal memory according to the storage status of the first internal memory, and storing the status information of the first logical page into the first queue, includes: If the first internal memory is full of logical pages, then the steps of moving out the second logical page at the end of the first queue according to the modification flag of the second logical page and deleting the status information of the corresponding second logical page located in the first queue or the second queue are executed. If the first internal memory is not full of logical pages, the first logical page is loaded from the external memory into the first internal memory, the second storage location of the first logical page in the first internal memory is stored in the status information of the first logical page, and the status information is inserted into the starting position of the low frequency zone of the first queue.

6. The method according to claim 1, characterized in that, The step of loading the first logical page from the first internal memory into the second internal memory according to the storage status of the second internal memory, storing the status information of the first logical page in the second queue, and simultaneously deleting the status information of the first logical page located in the first queue includes: If the second internal memory is full of the logical pages, then the steps of moving out the second logical page at the end of the second queue according to the modification flag of the second logical page and deleting the status information of the corresponding second logical page in the second queue are executed. If the second internal memory is not full of the logical page, the first logical page is loaded from the first internal memory into the second internal memory, the second storage location of the first logical page in the second internal memory is stored in the status information of the first logical page, the status information of the first logical page is inserted into the starting position of the low frequency zone of the second queue, and the status information of the first logical page located in the first queue is deleted.

7. A memory-based data migration device, characterized in that, The device includes: The queue creation unit is used to create a first queue and a second queue corresponding to the volatile first internal memory and the non-volatile second internal memory, respectively. The first queue and the second queue are used to record the status information of logical pages in the first internal memory and the second internal memory, respectively. The status information includes at least the page number, operation frequency and modification flag of the logical page. The read / write unit is used to update the status information of the first logical page according to the read / write operation on the first logical page, and adjust the first storage position of the status information in the first queue or the second queue. The first loading unit is configured to load the first logical page from the external memory into the first internal memory according to the storage status of the first internal memory if the first logical page needs to be stored in the first internal memory, and load the status information of the first logical page into the first queue. The second loading unit is configured to, if it is necessary to store the first logical page in the second internal memory, load the first logical page from the first internal memory into the second internal memory according to the storage status of the second internal memory, store the status information of the first logical page into the second queue, and delete the status information of the first logical page located in the first queue. The migration unit is configured to, if a second logical page needs to be migrated out from the first internal memory or the second internal memory, migrate out the second logical page at the end of the corresponding first queue or the second queue according to the modification flag of the second logical page, and delete the status information of the corresponding second logical page located in the first queue or the second queue. The queue creation unit is used to: divide the first queue and the second queue into a high-frequency zone and a low-frequency zone, respectively; store the status information of the logical page in the corresponding high-frequency zone or the low-frequency zone of the first queue or the second queue according to the operation frequency; and establish a page directory table, which stores the first storage location of the logical page in the first queue or the second queue using the page number of the logical page as an index.

8. A computing device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store at least one executable instruction that causes the processor to perform the steps of the memory-based data migration method according to any one of claims 1-6.

9. A computer storage medium, characterized in that, The storage medium stores at least one executable instruction that causes a processor to perform the steps of the memory-based data migration method according to any one of claims 1-6.

Images