Method of forming a semiconductor structure

Abstract

A method for forming a semiconductor structure, comprising: providing a substrate, the substrate comprising a base and a plurality of fins on the base, the base surface having an isolation layer; forming a plurality of gate structures on the isolation layer, the gate structures being separated from each other and crossing the fins, the gate structures comprising a gate and a sidewall; forming source-drain openings in the fins on both sides of the gate structures; the sidewall surface having a defect seed attached thereto, and after forming the source-drain openings, forming a sacrificial film on the defect seed surface by using a selective epitaxial growth process, the sacrificial film being also between the defect seed surface and the sidewall surface; removing the sacrificial film by using a pre-clean process to peel off the defect seed; and after the pre-clean process, forming source-drain structures in the source-drain openings, the top surface of the source-drain structures being higher than or flush with the top surface of the fins. The semiconductor structure formed by the method has good reliability.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. BACKGROUND

[0002] With the development of integrated circuits to ultra large scale integrated circuits, the circuit density inside the integrated circuits is getting larger and larger, and the number of components contained therein is also increasing, and the size of the components is also decreasing. With the decrease of the size of the semiconductor structure, the channel of the device in the semiconductor structure is shortened. Due to the shortening of the channel, the gradual channel approximation no longer holds, and various adverse physical effects (especially short channel effects) are highlighted, which causes the degradation of device performance and reliability, and limits the further reduction of device size.

[0003] In order to overcome the short channel effect of the device and suppress the leakage current, the prior art proposes a fin field effect transistor (Fin FET), which is a common multi-gate device. The structure of the fin field effect transistor includes a fin portion located on the surface of a semiconductor substrate and an isolation layer covering part of the sidewall of the fin portion, and the surface of the isolation layer is lower than the top of the fin portion; a gate structure located on the surface of the isolation layer, and the top and sidewall surface of the fin portion; a source region and a drain region in the fin portion on both sides of the gate structure.

[0004] However, the reliability of the semiconductor structure in the prior art still needs to be improved. SUMMARY

[0005] The technical problem solved by the present application is to provide a method for forming a semiconductor structure to improve the reliability of the semiconductor structure.

[0006] To solve the above technical problems, the technical scheme of the present application provides a method for forming a semiconductor structure, which comprises: providing a substrate, the substrate comprising a base and a plurality of fins located on the base and separated from each other, the surface of the base having an isolation layer, the isolation layer also being located between adjacent fins, and the surface of the isolation layer being lower than the top surface of the fin; forming a plurality of gate structures separated from each other on the isolation layer, the gate structures crossing the fins, the gate structures comprising a gate oxide layer, a gate electrode located on the surface of the gate oxide layer, and a sidewall located on the sidewall of the gate oxide layer and the gate electrode; forming source-drain openings in the fins on both sides of the gate structure; the surface of the sidewall is attached to a defect seed, and after forming the source-drain openings, a selective epitaxial growth process is used to form a sacrificial film on the surface of the defect seed, the sacrificial film also being located between the surface of the defect seed and the surface of the sidewall; the sacrificial film is removed by a pre-cleaning process to peel off the defect seed; after the pre-cleaning process, a source-drain structure is formed in the source-drain opening, the top surface of the source-drain structure being higher than or flush with the top surface of the fin.

[0007] Optionally, in the process of forming the sacrificial film by the selective epitaxial growth process, a growth rate of the material of the sacrificial film on the surface of the sidewall is less than a growth rate of the material of the sacrificial film on the surface of the defect seed.

[0008] Optionally, the material of the sacrificial film includes silicon germanium with a concentration of germanium in a preset range, the pre-cleaning process is a dry cleaning process, and the dry cleaning process uses a reaction gas including hydrogen chloride gas.

[0009] Optionally, the concentration of germanium in the material of the sacrificial film ranges from 10% to 20%.

[0010] Optionally, the parameters of the selective epitaxial growth process for forming the sacrificial film include that a pressure range is 10 Torr to 30 Torr.

[0011] Optionally, the parameters of the selective epitaxial growth process for forming the sacrificial film further include that the gas includes GeH4, and a flow rate of the GeH4 ranges from 15 standard cubic centimeters per minute to 25 standard cubic centimeters per minute.

[0012] Optionally, the parameters of the pre-cleaning process further include that a flow rate of the hydrogen chloride gas ranges from 100 standard cubic centimeters per minute to 200 standard cubic centimeters per minute.

[0013] Optionally, the parameters of the pre-cleaning process further include that a pressure range is 5 Torr to 20 Torr, and a temperature range is 600 degrees Celsius to 700 degrees Celsius.

[0014] Optionally, the sacrificial film is also located on at least part of an inner wall surface of the source-drain opening, and in the process of removing the sacrificial film by the pre-cleaning process, the sacrificial film on the inner wall surface of the source-drain opening is removed.

[0015] Optionally, the material of the source-drain structure includes silicon phosphide.

[0016] Compared with the prior art, the technical scheme of the embodiment of the present application has the following beneficial effects:

[0017] The technical scheme of the present application provides a semiconductor structure forming method, in which the defect seeds are attached to the sidewall surface when the source-drain opening is formed, or the defect seeds are attached to the sidewall surface before the source-drain opening is formed. Since the selective epitaxial growth process is used to form the sacrificial film on the surface of the defect seeds, and the sacrificial film is also located between the surface of the defect seeds and the sidewall surface, the sacrificial film of the known material can be selectively formed on the surface of the defect seeds, so that the corresponding reaction gas is selected according to the known material, so that the chemical reaction between the reaction gas and the sacrificial film is strong and controllable during the pre-cleaning process by the pre-cleaning process, thereby achieving good effect of removing the sacrificial film and peeling off the defect seeds covered by the sacrificial film. Therefore, the risk of forming a large number of defect structures with large volume on the sidewall surface during the formation of the source-drain structure is small, and the risk of short circuit of the semiconductor device is low, thereby improving the reliability of the semiconductor structure.

[0018] Further, the chemical reaction between hydrogen chloride gas and silicon is strong and controllable. On the one hand, since the material of the sacrificial film includes silicon germanium, and the concentration of germanium in the material of the sacrificial film is within a preset range, on the other hand, since the dry cleaning process using the reaction gas including hydrogen chloride gas is used, the strong and controllable chemical reaction between the reaction gas and the sacrificial film can be achieved, thereby achieving good effect of removing the sacrificial film and peeling off the defect seeds covered by the sacrificial film. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figures 1-2 is a sectional structure schematic diagram of each step of a semiconductor structure forming process;

[0020] Figure 3 is Figure 2 is a distribution diagram of defects in the semiconductor structure;

[0021] Figures 4-9 is a sectional structure schematic diagram of each step of a semiconductor structure forming method according to an embodiment of the present application;

[0022] Figure 10 is a distribution diagram of defect structures in the semiconductor structure according to an embodiment of the present application. DETAILED DESCRIPTION

[0023] As described in the background, the reliability of the existing semiconductor structure still needs to be improved. The following detailed description is made in combination with the following drawings.

[0024] Figures 1-2 is a sectional structure schematic diagram of each step of a semiconductor structure forming process.

[0025] Please refer to Figure 1, a substrate (not shown) is provided, and a plurality of mutually separated fins 100 are formed on the substrate; an isolation layer (not shown) is formed on the surface of the substrate, and the isolation layer is also located between adjacent fins 100, and the surface of the isolation layer is lower than the top surface of the fins 100; and a plurality of mutually separated gate structures 110 are formed on the isolation layer.

[0026] Please refer to Figure 2 Source-drain openings (not shown) are formed in the fins 100 on both sides of the gate structures 110; and a selective epitaxy process is used to form source-drain structures 120 in the source-drain openings.

[0027] In the above method, in the process of forming the source-drain structures 120 by using the selective epitaxy process, the material of the source-drain structures 120 not only selectively grows on the inner wall surface of the source-drain openings, but also easily grows on the surface of the defect seeds 111 (as shown in Figure 1 ) attached to the side wall of the gate structures 110, and the defect seeds 111 are, for example, residues on the surface of the gate structures 110 in a previous process of forming the source-drain structures 120. Thus, while the source-drain structures 120 are formed, a large number of defects 130 (as shown in Figure 2 and Figure 3 ) are formed on the surface of the gate structures 110, which leads to a high risk of short circuit of the formed semiconductor device and poor reliability of the semiconductor device.

[0028] In order to solve the problem of a large number of defects 130 on the surface of the gate structures 110, another method for forming a semiconductor structure is provided. In the forming method, before the source-drain structures 120 are formed by using the selective epitaxy process, the surface of the gate structures 110 is pre-cleaned to remove the defect seeds 111, so as to reduce the defects 130.

[0029] However, since the material of the defect seeds 111 is difficult to determine, the controllability of the chemical reaction between the reaction gas used in the pre-cleaning and the defect seeds 111 is poor, which leads to poor removal effect of the pre-cleaning on the defect seeds 111, and a large number of defects 130 are still formed on the surface of the gate structures 110. Thus, the reliability of the semiconductor device is still poor.

[0030] In order to solve the technical problem, an embodiment of the present application provides a method for forming a semiconductor structure, which can effectively improve the reliability of the formed semiconductor structure by forming a sacrificial film on the surface of the defect seeds and removing the sacrificial film by using a pre-cleaning process to peel off the defect seeds.

[0031] The chemical reaction between the reaction gas and the sacrificial film is strong and controllable during the pre-cleaning by the pre-cleaning process, so that the sacrificial film and the defect seeds wrapped by the sacrificial film are removed well. Therefore, the risk of forming more and larger defect structures on the surface of the gate structure is small during the formation of the source-drain structure, so that the risk of short circuit of the semiconductor device is low, thereby improving the reliability of the semiconductor structure.

[0032] In order to make the above-mentioned purpose, characteristics and beneficial effects of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings.

[0033] Figures 4-9 is a schematic diagram of the cross-sectional structure of each step of the method for forming a semiconductor structure according to an embodiment of the present application.

[0034] Please refer to Figure 4 and Figure 5 , Figure 4 is Figure 5 is a schematic diagram of the cross-sectional structure of each step of the method for forming a semiconductor structure according to an embodiment of the present application. Figure 5 is Figure 4 is a schematic diagram of the cross-sectional structure of each step of the method for forming a semiconductor structure according to an embodiment of the present application.

[0035] The substrate 200 includes a base 201 and a plurality of fin portions 202 located on the base 201 and separated from each other. The surface of the base 201 has an isolation layer 203, and the isolation layer 203 is also located between adjacent fin portions 202, and the surface of the isolation layer 203 is lower than the top surface of the fin portion 202.

[0036] The isolation layer 203 serves to electrically insulate adjacent fin portions 202 and the semiconductor device from the base 201.

[0037] In other embodiments, the substrate is a planar substrate.

[0038] The material of the substrate 200 includes a semiconductor material.

[0039] Specifically, the material of the substrate 200 includes silicon.

[0040] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0041] Please refer to Figure 6 , Figure 6 and Figure 5The view direction of the gate structure 210 is consistent with the view direction of the fin 202, and a plurality of gate structures 210 are formed on the isolation layer 203 (as shown in the figure) and are separated from each other. The gate structure 210 spans the top surface and part of the sidewall surface of the fin 202. Figure 4

[0042] In this embodiment, the gate structure 210 includes a gate oxide layer 211, a gate electrode 212 on the surface of the gate oxide layer 211, and a sidewall 213 on the sidewall of the gate oxide layer 211 and the gate electrode 212.

[0043] The material of the gate oxide layer 211 includes silicon oxide, the material of the gate electrode 212 includes polycrystalline silicon or amorphous silicon, and the material of the sidewall 213 includes a low-k dielectric material (k is less than 3.9) or a combination of a plurality of low-k dielectric materials, such as SiOC, SiOCN, and SiOCH.

[0044] The sidewall 213 is used to define the position of the source / drain opening in the subsequent process.

[0045] In this embodiment, the method for forming the gate structure 210 includes: forming a gate oxide material film (not shown) on the isolation layer 203; forming a gate electrode material layer (not shown) on the surface of the gate oxide material film; forming a plurality of gate mask structures 214 separated from each other on the surface of the gate electrode material layer; etching the gate electrode material layer and the gate oxide material film with the gate mask structure 214 as a mask until the surface of the isolation layer 203 is exposed, to form the gate electrode 212 and the gate oxide layer 211; and forming the sidewall 213 on the sidewall of the gate oxide layer 211 and the gate electrode 212.

[0046] The formation process of the gate electrode material layer includes epitaxial growth process or deposition process, such as chemical vapor deposition process, physical vapor deposition process, or atomic layer deposition process.

[0047] The gate mask structure 214 is used to pattern the gate oxide material film and the gate electrode material layer to form the gate oxide layer and the gate electrode 211. Moreover, the gate mask structure 214 and the sidewall 213 are used to protect the surface of the gate electrode 212 and the gate oxide layer 211 to reduce the damage to the gate electrode 212 and the gate oxide layer 211 in the subsequent etching process for forming the source / drain structure. Furthermore, in the subsequent selective epitaxial growth process for forming the source / drain structure, the selectivity of the epitaxial growth process is achieved through the gate mask structure 214 and the sidewall 213 which have different materials from the substrate 200.

[0048] In this embodiment, the material of the gate mask structure 214 includes silicon nitride.

[0049] In other embodiments, the material of the gate mask structure includes silicon nitride and silicon oxide, and the silicon oxide is between the gate electrode and the silicon nitride. ​

[0050] Please continue to refer to Figure 6 A source-drain opening 230 is formed in the fin 202 on both sides of the gate structure 210.

[0051] The source-drain opening 230 provides space for subsequent formation of source-drain structures.

[0052] The sidewall 213 has a defect seed 220 attached to the surface of the gate structure 210. The defect seed 220 is, for example, a residue, a contaminant, etc. on the surface of the gate structure 210 during the process of forming the gate structure 210, the source-drain opening 230, etc., or during the transfer between cavities, machines, etc.

[0053] The defect seed 220 is, for example, a metal material, silicon, an organic small molecule, an anion, a metal ion, a local area of silicon atoms of a silicon-based material, etc.

[0054] In this embodiment, the method of forming the source-drain opening 230 includes: forming a source-drain mask layer (not shown) on the surface of the substrate 200 and the surface of the gate structure 210, the source-drain mask layer exposing the surface of the fin 202 between adjacent gate structures 210; and etching the fin 202 with the source-drain mask layer and the sidewall 213 as masks to form the source-drain opening 230 in the fin 202 on both sides of the gate structure 210.

[0055] In this embodiment, the etching process of forming the source-drain opening 230 includes at least one of a dry etching process and a wet etching process.

[0056] In other embodiments, the substrate is a planar substrate. On this basis, the source-drain opening is formed in the substrate on both sides of the gate structure.

[0057] In this embodiment, the source-drain mask layer is removed after the source-drain opening 230 is formed.

[0058] Please refer to Figure 7 , Figure 7 With the view direction of the defect seed 220 (as shown in FIG. 2B) being consistent with that of FIG. 2A, a selective epitaxial growth process is used to form a sacrificial film 240 on the surface of the defect seed 220 (as shown in FIG. 2B), the sacrificial film 240 also being located between the surface of the defect seed 220 and the surface of the sidewall 213 (as shown in region A). Figure 6 Figure 6 The sacrificial film 240 located on the surface of the defect seed 220 (including the sacrificial film 240 located between the surface of the defect seed 220 and the surface of the sidewall 213) functions in combination with a subsequent pre-cleaning process to peel off the defect seed 220.

[0059] The sacrificial film 240 located on the surface of the defect seed 220 (including the sacrificial film 240 located between the surface of the defect seed 220 and the surface of the sidewall 213) functions in combination with a subsequent pre-cleaning process to peel off the defect seed 220.

[0060] ​In the embodiment, since the sacrifice film 240 is formed after the source-drain opening 230 is formed, not only the defect seeds 220 remaining on the surface of the sidewall 213 in the previous process before the source-drain opening 230 is formed can be peeled off, but also the defect seeds 220 remaining on the surface of the sidewall 213 in the etching process of forming the source-drain opening 230 can be peeled off. Thus, in combination with the subsequent pre-cleaning process, the defect seeds 220 on the surface of the sidewall 213 can be further reduced, and the reliability of the semiconductor structure can be better improved.

[0061] In the embodiment, in the process of forming the sacrifice film 240 by using the selective epitaxy growth process, the growth rate of the material of the sacrifice film 240 on the surface of the sidewall 213 is less than the growth rate of the material of the sacrifice film 240 on the surface of the defect seed 220.

[0062] In the embodiment, the material of the sacrifice film 240 includes silicon germanium, and the concentration of germanium in the silicon germanium is in a preset range.

[0063] The purpose of making the concentration of germanium in the preset range is to enable the material of the sacrifice film 240 to better react in the subsequent pre-cleaning process.

[0064] Preferably, the concentration range of germanium in the material of the sacrifice film 240 is 10% to 20%.

[0065] In the embodiment, the parameters of the selective epitaxy growth process of forming the sacrifice film 240 include that the pressure range is 10 Torr to 30 Torr.

[0066] By using the above parameters to perform the selective epitaxy process, the material of the sacrifice film 240 can be grown more slowly, the controllability of the selective epitaxy process can be improved, the surface of the defect seed 220 can form a continuous and more uniform thickness sacrifice film 240, thus the formed sacrifice film 240 can better wrap the defect seed 220, thereby further facilitating the removal of the sacrifice film 240 and the peeling of the defect seed 220 in the subsequent pre-cleaning process. At the same time, by using the above parameters to perform the selective epitaxy process, the concentration range of germanium in the material of the sacrifice film 240 can be controlled to be 10% to 20%, so that the material of the sacrifice film 240 can be better reacted in the subsequent pre-cleaning process.

[0067] In the embodiment, the parameters of the selective epitaxy growth process of forming the sacrifice film 240 further include that the gas includes GeH4, and the flow range of GeH4 is 15 standard milliliter / minute to 25 standard milliliter / minute.

[0068] In the embodiment, since the sacrificial film 240 is formed after the source-drain opening 230 is formed, the sacrificial film 240 is also located on at least part of the inner wall surface of the source-drain opening 230. The sacrificial film 240 located on the inner wall surface of the source-drain opening 230 will be removed together with the sacrificial film 240 on the surface of the defect seed 220 in the subsequent pre-cleaning process.

[0069] It should be understood that, since the purpose of forming the sacrificial film 240 is to strip the defect seed 220 in combination with the subsequent pre-cleaning process, and the sacrificial film 240 located on the inner wall surface of the source-drain opening 230 will be removed together with the sacrificial film 240 on the surface of the defect seed 220 in the subsequent pre-cleaning process, the parameters such as the morphology and thickness of the sacrificial film 240 on the inner wall surface of the source-drain opening 230 have no effect on the technical solution of the present application, and the sacrificial film 240 on the inner wall surface of the source-drain opening 230 is not necessarily continuous.

[0070] Please refer to Figure 8 , Figure 8 and Figure 7 , the pre-cleaning process is used to remove the sacrificial film 240 to strip the defect seed 220 (as shown in Figure 6 ).

[0071] Since the selective epitaxial growth process is used to form the sacrificial film 240 on the surface of the defect seed 220, and the sacrificial film 240 is also located between the surface of the defect seed 220 and the surface of the side wall 213, the sacrificial film 240 can be selectively formed on the surface of the defect seed 220. According to the known material, the corresponding reaction gas is selected, so that the chemical reaction between the reaction gas and the sacrificial film 240 is strong and controllable during the pre-cleaning process using the pre-cleaning process, thereby improving the effect of removing the sacrificial film 240 and stripping the defect seed 220 covered by the sacrificial film 240. Thus, in the subsequent process of forming the source-drain structure, the risk of forming a large number of defect structures on the surface of the side wall 213 is small, and thus the risk of short circuit of the semiconductor device is low, thereby improving the reliability of the semiconductor structure.

[0072] It should be understood that, in the embodiment, by using the pre-cleaning process, not only the sacrificial film 240 on the surface of the side wall 213 is removed, but also the sacrificial film 240 on the inner wall surface of the source-drain opening 230 is removed.

[0073] Since the sacrificial film 240 on the inner wall surface of the source-drain opening 230 is removed, the performance of the source-drain structure formed subsequently is not affected by the sacrificial film 240 formed on the inner wall surface of the source-drain opening 230.

[0074] In this embodiment, the pre-cleaning process is a dry cleaning process, and the reaction gas used in the dry cleaning process includes hydrogen chloride gas (HCl).

[0075] The chemical reaction between hydrogen chloride gas and silicon is strong and well-controllable. On the one hand, since the material of the sacrificial film 240 includes silicon and germanium, and the concentration of germanium in the material of the sacrificial film 240 is within a preset range, and on the other hand, since a dry cleaning process in which hydrogen chloride gas is used as the reaction gas is employed, a strong and well-controllable chemical reaction can be achieved between the reaction gas and the sacrificial film 240. Therefore, the removal of the sacrificial film 240 and the peeling off of the defect seeds 220 covered by the sacrificial film 240 are effective.

[0076] In this embodiment, the parameters of the pre-cleaning process also include: the flow rate of the hydrogen chloride gas is in the range of 100 standard milliliters / minute to 200 standard milliliters / minute.

[0077] By setting the flow rate of hydrogen chloride gas in the pre-cleaning process to 100 standard milliliters / minute to 200 standard milliliters / minute, on the one hand, the controllability of the pre-cleaning process is further improved, so that the hydrogen chloride gas reacts better with the sacrificial film 240 to remove the defect seeds 220. On the other hand, damage to the exposed substrate 200 can be reduced while etching the sacrificial film 240 and removing the defect seeds 220.

[0078] In this embodiment, the parameters of the pre-cleaning process also include: a pressure range of 5 Torr to 20 Torr; and a temperature range of 600 degrees Celsius to 700 degrees Celsius.

[0079] The pressure range is close to the growth pressure of the sacrificial film 240, thereby reducing repeated pressure changes in the reaction chamber. The temperature range is used to match the flow rate range of the hydrogen chloride gas to achieve a suitable etching rate for the sacrificial film 240.

[0080] Next, please refer to Figures 9-10 , Figure 9 and Figure 8 The view orientation is consistent. Figure 10 This is a distribution diagram of the defect structure on the semiconductor structure in one embodiment of the present invention. After the pre-cleaning process, source and drain structures 250 are formed in the substrate on both sides of the gate structure 210.

[0081] In this embodiment, the top surface of the source / drain structure 250 is flush with the top surface of the fin 202.

[0082] In other embodiments, the top surface of the source / drain structure is higher than the top surface of the fin.

[0083] It should be noted that, Figure 10In order to facilitate understanding and observation, the distribution of the defect structure 251 formed on the semiconductor structure (wafer) due to the growth of the material of the source-drain structure 250 on the surface of the defect seed 220 is schematically shown. Specifically, by means of the sacrificial film 240 (as shown in Figure 7 ) and the pre-cleaning process (as shown in Figure 8 ), the defect structure 251 on the surface of the gate structure 210 can be effectively reduced.

[0084] Specifically, the source-drain structure 250 is formed in the source-drain opening 230 (as shown in Figure 8 ), and the source-drain structure 250 is located in the fin 202 on both sides of the gate structure 210.

[0085] In the embodiment, the process of forming the source-drain structure 250 includes a selective epitaxial growth process.

[0086] In the embodiment, the material of the source-drain structure 250 includes silicon phosphide.

[0087] In the embodiment, the source-drain structure 250 includes a buffer layer (not shown) on the inner wall surface of the source-drain opening 230, a body layer (not shown) on the surface of the buffer layer, and a cap layer (not shown) on the surface of the body layer.

[0088] In the embodiment, the method of forming the semiconductor structure further includes: after forming the source-drain structure 250, forming a dielectric layer (not shown) on the surface of the substrate 200, the source-drain structure 250, and the gate structure 210, the dielectric layer exposing the top surface of the gate structure 210; after forming the dielectric layer, removing at least the gate mask structure 214 and the gate electrode 212, and forming a gate opening (not shown) in the dielectric layer; after forming the gate opening, forming a metal gate (not shown) in the gate opening.

[0089] In other embodiments, the source-drain opening is formed after the pre-cleaning process, thus further avoiding the influence of the process of forming the sacrificial film and removing the sacrificial film on the morphology of the source-drain opening, so as to balance the effect of removing the defect seed and improving the morphology of the source-drain structure.

[0090] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art can make various modifications and changes without departing from the spirit and scope of the present application, and the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided, the substrate including a base and a plurality of fins disposed on the base and disposed therebetween, the base having an isolation layer on its surface, the isolation layer being disposed between adjacent fins, and the surface of the isolation layer being lower than the top surface of the fins; A plurality of gate structures are formed on the isolation layer, the gate structures spanning the fin, and the gate structures include a gate oxide layer, a gate located on the surface of the gate oxide layer, and sidewalls located on the sidewalls of the gate oxide layer and the gate. Source and drain openings are formed in the fins on both sides of the gate structure; After the source / drain opening is formed, a selective epitaxial growth process is used to form a sacrificial film on the surface of the defect seed attached to the sidewall surface, wherein the defect seed is a residue from the preceding process before the source / drain opening is formed or from the etching process during the formation of the source / drain opening; the defect seed is covered by the sacrificial film. The sacrificial membrane is removed using a pre-cleaning process to peel off the defective seeds; After the pre-cleaning process, a source-drain structure is formed within the source-drain opening, the top surface of which is higher than or flush with the top surface of the fin.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, During the formation of the sacrificial film using a selective epitaxial growth process, the growth rate of the sacrificial film material on the sidewall surface is less than the growth rate of the sacrificial film material on the defect seed surface.

3. The method for forming a semiconductor structure as described in claim 1, characterized in that, The sacrificial film material includes silicon germanium with germanium concentration within a preset range, the pre-cleaning process is a dry cleaning process, and the reaction gas used in the dry cleaning process includes hydrogen chloride gas.

4. The method for forming a semiconductor structure as described in claim 3, characterized in that, The concentration of germanium in the material of the sacrificial membrane ranges from 10% to 20%.

5. The method for forming a semiconductor structure as described in claim 3, characterized in that, The parameters of the selective epitaxial growth process for forming the sacrificial film include a pressure range of 10 Torr to 30 Torr.

6. The method for forming a semiconductor structure as described in claim 5, characterized in that, The parameters of the selective epitaxial growth process for forming the sacrificial film also include: the gas includes GeH4, and the flow rate of GeH4 is in the range of 15 standard milliliters / minute to 25 standard milliliters / minute.

7. The method for forming a semiconductor structure as described in claim 3, characterized in that, The parameters of the pre-cleaning process also include: the flow rate of the hydrogen chloride gas is in the range of 100 standard milliliters / minute to 200 standard milliliters / minute.

8. The method for forming a semiconductor structure as described in claim 7, characterized in that, The parameters of the pre-cleaning process also include: a pressure range of 5 Torr to 20 Torr; and a temperature range of 600 degrees Celsius to 700 degrees Celsius.

9. The method for forming a semiconductor structure as described in claim 1, characterized in that, The sacrificial membrane is also located on at least a portion of the inner wall surface of the source-drain opening, and the sacrificial membrane on the inner wall surface of the source-drain opening is removed during the pre-cleaning process to remove the sacrificial membrane.

10. The method for forming a semiconductor structure as described in claim 1, characterized in that, The source / drain structure is made of silicon phosphide.

Images