Information processing method and apparatus, storage medium, and electronic device

Abstract

The application discloses an information processing method and device, a storage medium and an electronic device, and applies to the field of maps. The method comprises the following steps: acquiring a group of pre-input matrices and post-input matrices, wherein the group of pre-input matrices comprises a plurality of pre-input matrices; when it is detected that the matrix multiplication operation needs to be performed on each pre-input matrix in the group of pre-input matrices and the post-input matrix respectively to obtain a first group of output matrices, and the row merging operation needs to be performed on the first group of output matrices to obtain a first target output matrix, performing the row merging operation on the group of pre-input matrices to obtain a target pre-input matrix; and performing the matrix multiplication operation on the target pre-input matrix and the post-input matrix in a target processing device to obtain the first target output matrix. The application solves the technical problem of low utilization rate of operation resources caused by insufficient operation amount of each resource call in the related art information processing method.

Description

Technical Field

[0001] This application relates to the field of computers, and more specifically, to an information processing method and apparatus, a storage medium and an electronic device. Background Technology

[0002] Currently, in image recognition, images can be input into a recognition model, which can be a neural network model. The recognition model extracts features from the image to obtain a predicted recognition result. If tensor data stream analysis is involved within the recognition model, only element-wise operations are supported. For fusion calculations involving matrix multiplication and merging, element-wise operations can first be performed on multiple small tensor inputs to obtain multiple small tensor outputs, and then a merging operation can be performed on these small tensor outputs to obtain a large tensor output.

[0003] The information processing flow described above involves element-wise operations on multiple small tensors. If matrix multiplication is involved, multiple matrix multiplication operations will be performed, requiring multiple calls to computing resources, such as GPUs (Graphics Processing Units), through multiple instructions. Each time computing resources are called, the computational load of each small tensor matrix multiplication operation is relatively small, and each resource call cannot fully utilize the called computing resources, resulting in low utilization of computing resources.

[0004] It is evident that the information processing methods in related technologies suffer from low utilization of computing resources due to the insufficient amount of computation performed in each resource call. Summary of the Invention

[0005] This application provides an information processing method and apparatus, a storage medium and an electronic device, to at least solve the technical problem of low utilization of computing resources in related technologies due to insufficient computational load per resource call.

[0006] According to one aspect of the embodiments of this application, an information processing method is provided, comprising: acquiring a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices; when it is detected that it is necessary to perform matrix multiplication operations on each pre-input matrix in the set of pre-input matrices and the post-input matrix respectively to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix, performing the row merging operation on the set of pre-input matrices to obtain a target pre-input matrix; and performing the matrix multiplication operation on the target pre-input matrix and the post-input matrix in a target processing device to obtain the first target output matrix.

[0007] According to another aspect of the embodiments of this application, an information processing apparatus is also provided, comprising: a first acquisition unit, configured to acquire a set of pre-input matrices and a set of post-input matrices, wherein the set of pre-input matrices includes a plurality of pre-input matrices; a first execution unit, configured to, upon detecting that it is necessary to perform matrix multiplication operations on each pre-input matrix in the set of pre-input matrices and the post-input matrix respectively to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix, perform the row merging operation on the set of pre-input matrices to obtain a target pre-input matrix; and a second execution unit, configured to perform the matrix multiplication operation on the target pre-input matrix and the post-input matrix in a target processing device to obtain the first target output matrix.

[0008] As an optional implementation, the first execution unit includes a first execution module, and the second execution unit includes a second execution module. The first execution module is configured to perform the row merging operation on the matrix of dimension a1×B and the matrix of dimension a2×B when the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, and the post-input matrix is ​​a matrix of dimension B×C, to obtain the target pre-input matrix. The set of pre-input matrices includes the first pre-input matrix and the second pre-input matrix, and the target pre-input matrix is ​​a matrix of dimension A×B, where A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers. The second execution module is configured to perform the matrix multiplication operation on the matrix of dimension A×B and the matrix of dimension B×C in the target processing device to obtain the first target output matrix, where the first target output matrix is ​​a matrix of dimension A×C.

[0009] As an optional implementation, the apparatus further includes: a third execution unit, configured to perform a row splitting operation on the first target output matrix to obtain the first set of split matrices when it is detected that a first preset operation needs to be performed on at least one output matrix in the first set of output matrices; and a fourth execution unit, configured to perform the first preset operation on at least one split matrix in the first set of split matrices.

[0010] As an optional implementation, the third execution unit includes: a third execution module, configured to perform the row splitting operation on the matrix of dimension A×C when the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, the post-input matrix is ​​a matrix of dimension B×C, and the first target output matrix is ​​a matrix of dimension A×C, to obtain a first split matrix and a second split matrix, wherein the set of pre-input matrices includes the first pre-input matrix and the second pre-input matrix, the first set of split matrices includes the first split matrix and the second split matrix, the first split matrix is ​​a matrix of dimension a1×C, the second split matrix is ​​a matrix of dimension a2×C, A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers.

[0011] As an optional implementation, the apparatus further includes: a second acquisition unit, configured to acquire a pre-input matrix and a set of post-input matrices, wherein the set of post-input matrices includes multiple post-input matrices; a fifth execution unit, configured to perform the column merging operation on the set of post-input matrices to obtain a target post-input matrix when it is detected that the matrix multiplication operation needs to be performed on the pre-input matrix and each post-input matrix in the set of post-input matrices to obtain a second set of output matrices, and a column merging operation needs to be performed on the second set of output matrices to obtain a second target output matrix; and a sixth execution unit, configured to perform the matrix multiplication operation on the pre-input matrix and the target post-input matrix in a target processing device to obtain the second target output matrix.

[0012] As an optional implementation, the fifth execution unit includes a fourth execution module, and the sixth execution unit includes a fifth execution module. The fourth execution module is configured to perform the column merging operation on the matrix of dimension B×c1 and the matrix of dimension B×c2 when the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, and the pre-input matrix is ​​a matrix of dimension A×B, to obtain the target post-input matrix. The set of post-input matrices includes the first post-input matrix and the second post-input matrix. The target post-input matrix is ​​a matrix of dimension B×C, where C is a natural number greater than 1, C = c1 + c2, and A, B, c1, and c2 are natural numbers. The fifth execution module is configured to perform the matrix multiplication operation on the matrix of dimension A×B and the matrix of dimension B×C in the target processing device to obtain the second target output matrix, where the second target output matrix is ​​a matrix of dimension A×C.

[0013] As an optional implementation, the apparatus further includes: a seventh execution unit, configured to perform a column splitting operation on the second target output matrix to obtain the second set of split matrices when it is detected that a second preset operation needs to be performed on at least one of the output matrices in the second set of output matrices; and an eighth execution unit, configured to perform the second preset operation on at least one of the split matrices in the second set of split matrices.

[0014] As an optional implementation, the seventh execution unit includes: a sixth execution module, configured to perform the column splitting operation on the matrix of dimension A×C when the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, the pre-input matrix is ​​a matrix of dimension A×B, and the second target output matrix is ​​a matrix of dimension A×C, to obtain a third split matrix and a fourth split matrix, wherein the set of post-input matrices includes the first post-input matrix and the second post-input matrix, the second set of split matrices includes the third split matrix and the fourth split matrix, the third split matrix is ​​a matrix of dimension A×c1, the fourth split matrix is ​​a matrix of dimension A×c2, C is a natural number greater than 1, C = c1 + c2, and A, B, c1, and c2 are natural numbers.

[0015] As an optional implementation, the second execution unit includes: a seventh execution module, configured to perform the matrix multiplication operation on the target pre-input matrix and the post-input matrix in the image processor GPU to obtain the first target output matrix, wherein the target processing device includes the GPU.

[0016] As an optional implementation, the first acquisition unit includes: an acquisition module, configured to acquire the set of pre-input matrices from a set of multi-dimensional matrices to be processed in the target prediction model, and acquire the post-input matrix from the target multi-dimensional matrix to be processed in the target prediction model, wherein the target prediction model is used to determine the predicted target object based on the set of multi-dimensional matrices and the target multi-dimensional matrix.

[0017] As an optional implementation, the acquisition module includes an acquisition submodule, the first execution unit includes an eighth execution module, and the second execution unit includes a ninth execution module. The acquisition submodule is configured to acquire, from the set of multidimensional matrices including matrices of dimension D×a1×B and matrices of dimension D×a2×B, and the target multidimensional matrix being a matrix of dimension D×B×C, D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B, and D post-input matrices of dimension B×C from the set of multidimensional matrices, where D is a natural number greater than 1, A is a natural number greater than 1, and A = ... a1+a2, where a1, a2, B, and C are natural numbers; the eighth execution module is used to perform the row merging operation on the D first pre-input matrices of dimension a1×B and the D second pre-input matrices of dimension a2×B respectively to obtain D target pre-input matrices, wherein the target pre-input matrices are matrices of dimension A×B, and each target pre-input matrix is ​​a matrix obtained by performing the row merging operation on a first pre-input matrix and a second pre-input matrix; the ninth execution module is used to perform the matrix multiplication operation on the D target pre-input matrices and the D post-input matrices in the target processing device respectively to obtain D first target output matrices of dimension A×C, wherein each first target output matrix is ​​a matrix obtained by performing the matrix multiplication operation on a target pre-input matrix and a post-input matrix.

[0018] As an optional implementation, the apparatus further includes: a first adjustment unit, configured to adjust the model structure in the first prediction model to obtain a second prediction model when it is detected that the model structure in the first prediction model is used to perform matrix multiplication operations on each of the set of pre-input matrices and the post-input matrix to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix; wherein the model structure in the second prediction model is used to perform the row merging operation on the set of pre-input matrices to obtain a target pre-input matrix, and to perform the matrix multiplication operation on the target pre-input matrix and the post-input matrix to obtain the first target output matrix; wherein the target processing device is configured to perform the matrix multiplication operation on the target pre-input matrix and the post-input matrix in the second prediction model to obtain the first target output matrix.

[0019] As an optional implementation, the apparatus further includes: a second adjustment unit, configured to adjust the model structure in the third prediction model to obtain a fourth prediction model when it is detected that the model structure in the third prediction model is used to perform the matrix multiplication operation on each of the preceding input matrix and each of the set of following input matrices to obtain a second set of output matrices, and to perform a column merging operation on the second set of output matrices to obtain a second target output matrix. The fourth prediction model's model structure is used to perform the column merging operation on the set of following input matrices to obtain a target following input matrix, and to perform the matrix multiplication operation on the preceding input matrix and the target following input matrix to obtain the second target output matrix. The target processing device is configured to perform the matrix multiplication operation on the preceding input matrix and the target following input matrix in the fourth prediction model to obtain the second target output matrix.

[0020] According to another aspect of the embodiments of this application, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer program, and the computer program is configured to execute the above-described information processing method when it is run.

[0021] According to another aspect of the embodiments of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to execute the above-described information processing method through the computer program.

[0022] According to another aspect of the embodiments of this application, a computer program product or computer program is provided, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the information processing method as described above.

[0023] In this embodiment, a method is adopted where the input matrix merging operation is performed first, followed by matrix multiplication. If it is detected that matrix multiplication needs to be performed on each input matrix in a set of preceding input matrices (i.e., a series of tensors) and the subsequent input matrix (i.e., the same tensor), and a row merging operation is performed on the resulting set of output matrices, the row merging operation is first performed on the set of preceding input matrices to obtain the merged preceding input matrix (i.e., the target preceding input matrix). Then, matrix multiplication is performed on the merged preceding input matrix and the subsequent input matrix in the target processing device (e.g., GPU). The matrix multiplication operation only requires performing matrix multiplication on the merged pre-input matrix and post-input matrix, and only requires one call to computing resources to complete the matrix multiplication operation. Moreover, the matrix multiplication operation of a large tensor (i.e., the merged pre-input matrix) has a larger computational load than the matrix multiplication operation of a small tensor (the pre-input matrix before merging), which can make full use of computing resources and achieve the technical effect of improving the utilization rate of computing resources. This solves the technical problem of low utilization rate of computing resources in information processing methods in related technologies due to the insufficient amount of computation performed in each resource call. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0025] Figure 1 This is a schematic diagram of an application environment for an optional information processing method according to an embodiment of this application;

[0026] Figure 2 This is a schematic diagram of the flow of an optional information processing method according to an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of an optional information processing method according to an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0029] Figure 5 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0030] Figure 6 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0031] Figure 7 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0032] Figure 8 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0033] Figure 9 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0034] Figure 10 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0035] Figure 11 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0036] Figure 12 This is a schematic diagram of another optional information processing method according to an embodiment of this application;

[0037] Figure 13 This is a schematic diagram of an optional information processing apparatus according to an embodiment of this application;

[0038] Figure 14 This is a schematic diagram of the structure of an optional electronic device according to an embodiment of this application. Detailed Implementation

[0039] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0041] According to one aspect of the embodiments of this application, an information processing method is provided. Optionally, as an optional implementation, the above-described information processing method may be applied to, but is not limited to, [examples of other methods]. Figure 1 The environment shown may include, but is not limited to, user equipment 102, which may include, but is not limited to, memory 104, processor 106 and display 108, network 110, and server 112.

[0042] For example, the process of the above information processing method may include the following steps:

[0043] In step S102, the user equipment 102 acquires the image to be identified, which can be an image containing a predetermined type of target to be identified.

[0044] Steps S104-S106: User equipment 102 sends the image to be identified to server 112 via network 110;

[0045] In step S108, server 112 inputs the image to be recognized into the neural network model for target recognition through database 114 and processing engine 116 to obtain the target recognition result.

[0046] The image to be identified can be an image obtained from a map, and the target to be identified is a specific target in the map (e.g., landmarks, random targets, vehicle targets, etc.). During the processing of the input image by the neural network model, if it is detected that matrix multiplication operations need to be performed on a set of pre-input matrices and the same post-input matrix, followed by row-by-row merging operations on a set of output matrices, the row-by-row merging operation is performed on the pre-input matrices first. Then, in the target processing device, matrix multiplication operations are performed on the merged input matrix and the post-input matrix to obtain the output matrix.

[0047] It should be noted that matrix multiplication is involved in the processing of images to be recognized. For example, matrix multiplication is involved when performing convolution between feature maps using convolution kernels or when fusing feature maps. For instance, convolutional layers in a neural network model can perform matrix multiplication on feature maps extracted from the image to be recognized to obtain the result of the multiplication operation.

[0048] Here, the pre-input matrix and the post-input matrix are the two input items for the matrix multiplication operation. The pre-input matrix is ​​the first input item in the matrix multiplication operation, and the post-input matrix is ​​the second input item. The number of rows in the pre-input matrix is ​​the same as the number of columns in the post-input matrix. For example, the matrix multiplication operation is A × B, where A is the pre-input matrix and B is the post-input matrix.

[0049] In steps S110-S114, server 112 sends the target recognition result to user equipment 102 via network 110, and processor 106 in user equipment 102 identifies the target in the image to be recognized based on the target recognition result.

[0050] Apart from Figure 1 Beyond the illustrated example, the above steps can be performed independently by user equipment 102, i.e., user equipment 102 can perform matrix row merging operations, matrix multiplication operations, and other steps, thereby reducing the processing load on the server. User equipment 102 includes, but is not limited to, handheld devices (such as mobile phones), laptops, desktop computers, intelligent voice interaction devices, smart home appliances, and in-vehicle devices. This application does not limit the implementation method of user equipment 102.

[0051] Alternatively, as an alternative implementation method, Figure 2 This is a flowchart illustrating an optional information processing method according to an embodiment of this application, such as... Figure 2 As shown, the flow of this information processing method may include the following steps:

[0052] Step S202: Obtain a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices.

[0053] The information processing method in this embodiment can be applied to the field of vehicle networking, such as the map domain in vehicle networking. It can also be applied to tensor flow (TensorFlow) analysis scenarios, such as image recognition using neural network models. The applied engine can be a tensor graph optimization engine, which can be a graph optimization engine in deep learning (e.g., the Grappler computation graph optimization engine in TensorFlow). It can be integrated into AI (Artificial Intelligence) platforms or AI frameworks. The core of a tensor is a data container, which can be a multidimensional array. Scalars, vectors, matrices, etc., are tensors of different orders. This embodiment uses a matrix as an example for illustration.

[0054] The server can obtain a set of pre-input matrices (i.e., a series of tensors) and post-input matrices (i.e., the same tensor), and perform checks on the processing logic of the input matrices. The checks may include: detecting whether a merging operation of the output matrix is ​​involved; for example, finding a concatenation operation, checking if its inputs all produce matrix multiplications, checking if the merging occurs along the "row" dimension, and checking if the second input (post-input) of all the above matrix multiplications is the same tensor input. If so, all the matrices (i.e., a set of pre-input matrices) can be merged in the original order of the merging operation, and then the merged result (i.e., the first target output matrix) can be used as a pre-input item and the original post-input item (i.e., the post-input matrix) to perform matrix multiplication.

[0055] Here, the merge operation is a common tensor operation that combines multiple tensors into one tensor; the matrix multiplication operation (Matmul) is a common tensor operation that multiplies each element in the i-th row of the first tensor (preceding term) with each element in the k-th column of the second tensor (postterming term) and accumulates the result, which is denoted as the result in the i-th row and j-th column of the output tensor.

[0056] For example, it can be detected whether matrix multiplication needs to be performed on each of the preceding and following input matrices in a set of preceding input matrices to obtain the first set of output matrices (at this time, no actual matrix multiplication operation is performed), and whether row merging needs to be performed on the first set of output matrices to obtain the first target output matrix (at this time, no actual row merging operation is performed).

[0057] In step S204, if it is detected that matrix multiplication operations need to be performed on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain the first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain the first target output matrix, then row merging operations are performed on a set of preceding input matrices to obtain the target preceding input matrix.

[0058] If it is detected that matrix multiplication operations need to be performed on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain the first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain the first target output matrix, the server can first perform row merging operations on a set of preceding input matrices based on the row merging rules of a set of output matrices to obtain the target preceding input matrix.

[0059] The row merging rule described above can be used to represent the row merging order of a set of output matrices. The number of rows in the resulting target pre-input matrix is ​​the sum of the number of rows in the pre-input matrices contained in the set of pre-input matrices. Combining the rules of matrix operations, the result obtained by performing row merging first and then matrix multiplication is consistent with the result obtained by performing matrix multiplication first and then row merging.

[0060] Step S206: Perform matrix multiplication on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix.

[0061] After obtaining the target pre-input matrix, the server can control the execution of matrix multiplication between the target pre-input matrix and the post-input matrix to obtain the first target output matrix. This matrix multiplication operation can be performed within the target processing device. The target processing device can be a processing unit (e.g., a GPU) for performing the matrix multiplication operation, and it can be located inside or outside the server; this embodiment does not limit this.

[0062] For example, such as Figure 3 As shown, in tensor data stream analysis, element-wise operations can be performed on multiple small tensor inputs separately, followed by a merging operation on the small tensor outputs: element-wise operations 1 to N can be performed on small tensor inputs 1 to N respectively, resulting in small tensor outputs 1 to N; a merging operation is then performed on small tensor outputs 1 to N to obtain the large tensor output. Here, element-wise operations 1 to N are of the same type, such as square root operations. This method involves multiple calls to computational resources and has low utilization of computational resources.

[0063] To overcome the above problems, such as Figure 4 As shown, when performing matrix multiplication (MatMul) on a series of tensors and the same tensor, and then performing a merging operation, these matrix multiplication operations on multiple small tensors can be aggregated into a matrix multiplication operation on a large tensor. This allows for efficient aggregation and execution of matrix multiplication: first, a merging operation is performed on the small tensor inputs 1 to N to obtain the large tensor input; then, element-wise operations are performed on the large tensor output to obtain the large tensor output. This method requires only one call to computational resources, improving the utilization rate of computational resources.

[0064] The embodiments provided in this application obtain a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices; when it is detected that matrix multiplication operations need to be performed on each pre-input matrix and post-input matrix in the set of pre-input matrices to obtain a first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain a first target output matrix, row merging operations are performed on the set of pre-input matrices to obtain a target pre-input matrix; matrix multiplication operations are performed on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix, thereby solving the technical problem of low utilization of computing resources in information processing methods in related technologies due to insufficient computational load per resource call, and improving the utilization of computing resources.

[0065] As an example, a set of pre-input matrices contains two pre-input matrices, each of size 32×64, and a post-input matrix of size 64×32. If it is detected that matrix multiplication needs to be performed on each pre-input matrix and post-input matrix in the set of pre-input matrices to obtain two 32×32 matrices, and then a row merging operation is performed on the first set of output matrices to obtain a 64×32 matrix, a row merging operation can be performed on the first set of output matrices based on the row merging rules of the set of output matrices to obtain a 64×64 matrix. Then, by calling instructions to call GPU resources, a matrix multiplication operation is performed on the 64×64 matrix and the post-input matrix in the GPU to obtain a 64×32 matrix.

[0066] As an optional implementation, performing a row merging operation on a set of pre-input matrices to obtain the target pre-input matrix includes: when the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, and the post-input matrix is ​​a matrix of dimension B×C, performing a row merging operation on the matrix of dimension a1×B and the matrix of dimension a2×B to obtain the target pre-input matrix.

[0067] If both the pre-input matrix and the post-input matrix are two-dimensional matrices, where a set of pre-input matrices includes a first pre-input matrix and a second pre-input matrix, the first pre-input matrix is ​​a matrix of dimension a1×B (i.e., a matrix with a1 rows and B columns), the second pre-input matrix is ​​a matrix of dimension a2×B (i.e., a matrix with a2 rows and B columns), and the post-input matrix is ​​a matrix of dimension B×C (i.e., a matrix with B rows and C columns), the server can perform a row merge operation on the matrices of dimension a1×B and dimension a2×B to obtain the target pre-input matrix, which has a dimension of A×B, where A = a1 + a2. Here, a1, a2, B, and C are natural numbers, while A is a natural number greater than 1.

[0068] When performing row merging, the server can merge the second pre-input matrix before or after the first pre-input matrix, or, according to the merging rules, mix the row vectors of the first pre-input matrix and the row vectors of the second pre-input matrix. In this case, row vectors belonging to the same pre-input matrix are not necessarily all adjacent.

[0069] Correspondingly, performing matrix multiplication on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix includes: performing matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device to obtain the first target output matrix, wherein the first target output matrix is ​​a matrix of dimension A×C.

[0070] The server can perform matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device. During matrix multiplication, the multiplication can be performed row by row; that is, each row of the matrix of dimension A×B is multiplied by each column of the matrix of dimension B×C. The matrix obtained after performing the matrix multiplication is the first target output matrix.

[0071] For example, such as Figure 5As shown, a set of pre-input matrices consists of pre-input 1 [a1, B] (i.e., a matrix with a1 rows and B columns) and pre-input 2 [a2, B] (i.e., a matrix with a2 rows and B columns), and a post-input [B, C]. First, matrix multiplication is performed on pre-input 1 and pre-input 2 (processed according to parameter 1, the first parameter) and post-input [B, C] (processed according to parameter 2, the second parameter), resulting in output result 1 [a1, C] and output result 2 [a2, C]. Then, a row merging operation is performed on output result 1 [a1, C] and output result 2 [a2, C] to obtain output result [A, C]. This information processing method involves two matrix multiplication operations on small matrices, incurring double the hardware overhead by requiring two call instructions. Furthermore, the utilization rate of computational resources is low for each of these two small matrix multiplication operations.

[0072] To optimize the processing flow, such as Figure 6 As shown, a merging operation can be performed on the pre-input 1 [a1, B] processed according to parameter 1 and the pre-input 2 [a2, B] processed according to parameter N to obtain the pre-input [A, B] (i.e., a matrix of A rows and B columns). Then, a matrix multiplication operation is performed on the pre-input [A, B] processed according to parameter 1 and the post-input [B, C] processed according to parameter 2 to obtain the output result [A, C]. After optimization, only one matrix multiplication operation of a large matrix is ​​performed, the hardware overhead is the same, and only one call instruction needs to be issued; moreover, performing only one matrix multiplication operation of a large matrix can improve the utilization rate of computing resources for each call.

[0073] By performing row merging operations on the two-dimensional input matrix first, and then performing matrix multiplication operations, the applicability of matrix fusion calculation can be improved, and the utilization rate of the called computing resources can be increased.

[0074] As an optional implementation, the above method further includes:

[0075] S1, when it is detected that a first preset operation needs to be performed on at least one of the output matrices in the first group of output matrices, a row splitting operation is performed on the first target output matrix to obtain the first group of split matrices;

[0076] S2, perform a first preset operation on at least one of the split matrices in the first group of split matrices.

[0077] Besides performing matrix multiplication, the result of the original matrix multiplication can be the input for other operations. For example, ... Figure 7As shown, in addition to performing a merge operation on output result 1 [a1, C] and output result 2 [a2, C], it is also necessary to perform other operation 1 on output result 1 [a1, C] and other operation 2 on output result 2 [a2, C].

[0078] If it is detected that a first preset operation needs to be performed on at least one of the output matrices in the first group of output matrices (the first preset operation performed on different output matrices can be the same or different), that is, the output result of the matrix multiplication operation of the preceding input matrix is ​​the input of other operations, then the result of the new matrix multiplication can be split to obtain the original matrix multiplication tensor, and a row split operation can be performed on the first target output matrix to obtain the first group of split matrices.

[0079] After obtaining the first set of split matrices, the server can perform a first preset operation on at least one of the split matrices in the first set of split matrices. If the at least one split matrix contains multiple split matrices, the corresponding first preset operation can be performed on each of the at least one split matrix.

[0080] Optionally, in this embodiment, if at least one split matrix is ​​part of the first set of split matrices, a row splitting operation can also be performed on the first target output matrix to obtain at least one split matrix; and a first preset operation can be performed on the at least one split matrix.

[0081] For example, such as Figure 8 As shown, after obtaining the output matrix [A, C], a splitting operation can be performed on it to obtain output result 1 [a1, C] and output result 2 [a2, C]. Then, other operation 1 is performed on output result 1 [a1, C] and other operation 2 is performed on output result 2 [a2, C].

[0082] By performing row splitting operations on the first target output matrix and performing other operations on the split matrix obtained from the splitting, this optional embodiment can be adapted to scenarios with other operational requirements, thereby improving the compatibility of matrix fusion calculation.

[0083] As an optional implementation, performing a first preset operation on at least one of the first set of splitting matrices includes:

[0084] When the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, the post-input matrix is ​​a matrix of dimension B×C, and the first target output matrix is ​​a matrix of dimension A×C, a row splitting operation is performed on the matrix of dimension A×C to obtain the first split matrix and the second split matrix.

[0085] If the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, and the post-input matrix is ​​a matrix of dimension B×C, then the output matrix obtained by performing matrix multiplication on the first pre-input matrix and the post-input matrix is ​​a matrix of dimension a1×C, and the output matrix obtained by performing matrix multiplication on the second pre-input matrix and the post-input matrix is ​​a matrix of dimension a2×C.

[0086] The first target output matrix is ​​a matrix of dimension A×C. The server can perform a row splitting operation on it, resulting in the first set of split matrices, which contains at least two split matrices. If there are two split matrices, the server can perform a row splitting operation on a matrix of dimension A×B to obtain two split matrices: a third split matrix and a fourth split matrix. Here, the third split matrix is ​​a matrix of dimension a1×B, and the fourth split matrix is ​​a matrix of dimension a2×B, where A = a1 + a2. The first set of split matrices includes both the third and fourth split matrices.

[0087] Optionally, when performing the row splitting operation, the a1 rows corresponding to the third splitting matrix and the a2 rows corresponding to the fourth splitting matrix in the first target output matrix can be determined first. The a1 rows corresponding to the third splitting matrix can be multiple consecutive rows or multiple non-consecutive rows, while the a2 rows corresponding to the fourth splitting matrix can be multiple consecutive rows or multiple non-consecutive rows. This embodiment does not impose any limitations on this.

[0088] By performing a row splitting operation on the output matrix in this optional embodiment, two corresponding split matrices can be obtained, which can improve the applicability of vector fusion calculation.

[0089] As an optional implementation, the above method further includes:

[0090] S1, obtain the pre-input matrix and a set of post-input matrices, wherein the set of post-input matrices includes multiple post-input matrices;

[0091] S2, when it is detected that matrix multiplication operations need to be performed on the pre-input matrix and each of the post-input matrices in a set of post-input matrices to obtain the second set of output matrices, and column merging operations need to be performed on the second set of output matrices to obtain the second target output matrix, column merging operations are performed on the set of post-input matrices to obtain the target post-input matrix;

[0092] S3, perform matrix multiplication on the pre-input matrix and the post-input matrix of the target in the target processing device to obtain the second target output matrix.

[0093] The server can obtain a set of pre-input matrices (i.e., a series of tensors) and post-input matrices (i.e., the same tensor).

[0094] The server can obtain a set of post-input matrices (i.e., a series of tensors) and a pre-input matrix (i.e., the same tensor), and perform checks on the processing logic of the input matrices. The checks may include: detecting whether a merging operation of the output matrix is ​​involved; for example, finding a merging operation, checking if its inputs all produce matrix multiplications, checking if the merging occurs along the "column" dimension, and checking if the first input (pre-input) of all the above matrix multiplications is the same tensor input. If so, all the above matrices (i.e., a set of post-input matrices) can be merged in the original order of the merging operation, and then the merged result (i.e., the second target output matrix) can be used as a post-input item and the original pre-input item (i.e., the pre-input matrix) to perform matrix multiplication operations.

[0095] For example, it can be detected whether matrix multiplication operations need to be performed on the pre-input matrix with each of the post-input matrices in a set of post-input matrices to obtain a second set of output matrices (at this time, no actual matrix multiplication operation is performed), and whether column merging operation needs to be performed on the second set of output matrices to obtain a second target output matrix (at this time, no actual row merging operation is performed).

[0096] If the above operation is detected as necessary, based on the column merging rules of the second set of output matrices, the server can first perform a column merging operation on a set of post-input matrices to obtain the target post-input matrix. The above column merging rules can be used to represent the column merging order of the second set of output matrices. The number of rows in the resulting target post-input matrix is ​​the sum of the number of rows in the post-input matrices contained in the first set of post-input matrices. Combining the matrix operation rules, the result obtained by performing the column merging operation first and then the matrix multiplication operation is consistent with the result obtained by performing the matrix multiplication operation first and then the column merging operation.

[0097] After obtaining the target post-input matrix, the server can control the execution of matrix multiplication between the pre-input matrix and the target post-input matrix to obtain the second target output matrix. This matrix multiplication operation can be performed within the target processing device. The target processing device can be a processing unit (e.g., a GPU) for performing the matrix multiplication operation, and it can be located inside or outside the server; this embodiment does not limit this.

[0098] As an example, a set of post-input matrices contains two post-input matrices, each a 64×32 matrix, and a pre-input matrix of size 32×64. If it is detected that matrix multiplication needs to be performed on the pre-input matrix and each post-input matrix in the set of post-input matrices to obtain two 32×32 matrices, and then a column merging operation is performed on the second set of output matrices to obtain a 32×64 matrix, a column merging operation can be performed on the first set of output matrices based on the column merging rules of the first set of output matrices to obtain a 64×64 matrix. Then, by calling instructions to invoke GPU resources, matrix multiplication is performed on the pre-input matrix and the 64×64 matrix in the GPU to obtain a 32×64 matrix.

[0099] The embodiments provided in this application improve the utilization of computing resources by first performing matrix merging operations on the input matrix and then performing matrix multiplication operations.

[0100] As an optional implementation, performing a column merging operation on a set of post-input matrices to obtain the target post-input matrix includes: when the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, and the pre-input matrix is ​​a matrix of dimension A×B, performing a column merging operation on the matrix of dimension B×c1 and the matrix of dimension B×c2 to obtain the target post-input matrix.

[0101] If both the pre-input matrix and the post-input matrix are two-dimensional matrices, and a set of post-input matrices includes a first post-input matrix and a second post-input matrix, where the first post-input matrix is ​​a matrix of dimension B×c1 (i.e., a matrix with B rows and c1 columns), and the second post-input matrix is ​​a matrix of dimension B×c2 (i.e., a matrix with B rows and c2 columns), and the pre-input matrix is ​​a matrix of dimension A×B (i.e., a matrix with A rows and B columns), the server can perform a column merge operation on the B×c1 and B×c2 matrices to obtain the target post-input matrix, which has a dimension of B×C, where C = c1 + c2. Here, A, B, c1, and c2 are natural numbers, and C is a natural number greater than 1.

[0102] When performing column merging, the server can merge the second post-input matrix before or after the first post-input matrix, or mix the column vectors of the first post-input matrix and the column vectors of the second post-input matrix according to the merging rules. In this case, column vectors belonging to the same post-input matrix are not necessarily all adjacent.

[0103] Correspondingly, performing matrix multiplication on the pre-input matrix and the post-input matrix in the target processing device to obtain the second target output matrix includes: performing matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device to obtain the second target output matrix, wherein the second target output matrix is ​​a matrix of dimension A×C.

[0104] The server can perform matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device. During matrix multiplication, the multiplication can be performed row by row; that is, each row of the matrix of dimension A×B is multiplied by each column of the matrix of dimension B×C. The matrix obtained after performing the matrix multiplication is the second target output matrix.

[0105] For example, such as Figure 9 As shown, the post-input is [A, B], and a set of post-input matrices consists of post-input 1 [B, c1] (i.e., a matrix of B rows and c1 columns) and post-input 2 [B, c2] (i.e., a matrix of B rows and c2 columns). First, matrix multiplication is performed on the pre-input processed according to parameter 1 and the post-inputs 1 [B, c1] and 2 [B, c2] processed according to parameter 2, resulting in output result 1 [A, c1] and output result 2 [A, c2]. Then, a column merge operation is performed on output result 1 [A, c1] and output result 2 [A, c2] to obtain the output result [A, C]. This information processing method involves two matrix multiplication operations of small matrices, incurring double the hardware overhead and requiring two call instructions. Furthermore, the utilization rate of computational resources is low for each of these two small matrix multiplication operations.

[0106] To optimize the processing flow, such as Figure 10 As shown, a merging operation can be performed on the post-input 1 [B, c1] processed according to parameter 1 and the post-input 2 [B, c2] processed according to parameter N to obtain the post-input [B, C]. Then, a matrix multiplication operation is performed on the pre-input [A, B] processed according to parameter 1 and the post-input [B, C] processed according to parameter 2 to obtain the output result [A, C]. After optimization, only one large matrix multiplication operation is performed, the hardware overhead is the same, only one call instruction is issued, and only one large matrix multiplication operation is performed, which can improve the utilization of computing resources for each call.

[0107] By performing column merging operations on the two-dimensional input matrix first, and then performing matrix multiplication operations, the applicability of matrix fusion calculation can be improved, and the utilization rate of the called computing resources can be increased.

[0108] As an optional implementation, the above method further includes:

[0109] S1, when it is detected that a second preset operation needs to be performed on at least one of the output matrices in the second group of output matrices, a column splitting operation is performed on the second target output matrix to obtain the second group of split matrices;

[0110] S2, perform a second preset operation on at least one of the split matrices in the second set of split matrices.

[0111] Besides performing matrix multiplication, the result of the original matrix multiplication can be the input for other operations. For example, ... Figure 11 As shown, in addition to performing matrix multiplication on input 1[A, c1] and input 2[A, c2], other operations 3 need to be performed on input 1[A, c1] and other operations 4 need to be performed on input 2[A, c2].

[0112] If it is detected that a second preset operation needs to be performed on at least one of the output matrices in the second set of output matrices (the second preset operation performed on different output matrices can be the same or different), that is, the output result of the matrix multiplication operation of the subsequent input matrix is ​​the input of other operations, then the result of the new matrix multiplication can be split to obtain the original matrix multiplication tensor, and the column split operation can be performed on the second target output matrix to obtain the second set of split matrices.

[0113] After obtaining the second set of split matrices, the server can perform a second preset operation on at least one of the split matrices in the second set of split matrices. If the at least one split matrix contains multiple split matrices, the corresponding second preset operation can be performed on each of the at least one split matrix.

[0114] Optionally, in this embodiment, if at least one split matrix is ​​part of the second set of split matrices, a column splitting operation can also be performed on the second target output matrix to obtain at least one split matrix; and a second preset operation can be performed on the at least one split matrix.

[0115] For example, such as Figure 12 As shown, after obtaining the output matrix [A, C], a splitting operation can be performed on it to obtain output result 1 [A, c1] and output result 2 [A, c2]. Then, other operations 3 are performed on output result 1 [A, c1] and other operations 4 are performed on output result 2 [A, c2].

[0116] By performing column splitting operations on the second target output matrix and performing other operations on the split matrix obtained from the splitting, this optional embodiment can be adapted to scenarios with other operational requirements, thereby improving the compatibility of matrix fusion calculation.

[0117] As an optional implementation, a column splitting operation is performed on the second target output matrix to obtain a second set of split matrices, including:

[0118] When the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, the pre-input matrix is ​​a matrix of dimension A×B, and the second target output matrix is ​​a matrix of dimension A×C, a column splitting operation is performed on the matrix of dimension A×C to obtain the third split matrix and the fourth split matrix.

[0119] If the first input matrix is ​​a matrix of dimension A×B, the first input matrix is ​​a matrix of dimension B×c1, and the second input matrix is ​​a matrix of dimension B×c2, the output matrix obtained by performing matrix multiplication on the first input matrix and the first input matrix is ​​a matrix of dimension A×c1, and the output matrix obtained by performing matrix multiplication on the first input matrix and the second input matrix is ​​a matrix of dimension A×c2.

[0120] The second target output matrix is ​​a two-dimensional matrix of dimension A×C. The server can perform a column splitting operation on it, resulting in a second set of split matrices, which contains at least two split matrices. If there are two split matrices, the server can perform a row splitting operation on the A×C matrix to obtain a third and a fourth split matrix. Here, the third split matrix is ​​a matrix of dimension A×c1, and the fourth split matrix is ​​a matrix of dimension A×c2, where C = c1 + c2. The second set of split matrices includes both the third and fourth split matrices.

[0121] Optionally, when performing the column splitting operation, the c1 columns corresponding to the third splitting matrix and the c2 columns corresponding to the fourth splitting matrix in the second target output matrix can be determined first. The c1 columns corresponding to the third splitting matrix can be multiple consecutive columns or multiple non-consecutive columns, while the c2 columns corresponding to the fourth splitting matrix can be multiple consecutive columns or multiple non-consecutive columns. This embodiment does not impose any limitations on this.

[0122] This optional embodiment improves the applicability of vector fusion calculations by performing column splitting operations on the two-dimensional output matrix to obtain two corresponding split matrices.

[0123] As an optional implementation, a matrix multiplication operation is performed on the target pre-input matrix and the target post-input matrix in the target processing device to obtain a first target output matrix, including:

[0124] In the GPU, a matrix multiplication operation is performed on the target pre-input matrix and the target post-input matrix to obtain the first target output matrix, wherein the target processing device includes the GPU.

[0125] The target processing device may include a GPU, and the CPU may be deployed on a server. It may be a multi-core GPU, and the matrix multiplication operation may be performed by the GPU. During matrix processing, the processor or other control unit on the server may issue a command to the GPU, instructing it to perform the corresponding matrix multiplication operation.

[0126] When performing matrix fusion calculations, if matrix multiplication is performed first and then matrix merging, multiple invocation instructions are needed to call the GPU to perform the matrix multiplication operations separately. If there is only one GPU, the matrix multiplication operations must be executed sequentially, and each execution cannot fully utilize the called GPU resources. If there are multiple GPU cores, although different GPU cores can be used to execute different matrix multiplication operations, the GPU resources called each time still cannot be fully utilized.

[0127] In this embodiment, GPU resources can be invoked with a single call instruction. The invoked GPU performs matrix multiplication on the pre-input and post-input matrices to obtain the target output matrix. Since only one GPU call is performed, only one call instruction needs to be issued; furthermore, because a large matrix multiplication operation is completed using a single GPU, the utilization rate of GPU resources can be improved.

[0128] For example, if the operation involves performing matrix multiplication first and then merging the output matrix, two GPU cores are needed to perform the corresponding matrix multiplication operations, with each GPU core utilizing 30% of its resources. If the operation involves merging the input matrices first and then performing matrix multiplication, only one GPU core needs to be used to perform the corresponding matrix multiplication operations, with that GPU core utilizing 60% of its resources.

[0129] In this embodiment, by calling the GPU to perform matrix multiplication operations, the advantage of the GPU's high computing speed can be taken advantage of, thereby improving the speed of matrix fusion calculation and also improving the utilization rate of GPU resources.

[0130] As an optional implementation, a set of pre-input matrices and post-input matrices is obtained, including:

[0131] In the target prediction model, a set of pre-input matrices is obtained from a set of multi-dimensional matrices to be processed, and a post-input matrix is ​​obtained from the target multi-dimensional matrix to be processed in the target prediction model. The target prediction model is used to determine the predicted target object based on the set of multi-dimensional matrices and the target multi-dimensional matrix.

[0132] A set of pre-input matrices and post-input matrices can be obtained from a target prediction model, which can be deployed on a server and used to determine the predicted target object based on a set of multidimensional matrices and a target multidimensional matrix. The target prediction model can be a neural network model, and its input can be the image to be recognized. The set of multidimensional matrices and the target multidimensional matrix can be the input to the target convolutional layer of the neural network model (or other layers involving matrix multiplication).

[0133] When processing a set of multidimensional matrices and a target multidimensional matrix, a set of pre-input matrices can be obtained from the set of multidimensional matrices, and a post-input matrix can be obtained from the target multidimensional matrix. The information processing method shown in the previous embodiments is then used to process the set of pre-input matrices and post-input matrices. This has already been described and will not be repeated here.

[0134] It should be noted that the fusion calculation scheme of multiple matrix multiplications followed by merging of the same matrix provided in this embodiment can be applied to higher-dimensional tensor calculations, namely, batch-matmul (batch matrix multiplication). When other dimensions are all batch dimensions, these other dimensions can remain unchanged. It can also be extended to transpose operations, diagonal operations, and other operations that can be expressed using the Einstein summation protocol. The Einstein summation operation is a commonly used tensor operation, which refers to multiplying the elements of two tensors one by one as scalars and then summing and shrinking them along several specified dimensions. Matrix multiplication is an example of the Einstein summation operation.

[0135] The number of pre-input matrices to be processed in a set of multidimensional matrices can be multiple, and the number of post-input matrices to be processed in the target multidimensional matrix can also be multiple. The server can process different sets of pre-input matrices and post-input matrices serially or in parallel. The processing flow of different sets of pre-input matrices and post-input matrices can be similar or different depending on the processing target; this embodiment does not limit this.

[0136] In this embodiment, by obtaining the input matrix from the multidimensional matrix to be processed in the prediction model of the prediction target and performing matrix fusion calculation, the efficiency of target object prediction can be improved and the applicability of matrix fusion calculation can be enhanced.

[0137] As an optional implementation, obtaining a set of pre-input matrices from a set of multidimensional matrices to be processed in the target prediction model, and obtaining post-input matrices from the target multidimensional matrix to be processed in the target prediction model includes: in a set of multidimensional matrices including matrices of dimension D×a1×B and matrices of dimension D×a2×B, and the target multidimensional matrix is ​​a matrix of dimension D×B×C, obtaining D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B from the set of multidimensional matrices, and obtaining D post-input matrices of dimension B×C from the target multidimensional matrix, where D is a natural number greater than 1, A is a natural number greater than 1, A=a1+a2, and a1, a2, B, and C are natural numbers.

[0138] Both the set of multidimensional matrices and the target multidimensional matrix can be three-dimensional matrices. The set of multidimensional matrices includes matrices of dimension D×a1×B (which can be considered as D matrices of dimension a1×B) and matrices of dimension D×a2×B (which can be considered as D matrices of dimension a2×B). Correspondingly, obtaining a set of pre-input matrices from the set of multidimensional matrices to be processed in the target prediction model can include: obtaining D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B from the set of multidimensional matrices. D sets of pre-input matrices are obtained from the set of multidimensional matrices, where each set of pre-input matrices includes a first pre-input matrix of dimension a1×B and a second pre-input matrix of dimension a2×B.

[0139] Optionally, performing row merging operations on a set of pre-input matrices to obtain target pre-input matrices includes: performing row merging operations on D first pre-input matrices with dimensions a1×B and D second pre-input matrices with dimensions a2×B respectively to obtain D target pre-input matrices.

[0140] When performing the input matrix merging operation, the server can perform row merging operations on D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B respectively. Each a1×B first pre-input matrix is ​​merged with its corresponding a2×B second pre-input matrix to obtain D target pre-input matrices. Each target pre-input matrix is ​​a matrix of dimension A×B, and each target pre-input matrix is ​​obtained by performing a row merging operation on one first pre-input matrix and one second pre-input matrix.

[0141] In this embodiment, performing matrix multiplication on the target pre-input matrix and the target post-input matrix in the target processing device to obtain the first target output matrix includes: performing matrix multiplication on D target pre-input matrices and D target post-input matrices in the target processing device to obtain D first target output matrices with dimensions A×C, wherein each first target output matrix is ​​a matrix obtained by performing matrix multiplication on a target pre-input matrix and a target post-input matrix.

[0142] The target multidimensional matrix can be a matrix of dimension D×B×C, which can be considered as containing D two-dimensional matrices of dimension B×C. Correspondingly, obtaining the post-input matrix from the target multidimensional matrix to be processed in the target prediction model includes obtaining D post-input matrices of dimension B×C from the target multidimensional matrix.

[0143] The D target pre-input matrices and D target post-input matrices can have a one-to-one correspondence, for example, one target pre-input matrix can only be associated with one post-input matrix, and one post-input matrix can only be associated with one target pre-input matrix; they can also have a one-to-many relationship, where one target pre-input matrix can be associated with one or more post-input matrices, while one post-input matrix can only be associated with one target pre-input matrix; or they can have a many-to-many relationship, where one target pre-input matrix can be associated with one or more post-input matrices, and one post-input matrix can also be associated with one or more target pre-input matrices.

[0144] Optionally, performing matrix multiplication on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix includes: performing matrix multiplication on D target pre-input matrices and D target post-input matrices in the target processing device to obtain D first target output matrices with dimensions A×C.

[0145] For a scenario where there is a one-to-one correspondence between D target pre-input matrices and D target post-input matrices, when performing matrix multiplication, the matrix multiplication operation can be performed sequentially on each target pre-input matrix and its corresponding post-input matrix in the target processing device to obtain D first target output matrices with dimensions A×C. Different matrix multiplication operations can be performed serially or in parallel; this embodiment does not impose any limitations on this.

[0146] Optionally, for a scenario where matrix multiplication is performed on each target pre-input matrix and each post-input matrix, performing matrix multiplication on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix includes: performing matrix multiplication on each of the D target pre-input matrices and the D post-input matrices in the target processing device in turn to obtain D×D target output matrices with dimensions A×C.

[0147] In this embodiment, by obtaining multiple sets of pre-input matrices from a set of multi-dimensional matrices to obtain multiple target pre-input matrices, obtaining multiple post-input matrices from the multi-dimensional matrices, and performing matrix multiplication operations on each target pre-input matrix and its corresponding post-input matrix, the process of matrix fusion calculation of multi-dimensional matrices can be simplified and the efficiency of matrix fusion calculation can be improved.

[0148] As an optional implementation, the above method further includes:

[0149] If it is detected that the model structure in the first prediction model is used to perform matrix multiplication operations on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix, the model structure in the first prediction model is adjusted to obtain a second prediction model. The model structure in the second prediction model is used to perform row merging operations on a set of preceding input matrices to obtain a target preceding input matrix, and to perform matrix multiplication operations on the target preceding input matrix and the following input matrix to obtain a first target output matrix.

[0150] In this embodiment, if it is detected that the model structure in the first prediction model is used to perform matrix multiplication operations on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix, and to perform row splitting operations on the preceding input matrices, and to perform matrix multiplication operations on each of the split matrices in the first set of split matrices and the following input matrices to obtain a second set of split matrices, the server can adjust the model structure in the first prediction model to obtain a second prediction model. The adjustment involves modifying the model structure in the first prediction model to: perform row merging operations on a set of preceding input matrices to obtain a target preceding input matrix, and perform matrix multiplication operations on the target preceding input matrix and the following input matrix to obtain a first target output matrix.

[0151] The aforementioned adjustments can be achieved by modifying the execution logic of the first prediction model. A structure adjustment program for the first prediction model can be pre-configured on the server. This program can be called to adjust the model structure in the first prediction model, thereby obtaining the second prediction model. Optionally, the second prediction model can be the target prediction model described in the foregoing embodiments. After adjusting the model structure, the target processing device can perform matrix multiplication on the target pre-input matrix and post-input matrix in the second prediction model to obtain the first target output matrix.

[0152] In this embodiment, by adjusting the model structure of the prediction model based on the operations performed on the detected model structure, the flexibility of model configuration can be improved, and the efficiency of the prediction model in making target predictions can be increased.

[0153] As an optional implementation, the above method further includes:

[0154] If the model structure in the third prediction model is detected to perform matrix multiplication on each of the preceding input matrix and a set of subsequent input matrices to obtain the second set of output matrices, and to perform column merging on the second set of output matrices to obtain the second target output matrix, the model structure in the third prediction model is adjusted to obtain the fourth prediction model. In the fourth prediction model, the model structure is used to perform column merging on a set of subsequent input matrices to obtain the target subsequent input matrix, and to perform matrix multiplication on the preceding input matrix and the target subsequent input matrix to obtain the second target output matrix.

[0155] In this embodiment, if it is detected that the model structure in the third prediction model is used to perform matrix multiplication operations on the pre-input matrix and each of the post-input matrices in a set of post-input matrices to obtain a second set of output matrices, and to perform column merging operations on the second set of output matrices to obtain a second target output matrix, the server can adjust the model structure in the third prediction model to obtain a fourth prediction model. The adjustment involves modifying the model structure in the third prediction model to: perform column merging operations on a set of post-input matrices to obtain a target post-input matrix, and perform matrix multiplication operations on the pre-input matrix and the target post-input matrix to obtain a second target output matrix.

[0156] The aforementioned adjustments can be achieved by modifying the execution logic of the third prediction model. A structure adjustment program for the third prediction model can be pre-configured on the server. This program can be called to adjust the model structure in the third prediction model, thereby obtaining the fourth prediction model. Optionally, the fourth prediction model can be the target prediction model described in the preceding embodiments. After adjusting the model structure, the target processing device can perform matrix multiplication on the pre-input matrix and the target post-input matrix in the fourth prediction model to obtain the second target output matrix.

[0157] In this embodiment, by adjusting the model structure of the prediction model based on the operations performed on the detected model structure, the flexibility of model configuration can be improved, and the efficiency of the prediction model in making target predictions can be increased.

[0158] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this application.

[0159] According to another aspect of the embodiments of this application, an information processing apparatus for implementing the above-described information processing method is also provided. For example... Figure 13 As shown, the device includes:

[0160] The first acquisition unit 1302 is used to acquire a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices;

[0161] The first execution unit 1304 is configured to perform a row merging operation on a set of pre-input matrices to obtain a target pre-input matrix when it is detected that matrix multiplication operations need to be performed on each pre-input matrix and the post-input matrix in a set of pre-input matrices to obtain a first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain a first target output matrix.

[0162] The second execution unit 1306 is used to perform matrix multiplication on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix.

[0163] It should be noted that the first acquisition unit 1302 in this embodiment can be used to execute the above step S202, the first execution unit 1304 in this embodiment can be used to execute the above step S204, and the second execution unit 1306 in this embodiment can be used to execute the above step S206.

[0164] The embodiments provided in this application obtain a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices; when it is detected that matrix multiplication operations need to be performed on each pre-input matrix and post-input matrix in the set of pre-input matrices to obtain a first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain a first target output matrix, row merging operations are performed on the set of pre-input matrices to obtain a target pre-input matrix; matrix multiplication operations are performed on the target pre-input matrix and post-input matrix in the target processing device to obtain the first target output matrix, thereby solving the technical problem of low utilization of computing resources in information processing methods in related technologies due to insufficient computational load per resource call, and improving the utilization of computing resources.

[0165] As an optional implementation, the first execution unit 1304 includes a first execution module, and the second execution unit 1306 includes a second execution module, wherein,

[0166] The first execution module is used to perform a row merging operation on the matrices of dimension a1×B and dimension a2×B when the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, and the post-input matrix is ​​a matrix of dimension B×C, to obtain the target pre-input matrix. Here, a set of pre-input matrices includes the first pre-input matrix and the second pre-input matrix, and the target pre-input matrix is ​​a matrix of dimension A×B, where A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers.

[0167] The second execution module is used to perform matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device to obtain a first target output matrix, wherein the first target output matrix is ​​a matrix of dimension A×C.

[0168] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0169] As an optional implementation, the above-mentioned apparatus further includes:

[0170] The third execution unit is used to perform a row splitting operation on the first target output matrix to obtain the first set of split matrices when it is detected that a first preset operation needs to be performed on at least one of the output matrices in the first set of output matrices.

[0171] The fourth execution unit is used to perform a first preset operation on at least one of the first set of split matrices.

[0172] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0173] As an optional implementation, the third execution unit includes:

[0174] The third execution module is used to perform a row splitting operation on the matrix of dimension A×C when the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, the post-input matrix is ​​a matrix of dimension B×C, and the first target output matrix is ​​a matrix of dimension A×C, to obtain a first split matrix and a second split matrix. Here, a set of pre-input matrices includes the first pre-input matrix and the second pre-input matrix, and the first set of split matrices includes the first split matrix and the second split matrix. The first split matrix is ​​a matrix of dimension a1×C, and the second split matrix is ​​a matrix of dimension a2×C. A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers.

[0175] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0176] As an optional implementation, the above-mentioned apparatus further includes:

[0177] The second acquisition unit is used to acquire a pre-input matrix and a set of post-input matrices, wherein the set of post-input matrices includes multiple post-input matrices;

[0178] The fifth execution unit is used to perform a column merging operation on a set of post-input matrices to obtain the target post-input matrix when it is detected that matrix multiplication operations need to be performed on each post-input matrix in the pre-input matrix and a set of post-input matrices respectively to obtain the second set of output matrices, and column merging operations need to be performed on the second set of output matrices to obtain the second target output matrix.

[0179] The sixth execution unit is used to perform matrix multiplication on the pre-input matrix and the target post-input matrix in the target processing device to obtain the second target output matrix.

[0180] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0181] As an optional implementation, the fifth execution unit includes: the fourth execution module, and the sixth execution unit includes: the fifth execution module, wherein,

[0182] The fourth execution module is used to perform a column merge operation on the matrix with dimension B×c1 and the matrix with dimension B×c2 when the first post-input matrix is ​​a matrix with dimension B×c2 and the pre-input matrix is ​​a matrix with dimension A×B, to obtain the target post-input matrix. Here, a set of post-input matrices includes the first post-input matrix and the second post-input matrix, and the target post-input matrix is ​​a matrix with dimension B×C, where C is a natural number greater than 1, C = c1 + c2, and A, B, c1 and c2 are natural numbers.

[0183] The fifth execution module is used to perform matrix multiplication on a matrix of dimension A×B and a matrix of dimension B×C in the target processing device to obtain a second target output matrix, wherein the second target output matrix is ​​a matrix of dimension A×C.

[0184] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0185] As an optional implementation, the above-mentioned apparatus further includes:

[0186] The seventh execution unit is used to perform a column splitting operation on the second target output matrix to obtain the second set of split matrices when it is detected that a second preset operation needs to be performed on at least one of the output matrices in the second set of output matrices.

[0187] The eighth execution unit is used to perform a second preset operation on at least one of the split matrices in the second set of split matrices.

[0188] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0189] As an optional implementation, the seventh execution unit includes:

[0190] The sixth execution module is used to perform a column splitting operation on the matrix of dimension A×C when the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, the pre-input matrix is ​​a matrix of dimension A×B, and the second target output matrix is ​​a matrix of dimension A×C, to obtain a third split matrix and a fourth split matrix. Here, one set of post-input matrices includes the first post-input matrix and the second post-input matrix, and the second set of split matrices includes the third split matrix and the fourth split matrix. The third split matrix is ​​a matrix of dimension A×c1, and the fourth split matrix is ​​a matrix of dimension A×c2. C is a natural number greater than 1, C = c1 + c2, and A, B, c1, and c2 are natural numbers.

[0191] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0192] As an optional implementation, the second execution unit 1306 includes:

[0193] The seventh execution module is used to perform matrix multiplication on the target pre-input matrix and post-input matrix in the image processor GPU to obtain the first target output matrix, wherein the target processing device includes the GPU.

[0194] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0195] As an optional implementation, the first acquisition unit 1302 includes:

[0196] The acquisition module is used to acquire the set of pre-input matrices from the set of multi-dimensional matrices to be processed in the target prediction model, and to acquire the post-input matrix from the target multi-dimensional matrix to be processed in the target prediction model, wherein the target prediction model is used to determine the predicted target object based on the set of multi-dimensional matrices and the target multi-dimensional matrix.

[0197] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0198] As an optional implementation, the acquisition module includes an acquisition submodule; the first execution unit 1304 includes an eighth execution module; and the second execution unit 1306 includes a ninth execution module, wherein...

[0199] The acquisition submodule is used to acquire D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B from a set of multidimensional matrices including matrices of dimension D×a1×B and matrices of dimension D×a2×B, and to acquire D post-input matrices of dimension B×C from the target multidimensional matrix. Here, D is a natural number greater than 1, A is a natural number greater than 1, A=a1+a2, and a1, a2, B and C are natural numbers.

[0200] The eighth execution module is used to perform row merging operations on D first pre-input matrices with dimensions a1×B and D second pre-input matrices with dimensions a2×B respectively to obtain D target pre-input matrices. The target pre-input matrices are matrices with dimensions A×B. Each target pre-input matrix is ​​a matrix obtained by performing row merging operations on a first pre-input matrix and a second pre-input matrix.

[0201] The ninth execution module is used to perform matrix multiplication operations on D target pre-input matrices and D target post-input matrices in the target processing device to obtain D first target output matrices with dimensions A×C. Each first target output matrix is ​​a matrix obtained by performing matrix multiplication operations on a target pre-input matrix and a target post-input matrix.

[0202] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0203] As an optional implementation, the above-mentioned apparatus further includes:

[0204] The first adjustment unit is configured to adjust the model structure in the first prediction model to obtain a second prediction model when it is detected that the model structure in the first prediction model is used to perform matrix multiplication operations on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix. The model structure in the second prediction model is used to perform row merging operations on a set of preceding input matrices to obtain a target preceding input matrix, and to perform matrix multiplication operations on the target preceding input matrix and the following input matrix to obtain a first target output matrix.

[0205] The target processing device is used to perform matrix multiplication on the target pre-input matrix and post-input matrix in the second prediction model to obtain the first target output matrix.

[0206] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0207] As an optional implementation, the above-mentioned apparatus further includes:

[0208] The second adjustment unit is used to adjust the model structure in the third prediction model to obtain a fourth prediction model when it is detected that the model structure in the third prediction model is used to perform matrix multiplication operations on the pre-input matrix and each of the post-input matrices in a set of post-input matrices to obtain a second set of output matrices, and to perform column merging operations on the second set of output matrices to obtain a second target output matrix. The model structure in the fourth prediction model is used to perform column merging operations on a set of post-input matrices to obtain a target post-input matrix, and to perform matrix multiplication operations on the pre-input matrix and the target post-input matrix to obtain a second target output matrix.

[0209] The target processing device is used to perform matrix multiplication on the pre-input matrix and the target post-input matrix in the fourth prediction model to obtain the second target output matrix.

[0210] Optional examples of this implementation scheme can be found in the examples shown in the information processing method described above, and will not be repeated here.

[0211] According to another aspect of the embodiments of this application, an electronic device for implementing the above-described information processing method is also provided. This electronic device may be... Figure 1 The terminal device or server shown. This embodiment uses the electronic device as a server as an example for illustration. Figure 14 As shown, the electronic device includes a memory 1402 and a processor 1404. The memory 1402 stores a computer program, and the processor 1404 is configured to execute the steps of any of the above method embodiments via the computer program.

[0212] Optionally, in this embodiment, the aforementioned electronic device may be located in at least one of a plurality of network devices in a computer network.

[0213] Optionally, in this embodiment, the processor can be configured to perform the following steps via a computer program:

[0214] S1, obtain a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices;

[0215] S2, when it is detected that matrix multiplication operations need to be performed on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain the first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain the first target output matrix, row merging operations are performed on a set of preceding input matrices to obtain the target preceding input matrix;

[0216] S3, In the target processing device, perform matrix multiplication on the target pre-input matrix and post-input matrix to obtain the first target output matrix.

[0217] Alternatively, as those skilled in the art will understand, Figure 14 The structure shown is for illustrative purposes only. Electronic devices can also be smartphones (such as Android phones, iOS phones, etc.), tablets, PDAs, mobile internet devices (MIDs), PADs, and other terminal devices. Figure 14 This does not limit the structure of the aforementioned electronic devices. For example, the electronic device may also include components that are more... Figure 14 The more or fewer components shown (such as network interfaces, etc.), or having the same Figure 14 The different configurations shown.

[0218] The memory 1402 can be used to store software programs and modules, as in the embodiments of this application. The processor 1404 executes various functional applications and data processing by running the software programs and modules stored in the memory 1402, thereby implementing the aforementioned information processing method. The memory 1402 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 1402 may further include memory remotely located relative to the processor 1404, and these remote memories can be connected to the terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. As an example, such as... Figure 14 As shown, the memory 1402 may include, but is not limited to, the first acquisition unit 1302, the first execution unit 1304, and the second execution unit 1306 of the information processing device. Furthermore, it may include, but is not limited to, other module units of the information processing device, which will not be elaborated upon in this example.

[0219] Optionally, the transmission device 1406 described above is used to receive or send data via a network. Specific examples of the network described above may include wired networks and wireless networks. In one example, the transmission device 1406 includes a Network Interface Controller (NIC), which can be connected to other network devices and a router via a network cable to communicate with the Internet or a local area network. In another example, the transmission device 1406 is a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0220] In addition, the above-mentioned electronic device also includes: a display 1408 for displaying the image to be identified, and can also be used to display the target recognition result; and a connection bus 1410 for connecting the various module components in the above-mentioned electronic device.

[0221] In other embodiments, the aforementioned terminal device or server can be a node in a distributed system, wherein the distributed system can be a blockchain system, which is a distributed system formed by connecting multiple nodes through network communication. The nodes can form a peer-to-peer (P2P) network, and any form of computing device, such as a server, terminal, or other electronic device, can become a node in the blockchain system by joining this peer-to-peer network.

[0222] According to one aspect of this application, a computer program product or computer program is provided, comprising computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the methods provided in the various alternative implementations described above, wherein the computer program is configured to perform the steps in any of the method embodiments described above at runtime.

[0223] Optionally, in this embodiment, the computer-readable storage medium described above may be configured to store a computer program for performing the following steps:

[0224] S1, obtain a set of pre-input matrices and post-input matrices, wherein the set of pre-input matrices includes multiple pre-input matrices;

[0225] S2, when it is detected that matrix multiplication operations need to be performed on each of the preceding input matrices and the following input matrices in a set of preceding input matrices to obtain the first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain the first target output matrix, row merging operations are performed on a set of preceding input matrices to obtain the target preceding input matrix;

[0226] S3, In the target processing device, perform matrix multiplication on the target pre-input matrix and post-input matrix to obtain the first target output matrix.

[0227] Optionally, in this embodiment, those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing the hardware related to the terminal device. This program can be stored in a computer-readable storage medium, which may include: a flash drive, read-only memory (ROM), random access memory (RAM), a magnetic disk, or an optical disk, etc. The sequence numbers of the embodiments in this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0228] If the integrated units in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in the aforementioned computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause one or more computer devices (which may be personal computers, servers, or network devices, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application.

[0229] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0230] In the several embodiments provided in this application, it should be understood that the disclosed client can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, indirect coupling or communication connection between units or modules, and may be electrical or other forms.

[0231] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0232] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or at least two units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0233] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. An information processing method, characterized in that, include: During the process of the neural network model processing the input image to be recognized, a set of pre-input matrices and post-input matrices are obtained. The set of pre-input matrices includes multiple pre-input matrices, and the number of rows of the pre-input matrices is the same as the number of columns of the post-input matrices. When it is detected that matrix multiplication operations need to be performed on each of the preceding input matrices in the set of preceding input matrices and the following input matrix to obtain a first set of output matrices, and row merging operations need to be performed on the first set of output matrices to obtain a first target output matrix, the row merging operation is performed on the set of preceding input matrices to obtain a target preceding input matrix; In the target processing device, the matrix multiplication operation is performed on the target pre-input matrix and the target post-input matrix to obtain the first target output matrix.

2. The method according to claim 1, characterized in that, The step of performing the row merging operation on the set of preceding input matrices to obtain the target preceding input matrix includes: when the first preceding input matrix is ​​a matrix of dimension a1×B, the second preceding input matrix is ​​a matrix of dimension a2×B, and the following input matrix is ​​a matrix of dimension B×C, performing the row merging operation on the matrix of dimension a1×B and the matrix of dimension a2×B to obtain the target preceding input matrix, wherein the set of preceding input matrices includes the first preceding input matrix and the second preceding input matrix, and the target preceding input matrix is ​​a matrix of dimension A×B, where A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers; The step of performing the matrix multiplication operation on the target pre-input matrix and the target post-input matrix in the target processing device to obtain the first target output matrix includes: performing the matrix multiplication operation on the matrix of dimension A×B and the matrix of dimension B×C in the target processing device to obtain the first target output matrix, wherein the first target output matrix is ​​a matrix of dimension A×C.

3. The method according to claim 1, characterized in that, The method further includes: When it is detected that a first preset operation needs to be performed on at least one of the first set of output matrices, a row splitting operation is performed on the first target output matrix to obtain the first set of split matrices; Perform the first preset operation on at least one of the first set of split matrices.

4. The method according to claim 3, characterized in that, The step of performing the row splitting operation on the first target output matrix to obtain the first set of split matrices includes: When the first pre-input matrix is ​​a matrix of dimension a1×B, the second pre-input matrix is ​​a matrix of dimension a2×B, the post-input matrix is ​​a matrix of dimension B×C, and the first target output matrix is ​​a matrix of dimension A×C, the row splitting operation is performed on the matrix of dimension A×C to obtain a first split matrix and a second split matrix. The first set of pre-input matrices includes the first pre-input matrix and the second pre-input matrix, and the first set of split matrices includes the first split matrix and the second split matrix. The first split matrix is ​​a matrix of dimension a1×C, and the second split matrix is ​​a matrix of dimension a2×C. A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers.

5. The method according to claim 1, characterized in that, The method further includes: Obtain a pre-input matrix and a set of post-input matrices, wherein the set of post-input matrices includes multiple post-input matrices; When it is detected that the matrix multiplication operation needs to be performed on the pre-input matrix and each of the set of post-input matrices to obtain the second set of output matrices, and the column merging operation needs to be performed on the second set of output matrices to obtain the second target output matrix, the column merging operation is performed on the set of post-input matrices to obtain the target post-input matrix. The matrix multiplication operation is performed on the pre-input matrix and the target post-input matrix in the target processing device to obtain the second target output matrix.

6. The method according to claim 5, characterized in that, The step of performing the column merging operation on the set of post-input matrices to obtain the target post-input matrix includes: when the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, and the pre-input matrix is ​​a matrix of dimension A×B, performing the column merging operation on the matrix of dimension B×c1 and the matrix of dimension B×c2 to obtain the target post-input matrix, wherein the set of post-input matrices includes the first post-input matrix and the second post-input matrix, the target post-input matrix is ​​a matrix of dimension B×C, where C is a natural number greater than 1, C = c1 + c2, and A, B, c1, and c2 are natural numbers; The step of performing the matrix multiplication operation on the pre-input matrix and the target post-input matrix in the target processing device to obtain the second target output matrix includes: performing the matrix multiplication operation on the matrix of dimension A×B and the matrix of dimension B×C in the target processing device to obtain the second target output matrix, wherein the second target output matrix is ​​a matrix of dimension A×C.

7. The method according to claim 6, characterized in that, The method further includes: When it is detected that a second preset operation needs to be performed on at least one of the output matrices in the second group of output matrices, a column splitting operation is performed on the second target output matrix to obtain the second group of split matrices; Perform the second preset operation on at least one of the split matrices in the second set of split matrices.

8. The method according to claim 7, characterized in that, The step of performing a column splitting operation on the second target output matrix to obtain the second set of split matrices includes: When the first post-input matrix is ​​a matrix of dimension B×c1, the second post-input matrix is ​​a matrix of dimension B×c2, the pre-input matrix is ​​a matrix of dimension A×B, and the second target output matrix is ​​a matrix of dimension A×C, the column splitting operation is performed on the matrix of dimension A×C to obtain a third split matrix and a fourth split matrix. The first set of post-input matrices includes the first post-input matrix and the second post-input matrix, and the second set of split matrices includes the third split matrix and the fourth split matrix. The third split matrix is ​​a matrix of dimension A×c1, and the fourth split matrix is ​​a matrix of dimension A×c2. C is a natural number greater than 1, C = c1 + c2, and A, B, c1, and c2 are natural numbers.

9. The method according to any one of claims 1 to 4, characterized in that, The step of performing the matrix multiplication operation on the target pre-input matrix and the target post-input matrix in the target processing device to obtain the first target output matrix includes: The first target output matrix is ​​obtained by performing the matrix multiplication operation on the target pre-input matrix and the target post-input matrix in the image processor GPU, wherein the target processing device includes the GPU.

10. The method according to any one of claims 1 to 4, characterized in that, The process of obtaining a set of pre-input matrices and post-input matrices includes: The target prediction model obtains the set of pre-input matrices from a set of multi-dimensional matrices to be processed in the target prediction model, and obtains the post-input matrix from the target multi-dimensional matrix to be processed in the target prediction model, wherein the target prediction model is used to determine the predicted target object based on the set of multi-dimensional matrices and the target multi-dimensional matrix.

11. The method according to claim 10, characterized in that, The step of obtaining the set of pre-input matrices from a set of multidimensional matrices to be processed in the target prediction model, and obtaining the post-input matrix from the target multidimensional matrix to be processed in the target prediction model, includes: in the set of multidimensional matrices including a matrix of dimension D×a1×B and a matrix of dimension D×a2×B, and the target multidimensional matrix being a matrix of dimension D×B×C, obtaining D first pre-input matrices of dimension a1×B and D second pre-input matrices of dimension a2×B from the set of multidimensional matrices, and obtaining D post-input matrices of dimension B×C from the target multidimensional matrix, wherein D is a natural number greater than 1, A is a natural number greater than 1, A = a1 + a2, and a1, a2, B, and C are natural numbers; The step of performing the row merging operation on the set of pre-input matrices to obtain target pre-input matrices includes: performing the row merging operation on the D first pre-input matrices with dimension a1×B and the D second pre-input matrices with dimension a2×B respectively to obtain D target pre-input matrices, wherein the target pre-input matrices are matrices with dimension A×B, and each target pre-input matrix is ​​a matrix obtained by performing the row merging operation on a first pre-input matrix and a second pre-input matrix; The step of performing the matrix multiplication operation on the target pre-input matrix and the target post-input matrix in the target processing device to obtain the first target output matrix includes: performing the matrix multiplication operation sequentially on D target pre-input matrices and D target post-input matrices in the target processing device to obtain D first target output matrices of dimension A×C, wherein each first target output matrix is ​​a matrix obtained by performing the matrix multiplication operation on one target pre-input matrix and one target post-input matrix.

12. The method according to any one of claims 1 to 4, characterized in that, The method further includes: If it is detected that the model structure in the first prediction model is used to perform matrix multiplication operations on each of the set of pre-input matrices and the post-input matrix to obtain a first set of output matrices, and to perform row merging operations on the first set of output matrices to obtain a first target output matrix, the model structure in the first prediction model is adjusted to obtain a second prediction model. The model structure in the second prediction model is used to perform the row merging operation on the set of pre-input matrices to obtain a target pre-input matrix, and to perform the matrix multiplication operation on the target pre-input matrix and the post-input matrix to obtain the first target output matrix. The target processing device is used to perform the matrix multiplication operation on the target pre-input matrix and the target post-input matrix in the second prediction model to obtain the first target output matrix.

13. The method according to any one of claims 5 to 8, characterized in that, The method further includes: If it is detected that the model structure in the third prediction model is used to perform the matrix multiplication operation on each of the preceding input matrix and each of the set of subsequent input matrices to obtain a second set of output matrices, and to perform a column merging operation on the second set of output matrices to obtain a second target output matrix, the model structure in the third prediction model is adjusted to obtain a fourth prediction model. The model structure in the fourth prediction model is used to perform the column merging operation on the set of subsequent input matrices to obtain a target subsequent input matrix, and to perform the matrix multiplication operation on the preceding input matrix and the target subsequent input matrix to obtain the second target output matrix. The target processing device is used to perform the matrix multiplication operation on the pre-input matrix and the target post-input matrix in the fourth prediction model to obtain the second target output matrix.

14. A computer-readable storage medium comprising a stored program, wherein, When the program is executed, it performs the method described in any one of claims 1 to 13.

15. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to execute the method described in any one of claims 1 to 13 through the computer program.

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