A low-afterpulse silicon photomultiplier structure and its manufacturing method
The novel SiPM structure addresses the high cost and complexity of SiPM production by removing the substrate and adding a reflective metal layer, effectively reducing back pulses and simplifying the manufacturing process.
Patent Information
- Application Number
- CN202211411162.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-11
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2042-11-11
AI Technical Summary
The existing SiPM has high cost and complex processes in reducing the probability of post-pulse, which is difficult to achieve through low-cost and low-complex processing processes.
By removing the substrate layer on the basis of the existing structure and adding a highly reflective metal layer to the bottom of the epitaxial layer, combining temporary bonding and permanent bonding methods, a low-resulting silicon photomultiplier tube structure is formed.
It effectively reduces the post-pulse probability of SiPM, simplifies the processing technology, reduces costs, and improves the stability and isolation effect of the structure.
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Figure CN115732575B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor optoelectronic detector chip processing, and relates to a low after-pulse silicon photomultiplier tube structure and a manufacturing method thereof. Background Technique
[0002] A silicon photomultiplier tube (SiPM) is a new type of optoelectronic detection device, which is composed of an array of single-photon avalanche diodes (SPADs) operating in Geiger mode. It has the characteristics of high gain, high sensitivity, low bias voltage, insensitivity to magnetic fields, and compact structure. It is widely used in high-energy physics and nuclear medicine (PET) and other fields. In recent years, it has developed rapidly in the field of nuclear medicine and is widely regarded as the development direction of future extremely weak light detectors.
[0003] SiPM has the ability to detect single photons. Its gain is related to the overbias voltage, and the maximum gain can exceed 10^6 magnitude. Each silicon photomultiplier tube is composed of a large number (hundreds to thousands) of single-photon avalanche diode (SPAD) micro-elements. Each unit is composed of a SPAD micro-element and a large-value quenching resistor in series. These micro-elements are connected in parallel to form a surface array. After applying a reverse bias voltage (usually dozens of volts) to the silicon photomultiplier tube, the depletion layer of each micro-element has a very high electric field. At this time, if a photon hits from the outside, electrons in the semiconductor absorb the photon energy and transition to the excited energy level, forming electrons or holes. The high-energy electrons and holes are immediately accelerated in the electric field and form a large number of electron-hole pairs after impact ionization, that is, avalanche. At this time, the current in each micro-element circuit suddenly increases, and the voltage dropped on the quenching resistor R also increases. The electric field in the micro-element instantaneously decreases, that is, after a SPAD outputs an instantaneous current pulse, the avalanche stops. The quenching resistor values of different micro-elements are the same, so theoretically each micro-element will output pulses of equal magnitude. Although the SPAD is an analog device, macroscopically each micro-element is a logic unit. If there is a signal output, it is "1", and if there is no signal, it is "0". Within the dynamic range of the silicon photomultiplier tube, the magnitude of the output current is proportional to the number of micro-elements where avalanche occurs.
[0004] Since the electric field in the unit avalanche region of SiPM is extremely high during operation, during the avalanche process, the accelerated carriers in the high-field region will emit photons, which can be called secondary photons. These secondary photons are often in the near-infrared (NIR) region and can travel a long distance in silicon. During the breakdown process, some carriers and secondary photons will be trapped in the defect centers of silicon. After a delay of up to several nanoseconds, the trapped carriers will be released, which may trigger an avalanche and generate an after-pulse signal in the same single-photon detection unit, causing additional signal noise, called after-pulse. The SiPM is fabricated using an epitaxial wafer with a relatively thin epitaxial layer. The epitaxial layer has high quality and few trap centers, and the phenomenon of carrier trapping mostly occurs in the substrate layer.
[0005] In the existing solutions for reducing the afterpulse probability of SiPMs, high-quality silicon materials are usually used, and the damage and defects introduced during processing are reduced to suppress this phenomenon. However, high-quality silicon materials need to be customized and are relatively expensive, and the control of damage and defects will make the process more complex. Therefore, there is an urgent need for a new SiPM structure with a low-cost and low-complexity processing technology. Summary of the Invention
[0006] In view of this, the purpose of the present invention is to provide a low-afterpulse silicon photomultiplier tube structure and its manufacturing method. By removing the substrate layer on the basis of the existing structure, adding a highly reflective metal (such as an aluminum mirror) at the bottom of the epitaxial layer, and then using the method of temporary bonding + permanent bonding, a structure that can greatly reduce the afterpulse of SiPMs is formed.
[0007] To achieve the above purpose, the present invention provides the following technical solutions:
[0008] Solution 1: A low-afterpulse silicon photomultiplier tube structure, including a plurality of silicon photomultiplier tube units 100, a plurality of isolation groove structures 105, a silicon epitaxial layer 104, a highly reflective metal layer 103, a permanent bonding adhesive layer 102, and a carrier wafer 101;
[0009] Part of the silicon photomultiplier tube unit 100 is embedded in the silicon epitaxial layer 104, and part is fixed on the upper surface of the silicon epitaxial layer 104; the isolation groove structure 105 is embedded in the silicon epitaxial layer 104 for isolating adjacent silicon photomultiplier tube units 100; the highly reflective metal layer 103 is fixed on the lower surface of the silicon epitaxial layer 104; the carrier wafer 101 is permanently bonded to the lower surface of the highly reflective metal layer 103 through the permanent bonding adhesive layer 102.
[0010] Further, the silicon photomultiplier tube unit 100 includes an avalanche region 106, a photosensitive region 107, a composite antireflection film 108, an interlayer insulating layer 109, a unit metal electrode 110, and a unit quenching resistor 111;
[0011] The photosensitive region 107 is located directly above the avalanche region 106 and is embedded in the silicon epitaxial layer 104. The photosensitive region 107 is flush with the upper surface of the silicon epitaxial layer 104; the composite antireflection film 108 covers the silicon epitaxial layer 104 and the photosensitive region 107; the interlayer insulating layer 109 covers the isolation groove structure 105 and its surroundings; the unit quenching resistor 111 is located above the composite antireflection film 108, is embedded in the interlayer insulating layer 109, and is connected to the photosensitive region 107 through a metal via; the unit metal electrode 110 is embedded in part of the upper part of the interlayer insulating layer 109, one end is connected to the quenching resistor 111, and the other end is connected to the device lead electrode.
[0012] Further, the silicon epitaxial layer 104 and the avalanche region 106 are of N type; the photosensitive region 107 is of P type.
[0013] Further, the depth to which the isolation trench structure 105 is embedded in the silicon epitaxial layer 104 is lower than the thickness of the silicon epitaxial layer 104.
[0014] Further, the isolation trench structure 105 includes a trench, a sidewall passivation layer, and a light-blocking metal filling layer.
[0015] Further, this structure further includes a grounded metal electrode 201, a metal electrode 202 for unit signal aggregation, and metal leads 203 connecting each unit.
[0016] Solution 2: A manufacturing method for a low afterpulse silicon photomultiplier structure, specifically including the following steps:
[0017] 1) Pattern by means of photolithographic exposure and development, and then complete the fabrication of the avalanche region 106 and the photosensitive region 107 inside the silicon epitaxial layer 104 by means of ion implantation;
[0018] 2) Complete the fabrication of the composite antireflection film 108 on the upper surface of the silicon epitaxial layer 104 by means of gate oxidation and chemical vapor deposition;
[0019] 3) Fabricate the unit quenching resistor 111 on the upper surface of the composite antireflection film 108 by means of chemical vapor deposition, ion implantation, photolithography, and etching;
[0020] 4) Complete the fabrication of the isolation trench structure 105 inside the silicon epitaxial layer 104 by means of photolithography, etching, oxidation, metal filling, and chemical mechanical polishing, etc.;
[0021] 5) Complete the fabrication of the interlayer insulating layer 109 on the upper surface of the silicon composite antireflection film 108 by means of chemical vapor deposition, photolithography, etching, and chemical mechanical polishing, etc.;
[0022] 6) Complete the fabrication of the unit metal electrode 110 on the interlayer insulating layer 109 by means of physical vapor deposition, photolithography, and etching, etc.;
[0023] 7) Fabricate a temporary bonding adhesive layer 113 on the wafer surface by means of spin coating, and bond the temporary bonding adhesive layer 113 and the temporary bonding glass sheet 114 together by means of temporary bonding;
[0024] 8) Remove the epitaxial wafer substrate 112 by means of chemical mechanical thinning and wet etching;
[0025] 9) Fabricate a high-reflection metal layer 103 on the lower surface of the silicon epitaxial layer 104 by means of electron beam evaporation;
[0026] 10) Fabricate a permanent bonding adhesive layer 102 on the lower surface of the high-reflection metal layer 103 by means of spin coating;
[0027] 11) Using a permanent bonding method, the carrier sheet 101 and the permanent bonding adhesive layer 102 are bonded together;
[0028] 12) Using a laser debonding method to remove the temporary bonded glass sheet 114;
[0029] 13) Using a special adhesive remover to remove the temporary bonding adhesive layer 113;
[0030] 14) Using a dedicated dicing machine to slice the silicon photomultiplier tube structure 200 (single chip structure) is obtained.
[0031] The beneficial effects of the present invention are:
[0032] 1) The present invention uses highly reflective metal to fill the deep isolation grooves between units, removes the substrate layer, and deposits a layer of high reflectivity metal, thereby increasing the isolation ratio, effectively reducing photon penetration, and reducing the crosstalk of SiPM.
[0033] 2) The present invention uses a temporary bonding + permanent bonding method to complete ultra-thin sheet processing and realizes ultra-thin SiPM chip production, thereby reducing a large number of defect centers and achieving the purpose of reducing after pulses.
[0034] 3) The present invention performs low-energy high-dose doping on the back of the SiPM chip and uses a local annealing process to passivate the back of the chip and reduce the impact of the interface state.
[0035] 4) The present invention spin-coats an adhesive layer (using photosensitive bisbenzocyclobutene (BCB) or polyimide (PI) adhesive) on the highly reflective metal on the back of the SiPM chip, bonds it to a supporting carrier sheet, and cures it at a certain temperature to form a permanent bonding structure.
[0036] 5) The SiPM structure of the present invention adopts the technology commonly used in the processing of silicon photodetectors, has mature technology, stable structure, relatively low requirements for silicon materials, simple processing technology, and can achieve mass production of chips.
[0037] 6) The SiPM of the present invention adopts a same-side electrode design, that is, the positive and negative electrodes are both on the front side of the chip, which can reduce the process complexity.
[0038] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be described in detail and preferably below in conjunction with the accompanying drawings, where:
[0040] Figure 1 Schematic diagram of secondary photon indirect crosstalk and carrier capture and release by trap centers in an existing silicon photomultiplier;
[0041] Figure 2 Plan view of the structure of the low afterpulse silicon photomultiplier of the present invention;
[0042] Figure 3 Cross-sectional view of a unit of the low afterpulse silicon photomultiplier of the present invention;
[0043] Figure 4 Schematic diagram of the temporary bonding structure of the silicon photomultiplier of the present invention.
[0044] Reference numerals: 101 - carrier wafer, 102 - permanent bonding adhesive layer, 103 - highly reflective metal layer, 104 - silicon epitaxial layer, 105 - isolation groove structure, 106 - avalanche region, 107 - photosensitive region, 108 - composite antireflection film, 109 - interlayer insulating layer, 110 - unit metal electrode, 111 - unit quenching resistor, 112 - epitaxial wafer substrate, 113 - temporary bonding adhesive layer, 114 - temporary bonding glass wafer, 201 - grounded metal electrode, 202 - unit signal aggregation metal electrode, 203 - metal lead. Specific embodiments
[0045] The following specific examples illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the diagrams provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.
[0046] Among them, the accompanying drawings are only for illustrative purposes, showing only schematic diagrams rather than actual diagrams, and should not be construed as a limitation to the present invention; for better illustrating the embodiments of the present invention, some components in the accompanying drawings will be omitted, enlarged, or reduced, which does not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the accompanying drawings may be omitted.
[0047] In the drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "rear", etc. indicating the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationship in the drawings are only for illustrative purposes and cannot be understood as a limitation of the present invention. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.
[0048] Please refer to Figures 1 to 4 , the present invention provides a low afterpulse silicon photomultiplier tube structure (single chip), which can achieve single photon detection. Specifically, it includes a plurality of silicon photomultiplier tube units 100, a plurality of isolation groove structures 105, a silicon epitaxial layer 104, a high-reflection metal layer 103, a permanent bonding adhesive layer 102 and a carrier wafer 101, as well as a grounded metal electrode 201, a metal electrode 202 for unit signal aggregation and a metal lead 203 connecting each unit. Among them, a silicon photomultiplier tube unit 100 includes an avalanche region 106, a photosensitive region 107, a composite antireflection film 108, an interlayer insulating layer 109, a unit metal electrode 110 and a unit quenching resistor 111.
[0049] The photosensitive region 107 is located directly above the avalanche region 106 and is embedded in the silicon epitaxial layer 104. The photosensitive region 107 is flush with the upper surface of the silicon epitaxial layer 104; the composite antireflection film 108 covers the silicon epitaxial layer 104 and the photosensitive region 107; the interlayer insulating layer 109 covers the isolation groove structure 105 and its surroundings; the unit quenching resistor 111 is located above the composite antireflection film 108, is embedded in the interlayer insulating layer 109, and is connected to the photosensitive region 107 through a metal via. The unit metal electrode 110 is embedded above a part of the interlayer insulating layer 109, one end is connected to the quenching resistor 111, and the other end is connected to the device lead electrode. The isolation groove structure 105 is embedded in the silicon epitaxial layer 104 for isolating adjacent silicon photomultiplier tube units 100; the high-reflection metal layer 103 is fixed on the lower surface of the silicon epitaxial layer 104; the carrier wafer 101 is permanently bonded to the lower surface of the high-reflection metal layer 103 through the permanent bonding adhesive layer 102.
[0050] The carrier wafer 101 is usually made of an ordinary single-crystal double-polished silicon wafer with a thickness of 200 μm to 500 μm, mainly for supporting the ultra-thin SiPM chip.
[0051] The permanent bonding adhesive layer 102 is usually a photosensitive bisbenzocyclobutene (BCB) or polyimide (PI) type adhesive, used for permanently bonding the SiPM chip and the carrier wafer 101. The thickness of the SiPM structure of the present invention < 10 μm.
[0052] The high-reflection metal layer 103 is usually made of metals such as pure aluminum, tungsten, copper, and gold, and is used to reflect the unabsorbed incident photons and secondary photons.
[0053] The silicon epitaxial layer 104, which is also the silicon absorption layer, is usually N-type, with a thickness of 1 μm to 10 μm and a resistivity of 20 Ω·cm to 1000 Ω·cm, and is used to absorb the incident photons and generate electron-hole pairs.
[0054] The isolation trench structure 105 is usually composed of a trench, a sidewall passivation layer, and a light-blocking metal filling layer. To ensure the structural stability, generally, the depth of the isolation trench is 1 μm to 3 μm less than that of the silicon absorption layer. This structure is used to reduce photon penetration and prevent crosstalk.
[0055] The avalanche region 106 is usually N-type doped, with a doping concentration of (1 to 9.9)×10 12 atoms / cm 2 , and is used to occur the avalanche multiplication phenomenon.
[0056] The photosensitive region 107 is usually P-type doped, with a doping concentration of (1 to 9.9)×10 14 atoms / cm 2 , and is used to form the P pole of the P / N junction.
[0057] The composite antireflection film 108 is usually a composite film made of materials such as SiO2 and Si3N4, and the thickness is designed according to the transmitted different wavelengths, and is used to increase the photon transmittance.
[0058] The interlayer insulating layer 109 is usually made of SiO2 and is used for insulating isolation between the polysilicon layer and the metal layer.
[0059] The unit metal electrode 110 is usually made of metals such as silicon-aluminum and copper. One end is connected to the quenching resistor, and the other end is connected to the device lead-out electrode, and is used to lead out the electrical signal of each unit.
[0060] The unit quenching resistor 111 is usually made of polysilicon, with a resistance value of (1 to 1000) kΩ, and is used to quench the avalanche signal.
[0061] The epitaxial wafer substrate 112 usually has a thickness of 300 μm to 1000 μm and a resistivity of 0.01 Ω·cm to 0.02 Ω·cm, and is led out as the back electrode in the conventional structure.
[0062] The temporary bonding adhesive layer 113 is usually made of photosensitive bisbenzocyclobutene (BCB), polyimide (PI) adhesives. After laser irradiation, the temporary bonding adhesive loses its adhesiveness and is used to temporarily adhere the glass wafer to the silicon chip wafer;
[0063] The temporary bonding glass sheet 114, usually made of fused silica with high light transmittance, is used as a support when removing the substrate;
[0064] The grounded metal electrode 201, which is connected to the P pole in the P / N junction and is usually made of metals such as silicon-aluminum and copper, serves as one end for signal output.
[0065] The metal electrode 202 for unit signal aggregation, which is connected to the N pole in the P / N junction and is usually made of metals such as silicon-aluminum and copper, serves as the other end for signal output.
[0066] The metal lead 203 connecting each unit, which is usually made of metals such as silicon-aluminum and copper, is used to parallel-connect each unit.
[0067] The structure of the low afterpulse silicon photomultiplier tube of the present invention realizes the fabrication of a low crosstalk and low afterpulse ultra-thin SiPM structure by adopting the method of temporary bonding + permanent bonding. In this structure, a temporary bonding glass sheet 114 is first temporarily bonded to the front side to remove the thin substrate, leaving only the high-quality silicon epitaxial layer 104, and then a carrier sheet 101 is permanently bonded to the back side to support the ultra-thin SiPM structure. As Figure 4 shown, the specific fabrication steps of this structure are as follows:
[0068] 1) Pattern it by means of photolithography exposure and development, and then complete the fabrication of the avalanche region 106 and the photosensitive region 107 inside the silicon epitaxial layer 104 by means of ion implantation;
[0069] 2) Complete the fabrication of the composite antireflection film 108 on the upper surface of the silicon epitaxial layer 104 by means of gate oxidation and chemical vapor deposition;
[0070] 3) Fabricate the unit quenching resistor 111 on the upper surface of the composite antireflection film 108 by means of chemical vapor deposition, ion implantation, photolithography, and etching;
[0071] 4) Complete the fabrication of the isolation trench structure 105 inside the silicon epitaxial layer 104 by means of photolithography, etching, oxidation, metal filling, and chemical mechanical polishing, etc.;
[0072] 5) Complete the fabrication of the interlayer insulating layer 109 on the upper surface of the silicon composite antireflection film 108 by means of chemical vapor deposition, photolithography, etching, and chemical mechanical polishing, etc.;
[0073] 6) Complete the fabrication of the unit metal electrode 110 on the interlayer insulating layer 109 by means of physical vapor deposition, photolithography, and etching, etc.;
[0074] 7) Spin-coat a temporary bonding adhesive layer 113 on the wafer surface, and bond the temporary bonding adhesive layer 113 and the temporary bonding glass sheet 114 together by means of temporary bonding;
[0075] 8) The substrate 112 of the epitaxial wafer is removed by means of chemical mechanical thinning and wet etching;
[0076] 9) A highly reflective metal layer 103 is fabricated on the lower surface of the silicon epitaxial layer 104 by means of electron beam evaporation;
[0077] 10) A permanent bonding adhesive layer 102 is fabricated on the lower surface of the highly reflective metal layer 103 by means of spin coating;
[0078] 11) The carrier wafer 101 and the permanent bonding adhesive layer 102 are bonded together by means of permanent bonding;
[0079] 12) The temporary bonding glass wafer 114 is removed by means of laser debonding;
[0080] 13) The temporary bonding adhesive layer 113 is removed by cleaning with a special adhesive removing solution;
[0081] 14) The silicon photomultiplier structure 200 (single chip structure) is obtained by dicing with a special dicing machine.
[0082] The manufacturing method of the above SiPM structure is a mature process in the processing of silicon photodetectors. The temporary bonding method is adopted for the processing and manufacturing of the ultra-thin SiPM, and the permanent bonding method is used to support the ultra-thin SiPM chip. The structure is stable. Compared with other methods for suppressing after-pulses, it has the advantages of simple manufacturing process and low cost.
[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not restrictive. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the purpose and scope of the present technical solution, and they should all be covered by the scope of the claims of the present invention.
Claims
1. A low after-pulse silicon photomultiplier tube structure, characterized in that, This structure includes a plurality of silicon photomultiplier units (100), a plurality of isolation groove structures (105), a silicon epitaxial layer (104), a high-reflection metal layer (103), a permanent bonding adhesive layer (102), and a carrier wafer (101); Part of the silicon photomultiplier unit (100) is embedded in the silicon epitaxial layer (104), and part is fixed on the upper surface of the silicon epitaxial layer (104); the isolation groove structure (105) is embedded in the silicon epitaxial layer (104), and its embedding depth is lower than the thickness of the silicon epitaxial layer (104), which is used to isolate adjacent silicon photomultiplier units (100); the high-reflection metal layer (103) is fixed on the lower surface of the silicon epitaxial layer (104); the carrier wafer (101) is permanently bonded to the lower surface of the high-reflection metal layer (103) through the permanent bonding adhesive layer (102).
2. The low after-pulse silicon photomultiplier tube structure according to claim 1, characterized in that, The silicon photomultiplier unit (100) includes an avalanche region (106), a photosensitive region (107), a composite antireflection film (108), an interlayer insulating layer (109), a unit metal electrode (110), and a unit quenching resistor (111); The photosensitive region (107) is located directly above the avalanche region (106), and both are embedded in the silicon epitaxial layer (104). The photosensitive region (107) is flush with the upper surface of the silicon epitaxial layer (104); the composite antireflection film (108) covers the silicon epitaxial layer (104) and the photosensitive region (107); the interlayer insulating layer (109) covers the isolation groove structure (105) and its surroundings; the unit quenching resistor (111) is located above the composite antireflection film (108), and is embedded in the interlayer insulating layer (109), and is connected to the photosensitive region (107) through a metal via; the unit metal electrode (110) is embedded above part of the interlayer insulating layer (109), one end is connected to the quenching resistor (111), and the other end is connected to the device lead electrode.
3. The low after-pulse silicon photomultiplier tube structure according to claim 2, wherein The silicon epitaxial layer (104) and the avalanche region (106) are of N type; the photosensitive region (107) is of P type.
4. The low after-pulse silicon photomultiplier tube structure according to claim 1, characterized in that, The isolation groove structure (105) includes a groove, a sidewall passivation layer, and a light-blocking metal filling layer.
5. The low after-pulse silicon photomultiplier tube structure according to any one of claims 1 to 3, characterized in that This structure further includes a grounded metal electrode (201), a metal electrode for unit signal aggregation (202), and a metal lead (203) connecting each unit, all of which are located on the upper surface of the silicon epitaxial layer (104).
6. A manufacturing method of a low after-pulse silicon photomultiplier tube structure, characterized in that, This method specifically includes the following steps: 1) Pattern by means of photolithography exposure and development, and then complete the fabrication of the avalanche region (106) and the photosensitive region (107) inside the silicon epitaxial layer (104) by means of ion implantation; 2) Complete the fabrication of the composite antireflection film (108) on the upper surface of the silicon epitaxial layer (104) by means of gate oxidation and chemical vapor deposition; 3) Fabricate the unit quenching resistor (111) on the upper surface of the composite antireflection film (108) by means of chemical vapor deposition, ion implantation, photolithography, and etching; 4) Complete the fabrication of the isolation groove structure (105) inside the silicon epitaxial layer (104) by means of photolithography, etching, oxidation, metal filling, and chemical mechanical polishing; 5) The interlayer insulating layer (109) is fabricated on the upper surface of the composite antireflection film (108) by chemical vapor deposition, photolithography, etching, and chemical mechanical polishing; 6) The unit metal electrode (110) is fabricated on the interlayer insulating layer (109) by physical vapor deposition, photolithography, and etching; 7) The temporary bonding adhesive layer (113) is fabricated on the wafer surface by spin coating, and the temporary bonding adhesive layer (113) is bonded to the temporary bonding glass sheet (114) by temporary bonding; 8) The epitaxial wafer substrate (112) is removed by chemical mechanical thinning and wet etching; 9) The high-reflection metal layer (103) is fabricated on the lower surface of the silicon epitaxial layer (104) by electron beam evaporation; 10) The permanent bonding adhesive layer (102) is fabricated on the lower surface of the high-reflection metal layer (103) by spin coating; 11) The carrier wafer (101) is bonded to the permanent bonding adhesive layer (102) by permanent bonding; 12) The temporary bonding glass sheet (114) is removed by laser debonding; 13) The temporary bonding adhesive layer (113) is removed by cleaning with a special de-bonding solution; 14) Dicing is performed using a special dicing machine to obtain the silicon photomultiplier structure (200).
Citation Information
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Photodetector, photodetector preparation method, photodetector array and photodetection terminal
CN109659374A