Server upi link training design method, device, equipment, storage medium

Abstract

The application belongs to the technical field of UPI link training technology, and specifically provides a server UPI link training design method, device, equipment and storage medium, the method comprises the following steps: when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, setting the UPI control register, and shielding error reporting; modifying the Txeq training test according to a preset parameter; when the modified Txeq training test training is unsuccessful, adjusting the frequency to match the Txeq value to retrain the test; adjusting the width according to the training result to retrain the test; and calculating the optimal bandwidth according to the link training result. The performance can be improved, unnecessary maintenance can be reduced, or the system can be kept at the maximum bandwidth setting before maintenance, and the influence on the system is reduced.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of UPI link training, and particularly relates to a server UPI link training design method, device, equipment and storage medium. BACKGROUND

[0002] A basic input output system (BIOS) is a program fixed to a ROM (Read-Only Memory) chip on a motherboard in a computer, and is responsible for completing chip initialization, self-checking at startup, system booting and the like of the whole system. In an Intel multi-CPU system, UPI is a connection bus between CPUs on a server platform, and is proposed starting from Purley, has higher bandwidth and stronger flexibility, and has a transmission rate of up to 24 GT / s at present, 24 lanes per bus, and communication between CPUs is performed through the bus.

[0003] With the increase of the rate and the increasing complexity of the connection (a multi-path system is connected through a switching board, and UPI cables are connected between CPUs in multiple sections), the link often has problems, and the automatic link training of UPI hardware often fails or runs at a low speed (2.5 GT). Since UPI does not have the related retrain hardware function by default like PICE, UPI link retraining is generally realized by modifying the speed and signal parameters and then restarting, and the success rate of UPI link training is relatively low, and the system is greatly affected.

[0004] Therefore, in view of the above defects in the prior art, it is necessary to provide a server UPI link training design method, device, equipment and storage medium. SUMMARY

[0005] With the increase of the rate and the increasing complexity of the connection (a multi-path system is connected through a switching board, and UPI cables are connected between CPUs in multiple sections), the link often has problems, and the automatic link training of UPI hardware often fails or runs at a low speed (2.5 GT). Since UPI does not have the related retrain hardware function by default like PICE, UPI link retraining is generally realized by modifying the speed and signal parameters and then restarting, and the success rate of UPI link training is relatively low, and the system is greatly affected. The application provides a server UPI link training design method, device, equipment and storage medium.

[0006] In a first aspect, the technical scheme of the application provides a server UPI link training design method, which comprises the following steps:

[0007] When the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, the UPI control register is set to mask error reporting;

[0008] Modifying the Txeq training test according to preset parameters;

[0009] When the Txeq training test training is unsuccessful, adjust the frequency to match the Txeq value and retrain the test;

[0010] Adjusting the width according to the training result and retraining the test;

[0011] According to the link training result, the optimal bandwidth is calculated.

[0012] As a further limitation of the technical scheme of the present application, the step of modifying the Txeq training test according to preset parameters includes:

[0013] Read the preset parameters in the BIOS, set Txeq, and retrain the link;

[0014] Determine whether the link training is successful;

[0015] If yes, exit, otherwise, perform the step of adjusting the frequency to match the Txeq value and retraining the test.

[0016] As a further limitation of the technical scheme of the present application, the step of adjusting the frequency to match the Txeq value and retraining the test includes:

[0017] Adjust the UPI clock to achieve rate adjustment;

[0018] Re-train the rate through the port and match the Txeq value for retraining;

[0019] Record the training result.

[0020] As a further limitation of the technical scheme of the present application, the step of adjusting the width according to the training result and retraining the test includes:

[0021] According to the training result, query the status of each lan;

[0022] Disable the faulty lan through the Lan control register, match the Txeq value and each rate for retraining;

[0023] Record the training result.

[0024] As a further limitation of the technical scheme of the present application, the step of calculating the optimal bandwidth according to the link training result includes:

[0025] According to the link training result, the maximum bandwidth is calculated in the parameter setting of successful training;

[0026] The calculated maximum bandwidth is set as the optimal bandwidth for link training.

[0027] As a further limitation of the technical solution of the application, according to the link training result, in the parameter setting in which the training is successful, the step of calculating the maximum bandwidth comprises:

[0028] Analyzing the link training result;

[0029] Selecting the parameter setting in which the training is successful;

[0030] In the parameter setting in which the training is successful, the product of the rate and the width is calculated;

[0031] According to the calculation result, the maximum bandwidth is selected as the optimal bandwidth.

[0032] As a further limitation of the technical solution of the application, the step of setting the calculated maximum bandwidth as the optimal bandwidth for link training comprises:

[0033] According to the parameter value of the setting corresponding to the calculated maximum bandwidth, the target data path is configured, and the UPI control register is set to report errors.

[0034] In a second aspect, the technical solution of the application further provides a server UPI link training design device, which comprises a UPI control register setting module, a modification setting module, a first adjustment setting module, a second adjustment setting module, and an optimal calculation module.

[0035] The UPI control register setting module is used to set the UPI control register to shield error reporting when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller.

[0036] The modification setting module is used to modify the Txeq training test according to the preset parameters.

[0037] The first adjustment setting module is used to adjust the frequency to match the Txeq value for retraining test when the modified Txeq training test fails.

[0038] The second adjustment setting module is used to adjust the width for retraining test according to the training result.

[0039] The optimal calculation module is used to calculate the optimal bandwidth according to the link training result.

[0040] As a further limitation of the technical solution of the application, the modification setting module comprises a setting training unit and a judgment unit.

[0041] The setting training unit is used to read the preset parameters in the BIOS, set the Txeq, and retrain the link.

[0042] determining unit for determining whether the link training is successful; if yes, exiting, otherwise triggering the first adjustment setting module to adjust the frequency matching Txeq value to retrain the test.

[0043] As a further limitation of the technical scheme of the application, the first adjustment setting module comprises a first adjustment unit, a first training unit and a first recording unit.

[0044] The first adjustment unit is used to adjust the rate by adjusting the UPI clock.

[0045] The first training unit is used to retrain by matching the rate of port retraining with the Txeq value.

[0046] The first recording unit is used to record the training results.

[0047] As a further limitation of the technical scheme of the application, the second adjustment setting module comprises a state query unit, a register setting unit, a second training unit and a second recording unit.

[0048] The state query unit is used to query the state of each lan according to the training results.

[0049] The register setting unit is used to disable the faulty lan through the Lan control register.

[0050] The second training unit is used to retrain by matching the Txeq value and each rate.

[0051] The second recording unit is used to record the training results.

[0052] As a further limitation of the technical scheme of the application, the optimal calculation module comprises a processing calculation unit and an optimal setting unit.

[0053] The processing calculation unit is used to calculate the maximum bandwidth in the parameter setting of successful training according to the link training results.

[0054] The optimal setting unit is used to set the calculated maximum bandwidth as the optimal bandwidth for link training.

[0055] As a further limitation of the technical scheme of the application, the processing calculation unit comprises an analysis submodule, a selection submodule, a calculation submodule and an optimal output submodule.

[0056] The analysis submodule is used to analyze the link training results.

[0057] The selection submodule is used to select the parameter setting of successful training.

[0058] The calculation submodule is used to calculate the product of the rate and the width in the parameter setting of successful training.

[0059] An optimal output sub-module is configured to select the maximum bandwidth as the optimal bandwidth according to the calculation result.

[0060] As a further limitation of the technical scheme of the application, the optimal setting unit is specifically configured to configure the target data path according to the set parameter value corresponding to the maximum bandwidth calculated, and set a UPI control register to report an error.

[0061] In a third aspect, the technical scheme of the application further provides an electronic device, which comprises:

[0062] at least one processor; and

[0063] a memory in communication connection with the at least one processor; wherein

[0064] The memory stores computer program instructions executable by the at least one processor, and the computer program instructions are executed by the at least one processor to enable the at least one processor to execute the server UPI link training design method according to the first aspect.

[0065] In a fourth aspect, the technical scheme of the application further provides a non-transitory computer readable storage medium, which stores computer instructions, and the computer instructions enable the computer to execute the server UPI link training design method according to the first aspect.

[0066] As can be seen from the above technical scheme, the application has the following advantages: different parameters are modified through BIOS to control UPI link training, and when the link is unstable or damaged, the maximum bandwidth setting is selected from the combination of signal parameters, rate and width, instead of being adopted once successful, which can improve performance, reduce unnecessary maintenance or keep the system at the maximum bandwidth setting before maintenance, and reduce the impact on the system.

[0067] In addition, the design principle of the application is reliable, the structure is simple, and the application prospect is very wide.

[0068] Therefore, compared with the prior art, the application has outstanding substantial characteristics and significant progress, and the beneficial effects of its implementation are also obvious. BRIEF DESCRIPTION OF DRAWINGS

[0069] In order to more clearly illustrate the technical scheme in the embodiments of the application or the prior art, the drawings needed in the embodiment or prior art description will be briefly introduced as follows, and obviously, other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0070] Figure 1 is a schematic flow chart of a method of one embodiment of the present application.

[0071] Figure 2 is a schematic block diagram of an apparatus of one embodiment of the present application. DETAILED DESCRIPTION

[0072] With the rate of promotion and connection more and more complex (multi-system through the exchange board, CPU multi-section UPI cable connection), the link often goes wrong, and the UPI hardware automatic link training often fails or runs at low speed (2.5GT). Since UPI does not provide the hardware function of retraining by default like PICE, UPI link retraining is generally realized by modifying the speed and signal parameters and then restarting. The UPI link training success rate is relatively low, and the system is greatly affected. UPI supports Slow Speed and Fast Speed modes. When starting, it will be configured into SlowSpeed mode for basic initialization, and then cut back to Fast Speed mode for Full speed link training. Once the training fails, the UPI Port will be closed. UPI hardware does not provide a retrain scheme like the PCIE specification. According to the characteristics of UPI, by controlling the PLL frequency, lan disable, Error Mask, etc., a UPI link repair method is realized without restarting, improving the UPI link training success rate and ensuring the maximum bandwidth. In order for those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0073] As shown in Figure 1 , the embodiment of the present application provides a server UPI link training design method, which comprises the following steps:

[0074] Step 1: When the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, set the UPI control register to mask error reporting;

[0075] Step 2: Modify the Txeq training test according to the preset parameters;

[0076] Step 3: When the Txeq training test training is unsuccessful, adjust the frequency matching Txeq value to retrain the test;

[0077] Step 4: Adjust the width according to the training result to retrain the test;

[0078] Step 5: Calculate the optimal bandwidth according to the link training result.

[0079] The embodiment of the application provides a server UPI link training design method, comprising the following steps:

[0080] Step 1: When the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, set the UPI control register to mask error reporting;

[0081] Step 2: Modify the Txeq training test according to the preset parameter;

[0082] In this step, the preset parameter in the BIOS is read, Txeq is set, and link training is reperformed; whether the link training is successful is judged; if yes, the step is exited, otherwise, the step of adjusting the frequency matching Txeq value to retrain the test is executed.

[0083] Step 3: When the Txeq training test training is unsuccessful, adjust the frequency matching Txeq value to retrain the test;

[0084] Step 4: Adjust the width according to the training result to retrain the test;

[0085] Step 5: Calculate the optimal bandwidth according to the link training result.

[0086] The embodiment of the application provides a server UPI link training design method, comprising the following steps:

[0087] Step 1: When the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, set the UPI control register to mask error reporting;

[0088] Step 2: Modify the Txeq training test according to the preset parameter;

[0089] In this step, the preset parameter in the BIOS is read, Txeq is set, and link training is reperformed; whether the link training is successful is judged; if yes, the step is exited, otherwise, the step of adjusting the frequency matching Txeq value to retrain the test is executed.

[0090] Step 3: When the Txeq training test training is unsuccessful, adjust the frequency matching Txeq value to retrain the test;

[0091] In this step, the rate is adjusted by adjusting the UPI clock, and the rate of port retraining is retrained with the Txeq value.

[0092] Step 4: Adjust the width retraining test according to the training result.

[0093] In this step, according to the training result, the state of each lan is queried, and the faulty lan is disabled through the Lan control register, and is retrained with the Txeq value and each rate; the training result is recorded.

[0094] Step 5: Calculate the optimal bandwidth according to the link training result.

[0095] In this step, specifically comprising: according to the training result, the state of each lan is queried, and the faulty lan is disabled through the Lan control register, and is retrained with the Txeq value and each rate; the training result is recorded.

[0096] The embodiment of the application provides a server UPI link training design method, comprising the following steps:

[0097] Step 1: When the BIOS detects that the training result is not running at the highest frequency by reading the state register of the UPI controller, set the UPI control register to mask the error report;

[0098] Step 2: Modify the Txeq training test according to the preset parameter.

[0099] In this step, the preset parameter in the BIOS is read, the Txeq is set, and the link training is re-performed; whether the link training is successful is judged; if yes, the step is exited, otherwise, the step of adjusting the frequency and retraining the test with the Txeq value is executed.

[0100] Step 3: When the Txeq training test is not successful, adjust the frequency and retrain the test with the Txeq value.

[0101] In this step, the rate is adjusted by adjusting the UPI clock, and the rate of port retraining is retrained with the Txeq value.

[0102] Step 4: Adjust the width retraining test according to the training result.

[0103] In this step, according to the training result, the state of each lan is queried, and the faulty lan is disabled through the Lan control register, and is retrained with the Txeq value and each rate; the training result is recorded.

[0104] Step 5: Calculate the optimal bandwidth according to the link training result.

[0105] In this step, specifically includes: according to the training results, query each lan state; through the Lan control register will disable the fault of the lan, with Txeq value and each rate retraining; record the training results. According to the link training results, the step of calculating the optimal bandwidth includes: according to the link training results, in the training success parameter setting, calculate the maximum bandwidth; the calculated maximum bandwidth as the optimal bandwidth for link training setting.

[0106] According to the link training results, in the training success parameter setting, the step of calculating the maximum bandwidth includes: analyzing the link training results; select the training success parameter setting; in the training success parameter setting, calculate the product of the rate and the width; according to the calculation result, select the maximum bandwidth as the optimal bandwidth. According to the parameter value corresponding to the calculated maximum bandwidth, the target data path is configured, and the UPI control register is set, and the error report is restored.

[0107] UPI supports Slow Speed and Fast Speed mode, when the machine is started, it will be configured as Slow Speed mode basic initialization first, and then cut back to Fast Speed mode, and full speed link training is carried out. Once the training fails, the UPI port will be closed. UPI hardware does not provide retraining scheme like PCIE specification, according to the characteristics of UPI, by controlling the PLL frequency, lan disable, error mask, by controlling these functions, without restarting, a method of UPI link repair is realized. Specifically, when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, the following operations will be performed:

[0108] 1) First, set the UPI error control register to mask the error report.

[0109] 2) Modify txeq training according to the preset parameters: read several groups of parameters in the BIOS, set txeq, and retrain the link. If there is a success, exit, otherwise, go to the next step.

[0110] 3) Adjust the frequency training: adjust the UPI clock, PLL frequency

[0111] (PIPE_CLK_RATE_CTRL), realize the adjustment of the rate, and retrain the rate of the port, retrain with txeq value, and record the results.

[0112] 4) Adjust the width test: Based on the training results, query the status of each LAN, disable the faulty LAN through the LAN control register, retrain with Txeq value and each rate, and record the results.

[0113] 5) Optimal setting selection: Based on the previous link training results, in the successful parameter settings, calculate the maximum bandwidth according to the rate * width, and use it as the optimal solution.

[0114] like Figure 2 As shown, this embodiment of the invention also provides a server UPI link training design device, including a UPI control register setting module, a modification setting module, a first adjustment setting module, a second adjustment setting module, and an optimal calculation module;

[0115] The UPI control register setting module is used to set the UPI control register and suppress error reporting when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller.

[0116] The settings module can be modified to adjust Txeq training and testing based on preset parameters.

[0117] The first adjustment settings module is used to adjust the frequency in combination with the Txeq value to retrain and test when training and testing fail after modifying Txeq.

[0118] The second adjustment settings module is used to adjust the width and retrain / test based on the training results;

[0119] The optimal calculation module is used to calculate the optimal bandwidth based on the link training results.

[0120] This invention also provides a server UPI link training design device, including a UPI control register setting module, a modification setting module, a first adjustment setting module, a second adjustment setting module, and an optimal calculation module;

[0121] The UPI control register setting module is used to set the UPI control register and suppress error reporting when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller.

[0122] The modification settings module is used to modify Txeq training and testing according to preset parameters. The modification settings module includes a training setting unit and a judgment unit. The training setting unit is used to read the preset parameters in the BIOS, set Txeq, and retrain the link. The judgment unit is used to determine whether the link training is successful. If it is, it exits; otherwise, it triggers the first setting adjustment module to adjust the frequency and Txeq value and retrain and test.

[0123] The first adjustment setting module is configured to adjust the frequency matching Txeq value for retraining test when the Txeq training test training is unsuccessful.

[0124] The first adjustment setting module comprises a first adjustment unit, a first training unit and a first recording unit. The first adjustment unit is configured to adjust the rate by adjusting the UPI clock. The first training unit is configured to retrain by matching the Txeq value with the retrained rate of the port. The first recording unit is configured to record the training result.

[0125] The second adjustment setting module is configured to adjust the width for retraining test according to the training result.

[0126] The second adjustment setting module comprises a state query unit, a register setting unit, a second training unit and a second recording unit. The state query unit is configured to query the state of each lan according to the training result. The register setting unit is configured to disable the faulty lan by the Lan control register. The second training unit is configured to retrain by matching the Txeq value and each rate. The second recording unit is configured to record the training result.

[0127] The optimal calculation module is configured to calculate the optimal bandwidth according to the link training result.

[0128] The optimal calculation module comprises a processing calculation unit and an optimal setting unit.

[0129] The processing calculation unit is configured to calculate the maximum bandwidth in the parameter setting of the successful training according to the link training result. The optimal setting unit is configured to set the calculated maximum bandwidth as the optimal bandwidth for link training.

[0130] The processing calculation unit comprises an analysis submodule, a selection submodule, a calculation submodule and an optimal output submodule. The analysis submodule is configured to analyze the link training result. The selection submodule is configured to select the parameter setting of the successful training. The calculation submodule is configured to calculate the product of the rate and the width in the parameter setting of the successful training. The optimal output submodule is configured to select the maximum bandwidth as the optimal bandwidth according to the calculation result.

[0131] The optimal setting unit is specifically configured to configure the target data path according to the parameter value corresponding to the calculated maximum bandwidth.

[0132] The electronic device includes a processor, a communication interface, a memory and a bus, wherein the processor, the communication interface and the memory communicate with each other through the bus. The bus can be used for information transmission between the electronic device and the sensor. The processor can call the logical instructions in the memory to execute the following method: step 1: when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, set the UPI control register and mask the error report; step 2: modify the Txeq training test according to the preset parameters; step 3: when the Txeq training test training is unsuccessful, adjust the frequency matching Txeq value to retrain the test; step 4: adjust the width according to the training result to retrain the test; and step 5: calculate the optimal bandwidth according to the link training result.

[0133] In addition, the logical instructions in the memory described above can be implemented in the form of a software function unit and sold or used as an independent product, and can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application or the part of the prior art that essentially contributes or the part of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the steps of the method described in the various embodiments of the present application. The foregoing storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk and various program code storage media.

[0134] The embodiment of the present application provides a kind of non-transient computer readable storage medium, which stores computer instruction, the computer instruction makes computer execute the method provided by the method embodiment described above, for example, it includes: step 1: when BIOS detects that the training result is not running at the highest frequency by reading the status register of UPI controller, set UPI control register, mask error report;Step 2: modify Txeq training test according to preset parameter;Specifically including: reading the preset parameter in BIOS, setting Txeq, re-link training;Judge whether link training is successful;If yes, exit, otherwise, execute step: adjust frequency matching Txeq value retraining test.Step 3: when modifying Txeq training test training is not successful, adjust frequency matching Txeq value retraining test;Specifically including: the rate is adjusted by adjusting UPI clock;Through the rate of port retraining, match Txeq value retraining;Record training result.Step 4: adjust width retraining test according to training result;Specifically including: according to training result, query the state of each lan;Through Lan control register, disable the faulty lan, match Txeq value and each rate retraining;Record training result.Step 5: calculate optimal bandwidth according to link training result;Specifically including: according to training result, query the state of each lan;Through Lan control register, disable the faulty lan, match Txeq value and each rate retraining;Record training result.

[0135] Although the present application is described in detail with reference to the accompanying drawings and in conjunction with the preferred embodiments, the present application is not limited thereto. Without departing from the spirit and essence of the present application, those skilled in the art can make various equivalent modifications or replacements to the embodiments of the present application, and these modifications or replacements shall be within the scope of the present application. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or replacements, which shall be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A server UPI link training design method, characterized in that, The method comprises the following steps: When the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller, set the UPI control register to mask error reporting; According to the preset parameters, modify the Txeq training test; When the Txeq training test is not successful, adjust the frequency and the Txeq value to retrain the test; According to the training result, adjust the width to retrain the test; According to the link training result, calculate the optimal bandwidth; The step of modifying the Txeq training test according to the preset parameters comprises: Read the preset parameters in the BIOS, set the Txeq, and retrain the link; Determine whether the link training is successful; If yes, exit, otherwise, execute the step of adjusting the frequency and the Txeq value to retrain the test; The step of adjusting the frequency and the Txeq value to retrain the test comprises: Adjust the UPI clock to realize the adjustment of the rate; Retrain the rate through the port and the Txeq value; Record the training result; The step of adjusting the width to retrain the test according to the training result comprises: According to the training result, query the state of each lan; Disable the faulty lan through the lan control register, retrain the Txeq value and each rate; Record the training result; The step of calculating the optimal bandwidth according to the link training result comprises: According to the link training result, calculate the maximum bandwidth in the parameter setting of successful training; Set the calculated maximum bandwidth as the optimal bandwidth for link training.

2. The server UPI link training design method of claim 1, wherein, The step of calculating the maximum bandwidth according to the link training result in the parameter setting of successful training comprises: Analyze the link training result; Select the parameter setting of successful training; Calculate the product of the rate and the width in the parameter setting of successful training; According to the calculation result, select the maximum bandwidth as the optimal bandwidth.

3. The server UPI link training design method of claim 2, wherein, The step of setting the link training according to the calculated maximum bandwidth as the optimal bandwidth comprises: According to the parameter value corresponding to the calculated maximum bandwidth, configure the target data path, and set the UPI control register to restore error reporting.

4. A server UPI link training design apparatus, characterized by, The method comprises a UPI control register setting module, a modification setting module, a first adjustment setting module, a second adjustment setting module, and an optimal calculation module; The UPI control register setting module is configured to set the UPI control register to mask error reporting when the BIOS detects that the training result is not running at the highest frequency by reading the status register of the UPI controller; The modification setting module is configured to modify the Txeq training test according to the preset parameters; The first adjustment setting module is configured to adjust the frequency and the Txeq value to retrain the test when the Txeq training test is not successful; The second adjustment setting module is configured to adjust the width to retrain the test according to the training result; The optimal calculation module is configured to calculate the optimal bandwidth according to the link training result; The step of modifying the Txeq training test according to the preset parameters comprises: Read the preset parameters in the BIOS, set the Txeq, and retrain the link; Determine whether the link training is successful; If yes, exit, otherwise, execute the step of adjusting the frequency and the Txeq value to retrain the test; The steps of adjusting the frequency and retraining the Txeq value include: Adjusting the rate by adjusting the UPI clock; Re-training the rate by port re-training, and matching the Txeq value for re-training; Recording the training result; The steps of adjusting the width and retraining the test according to the training result include: According to the training result, querying the state of each lan; Disabling the faulty lan through the Lan control register, matching the Txeq value and re-training each rate; Recording the training result; The steps of calculating the optimal bandwidth according to the link training result include: According to the link training result, calculating the maximum bandwidth in the parameter setting of successful training; Setting the calculated maximum bandwidth as the optimal bandwidth for link training.

5. An electronic device, comprising: The electronic device includes: At least one processor; and A memory connected in communication with the at least one processor; wherein The memory stores computer program instructions executable by the at least one processor, and the computer program instructions are executed by the at least one processor to enable the at least one processor to perform the server UPI link training design method according to any one of claims 1 to 3.

6. A non-transitory computer-readable storage medium, comprising, The non-transitory computer readable storage medium stores computer instructions, and the computer instructions enable the computer to perform the server UPI link training design method according to any one of claims 1 to 3.

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