Dc-dc converter and control method, control device, and converter therefor

Abstract

The present disclosure provides a DCDC converter and a control method, a control device and a converter thereof. In the control method, a method of gradually changing duty ratio combined with phase shift is used to reduce the impact current of the resonant capacitor during the starting process of the DCDC converter.

Description

Technical Field

[0001] This disclosure belongs to the field of DC-DC converter technology, specifically relating to a DC-DC converter and its control method, control device, and converter. Background Technology

[0002] This section is intended to provide background or context for the embodiments set forth in the claims. The description herein is not an admission that it is prior art simply because it is included in this section.

[0003] LLC resonators can be used in DC-DC converter circuits. Under steady-state conditions, the DC voltage across the resonant capacitor is half the power supply voltage. However, during the startup phase of the DC-DC converter, the inrush current across the resonant capacitor is excessive. Summary of the Invention

[0004] This disclosure provides a DC-DC converter and its control method, control device, and converter.

[0005] This disclosure adopts the following technical solution: a control method for a DC-DC converter, wherein the circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first voltage-dividing capacitor and the second voltage-dividing capacitor are connected in series across the two ends of a DC power supply. The first switching element, the second switching element, the third switching element, and the fourth switching element are sequentially connected in series across the two ends of the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage-dividing capacitor and the second voltage-dividing capacitor is short-circuited to the connection node of the second switching element and the third switching element. The resonant cavity is connected between the connection node of the first switching element and the second switching element, and between the connection node of the third switching element and the fourth switching element. The primary side of the transformer obtains energy from the resonant cavity, and the secondary side of the transformer is connected to the rectifier circuit. The control method includes:

[0006] A first continuous pulse signal is provided to the gate of the first switching element, a second continuous pulse signal is provided to the gate of the second switching element, a third continuous pulse signal is provided to the gate of the third switching element, and a fourth continuous pulse signal is provided to the gate of the fourth switching element. The time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are equal and fixed.

[0007] In the first stage, the effective time periods of the first continuous pulse signal and the third continuous pulse signal are the same, the effective time periods of the second continuous pulse signal and the fourth continuous pulse signal are the same, the phase difference between the first continuous pulse signal and the second continuous pulse signal is 180°, and the time proportions of the effective time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal and the fourth continuous pulse signal remain equal and monotonically increase to nearly 50% with time.

[0008] In the second stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The timing of the first and second continuous pulse signals remains unchanged. The starting edge of the effective time of the third and fourth continuous pulse signals is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time of the third and fourth continuous pulse signals remains equal.

[0009] In the third stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The effective time periods of the first continuous pulse signal and the fourth continuous pulse signal are kept the same. The effective time periods of the second continuous pulse signal and the third continuous pulse signal are kept the same. The starting edge of the effective time period of the first continuous pulse signal and the starting edge of the effective time period of the second continuous pulse signal are kept half a time period apart.

[0010] In some embodiments, the rectifier circuit includes a plurality of switching elements, and the control method further includes:

[0011] During the first and second stages, the rectifier circuit is kept in an open-circuit state;

[0012] In the third stage, the rectifier circuit is kept in a rectifier state.

[0013] In some embodiments, the rectifier circuit includes: a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element; a first end of the secondary side of the transformer is connected to a first pole of the fifth switching element and a first pole of the second switching element; a second end of the secondary side of the transformer is connected to a first pole of the seventh switching element and a first pole of the eighth switching element; a second pole of the fifth switching element is connected to a second pole of the seventh switching element; and a second pole of the sixth switching element is connected to a second pole of the eighth switching element; the control method further includes:

[0014] In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element, a sixth continuous pulse signal is provided to the gate of the sixth switching element, a seventh continuous pulse signal is provided to the gate of the seventh switching element, and an eighth continuous pulse signal is provided to the gate of the eighth switching element. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal.

[0015] The effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

[0016] In some embodiments, at least one of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, the sixth switching element, the seventh switching element, and the eighth switching element is a metal-oxide-semiconductor field-effect transistor, a transistor, an integrated gate-commutated thyristor, a thyristor, an emitter turn-off thyristor, a gate-turn-off thyristor, or a gate-commutated thyristor.

[0017] This disclosure adopts the following technical solution: a control device for a DC-DC converter, wherein the circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first voltage-dividing capacitor and the second voltage-dividing capacitor are connected in series across the two ends of a DC power supply. The first switching element, the second switching element, the third switching element, and the fourth switching element are sequentially connected in series across the two ends of the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage-dividing capacitor and the second voltage-dividing capacitor is short-circuited to the connection node of the second switching element and the third switching element. The resonant cavity is connected between the connection node of the first switching element and the second switching element, and between the connection node of the third switching element and the fourth switching element. The primary side of the transformer obtains energy from the resonant cavity, and the secondary side of the transformer is connected to the rectifier circuit. The control device is configured as follows:

[0018] A first continuous pulse signal is provided to the gate of the first switching element, a second continuous pulse signal is provided to the gate of the second switching element, a third continuous pulse signal is provided to the gate of the third switching element, and a fourth continuous pulse signal is provided to the gate of the fourth switching element. The time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are equal and fixed.

[0019] In the first stage, the effective time periods of the first continuous pulse signal and the third continuous pulse signal are the same, the effective time periods of the second continuous pulse signal and the fourth continuous pulse signal are the same, the phase difference between the first continuous pulse signal and the second continuous pulse signal is 180°, and the time proportions of the effective time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal and the fourth continuous pulse signal remain equal and monotonically increase to nearly 50% with time.

[0020] In the second stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The timing of the first and second continuous pulse signals remains unchanged. The starting edge of the effective time of the third and fourth continuous pulse signals is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time of the third and fourth continuous pulse signals remains equal.

[0021] In the third stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The effective time periods of the first continuous pulse signal and the fourth continuous pulse signal are kept the same. The effective time periods of the second continuous pulse signal and the third continuous pulse signal are kept the same. The starting edge of the effective time period of the first continuous pulse signal and the starting edge of the effective time period of the second continuous pulse signal are kept half a time period apart.

[0022] In some embodiments, the rectifier circuit includes a plurality of switching elements, and the control device is further configured to:

[0023] In the first and second stages, control signals are provided to the plurality of switching elements to keep the rectifier circuit in an open-circuit state;

[0024] In the third stage, control signals are provided to the plurality of switching elements to keep the rectifier circuit in a rectifier state.

[0025] In some embodiments, the rectifier circuit includes: a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element; a first end of the secondary side of the transformer is connected to a first pole of the fifth switching element and a first pole of the second switching element; a second end of the secondary side of the transformer is connected to a first pole of the seventh switching element and a first pole of the eighth switching element; a second pole of the fifth switching element is connected to a second pole of the seventh switching element; and a second pole of the sixth switching element is connected to a second pole of the eighth switching element; the control device is further configured to:

[0026] In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element, a sixth continuous pulse signal is provided to the gate of the sixth switching element, a seventh continuous pulse signal is provided to the gate of the seventh switching element, and an eighth continuous pulse signal is provided to the gate of the eighth switching element. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal.

[0027] The effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

[0028] In some embodiments, at least one of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, the sixth switching element, the seventh switching element, and the eighth switching element is a metal-oxide-semiconductor field-effect transistor, a transistor, an integrated gate-commutated thyristor, a thyristor, an emitter turn-off thyristor, a gate-turn-off thyristor, or a gate-commutated thyristor.

[0029] This disclosure adopts the following technical solution: a DC-DC converter, the circuit topology of which includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first voltage-dividing capacitor and the second voltage-dividing capacitor are connected in series across the two ends of a DC power supply. The first switching element, the second switching element, the third switching element, and the fourth switching element are sequentially connected in series across the two ends of the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage-dividing capacitor and the second voltage-dividing capacitor is short-circuited to the connection node of the second switching element and the third switching element. The resonant cavity is connected between the connection node of the first switching element and the second switching element, and between the connection node of the third switching element and the fourth switching element. The primary side of the transformer is connected in parallel with the magnetizing inductor, and the secondary side of the transformer is connected to the rectifier circuit. The DC-DC converter also includes the aforementioned control device.

[0030] The present disclosure adopts the following technical solution: a converter, including the aforementioned DC-DC converter. Attached Figure Description

[0031] Figure 1 This is the circuit topology of the DC-DC converter provided in the embodiments of this disclosure.

[0032] Figure 2 This is a flowchart of the control method for a DC-DC converter provided in an embodiment of this disclosure.

[0033] Figures 3a to 3c These are signal waveform diagrams of different stages of the control method for the DC-DC converter provided in the embodiments of this disclosure.

[0034] Figure 4 This is a signal waveform diagram of a control method for a DC-DC converter provided in another embodiment of this disclosure.

[0035] The components are labeled as follows: Q1, first switching element; Q2, second switching element; Q3, third switching element; Q4, fourth switching element; S1, fifth switching element; S2, sixth switching element; S3, seventh switching element; S4, eighth switching element; Cr, resonant capacitor; Lk, resonant inductor; Lm, magnetizing inductor; T, transformer; C1, first voltage divider capacitor; C2, second voltage divider capacitor; C3, load capacitor; R, load resistor; Vin, power supply voltage. Detailed Implementation

[0036] The present disclosure will be further described below with reference to the embodiments shown in the accompanying drawings.

[0037] Figure 1This is the circuit topology of the DC-DC converter provided in the embodiments of this disclosure.

[0038] refer to Figure 1 The circuit topology of the DC-DC converter includes: a first voltage divider capacitor C1, a second voltage divider capacitor C2, a first switching element Q1, a second switching element Q2, a third switching element Q3, a fourth switching element Q4, a resonant capacitor Cr, a resonant inductor Lk, a magnetizing inductor Lm, a transformer T, and a rectifier circuit.

[0039] The first voltage divider capacitor C1 and the second voltage divider capacitor C2 are connected in series across the DC power supply Vin. The first switching element Q1, the second switching element Q2, the third switching element Q3 and the fourth switching element Q4 are connected in series across the DC power supply. The first switching element Q1 is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage divider capacitor C1 and the second voltage divider capacitor C2 is short-circuited to the connection node of the second switching element Q2 and the third switching element Q3.

[0040] The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are, for example, metal-oxide-semiconductor field-effect transistors, transistors, integrated gate-commutated thyristors, thyristors, transmitter turn-off thyristors, gate-turn-off thyristors, or gate-commutated thyristors, etc.

[0041] In the embodiments of this disclosure, the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are all N-type metal-oxide-semiconductor field-effect transistors. The source and drain terminals of the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are connected in series.

[0042] The first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 are connected in series between the positive and negative terminals of the DC power supply. The connection point of the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 is short-circuited to the connection point of the second switching element Q2 and the third switching element Q3.

[0043] The two ends of the resonant capacitor Cr are connected to the connection node of the first switching element Q1 and the second switching element Q2, and the first end of the resonant inductor Lk, respectively. The second end of the resonant inductor Lk is connected to the first end of the magnetizing inductor Lm. The second end of the magnetizing inductor Lm is connected to the connection node of the third switching element Q3 and the fourth switching element Q4. The primary side of the transformer T is connected in parallel with the magnetizing inductor Lm, and the secondary side of the transformer T is connected to the rectifier circuit.

[0044] The resonant capacitor Cr, resonant inductor Lk, and magnetizing inductor Lm constitute the LLC resonant cavity. In some embodiments, the resonant capacitor Cr of the LLC resonant cavity is short-circuited to the negative terminal of the DC power supply Vin. In other embodiments, the resonant cavity has other circuit configurations.

[0045] Figure 1 The load capacitor C3 and the load resistor R represent the load of this DC-DC converter.

[0046] In some embodiments, the output of the rectifier circuit is also connected to a regulated voltage to further stabilize the output voltage of the DC-DC converter.

[0047] Figure 1 In the circuit topology of the DC-DC converter shown, the rectifier circuit includes: a fifth switching element S1, a sixth switching element S2, a seventh switching element S3, and an eighth switching element S4. The first end of the secondary side of the transformer T is connected to the first pole of the fifth switching element S1 and the first pole of the second switching element Q2. The second end of the secondary side of the transformer T is connected to the first pole of the seventh switching element S3 and the first pole of the eighth switching element S4. The second pole of the fifth switching element S1 is connected to the second pole of the seventh switching element S3, and the second pole of the sixth switching element S2 is connected to the second pole of the eighth switching element S4.

[0048] Figure 1 The diagram also shows diodes connected in parallel between the first and second terminals of each switching element.

[0049] In other embodiments, the rectifier circuit may also be other circuit forms, such as a diode rectifier bridge. This disclosure does not impose any special limitations on the structure of the rectifier circuit.

[0050] Figure 2 This is a flowchart of the control method for a DC-DC converter provided in an embodiment of this disclosure.

[0051] In this control method, a first continuous pulse signal is provided to the gate of the first switching element Q1, a second continuous pulse signal is provided to the gate of the second switching element Q2, a third continuous pulse signal is provided to the gate of the third switching element Q3, and a fourth continuous pulse signal is provided to the gate of the fourth switching element Q4. The time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are equal and fixed.

[0052] During the effective period of each continuous pulse signal, the corresponding switching element is turned on.

[0053] exist Figure 1 In the circuit topology shown, since the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are all NMOS transistors, the duration of the high-level voltage of the first, second, third, and fourth continuous pulse signals is their respective effective period. The rising edge of each continuous pulse signal is the starting edge of its effective period.

[0054] In other embodiments, the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are all PMOS transistors, and the duration of the low-level voltage of the first, second, third, and fourth continuous pulse signals is their respective effective period. The falling edge of each continuous pulse signal is the start edge of its effective period.

[0055] Figures 3a to 3c These are signal waveform diagrams of different stages of the control method for the DC-DC converter provided in the embodiments of this disclosure.

[0056] In the accompanying diagrams, "pulse" represents the gate voltage of the corresponding switching element. "Q1 transistor V..." DS "The source-drain voltage of Q1, the first switching element of the NMOS transistor." L m "Current" represents the current in the magnetizing inductor Lm. The horizontal axis in each attached figure represents time.

[0057] refer to Figure 3a In the first stage, the effective time periods of the first and third continuous pulse signals are the same, the effective time periods of the second and fourth continuous pulse signals are the same, the phase difference between the first and second continuous pulse signals is 180°, and the time proportions of the effective time periods of the first, second, third, and fourth continuous pulse signals remain equal and monotonically increase to nearly 50% with time.

[0058] In order to reserve dead time for the first switching element Q1, the second switching element Q2, the third switching element Q3 and the fourth switching element, the effective time proportion of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal and the fourth continuous pulse signal should be slightly less than 50%.

[0059] In one embodiment of this disclosure, the power supply voltage Vin can be selected between 500V and 1000V, the rated output voltage is 700V, the transformer T has a turns ratio of 1:2, and the switching frequency is 200kHz. One time period is 50µs, and the dead time can be set to 1µs to 2µs depending on the characteristics of the switching element. If an NMOS transistor is selected as the switching element, the effective duration of the first, second, third, and fourth continuous pulse signals should be less than 23µs to 24µs, slightly shorter than 25µs (for a 50% time percentage).

[0060] In the first stage, the resonant capacitor Cr is actually charged by the voltage across the first voltage divider capacitor C1 or the voltage across the second voltage divider capacitor C2. The inrush current of the resonant capacitor Cr is relatively small.

[0061] refer to Figure 3b In the second stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The timing of the first and second continuous pulse signals remains unchanged. The starting edge of the effective time of the third and fourth continuous pulse signals is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time of the third and fourth continuous pulse signals remains equal.

[0062] During this stage, the time during which the second switching element Q2 and the third switching element Q3 are simultaneously turned on continuously increases, as does the time during which the first switching element Q1 and the fourth switching element are simultaneously turned on. The second stage ends when the LLC resonant cavity is operating stably. The charging process of the resonant capacitor Cr is a gradual process, and the inrush current of the resonant capacitor Cr is relatively small.

[0063] In the first and second stages, the DC-DC converter has not yet reached a stable operating state, and the rectifier circuit can be kept in an open circuit state.

[0064] Figure 1 In the circuit topology shown, the rectifier circuit includes: a fifth switching element S1, a sixth switching element S2, a seventh switching element S3, and an eighth switching element S4. The first terminal of the secondary side of transformer T is connected to the first terminal of the fifth switching element S1 and the first terminal of the second switching element Q2. The second terminal of the secondary side of transformer T is connected to the first terminals of the seventh switching element S3 and the eighth switching element S4. The second terminal of the fifth switching element S1 is connected to the second terminal of the seventh switching element S3, and the second terminal of the sixth switching element S2 is connected to the second terminal of the eighth switching element S4. The fifth switching element S1, the sixth switching element S2, the seventh switching element S3, and the eighth switching element S4 are all NMOS transistors, providing a continuous low-level voltage to their gates in the first and second stages.

[0065] refer to Figure 3c In the third stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The effective time periods of the first and fourth continuous pulse signals are kept the same. The effective time periods of the second and third continuous pulse signals are kept the same. The starting edge of the effective time period of the first continuous pulse signal is kept half a time period different from the starting edge of the effective time period of the second continuous pulse signal.

[0066] The third stage is the stable operating state of the DC-DC converter.

[0067] Figure 4 This is a signal waveform diagram of a control method for a DC-DC converter provided in another embodiment of this disclosure.

[0068] In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element S1, a sixth continuous pulse signal is provided to the gate of the sixth switching element S2, a seventh continuous pulse signal is provided to the gate of the seventh switching element S3, and an eighth continuous pulse signal is provided to the gate of the eighth switching element S4. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal and close to 50%.

[0069] Among them, the effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the same preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

[0070] In this embodiment, during the short-circuit boost period on the secondary side of transformer T, the voltage gain is increased, thereby reducing the frequency variation range of LLC.

[0071] Based on the same inventive concept as the foregoing embodiments, the present disclosure also provides a control device for a DC-DC converter. The circuit topology of the DC-DC converter includes: a first voltage divider capacitor C1, a second voltage divider capacitor C2, a first switching element Q1, a second switching element Q2, a third switching element Q3, a fourth switching element Q4, a resonant cavity, a transformer T, and a rectifier circuit. The first voltage divider capacitor C1 and the second voltage divider capacitor C2 are connected in series across the DC power supply Vin. The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are connected in series across the DC power supply. The first switching element Q1 is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage divider capacitor C1 and the second voltage divider capacitor C2 is short-circuited to the connection node of the second switching element Q2 and the third switching element Q3. The resonant cavity is connected between the connection node of the first switching element Q1 and the second switching element Q2, and the connection node of the third switching element Q3 and the fourth switching element Q4. The primary side of the transformer T obtains energy from the resonant cavity, and the secondary side of the transformer T is connected to the rectifier circuit.

[0072] The control device is configured to provide a first continuous pulse signal to the gate of the first switching element Q1, a second continuous pulse signal to the gate of the second switching element Q2, a third continuous pulse signal to the gate of the third switching element Q3, and a fourth continuous pulse signal to the gate of the fourth switching element Q4, wherein the time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal and the fourth continuous pulse signal are equal and fixed.

[0073] In the first stage, the effective time periods of the first and third continuous pulse signals are the same, the effective time periods of the second and fourth continuous pulse signals are the same, the phase difference between the first and second continuous pulse signals is 180°, and the time proportions of the effective time periods of the first, second, third, and fourth continuous pulse signals remain equal and monotonically increase to nearly 50% over time.

[0074] In the second stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The timing of the first and second continuous pulse signals remains unchanged. The starting edge of the effective time of the third and fourth continuous pulse signals is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time of the third and fourth continuous pulse signals remains equal.

[0075] In the third stage, the effective time proportions of the first, second, third, and fourth continuous pulse signals are kept equal and close to 50%. The effective time periods of the first and fourth continuous pulse signals are kept the same. The effective time periods of the second and third continuous pulse signals are kept the same. The starting edge of the effective time period of the first continuous pulse is kept half a time period different from the starting edge of the effective time period of the second continuous pulse.

[0076] In some embodiments, the rectifier circuit includes a plurality of switching elements, and the control device is further configured to:

[0077] In the first and second stages, control signals are provided to multiple switching elements to keep the rectifier circuit in an open-circuit state.

[0078] In the third stage, control signals are provided to multiple switching elements to keep the rectifier circuit in a rectifier state.

[0079] In some embodiments, the rectifier circuit includes: a fifth switching element S1, a sixth switching element S2, a seventh switching element S3, and an eighth switching element S4; a first end of the secondary side of transformer T is connected to the first terminal of the fifth switching element S1 and the first terminal of the second switching element S2; a second end of the secondary side of transformer T is connected to the first terminal of the seventh switching element S3 and the first terminal of the eighth switching element S4; a second terminal of the fifth switching element S1 is connected to the second terminal of the seventh switching element S3; and a second terminal of the sixth switching element S2 is connected to the second terminal of the eighth switching element S4. The control device is further configured to:

[0080] In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element S1, a sixth continuous pulse signal is provided to the gate of the sixth switching element S2, a seventh continuous pulse signal is provided to the gate of the seventh switching element S3, and an eighth continuous pulse signal is provided to the gate of the eighth switching element S4. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal and close to 50%.

[0081] Among them, the effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the same preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

[0082] In some embodiments, at least one of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element S1, the sixth switching element S2, the seventh switching element S3, and the eighth switching element S4 is a metal-oxide-semiconductor field-effect transistor, a transistor, an integrated gate-commutated thyristor, a thyristor, an emitter turn-off thyristor, a gate-turn-off thyristor, or a gate-commutated thyristor.

[0083] It should be noted that any known digital circuit, microprocessor unit, central processing unit, or other circuit configuration can be used to output the control signals described in the foregoing embodiments. This disclosure does not limit the specific circuit configuration of the control device.

[0084] For example, in some embodiments, when it is necessary to output a continuous pulse with a time percentage close to 50%, a continuous time pulse with a time percentage of 50% is first generated, and then the falling edge of the continuous time pulse (taking continuous pulse control of NMOS device as an example) is appropriately shifted forward to leave dead time.

[0085] Based on the same inventive concept, embodiments of this disclosure also provide a DC-DC converter. The circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor C1, a second voltage-dividing capacitor C2, a first switching element Q1, a second switching element Q2, a third switching element Q3, a fourth switching element Q4, a resonant cavity, a transformer T, and a rectifier circuit. The first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 are connected in series across the DC power supply Vin. The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are sequentially connected in series across the DC power supply. The first switching element Q1 is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 is short-circuited to the connection node of the second switching element Q2 and the third switching element Q3. The resonant cavity is connected between the connection nodes of the first switching element Q1 and the second switching element Q2, and between the connection nodes of the third switching element Q3 and the fourth switching element Q4. The primary side of the transformer T obtains energy from the resonant cavity, and the secondary side of the transformer T is connected to the rectifier circuit. The DC-DC converter also includes the aforementioned control device.

[0086] Based on the same inventive concept, embodiments of this disclosure also provide a converter, including the aforementioned DC-DC converter.

[0087] The various embodiments in this disclosure are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0088] The scope of protection of this disclosure is not limited to the embodiments described above. Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its scope and spirit. If such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, then the intent of this disclosure also includes such modifications and variations.

Claims

1. A control method for a DC-DC converter, characterized in that, The circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first and second voltage-dividing capacitors are connected in series across the DC power supply. The first, second, third, and fourth switching elements are sequentially connected in series across the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first and second voltage-dividing capacitors is short-circuited to the connection node of the second and third switching elements. The resonant cavity is connected between the connection nodes of the first and second switching elements and the connection nodes of the third and fourth switching elements. The primary side of the transformer obtains energy from the resonant cavity, and the secondary side of the transformer is connected to the rectifier circuit. The control method includes: A first continuous pulse signal is provided to the gate of the first switching element, a second continuous pulse signal is provided to the gate of the second switching element, a third continuous pulse signal is provided to the gate of the third switching element, and a fourth continuous pulse signal is provided to the gate of the fourth switching element. The time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are equal and fixed. In the first stage, the effective time periods of the first and third continuous pulse signals are the same, the effective time periods of the second and fourth continuous pulse signals are the same, the phase difference between the first and second continuous pulse signals is 180°, and the time proportions of the effective time periods of the first, second, third, and fourth continuous pulse signals remain equal and monotonically increase with time to nearly 50%. In the second stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The timing of the first continuous pulse signal and the second continuous pulse signal remains unchanged. The starting edge of the effective time period of the third continuous pulse signal and the fourth continuous pulse signal is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time period of the third continuous pulse signal and the fourth continuous pulse signal remains equal. In the third stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The effective time periods of the first continuous pulse signal and the fourth continuous pulse signal are kept the same. The effective time periods of the second continuous pulse signal and the third continuous pulse signal are kept the same. The starting edge of the effective time period of the first continuous pulse signal and the starting edge of the effective time period of the second continuous pulse signal are kept half a time period apart.

2. The control method according to claim 1, characterized in that, The rectifier circuit includes multiple switching elements, and the control method further includes: During the first and second stages, the rectifier circuit is kept in an open-circuit state; In the third stage, the rectifier circuit is kept in a rectifier state.

3. The control method according to claim 2, characterized in that, The rectifier circuit includes a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element. The first end of the secondary side of the transformer is connected to the first pole of the fifth switching element and the first pole of the second switching element. The second end of the secondary side of the transformer is connected to the first pole of the seventh switching element and the first pole of the eighth switching element. The second pole of the fifth switching element is connected to the second pole of the seventh switching element, and the second pole of the sixth switching element is connected to the second pole of the eighth switching element. The control method further includes: In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element, a sixth continuous pulse signal is provided to the gate of the sixth switching element, a seventh continuous pulse signal is provided to the gate of the seventh switching element, and an eighth continuous pulse signal is provided to the gate of the eighth switching element. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal. The effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

4. The control method according to claim 3, characterized in that, At least one of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, the sixth switching element, the seventh switching element, and the eighth switching element is a metal-oxide-semiconductor field-effect transistor, a triode, or a thyristor.

5. A control device for a DC-DC converter, characterized in that, The circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first and second voltage-dividing capacitors are connected in series across the DC power supply. The first, second, third, and fourth switching elements are sequentially connected in series across the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first and second voltage-dividing capacitors is short-circuited to the connection node of the second and third switching elements. The resonant cavity is connected between the connection nodes of the first and second switching elements and the connection nodes of the third and fourth switching elements. The primary side of the transformer obtains energy from the resonant cavity, and the secondary side of the transformer is connected to the rectifier circuit. The control device is configured as follows: A first continuous pulse signal is provided to the gate of the first switching element, a second continuous pulse signal is provided to the gate of the second switching element, a third continuous pulse signal is provided to the gate of the third switching element, and a fourth continuous pulse signal is provided to the gate of the fourth switching element. The time periods of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are equal and fixed. In the first stage, the effective time periods of the first and third continuous pulse signals are the same, the effective time periods of the second and fourth continuous pulse signals are the same, the phase difference between the first and second continuous pulse signals is 180°, and the time proportions of the effective time periods of the first, second, third, and fourth continuous pulse signals remain equal and monotonically increase with time to nearly 50%. In the second stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The timing of the first continuous pulse signal and the second continuous pulse signal remains unchanged. The starting edge of the effective time period of the third continuous pulse signal and the fourth continuous pulse signal is monotonically delayed over time until it is delayed by half a time period. The delay amplitude of the starting transition edge of the effective time period of the third continuous pulse signal and the fourth continuous pulse signal remains equal. In the third stage, the effective time proportions of the first continuous pulse signal, the second continuous pulse signal, the third continuous pulse signal, and the fourth continuous pulse signal are kept equal and close to 50%. The effective time periods of the first continuous pulse signal and the fourth continuous pulse signal are kept the same. The effective time periods of the second continuous pulse signal and the third continuous pulse signal are kept the same. The starting edge of the effective time period of the first continuous pulse signal and the starting edge of the effective time period of the second continuous pulse signal are kept half a time period apart.

6. The control device according to claim 5, characterized in that, The rectifier circuit includes multiple switching elements, and the control device is further used for: In the first and second stages, control signals are provided to the plurality of switching elements to keep the rectifier circuit in an open-circuit state; In the third stage, control signals are provided to the plurality of switching elements to keep the rectifier circuit in a rectifier state.

7. The control device according to claim 6, characterized in that, The rectifier circuit includes a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element. The first end of the secondary side of the transformer is connected to the first pole of the fifth switching element and the first pole of the second switching element. The second end of the secondary side of the transformer is connected to the first pole of the seventh switching element and the first pole of the eighth switching element. The second pole of the fifth switching element is connected to the second pole of the seventh switching element, and the second pole of the sixth switching element is connected to the second pole of the eighth switching element. The control device is further used for: In the third stage, a fifth continuous pulse signal is provided to the gate of the fifth switching element, a sixth continuous pulse signal is provided to the gate of the sixth switching element, a seventh continuous pulse signal is provided to the gate of the seventh switching element, and an eighth continuous pulse signal is provided to the gate of the eighth switching element. The time periods of the fifth, sixth, seventh, and eighth continuous pulse signals are equal to those of the first continuous pulse signal, and the time proportions of the effective time periods are equal. The effective period of the seventh continuous pulse signal is the same as that of the third continuous pulse signal, the effective period of the eighth continuous pulse signal is the same as that of the fourth continuous pulse signal, the starting edge of the effective period of the fifth continuous pulse signal is delayed by a preset time relative to the starting edge of the effective period of the first continuous pulse signal, and the starting edge of the effective period of the sixth continuous pulse signal is delayed by the preset time relative to the starting edge of the effective period of the second continuous pulse signal. The preset time is less than the duration of the effective period of the seventh continuous pulse signal.

8. The control device according to claim 7, characterized in that, At least one of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, the sixth switching element, the seventh switching element, and the eighth switching element is a metal-oxide-semiconductor field-effect transistor, a triode, or a thyristor.

9. A DC-DC converter, characterized in that, The circuit topology of the DC-DC converter includes: a first voltage-dividing capacitor, a second voltage-dividing capacitor, a first switching element, a second switching element, a third switching element, a fourth switching element, a resonant cavity, a transformer, and a rectifier circuit. The first voltage-dividing capacitor and the second voltage-dividing capacitor are connected in series across the two ends of a DC power supply. The first switching element, the second switching element, the third switching element, and the fourth switching element are sequentially connected in series across the two ends of the DC power supply. The first switching element is short-circuited to the positive terminal of the DC power supply. The connection node of the first voltage-dividing capacitor and the second voltage-dividing capacitor is short-circuited to the connection node of the second switching element and the third switching element. The resonant cavity is connected between the connection nodes of the first and second switching elements and the connection nodes of the third and fourth switching elements. The primary side of the transformer obtains energy from the resonant cavity, and the secondary side of the transformer is connected to the rectifier circuit. The DC-DC converter also includes a control device according to any one of claims 5 to 8.

10. A converter, characterized in that, Includes the DC-DC converter according to claim 9.

Images