Interface Circuit and Method for Normalizing 28V / Open Discrete Output or Input
By designing an interface circuit with a normalized 28V/on discrete output or input, the interface configuration and reliability are achieved using components such as controllers and power switch tubes, the problem of traditional interfaces cannot be reused is solved, the product versatility and safety is improved, and it is suitable for power control of airborne electromechanical systems.
Patent Information
- Application Number
- CN202211320281.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-26
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2042-10-26
AI Technical Summary
The traditional 28V/on discrete output and input interfaces are independent of each other when designed in the aircraft onboard system, resulting in the inability to reuse the product, poor versatility, low interface utilization, high maintenance costs, and does not meet the requirements of the new generation of aircraft for adaptive and reuse reconstruction.
A 28V/on discrete output or input normalization interface circuit is designed, using a controller, discrete input unit, comparison unit, D/A conversion unit and power switch tube, and the interface is configurable and reliable through current conversion and logic control, which is suitable for power control of onboard electromechanical systems.
It realizes the universality and utilization of interfaces, supports interface multiplexing and reconstruction, improves product reliability and safety, and meets the needs of the new generation of aircraft for adaptive and multiplexing reconstruction.
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Figure CN115765718B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of airborne computer interfaces, and particularly relates to an interface circuit and method for normalizing 28V / open discrete quantity output or input. Background Art
[0002] Aircraft airborne systems usually include a large number of 28V / open discrete quantity output interfaces and 28V / open discrete quantity input interfaces, which are used for output driving of relays, contactors, and solenoid valves, or acquisition and precise control of sensor states. With the development of mechatronics integration, this type of interface is integrated into the core important components of the mechatronics control and management system, such as the remote interface unit or the mechatronics management computer. The traditional 28V / open discrete quantity output interface and 28V / open discrete quantity input interface are implemented by different dedicated circuits, and they are functionally independent of each other. When designing, a large number of external connector pins need to be configured as signal outputs or inputs. When the product needs to be reused on different aircraft, the requirements for the number of 28V / open discrete quantity output interfaces and 28V / open discrete quantity input interfaces on different aircraft are different, resulting in the inability to reuse the product, and it is necessary to re-perform functional design and interface definition. The product has poor versatility, low interface utilization rate, complex types, high maintenance costs, long design cycles, is not convenient for product standardization and pedigree planning, and does not meet the requirements of the new generation of aircraft for the adaptability, homogeneity, and reuse and reconstruction of the remote interface unit or the mechatronics management computer interface. Summary of the Invention
[0003] In view of this, the present invention provides an interface circuit for normalizing 28V / open discrete quantity output or input, which reduces the types of interfaces inside the remote interface unit or the mechatronics management computer, improves the versatility and interface utilization rate of the product, and realizes the reuse, reconstruction, and high-reliability output and input of the 28V / open discrete quantity output or input interface.
[0004] Provided is an interface circuit for normalizing 28V / open discrete quantity output or input, which is applicable to power control of high-open discrete quantity output or input in an airborne mechatronics system. It is characterized by including a controller, a first discrete quantity input unit, a second discrete quantity input unit, a comparison unit, a D / A conversion unit, a power switch tube Q1, and a power switch tube Q2, wherein:
[0005] After the output current of the airborne electromechanical system is converted into voltage by the current conversion unit, it is transmitted to the comparison unit; the output end of the current conversion unit is connected to the power switch tubes Q1 and Q2 with mutually exclusive conduction control logics, where: the power switch tube Q1 is a P-channel MOSFET, and the power switch tube Q2 is an N-channel MOSFET; the drain of the power switch tube Q1 is connected to the drain of the power switch tube Q2, and the source of the power switch tube Q2 is connected to the aircraft interface. For example, the load serves as the airborne interface and is connected with a lightning protection unit; the respective gates of the power switch tubes Q1 and Q2 are connected to the controller through the first drive unit and the second drive unit;
[0006] The first discrete quantity input unit collects the drain voltage of the power switch tube Q1 and feeds it back to the controller;
[0007] The second discrete quantity input unit collects the source voltage of the power switch tube Q2 and feeds it back to the controller;
[0008] The comparison unit is used to compare the outputs of the current conversion unit and the D / A conversion unit, and input the comparison result into the controller. The D / A conversion unit is used to receive the control instruction of the controller and convert it into voltage.
[0009] The technical beneficial effects of the present invention:
[0010] The interface circuit can be configured as an output circuit or an input circuit; when inputting, it is collected in real time through the first discrete quantity input unit and the second discrete quantity input unit to improve reliability. When outputting, the parameters of current protection can be configured through the power switch tubes Q1 and Q2, the comparison unit, and the D / A conversion unit to improve safety. Description of the Drawings
[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required to be used in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0012] Figure 1 It is a functional block diagram of a 28V / open discrete quantity output or input normalization;
[0013] Figure 2 It is a flowchart of a 28V / open discrete quantity output or input normalization method;
[0014] Figure 3 It is a logic control block diagram of a 28V / open discrete quantity input. Detailed Embodiments
[0015] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
[0016] The following specific examples illustrate the implementation manners of the present disclosure. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. The present disclosure can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present disclosure without creative efforts belong to the scope of protection of the present disclosure.
[0017] It should be noted that the following describes various aspects of the embodiments within the scope of the appended claims. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on the present disclosure, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. Additionally, this device and / or this method can be implemented using other structures and / or functionality in addition to one or more of the aspects described herein.
[0018] As Figure 1 shown, the 28V / open discrete output or input normalization interface circuit is applicable to the power control of high-open discrete output or input in an airborne electromechanical system. It includes a controller, a first discrete input unit, a second discrete input unit, a comparison unit, a D / A conversion unit, a power switch tube Q1, and a power switch tube Q2. The power switch tube Q2 is respectively connected to the power switch tube Q1, a second drive unit, a second discrete input unit, and a lightning protection unit. The input “+” terminal of the comparison unit is connected to the output of the D / A conversion unit, the input “-” terminal of the comparison unit is connected to the output of the D / A conversion unit, and the output of the comparison unit is connected to the FPGA controller, where:
[0019] After the output current of the airborne electromechanical system is converted into voltage by the current conversion unit, it is transmitted to the comparison unit; the output end of the current conversion unit is connected to the power switch tubes Q1 and Q2 with mutually exclusive conduction control logics. Among them: the power switch tube Q1 is a P-channel MOSFET, and the power switch tube Q2 is an N-channel MOSFET; the drain of the power switch tube Q1 is connected to the drain of the power switch tube Q2, and the source of the power switch tube Q2 is connected to the aircraft interface. For example, the load serves as the airborne interface and is connected with a lightning protection unit; the gates of the power switch tubes Q1 and Q2 are respectively connected to the controller through the first drive unit and the second drive unit;
[0020] The first discrete quantity input unit collects the drain voltage of the power switch tube Q1 and feeds it back to the controller;
[0021] The second discrete quantity input unit collects the source voltage of the power switch tube Q2 and feeds it back to the controller;
[0022] The comparison unit is used to compare the outputs of the current conversion unit and the D / A conversion unit, and input the comparison result into the controller. The D / A conversion unit is used to receive the control instruction of the controller and convert it into voltage. The purpose is: for example, when it is 28V / on, this interface circuit can be configured as an output circuit or an input circuit; when inputting, it is collected in real time through the first discrete quantity input unit and the second discrete quantity input unit to improve reliability. When outputting, the current protection parameters can be configured through the power switch tubes Q1 and Q2, the comparison unit, and the D / A conversion unit to improve safety. When a certain tube has a through-fault, it can be reliably turned off through the other tube. Specifically:
[0023] The D / A conversion unit realizes the setting of the overcurrent protection current value;
[0024] The comparison unit realizes the real-time comparison of the output of the D / A conversion unit and the output result of the current conversion unit;
[0025] The current conversion unit converts the power current signal into a voltage signal;
[0026] The first drive unit realizes the on or off of the power switch tube Q1;
[0027] The first discrete quantity input unit collects the output state of the power switch tube Q1;
[0028] The second drive unit realizes the on or off of the power switch tube Q2;
[0029] The second discrete quantity input unit collects the output state of the power switch tube Q2;
[0030] The lightning protection unit is used for interface protection.
[0031] As a specific implementation method provided in this case, it can be applied to 28V / open, 36V / open, 24V / open multi-voltage level power output. It reduces the types of internal interfaces of remote interface units or electromechanical management computers, improves the versatility and interface utilization of products, and realizes the multiplexing, reconstruction and high-reliability output and input of 28V / open discrete output or input interfaces.
[0032] The second is a discrete output or input normalization interface method, such as Figure 2 As shown, using part or all of the above interface circuits is suitable for power control of an onboard electromechanical system, where the bus voltage of the electromechanical system is 28V. The control includes an FPGA controller and a CPU processor, which includes:
[0033] The interface is configured as a 28V / open discrete output interface, or the interface is configured as a 28V / open discrete input interface. The interface can be repeatedly configured and time-shared during the same power-on period. Specifically:
[0034] 1. The method of configuring the interface as a 28V / open discrete output interface includes:
[0035] Configure the output to 28V and output on. The steps for outputting 28V include:
[0036] Step 1: The CPU processor configures the signals of the first drive unit and the second drive unit to be in the "on" state through the FPGA controller. The CPU processor collects the states of the first discrete input unit and the second discrete input unit through the FPGA controller. If the collected results are both in the "on" state, step 2 is executed. Otherwise, the drive signals of the first drive unit and the second drive unit are locked to the "on" state at the same time, and a 28V / open discrete output interface fault is reported.
[0037] Step 2: The CPU processor configures the driving signal of the first driving unit to be in the "28V" state through the FPGA controller. The CPU processor collects the state of the first discrete input unit through the FPGA controller and finds that it is in the "28V" state, and then executes step 3. Otherwise, the driving signals of the first driving unit and the second driving unit are locked to the "open" state at the same time, and a 28V / open discrete output interface fault is reported.
[0038] Step 3: The CPU processor configures the driving signal of the second driving unit to the "28V" state through the FPGA controller. The FPGA controller collects the status of the second discrete input unit as the "28V" state and executes step 3. Otherwise, the driving signals of the first driving unit and the second driving unit are locked to the "open" state at the same time, and a 28V / open discrete output interface fault is reported.
[0039] Furthermore, the steps for outputting "on" are as follows:
[0040] Step 1: The CPU processor configures the drive signal of the second drive unit to the "on" state through the FPGA controller. The CPU processor collects the state of the second discrete input unit as the "on" state through the FPGA controller. Otherwise, lock the drive signals of the first drive unit and the second drive unit to the "on" state and report a discrete output interface fault.
[0041] Step 2: The CPU processor configures the drive signal of the first drive unit to "on" through the FPGA controller. The CPU processor collects the state of the first discrete input unit as the "on" state through the FPGA controller. Otherwise, lock the drive signals of the first drive unit and the second drive unit to the "on" state and report a discrete output interface fault.
[0042] II. Method for 28V / on output current protection:
[0043] Configure the trip threshold: When the interface is configured for 28V / on discrete output, the CPU processor configures the output voltage of the D / A conversion unit through the FPGA controller and configures the current amplitude threshold for overcurrent protection of the 28V / on discrete output interface.
[0044] Configure the trip time: When the interface is configured for 28V / on discrete output: The CPU processor configures the sustainable time for overcurrent protection of the 28V / on discrete output interface through the FPGA controller. The FPGA controller accumulates the duration of the high-level output of the comparator. The FPGA controller sets the trip state by comparing the sustainable time configured by the CPU processor and the accumulated duration in real time.
[0045] Configure the trip strategy: When the interface has a trip state, perform three clearing trip retry operations. When the clearing trip fails continuously three times, lock the trip state, lock the drive signals of the first drive unit and the second drive unit to the "on" state, and report a discrete output interface fault.
[0046] III. Figure 3 The following shows a logic control block diagram for 28V / on discrete input. The configuration steps are as follows: The controller is configured with data register 1, data register 2, and a redundant register:
[0047] Step 1: The controller simultaneously places the acquisition results of the first discrete input unit and the second discrete input unit into data register 1 and data register 2.
[0048] Step 2: The controller compares the results of data register 1 and data register 2 bit by bit.
[0049] Step 3: When the results of the same bit in data register 1 and data register 2 are the same after comparison by the controller, store the result in the redundant register. Otherwise, issue a "FAULT" signal.
[0050] The overall realization of current configurability maximizes the availability of the interface, and the dual-channel comparison improves the reliability of the interface.
[0051] The above is only the specific implementation manner of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present disclosure should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims
1. A 28V / open discrete output or input normalization interface method, applicable to the power control of an airborne electromechanical system, where the bus voltage of the electromechanical system is 28V, characterized in that, It includes an interface circuit, which is applicable to power outputs with voltage levels of 28V / on or 36V / on or 24V / on. The interface circuit includes a controller, a first discrete input unit, a second discrete input unit, a comparison unit, a D / A conversion unit, a power switch Q1, and a power switch Q2. Among them, after the output current of the airborne electromechanical system is converted into voltage by a current conversion unit, it is delivered to the comparison unit; the output end of the current conversion unit is connected to the power switches Q1 and Q2 with mutually exclusive conduction control logics. Among them, the power switch Q1 is a P-channel MOSFET, and the power switch Q2 is an N-channel MOSFET; the drain of the power switch Q1 is connected to the drain of the power switch Q2, the source of the power switch Q2 is connected to the aircraft interface, the load serves as the airborne interface, and a lightning protection unit is connected; the respective gates of the power switch Q1 and the power switch Q2 are connected to the controller through a first driving unit and a second driving unit; the first discrete input unit collects the drain voltage of the power switch Q1 and feeds it back to the controller; the second discrete input unit collects the source voltage of the power switch Q2 and feeds it back to the controller; the comparison unit is used to compare the outputs of the current conversion unit and the D / A conversion unit, and input the comparison result into the controller. The D / A conversion unit is used to receive the control instruction of the controller and convert it into voltage. The controller is an FPGA controller, and the FPGA controller is communicatively connected to a CPU processor. The interface method includes, The interface is configured as a 28V / on discrete output interface, or, the interface is configured as a 28V / on discrete input interface. During the same power-on period, the interface is repeatedly configured and time-division multiplexed. Among them, The method for configuring the interface as a 28V / on discrete output interface includes configuring to output 28V and output on. The steps for outputting 28V include, Step 1: The CPU processor configures the signals of the first driving unit and the second driving unit to the "on" state through the FPGA controller. The CPU processor collects the states of the first discrete input unit and the second discrete input unit through the FPGA controller. If the collection results are both in the "on" state, execute Step 2. Otherwise, execute locking the driving signals of the first driving unit and the second driving unit to the "on" state simultaneously, and report a 28V / on discrete output interface fault; Step 2: The CPU processor configures the driving signal of the first driving unit to the "28V" state through the FPGA controller. The CPU processor collects the state of the first discrete input unit as the "28V" state through the FPGA controller. Execute Step 3. Otherwise, execute locking the driving signals of the first driving unit and the second driving unit to the "on" state simultaneously, and report a 28V / on discrete output interface fault; Step 3: The CPU processor configures the drive signal of the second drive unit to the "28V" state through the FPGA controller. The FPGA controller collects the state of the second discrete quantity input unit as the "28V" state. Otherwise, execute the operation of locking the drive signals of the first drive unit and the second drive unit to the "on" state, and report a 28V / on discrete quantity output interface fault; The steps for outputting "on" are as follows. Step 1: The CPU processor configures the drive signal of the second drive unit to the "on" state through the FPGA controller. The CPU processor collects the state of the second discrete quantity input unit as the "on" state through the FPGA controller. Otherwise, lock the drive signals of the first drive unit and the second drive unit to the "on" state, and report a discrete quantity output interface fault; Step 2: The CPU processor configures the drive signal of the first drive unit to "on" through the FPGA controller. The CPU processor collects the state of the first discrete quantity input unit as the "on" state through the FPGA controller. Otherwise, lock the drive signals of the first drive unit and the second drive unit to the "on" state, and report a discrete quantity output interface fault.
2. The interface method according to claim 1, wherein It also includes a method for 28V / on output current protection: Configure the trip threshold: When the interface is configured as a 28V / on discrete quantity output, the CPU processor configures the output voltage of the D / A conversion unit through the FPGA controller, and configures the current amplitude threshold for overcurrent protection of the 28V / on discrete quantity output interface; Configure the trip time: When the interface is configured as a 28V / on discrete quantity output, the CPU processor configures the sustainable time for overcurrent protection of the 28V / on discrete quantity output interface through the FPGA controller. The FPGA controller accumulates the duration of the comparator outputting a high level. The FPGA controller sets the trip state by comparing the sustainable time configured by the CPU processor and the accumulated duration collected in real time; Configure the trip strategy: When the interface has a trip state, perform three clearing trip retry operations. When the clearing trip fails three consecutive times, lock the trip state, lock the drive signals of the first drive unit and the second drive unit to the "on" state, and report a discrete quantity output interface fault.
3. The interface method according to claim 2, wherein The controller is configured with data registers, data registers, and redundant registers. The method for configuring the interface as a 28V / on discrete quantity input interface: Step 1: The controller simultaneously places the acquisition results of the first on discrete quantity input unit and the second discrete quantity input unit into the data registers and the data registers; Step 2: The controller compares the results of the data registers and the data registers bit by bit; Step 3: When the results of the same bit of the data registers and the data registers are the same, the controller stores the results in the redundant register. Otherwise, it issues a "FAULT" signal.
Citation Information
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