A Compilation Method for ShenWei Architecture GPRL16 Relocation

Abstract

The present invention discloses a compilation method for ShenWei architecture GPRL16 relocation, including: reading a source program and analyzing the source program to determine variable symbols; judging whether the number of variable symbols is within the range threshold of GPRL16 relocation; if not reaching the range threshold of GPRL16 relocation, adaptively generating storage format instruction A and GPRL16 relocation through the result of variable symbol analysis; if reaching the range threshold of GPRL16 relocation, performing relocation expansion on variable symbols and adaptively generating storage format instruction B and GPHIGH relocation, storage format instruction C and GPLOW relocation; generating an assembly file in a compiler, inputting the assembly file into an assembler to convert it into an object file; inputting the object file into a linker to calculate the variable symbol address; filling the address offset back into the corrected position of the corresponding storage format instruction to generate an executable file or a library file; expanding the addressing range of global variables and static variables, and taking into account both functional requirements and performance requirements.

Description

Technical Field

[0001] The present invention belongs to the technical field of compilers, and particularly relates to a compilation method for GPRL16 relocation of the Shenwei architecture. Background Art

[0002] For global variables and static variables in the source program, the compiler generates corresponding relocation types according to different target machines, so as to facilitate placing them in the data segment or read-only data segment in the Executable and Linking Format (ELF). For example, the X86 processor platform generates PC32 relocation with an addressing range of ±2GB; the IBM Z processor platform generates PC32DBL relocation with an addressing range of ±2GB, and the relocations of the above two processor platforms are PC-relative addressing; while the Shenwei processor platform provides a GPRL16 relocation that addresses relative to the Global Pointer (GP), with an addressing range of ±32KB.

[0003] With the continuous enhancement of the functions of various application software in the fields of big data analysis and application, cloud platform, artificial intelligence, etc. on the Shenwei processor platform, the code logic and scale have become more complex, and the number of global variables and static variables involved in the source code has also increased accordingly. The storage space of the data segment generated by compilation is also continuously increasing. Continuing to use GPRL16 relocation with an addressing range of ±32KB can no longer meet the requirements of certain specific scenarios, and even cause related application programs to fail to correctly link to generate executable files or library files. Summary of the Invention

[0004] The purpose of the present invention is to provide a compilation method for GPRL16 relocation of the Shenwei architecture, which expands the addressing range of global variables and static variables and takes into account both functional requirements and performance requirements.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] The first aspect of the present invention provides a compilation method for GPRL16 relocation of the Shenwei architecture, including:

[0007] Read the source program and analyze the source program to determine variable symbols, and analyze the multi-dimensional relocation symbols of the variable symbols to determine the generated relocation type;

[0008] Count the number of variable symbols in the source program and analyze their types, calculate the storage space size occupied by the variable symbols in the source program, determine the address range of the variable symbols in the data segment; and judge whether the number of variable symbols is within the range threshold of GPRL16 relocation;

[0009] If the range threshold for GPRL16 relocation is not reached, adaptively generate the storage format instruction A and GPRL16 relocation based on the result of variable symbol analysis;

[0010] If the range threshold for GPRL16 relocation is reached, perform relocation expansion on the variable symbol and adaptively generate the storage format instruction B and GPHIGH relocation, and the storage format instruction C and GPLOW relocation;

[0011] Input the storage format instruction A and GPRL16 relocation into the compiler, or input the storage format instruction B and GPHIGH relocation and the storage format instruction C and GPLOW relocation into the compiler to generate an assembly file, and input the assembly file into the assembler to convert it into an object file;

[0012] Input the object file into the linker to calculate the variable symbol address; fill the address offset back into the corrected positions of the corresponding storage format instruction A, storage format instruction B, and storage format instruction C to generate an executable file or a library file.

[0013] Preferably, the method for determining the generated relocation type through multi-dimensional relocation symbol analysis of variable symbols includes:

[0014] Judge the variable symbol type in the source program to obtain the length of the variable; judge whether the variable is a global variable or a static variable, analyze the position representing the variable symbol, and determine the generated relocation type.

[0015] Preferably, the method for adaptively generating the storage format instruction A and GPRL16 relocation based on the result of variable symbol analysis if the range threshold for GPRL16 relocation is not reached includes:

[0016] Generate an intermediate representation language expression for the variable symbol and mark the operand type of the expression as LOW;

[0017] Generate the storage format instruction A with the corresponding length according to the relocation type, and judge whether the operand type and the identifier of the expression meet the conditions for generating the relative GP relocation type. If they meet, output the GPRL16 relocation.

[0018] Preferably, if the operand type and the identifier of the expression do not meet the conditions for generating the relative GP relocation type, generate the LITERAL relocation; input the storage format instruction A and the LITERAL relocation into the compiler to generate an assembly file.

[0019] Preferably, the method for performing relocation expansion on the variable symbol and adaptively generating the storage format instruction B and GPHIGH relocation, and the storage format instruction C and GPLOW relocation includes:

[0020] Generate two intermediate representation language expressions for variable symbols, and respectively mark the operand types of the expressions as HIGH and LOW;

[0021] According to the relocation type result, generate a storage format instruction B with GPHIGH relocation for the expression marked as HIGH through instruction template matching, and obtain the high 16 bits of the relative GP32-bit signed offset;

[0022] First, generate a storage format instruction C for the expression marked as LOW through instruction template matching; for the storage format instruction C marked as LOW, output GPLOW relocation to load the low 16 bits of the relative GP32-bit signed offset, and expand the offset range from ±32KB represented by signed 16 bits to ±2GB represented by signed 32 bits.

[0023] Preferably, input the target file to the linker to calculate the variable symbol address; the method of filling the address offset back into the corresponding storage format instruction B and the corrected position of the storage format instruction C to generate an executable file or a library file includes:

[0024] Input the target file to the linker to parse the global pointer, merge the variable symbols and calculate the address, and obtain the variable symbol address RX and the global pointer GP;

[0025] Calculate the relative offset between the global pointer GP and the variable address RX, and split the relative offset into a high 16-bit offset DISPH and a low 16-bit offset DIPSL;

[0026] Write the high 16-bit offset DIPSH to the correction position of the storage format instruction B marked with GPHIGH, and write the low 16-bit offset DISPL to the correction position of the storage format instruction C marked with GPLOW to generate an executable file or a library file.

[0027] The second aspect of the present invention provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the steps of the compilation method are implemented.

[0028] Compared with the prior art, the beneficial effects of the present invention:

[0029] The compilation method of the present invention for the GPRL16 relocation of the Shenwei architecture expands the addressing range of global variables or static variables from the original ±32KB to ±2GB of the GPHIGH+GPLOW combination, solves the problem of compilation errors in the fields of big data analysis and application, and cloud platforms; meets the requirements of specific scenarios of complex application programs on the Shenwei processor platform, ensures that the application program can be correctly linked to generate an executable file or a library file, and maintains the original performance, taking into account both functional requirements and performance requirements Description of the Drawings

[0030] Figure 1 It is the network structure of a compilation method for ShenWei architecture GPRL16 relocation provided by the first embodiment of the present invention. Specific implementation manner

[0031] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and cannot be used to limit the protection scope of the present invention.

[0032] Embodiment 1

[0033] As Figure 1 shown, the first aspect of the present invention provides a compilation method for ShenWei architecture GPRL16 relocation, including:

[0034] Step 1, read the source program and analyze the source program to determine variable symbols, judge the variable symbol types in the source program to obtain the lengths of the variables; judge whether the variables are global variables or static variables, analyze the positions representing the variable symbols, and determine the generated relocation types.

[0035] Step 2, perform quantity statistics and type analysis on the variable symbols in the source program, calculate the storage space size occupied by the variable symbols in the source program, determine the address range of the variable symbols in the data segment; judge whether the number of variable symbols is within the range threshold of GPRL16 relocation;

[0036] Step 3, if the range threshold of GPRL16 relocation is not reached, adaptively generate storage format instruction A and the method of GPRL16 relocation through the results of variable symbol analysis, including:

[0037] Generate an intermediate representation language expression for the variable symbol and mark the operand type of the expression as LOW;

[0038] Generate the corresponding-length storage format instruction A according to the relocation type, judge whether the operand type and the identifier of the expression meet the conditions for generating the relative GP relocation type, and if they meet, output GPRL16 relocation; the generated instruction is:

[0039] load RA,disp(GP)#GPRL16

[0040] If the operand type and the identifier of the expression do not meet the conditions for generating the relative GP relocation type, generate LITERAL relocation; it should be emphasized here that it is not limited to LITERAL relocation, and other relocations can also be generated.

[0041] Step 4, if the range threshold for GPRL16 relocation is reached, the method for relocating and expanding variable symbols and adaptively generating storage format instruction B and GPHIGH relocation, storage format instruction C and GPLOW relocation includes:

[0042] The method for relocating and expanding variable symbols and adaptively generating storage format instruction B and GPHIGH relocation, storage format instruction C and GPLOW relocation includes:

[0043] Generate two intermediate representation language expressions for the variable symbol, and mark the operand types of the expressions as HIGH and LOW respectively;

[0044] According to the relocation type result, generate storage format instruction B with GPHIGH relocation for the expression marked as HIGH through instruction template matching, and obtain the upper 16 bits of the signed offset relative to the GP32 bit;

[0045] First generate storage format instruction C for the expression marked as LOW through instruction template matching; for the storage format instruction C marked as LOW, output GPLOW relocation to load the lower 16 bits of the signed offset relative to the GP32 bit, and expand the offset range from ±32KB represented by a signed 16 bit to ±2GB represented by a signed 32 bit; the generated instruction is:

[0046]

[0047] Input the target file to the linker to calculate the variable symbol address; input storage format instruction A and GPRL16 relocation or LITERAL relocation to the compiler, or input storage format instruction B and GPHIGH relocation and storage format instruction C and GPLOW relocation to the compiler to generate an assembly file, and input the assembly file to the assembler to convert it into a target file;

[0048] Step 5, input the target file to the linker to calculate the variable symbol address; fill the address offset back into the corrected position of the corresponding storage format instruction A to generate an executable file or a library file.

[0049] Or the method for filling the address offset back into the corrected positions of the corresponding storage format instruction B and storage format instruction C to generate an executable file or a library file includes:

[0050] Input the target file to the linker to resolve the global pointer, merge the variable symbols and calculate the address to obtain the variable symbol address RX and the global pointer GP;

[0051] Calculate the relative offset between the global pointer GP and the variable address RX, and split the relative offset into the upper 16 bit offset DISPH and the lower 16 bit offset DIPSL; the expression formula is:

[0052]

[0053] Write the high 16-bit offset DIPSH to the corrected storage format instruction B identified by GPHIGH, and write the low 16-bit offset DISPL to the corrected storage format instruction C identified by GPLOW, and generate an executable file or a library file.

[0054] Example 2

[0055] An electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. The feature is that when the processor executes the program, the steps of the compilation method described in Example 1 are implemented.

[0056] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0057] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the flows and / or blocks in the flowchart and / or block diagram can also be implemented. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the specified functions in Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0058] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the specified functions in Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0059] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus, so that a series of operation steps are performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions for implementing the process Figure 1 in one process or multiple processes and / or blocks Figure 1 steps of the functions specified in one block or multiple blocks.

[0060] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A compilation method for ShenWei architecture GPRL16 relocation, characterized in that Including: Read the source program and analyze the source program to determine variable symbols, and perform multi-dimensional relocation symbol analysis on the variable symbols to determine the generated relocation type; Perform quantity statistics and type analysis on the variable symbols in the source program, calculate the storage space size occupied by the variable symbols in the source program, and determine the address range of the variable symbols in the data segment; Judge whether the number of variable symbols is within the range threshold of GPRL16 relocation; If the range threshold of GPRL16 relocation is not reached, adaptively generate storage format instruction A and GPRL16 relocation through the result of variable symbol analysis; If the range threshold of GPRL16 relocation is reached, perform relocation expansion on the variable symbols and adaptively generate storage format instruction B and GPHIGH relocation, storage format instruction C and GPLOW relocation; Input storage format instruction A and GPRL16 relocation into the compiler, or input storage format instruction B and GPHIGH relocation and storage format instruction C and GPLOW relocation into the compiler to generate an assembly file, and input the assembly file into the assembler to convert it into an object file; Input the object file into the linker to calculate the variable symbol address; Fill the address offset back into the corrected positions of the corresponding storage format instruction A, storage format instruction B, and storage format instruction C to generate an executable file or a library file.

2. A compilation method for ShenWei architecture GPRL16 relocation according to claim 1, characterized in that The method for determining the generated relocation type through multi-dimensional relocation symbol analysis of variable symbols includes: Judge the variable symbol type in the source program to obtain the length of the variable; Judge whether the variable is a global variable or a static variable, analyze the position representing the variable symbol, and determine the generated relocation type.

3. A compilation method for ShenWei architecture GPRL16 relocation according to claim 1, characterized in that, If the range threshold of GPRL16 relocation is not reached, the method for adaptively generating storage format instruction A and GPRL16 relocation through the result of variable symbol analysis includes: Generate an intermediate representation language expression for the variable symbol, and mark the operand type of the expression as LOW; Generate storage format instruction A with the corresponding length according to the relocation type, and judge whether the operand type and the identifier of the expression meet the conditions for generating the relative GP relocation type. If they meet, output GPRL16 relocation.

4. A compilation method for ShenWei architecture GPRL16 relocation according to claim 3, characterized in that, If the operand type and the identifier of the expression do not meet the conditions for generating the relative GP relocation type, generate LITERAL relocation; Input storage format instruction A and LITERAL relocation into the compiler to generate an assembly file.

5. A compilation method for ShenWei architecture GPRL16 relocation according to claim 1, characterized in that, The method for performing relocation expansion on variable symbols and adaptively generating storage format instruction B and GPHIGH relocation, storage format instruction C and GPLOW relocation includes: Generate two intermediate representation language expressions for the variable symbol, and mark the operand types of the expressions as HIGH and LOW respectively; Generate storage format instruction B with GPHIGH relocation through instruction template matching for the expression marked as HIGH according to the relocation type result, and obtain the high 16 bits of the relative GP32-bit signed offset; The expression marked as LOW is first matched through an instruction template to generate a storage format instruction C; for the storage format instruction C marked as LOW, GPLOW relocation is output, which is used to load the lower 16 bits of a relative GP32-bit signed offset, expanding the offset range from ±32KB represented by a signed 16-bit to ±2GB represented by a signed 32-bit.

6. A compilation method for ShenWei architecture GPRL16 relocation according to claim 5, characterized in that The method of inputting a target file to a linker to calculate variable symbol addresses; filling the address offset back into the corresponding storage format instruction B and the corrected position of the storage format instruction C to generate an executable file or a library file includes: Inputting a target file to a linker to resolve the global pointer, merge variable symbols, and calculate addresses to obtain a variable symbol address RX and a global pointer GP; Calculating the relative offset between the global pointer GP and the variable address RX, and splitting the relative offset into a high 16-bit offset DISPH and a low 16-bit offset DIPSL; Writing the high 16-bit offset DIPSH to the correction location of the storage format instruction B identified by GPHIGH, and writing the low 16-bit offset DISPL to the correction location of the storage format instruction C identified by GPLOW to generate an executable file or a library file.

7. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the compilation method according to any one of claims 1 to 6 are implemented.

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