Ultrasonic fingerprint identification circuit, driving method thereof and identification device

Abstract

The application discloses an ultrasonic fingerprint identification circuit and a driving method and an identification device thereof, and relates to the technical field of fingerprint identification.The ultrasonic fingerprint identification circuit comprises a first signal end, a second signal end, a driving transistor, a first compensation module, a second compensation module, an ultrasonic module, a recovery module, an integration module, a capacitor, a voltage writing module and a current writing module.The first signal end is used for receiving a first signal; the second signal end is used for receiving a second signal; the driving transistor is used for generating a driving signal; the first compensation module and the second compensation module are used for detecting and self-compensating the deviation of the threshold voltage of the driving transistor; the ultrasonic module is used for emitting an ultrasonic signal or receiving a reflected ultrasonic signal; the recovery module is used for absorbing the negative potential waveform of the reflected ultrasonic signal; the integration module is used for transmitting the positive potential waveform of the reflected ultrasonic signal to a first node; the capacitor is used for maintaining the potential of the first node; the voltage writing module is used for writing the first signal output by the first signal end to the driving transistor; and the current writing module is used for writing the second signal to a third node.The embodiments provided by the application can eliminate the influence of the threshold voltage of the driving transistor on the fingerprint identification, and improve the accuracy of the fingerprint identification.

Description

TECHNICAL FIELD

[0001] The present application relates to the fingerprint identification technical field, more particularly, to an ultrasonic fingerprint identification circuit, a driving method thereof and an identification device. BACKGROUND

[0002] The skin lines (including fingerprints) of each person are different in pattern, breakpoint and intersection, and are unique and constant for a lifetime. Using this uniqueness and stability, we create the fingerprint identification technology, that is, corresponding a person to his fingerprint. By comparing the obtained fingerprint with the pre-stored fingerprint, the true identity of the visitor is verified.

[0003] In the related art, the ultrasonic fingerprint identification technology is applied more and more widely because the ultrasonic wave has strong penetration and can identify the fingerprint even if there is water stain or dirt on the surface of the finger. Specifically, the ultrasonic fingerprint identification method uses the valley-ridge difference signal formed by the reflection of the ultrasonic wave on the finger valley and ridge to form a fingerprint image. However, in the related art, the threshold voltage of the driving transistor in the ultrasonic fingerprint identification circuit directly affects the valley-ridge difference signal. At the same time, when the threshold voltages of the driving transistors corresponding to different ultrasonic fingerprint identification circuits are different, the error range of the valley-ridge difference signal may be further expanded, affecting the fingerprint identification accuracy. SUMMARY

[0004] Therefore, the present application provides an ultrasonic fingerprint identification circuit, a driving method thereof and an identification device, aiming to eliminate the influence of the threshold voltage of the transistor on the fingerprint identification and improve the accuracy of the fingerprint identification.

[0005] In a first aspect, the present application provides an ultrasonic fingerprint identification circuit, comprising:

[0006] a first signal end and a second signal end, the first signal end being configured to receive a first signal, and the second signal end being configured to receive a second signal;

[0007] a driving transistor, a gate of the driving transistor being connected to a first node, a first pole of the driving transistor being connected to a second node, and a second pole of the driving transistor being connected to a third node, the driving transistor being configured to generate a driving signal in a signal identification stage;

[0008] a first compensation module, a control end of the first compensation module being connected to a first signal control end, a first end of the first compensation module being connected to a compensation signal end, and a second end of the first compensation module being connected to the third node;

[0009] a second compensation module, a control end of the second compensation module being connected to a second signal control end, a first end of the second compensation module being connected to the second node, and a second end of the second compensation module being connected to the first node;

[0010] The first compensation module and the second compensation module are used for detecting and self-compensating the deviation of the threshold voltage of the driving transistor in the compensation stage.

[0011] An ultrasonic module, a first end of the ultrasonic module is connected to a fourth node, the fourth node is coupled to the first node, a second end of the ultrasonic module is used for transmitting or receiving an ultrasonic signal, and the ultrasonic module is used for transmitting the ultrasonic signal in a signal transmitting stage or receiving a reflected ultrasonic signal and generating a ridge signal or a valley signal in a signal receiving stage.

[0012] A recovery module, a control end of the recovery module is connected to a third signal control end, a first end of the recovery module is connected to a third signal end, and a second end of the recovery module is connected to the fourth node, and the recovery module is used for absorbing a negative potential waveform of the reflected ultrasonic signal in the signal receiving stage.

[0013] An integration module, a control end of the integration module is connected to a fourth signal control end, a first end of the integration module is connected to the fourth node, and a second end of the integration module is connected to the first node, and the integration module is used for transmitting a positive potential waveform of the reflected ultrasonic signal to the first node in the signal receiving stage.

[0014] A capacitor, a first end of the capacitor is connected to the second end of the integration module, and a second end of the capacitor is connected to the first node, and the capacitor is used for maintaining the potential of the first node.

[0015] A voltage writing module, a control end of the voltage writing module is connected to a first switch signal control end, a first end of the voltage writing module is connected to the first signal end, and a second end of the voltage writing module is connected to the second node, and the voltage writing module is used for writing a first signal output by the first signal end to the driving transistor in a signal identification stage.

[0016] A current writing module, a control end of the current writing module is connected to a second switch signal control end, a first end of the current writing module is connected to the second signal end, and a second end of the current writing module is connected to the third node, and the current writing module is used for writing a second signal to the third node in the signal identification stage.

[0017] In a second aspect, the present application provides a driving method of an ultrasonic fingerprint identification circuit, which is used for driving the ultrasonic fingerprint identification circuit provided in the first aspect of the present application, and at least includes an initialization stage, a compensation stage, a signal transmitting stage, a signal receiving stage and a signal identification stage.

[0018] In the initialization stage: the recycling module is used as a first reset module, the first reset module is turned on, a third signal of the third signal terminal is written into a fourth node, and the fourth node is reset;

[0019] The voltage writing module is used as a second reset module, the second compensation module is used as a third reset module, the second reset module and the third reset module are turned on, a first signal of the first signal terminal is written into the first node, and the first node is reset;

[0020] In the compensation stage: the first compensation module and the second compensation module are turned on, and the first compensation module and the second compensation module compensate the threshold voltage of the driving transistor;

[0021] In the signal emission stage: the ultrasonic module emits an ultrasonic signal;

[0022] In the signal receiving stage: the ultrasonic module receives the reflected ultrasonic signal and generates a ridge signal or a valley signal; the recycling module is turned on, and a negative potential waveform of the reflected ultrasonic signal is transmitted to the third signal terminal; the integration module is turned on, and a positive potential waveform of the reflected ultrasonic signal is transmitted to the first node;

[0023] In the signal identification stage: the voltage writing module and the current writing module are turned on, the voltage writing module writes a first signal into the second node, the current writing module writes a second signal into the third node, and the fingerprint information is determined according to the voltage of the third node.

[0024] In a third aspect, the present application also provides an ultrasonic fingerprint identification device, comprising the ultrasonic fingerprint identification circuit provided in the first aspect of the present application.

[0025] Compared with the prior art, the ultrasonic fingerprint identification circuit, the driving method thereof, and the identification device provided by the present application at least have the following beneficial effects:

[0026] The embodiments provided by the present application transmit a compensation signal to the first node through the first compensation module and the second compensation module coupled with the gate of the driving transistor in the compensation stage, so that the potential of the first node reaches Vref+Vth. In the signal receiving stage, the first node receives the reflected ultrasonic signal from the ultrasonic module, and the reflected ultrasonic signal charges the first end of the capacitor, so that the potential of the first node is increased to Vref+Vth+△V. In the signal identification stage, the current writing module writes a second signal of the second signal terminal into the third node, and the second signal is a current signal. Therefore, in the signal identification stage, the current in the loop formed by the first signal terminal, the voltage writing module, the second node, the driving transistor, the third node, the current writing module, and the second signal terminal is I=k(Vref+Vth+△V-VN3 -Vth). It can be seen from the equation that the threshold voltage of the driving transistor is offset, and the fingerprint information can be determined by the potential of the third node. The embodiment provided by the present application eliminates the influence of the threshold voltage of the driving transistor on the ultrasonic fingerprint identification circuit, and improves the accuracy of fingerprint identification.

[0027] Of course, implementing any product of the present application does not necessarily require achieving all the technical effects described above at the same time.

[0028] Other features of the present application, and their advantages, will become apparent in the non-limiting detailed description of exemplary embodiments of the present application, which is presented in connection with the attached drawings. BRIEF DESCRIPTION OF DRAWINGS

[0029] The accompanying drawings incorporated in and forming a part of the specification illustrate embodiments of the present application and, together with the description, serve to explain the principles of the present application.

[0030] Figure 1 A structural schematic diagram of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0031] Figure 2 A structural schematic diagram of another ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0032] Figure 3 A circuit diagram of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0033] Figure 4 A circuit diagram of another ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0034] Figure 5 A flowchart of a driving method of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0035] Figure 6 A timing diagram of a driving method of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0036] Figure 7 A timing diagram of another driving method of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0037] Figure 8 A timing diagram of another driving method of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application;

[0038] Figure 9 A top view of an ultrasonic fingerprint identification device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0039] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. Note that the relative arrangement, numerical expressions, and numerical values of components and steps set forth in these embodiments are not limiting to the scope of the present application unless otherwise specifically stated.

[0040] The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the scope of the application its application or uses.

[0041] Techniques, methods, and apparatus known to those of ordinary skill in the relevant art can not be discussed in detail herein, but should be considered as part of the specification, where appropriate.

[0042] In all of the examples shown and discussed herein, any specific values should be interpreted as merely exemplary, and not as a limitation. Thus, other examples of exemplary embodiments can have different values.

[0043] It should be noted that like reference numerals and letters in the various figures indicate similar items, and thus, once any term is defined in one figure, it is not necessary to discuss it further in subsequent figures.

[0044] Also, the term "coupled" herein can include any direct or indirect electrical coupling. Thus, if a first device is described as being coupled to a second device, it means that the first device can be directly electrically coupled to the second device, or indirectly electrically coupled to the second device through other devices or coupling means.

[0045] Referring to Figure 1 and Figure 2 shown, wherein, Figure 1 is a structural schematic diagram of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application, Figure 2 is a structural schematic diagram of another ultrasonic fingerprint identification circuit provided by an embodiment of the present application. An ultrasonic fingerprint identification circuit 100 provided by an embodiment of the present application includes:

[0046] a first signal terminal Vdd and a second signal terminal Data, the first signal terminal Vdd being configured to receive a first signal, and the second signal terminal Data being configured to receive a second signal;

[0047] a driving transistor M0, a gate of the driving transistor M0 being connected to a first node N1, a first pole of the driving transistor M0 being connected to a second node N2, and a second pole of the driving transistor M0 being connected to a third node N3; the driving transistor M0 being configured to generate a driving signal in a signal identification stage;

[0048] The first compensation module 10 has a control end connected to the first signal control end S1, a first end connected to the compensation signal end Vref, and a second end connected to the third node N3.

[0049] The second compensation module 20 has a control end connected to the second signal control end S2, a first end connected to the second node N2, and a second end connected to the first node N1.

[0050] The first compensation module 10 and the second compensation module 20 are used together to detect and self-compensate for the deviation of the threshold voltage Vth of the driving transistor M0 in the compensation stage.

[0051] The ultrasonic module 30 has a first end connected to the fourth node N4, which is coupled to the first node N1, and a second end used for transmitting or receiving an ultrasonic signal. The ultrasonic module 30 is used to transmit an ultrasonic signal in the signal transmission stage, or receive a reflected ultrasonic signal and generate a ridge signal or a valley signal in the signal reception stage.

[0052] The recovery module 40 has a control end connected to the third signal control end S3, a first end connected to the third signal end DB, and a second end connected to the fourth node N4. The recovery module 40 is used to absorb a negative potential waveform of the reflected ultrasonic signal in the signal reception stage.

[0053] The integration module 50 has a control end connected to the fourth signal control end S4, a first end connected to the fourth node N4, and a second end connected to the first node N1. The integration module 50 is used to transmit a positive potential waveform of the reflected ultrasonic signal to the first node in the signal reception stage.

[0054] The capacitor C has a first end connected to the second end of the integration module 50 and a second end connected to the first node N1. The capacitor C is used to maintain the potential of the first node N1.

[0055] The voltage writing module 60 has a control end connected to the first switch signal control end E1, a first end connected to the first signal end Vdd, and a second end connected to the second node N2. The voltage writing module 60 is used to write the first signal output by the first signal end Vdd to the driving transistor M0 in the signal identification stage.

[0056] A current writing module 70, a control end of the current writing module 70 is connected with the second switch signal control end E2, a first end of the current writing module 70 is connected with the second signal end Data, and a second end of the current writing module 70 is connected with the third node N3; the current writing module 70 is used for writing the second signal to the third node N3 in the signal identification stage.

[0057] It should be noted that, Figure 1 and Figure 2 Only one framework structure of the ultrasonic fingerprint identification circuit 100 in the present application is shown, and in some other embodiments of the present application, the framework structure of the ultrasonic fingerprint identification circuit 100 can also be embodied as others, which is not specifically limited in the present application.

[0058] Specifically, the ultrasonic fingerprint identification circuit 100 provided by the embodiment of the present application comprises a driving transistor M0, a gate of the driving transistor M0 is connected with the first node N1, a first pole of the driving transistor M0 is connected with the second node N2, and a second pole of the driving transistor M0 is connected with the third node N3. The driving transistor M0 is used for generating a driving signal in the signal identification stage.

[0059] Referring to Figure 2 As shown in the figure, in the embodiment, a first end of the recovery module 40 is connected with the third signal end DB, and a second end of the recovery module 40 is connected with the fourth node N4. In the initialization stage, the recovery module 40 is multiplexed as a first reset module 01, the first reset module 01 is turned on, the third signal output by the third signal end DB is transmitted to the fourth node N4, and the fourth node N4 is reset. Resetting the fourth node N4 can clear the voltage remaining in the fourth node N4 in the last ultrasonic fingerprint identification process in the initialization stage, thereby improving the accuracy of the present ultrasonic fingerprint identification. In addition, in the initialization stage, the recovery module 40 is multiplexed as the first reset module 01, which can simplify the structure of the ultrasonic fingerprint identification circuit, and further simplify the overall structure of the ultrasonic fingerprint identification device.

[0060] The first end of the voltage writing module 60 is connected with the first signal end Vdd, and the second end is connected with the second node N2; the first end of the second compensation module 20 is connected with the second node N2, and the second end is connected with the first node N1. In the initialization stage, the voltage writing module 60 is multiplexed as the second reset module 02, and the second compensation module 20 is multiplexed as the third reset module 03. The second reset module 02 and the third reset module 03 are turned on, and the first signal output by the first signal end Vdd is transmitted to the first node N1 to reset the first node N1. Resetting the first node N1 can clear the voltage remaining in the first node N1 in the last ultrasonic fingerprint identification process in the initialization stage, thereby improving the accuracy of the current ultrasonic fingerprint identification. In addition, in the initialization stage T1, the voltage writing module 60 and the second compensation module 20 are multiplexed as the second reset module 02 and the third reset module 03, respectively, without the need to additionally arrange a reset circuit for the first node N1, thereby simplifying the structure of the ultrasonic fingerprint identification circuit.

[0061] Referring to Figure 1 or Figure 2 In the embodiment, the first end of the first compensation module 10 is connected with the compensation signal end Vref, and the second end is connected with the third node N3; the first end of the second compensation module 20 is connected with the second node N2, and the second end is connected with the first node N1. In the compensation stage, the first compensation module 10, the driving transistor M0 and the second compensation module 20 are turned on, and the compensation signal of the compensation signal end Vref is charged to the first node N1 through the first compensation module 10, the driving transistor M0 and the second compensation module 20. The first compensation module 10 and the second compensation module 20 can compensate for the deviation of the threshold voltage Vth of the driving transistor M0 by compensating for the first node N1 in the compensation stage, reduce the influence of the threshold voltage Vth of the driving transistor M0 on the ultrasonic fingerprint identification, and improve the accuracy of the ultrasonic fingerprint identification.

[0062] The ultrasonic module 30 emits ultrasonic signals in the signal emission stage, and receives reflected ultrasonic signals and generates ridge signals and valley signals in the signal receiving stage. It should be noted that the compensation stage at least partially coincides with the signal emission stage, and the compensation stage occurs before the signal receiving stage. The ultrasonic module 30 is an important part of the ultrasonic fingerprint identification circuit 100 and is also a window for the ultrasonic fingerprint identification device 200 to carry out human-computer interaction.

[0063] Continuing to refer to Figure 1As shown, the first end of the recovery module 40 is connected to the third signal end DB, and the second end is connected to the fourth node N4. In the signal receiving stage, the recovery module 40 is turned on when the reflected ultrasonic signal is negative, and is closed when the reflected ultrasonic signal is positive, for absorbing the negative potential waveform of the reflected ultrasonic signal. The first end of the integration module 50 is connected to the fourth node N4, and the second end is coupled to the first node N1. In the signal receiving stage, the integration module 50 is turned on when the reflected ultrasonic signal is positive, and is closed when the reflected ultrasonic signal is negative, for receiving the positive potential waveform of the reflected ultrasonic signal. By connecting the recovery module 40 and the integration module 50 at the fourth node N4 at the same time, the positive potential waveform and the negative potential waveform included in the ridge signal or the valley signal can be separated, and only the positive potential waveform in the ridge signal or the valley signal is transmitted to the first node N1 for ultrasonic fingerprint identification. The error caused by the negative potential signal reducing the potential of the first node N1 is avoided, and the accuracy of ultrasonic fingerprint identification is improved.

[0064] The first end of the capacitor C is connected to the second end of the integration module 50, and the second end is connected to the first node N1. In the signal receiving stage, the positive potential in the reflected ultrasonic signal charges the capacitor C. In the signal identification stage, the capacitor C maintains the potential of the first node N1.

[0065] The first signal end Vdd and the second signal end Data are coupled to the first pole and the second pole of the driving transistor M0, respectively. The first signal end Vdd is used for receiving a first signal; and the second signal end Data is used for receiving a second signal. The first signal is a voltage signal, and the second signal is a current signal. The first signal end Vdd and the second signal end Data are used for providing a voltage signal and a current signal to the ultrasonic fingerprint identification circuit 100 in the signal identification stage, so as to make the driving transistor M0 conduct, and generate a driving signal.

[0066] In an optional embodiment of the present application, referring to Figure 3 , Figure 3 is a circuit diagram of an ultrasonic fingerprint identification circuit provided by an embodiment of the present application. The first compensation module 10 includes a first transistor M1. The gate of the first transistor M1 is connected to a first signal control end S1. The first pole of the first transistor is connected to a compensation signal end Vref. The second pole of the first transistor M1 is connected to a third node N3.

[0067] It can be understood that the first transistor M1 includes a gate, a first pole and a second pole. The gate of the first transistor M1 is a control end of the first compensation module 10. The first pole of the first transistor M1 is a first end of the first compensation module 10. The second pole of the first transistor M1 is a second end of the first compensation module 10. The gate of the first transistor M1 is connected to the first signal control end S1, for receiving a control signal of the first signal control end S1, and conducting or cutting off. Exemplarily, Figure 3The first transistor M1 shown is an N-type transistor. The N-type transistor is turned on when the gate receives a high-level signal and is turned off when a low-level signal is received. In the compensation stage, the first signal control end S1 outputs a high-level signal, and the first transistor M1 is turned on to transmit the compensation signal output by the compensation signal end Vref to the third node N3. The first transistor M1 and the second compensation module 20 jointly transmit the compensation signal to the first node N1, which is used to compensate for the deviation of the threshold voltage Vth of the drive transistor M0, reduce the influence of the threshold voltage Vth of the drive transistor M0 on ultrasonic fingerprint identification, and improve the accuracy of ultrasonic fingerprint identification.

[0068] In an optional embodiment provided by the present application, continuing to refer to Figure 3 As shown, the second compensation module 20 includes a second transistor M2, the gate of the second transistor M2 is connected to the second signal control end S2, the first pole of the second transistor M2 is connected to the second node N2, and the second pole of the second transistor M2 is connected to the first node N1.

[0069] It can be understood that the second transistor M2 includes a gate, a first pole and a second pole. Among them, the gate of the second transistor M2 is the control end of the second compensation module 20, the first pole of the second transistor M2 is the first end of the second compensation module 20, and the second pole of the second transistor M2 is the second end of the second compensation module 20. The gate of the second transistor M2 is connected to the second signal control end S2 for receiving the control signal of the second signal control end S2 to be turned on or turned off. In the initialization stage or the compensation stage, the second signal control end S2 outputs a high-level signal, and the second transistor M2 is turned on to transmit the signal of the second node N2 to the first node N1. In the initialization stage, the voltage writing module 60 is multiplexed as the second reset module 02, the second compensation module 20 is multiplexed as the third reset module 03, and the second transistor M2 and the third reset module 03 jointly transmit the first signal of the first signal end Vdd to the first node N1. Resetting the first node N1 can clear the voltage remaining in the first node N1 in the last ultrasonic fingerprint identification process in the initialization stage T1, thereby improving the accuracy of the current ultrasonic fingerprint identification. In the compensation stage, the first transistor M1 and the second transistor M2 jointly transmit the compensation signal to the first node N1, which is used to compensate for the deviation of the threshold voltage Vth of the drive transistor M0, reduce the influence of the threshold voltage Vth of the drive transistor M0 on ultrasonic fingerprint identification, and improve the accuracy of ultrasonic fingerprint identification.

[0070] In an optional embodiment provided by the present application, continuing to refer to Figure 3As shown, the ultrasonic module 30 includes a transmitting electrode Tx, a receiving electrode Rx and a piezoelectric layer, the piezoelectric layer is arranged between the transmitting electrode Tx and the receiving electrode Rx, the transmitting electrode Tx is used to transmit an ultrasonic signal in a signal transmitting stage, the piezoelectric layer is used to receive a reflected ultrasonic signal in a signal receiving stage and generate a ridge signal or a valley signal, and the receiving electrode Rx is used to receive the ridge signal or the valley signal.

[0071] It can be understood that the ultrasonic module 30 includes the transmitting electrode Tx, the receiving electrode Rx and the piezoelectric layer. The transmitting electrode Tx transmits an ultrasonic signal in a signal transmitting stage, and the ultrasonic signal is reflected when reaching the surface of a finger or other tissue. In a signal receiving stage, the piezoelectric layer receives the reflected ultrasonic signal. Since the surface of the finger has uneven ridges and valleys, the reflection of the ultrasonic signal by the ridges and valleys is different. Therefore, the piezoelectric layer generates a ridge signal or a valley signal according to the received reflected ultrasonic signal, and transmits the ridge signal and the valley signal to the receiving electrode Rx. The receiving electrode Rx transmits the received ridge signal or valley signal to the fourth node N4.

[0072] In an optional embodiment provided by the present application, continuing to refer to Figure 3 As shown, the recovery module 40 includes a third transistor M3, the gate of the third transistor M3 is connected to the third signal control end S3, the first electrode of the third transistor is connected to the third signal end DB, and the second electrode of the third transistor M3 is connected to the fourth node N4.

[0073] It can be understood that the third transistor M3 includes a gate, a first pole and a second pole. The gate of the third transistor M3 is the control end of the recovery module 40, the first pole of the third transistor M3 is the first end of the recovery module 40, and the second pole of the third transistor M2 is the second end of the recovery module 40. The gate of the second transistor M2 is connected to the third signal control end S3, for receiving the control signal of the third signal control end S3, and conducting or cutting off. In the initialization stage, the third signal control end S3 outputs a high level signal, the third transistor M3 is turned on, and the third signal of the third signal end DB is transmitted to the fourth node N4, and the fourth node N4 is reset. The third signal can be a 0 potential signal. Resetting the fourth node N4 can clear the voltage remaining in the fourth node N4 in the last ultrasonic fingerprint identification process in the initialization stage, thereby improving the accuracy of the present ultrasonic fingerprint identification. In addition, in the initialization stage, the recovery module 40 is reused as the first reset module 01, which can simplify the structure of the ultrasonic fingerprint identification circuit, and thereby simplify the overall structure of the identification device. In the signal receiving stage, the third signal control end S3 outputs a 0 potential signal, when the reflected ultrasonic signal transmitted to the fourth node N4 is a positive potential signal, the control signal of the gate of the third transistor M3 is a low level signal relative to the reflected ultrasonic signal of the fourth node N4, and the third transistor M3 is cut off. When the reflected ultrasonic signal transmitted to the fourth node N4 is a negative potential signal, the control signal of the gate of the third transistor M3 is a high level signal relative to the reflected ultrasonic signal of the fourth node N4, and the third transistor M3 is turned on. The negative potential signal of the reflected ultrasonic signal transmitted to the fourth node N4 is transmitted to the third signal end DB. Avoiding the error caused by the negative potential signal reducing the potential of the first node N1, and improving the accuracy of ultrasonic fingerprint identification.

[0074] In an optional embodiment of the present application, continuing to refer to Figure 3 As shown, the integration module 50 includes a fourth transistor M4, the control end of the fourth transistor M4 is connected to the fourth signal control end S4, the first pole of the fourth transistor M4 is connected to the fourth node N4, and the second pole of the fourth transistor M4 is connected to the first node N1.

[0075] It can be understood that the fourth transistor M4 includes a gate, a first pole and a second pole. The gate of the fourth transistor M4 is the control end of the integration module 50, the first pole of the fourth transistor M4 is the first end of the integration module 50, and the second pole of the third transistor M2 is the second end of the integration module 50. The gate of the second transistor M2 is connected to the fourth signal control end S4, for receiving the control signal of the fourth signal control end S4, and conducting or cutting off. Exemplarily, Figure 3The fourth transistor M4 is a P-type transistor. The P-type transistor is turned off when the gate receives a high-level signal and is turned on when the gate receives a low-level signal. In the signal receiving stage, the fourth signal control terminal S4 outputs a 0 potential signal. When the reflected ultrasonic signal transmitted to the fourth node N4 is a negative potential signal, the control signal of the gate of the fourth transistor M4 is a high-level signal relative to the reflected ultrasonic signal of the fourth node N4, and the fourth transistor M4 is turned off. When the reflected ultrasonic signal transmitted to the fourth node N4 is a positive potential signal, the control signal of the gate of the fourth transistor M4 is a low-level signal relative to the reflected ultrasonic signal of the fourth node N4, and the fourth transistor M4 is turned on. The positive potential signal of the reflected ultrasonic signal transmitted to the fourth node N4 is transmitted to the capacitor C, the capacitor C is charged, and the potential of the first node N1 is maintained.

[0076] In an optional embodiment of the present application, continuing to refer to Figure 3 As shown, the voltage writing module 60 includes a fifth transistor M5. The gate of the fifth transistor M5 is connected to the first switch signal control terminal E1. The first pole of the fifth transistor M5 is connected to the first signal terminal Vdd. The second pole of the fifth transistor M5 is connected to the second node N2.

[0077] It can be understood that the fifth transistor M5 includes a gate, a first pole and a second pole. The gate of the fifth transistor M5 is a control terminal of the voltage writing module 60. The first pole of the fifth transistor M5 is a first terminal of the voltage writing module 60. The second pole of the fifth transistor M5 is a second terminal of the voltage writing module 60. The gate of the fifth transistor M5 is connected to the first switch signal control terminal E1, for receiving the control signal of the first switch signal control terminal E1, and being turned on or turned off. In the initialization stage or the signal identification stage, the first switch signal control terminal E1 outputs a high-level signal, and the fifth transistor M5 is turned on to transmit the first signal output by the first signal terminal Vdd to the first node N2. In the initialization stage, the voltage writing module 60 is multiplexed as the second reset module 02, the second compensation module 20 is multiplexed as the third reset module 03, and the fifth transistor M5 and the second transistor M2 jointly transmit the first signal of the first signal terminal Vdd to the first node N1. Resetting the first node N1 can clear the voltage remaining in the first node N1 in the last ultrasonic fingerprint identification process in the initialization stage T1, thereby improving the accuracy of the present ultrasonic fingerprint identification. Meanwhile, multiplexing the voltage writing module 60 as the second reset module 02 can simplify the structure of the ultrasonic fingerprint identification circuit. In the signal identification stage, the fifth transistor M5 is turned on to transmit the first signal output by the first signal terminal Vdd to the first node N2, for forming a loop with the driving transistor M0 to drive the driving transistor M0 to generate a driving signal.

[0078] In an optional embodiment of the present application, continuing to refer toFigure 3 As shown in the figure, the current writing module 70 comprises a sixth transistor M6, the gate of the sixth transistor M6 is connected with the second switch signal control end E2, the first pole of the sixth transistor M6 is connected with the second signal end Data, and the second pole of the sixth transistor M6 is connected with the third node N3.

[0079] It can be understood that the sixth transistor M6 comprises a gate, a first pole and a second pole. Among them, the gate of the sixth transistor M6 is the control end of the current writing module 70, the first pole of the sixth transistor M6 is the first end of the current writing module 70, and the second pole of the sixth transistor M6 is the second end of the current writing module 70. The gate of the sixth transistor M6 is connected with the second switch signal control end E2, used for receiving the control signal of the second switch signal control end E2, and conducting or cutting off. In the signal identification stage, the second switch signal control end E2 outputs a high level signal, the sixth transistor M6 is turned on, the second signal output by the second signal end Data is transmitted to the third node N3, used for forming a loop with the driving transistor M0, and driving the driving transistor M0 to generate a driving signal.

[0080] In an optional embodiment of the present application, referring to Figure 4 As shown in the figure, Figure 4 The figure is a circuit diagram of another ultrasonic fingerprint identification circuit provided by the embodiment of the present application. The circuit connection mode of the ultrasonic fingerprint identification circuit 100 provided by the embodiment of the present application is the same as that of the ultrasonic fingerprint identification circuit 100 in any of the above embodiments. However, Figure 3 As shown in the figure, the ultrasonic fingerprint identification circuit 100 is described by taking the driving transistor M0 as an N-type transistor, Figure 4 As shown in the figure, the ultrasonic fingerprint identification circuit 100 is described by taking the driving transistor M0 as an N-type transistor. The P-type transistor is turned on under the control of a low level signal and is cut off under the control of a high level signal. The N-type transistor is turned on under the control of a high level signal and is cut off under the control of a low level signal. In addition, the above driving transistor M0 can be a P-type transistor or an N-type transistor, which is not limited in the present application.

[0081] Based on the same inventive concept, the embodiment of the present application further provides a driving method of an ultrasonic fingerprint identification circuit, used for driving the ultrasonic fingerprint identification circuit provided by any of the above embodiments. Referring to Figures 1 to 3 、 Figures 5 to 7 As shown in the figure, the ultrasonic fingerprint identification circuit 100 is described by taking the driving transistor M0 as an N-type transistor. The P-type transistor is turned on under the control of a low level signal and is cut off under the control of a high level signal. The N-type transistor is turned on under the control of a high level signal and is cut off under the control of a low level signal. In addition, the above driving transistor M0 can be a P-type transistor or an N-type transistor, which is not limited in the present application. Figure 5 The figure is a flow chart of the driving method of the ultrasonic fingerprint identification circuit provided by the embodiment of the present application; Figure 6 The figure is a timing diagram of the driving method of the ultrasonic fingerprint identification circuit provided by the embodiment of the present application; Figure 7 The figure is a timing diagram of another driving method of the ultrasonic fingerprint identification circuit provided by the embodiment of the present application.

[0082] The driving method for the ultrasonic fingerprint recognition circuit provided in this embodiment of the invention is used to drive the ultrasonic fingerprint recognition circuit 100 in any of the above embodiments. The ultrasonic fingerprint recognition circuit 100 includes: a driving transistor M0, a capacitor C, a first compensation module 10, a second compensation module 20, an ultrasonic module 30, a recovery module 40, an integration module 50, a voltage writing module 60, and a current writing module 70.

[0083] The driving method includes at least the following stages: initialization stage T1, compensation stage T20, signal transmission stage T2, signal reception stage T3, and signal identification stage T4.

[0084] During the initialization phase T1: the recycling module 40 is used as the first reset module 01. The first reset module 01 is turned on and writes the third signal of the third signal terminal DB into the fourth node N4 to reset the fourth node N4.

[0085] Understandably, during the initialization phase T1, the recycling module 40 is reused as the first reset module 01. The control terminal of the first reset module 01 is connected to the third signal control terminal S3, the first terminal of the first reset module 01 is connected to the third signal terminal DB, and the second terminal of the first reset module 01 is connected to the fourth node N4. During the initialization phase T1, the third signal control terminal S3 outputs a high-level signal, the first reset module 01 is turned on, and the third signal of the third signal terminal DB is written to the fourth node N4. The third signal can be a 0-potential signal. Resetting the fourth node N4 can clear the residual voltage of the fourth node N4 from the previous ultrasonic fingerprint recognition process during the initialization phase T1, thereby improving the accuracy of the current ultrasonic fingerprint recognition. In addition, reusing the recycling module 40 as the first reset module 01 during the initialization phase T1 simplifies the structure of the ultrasonic fingerprint recognition circuit, thereby simplifying the overall structure of the recognition device.

[0086] The voltage writing module 60 is used as the second reset module 02, and the second compensation module 20 is used as the third reset module 03. When the second reset module 02 and the third reset module 03 are turned on, the first signal of the first signal terminal Vdd is written to the first node N1 to reset the first node N1.

[0087] It can be understood that the voltage writing module 60 is multiplexed as the second reset module 02 in the initialization stage T1, and the second compensation module 20 is multiplexed as the third reset module 03 in the initialization stage T1. The control end of the second reset module 02 is connected with the first switch signal control end E1, the first pole of the second reset module 02 is connected with the first signal end Vdd, and the second pole of the second reset module 02 is connected with the second node N2. The control end of the third reset module 03 is connected with the second signal control end S2, the first pole of the third reset module 03 is connected with the second node N2, and the second pole of the third reset module 03 is connected with the first node N1. In the initialization stage T1, the first switch signal control end E1 and the second signal control end S2 output high level signals, the second reset module 02 and the third reset module 03 are turned on, and the first signal of the first signal end Vdd is transmitted to the first node N1 in sequence through the second reset module 02, the second node N2 and the third reset module 03. At this time, the voltage of the first node N1 is Vdd. Resetting the first node N1 can clear the voltage remaining in the first node N1 in the last ultrasonic fingerprint identification process in the initialization stage T1, thereby improving the accuracy of the present ultrasonic fingerprint identification. In addition, in the initialization stage T1, the voltage writing module 60 and the second compensation module 20 are multiplexed as the second reset module 02 and the third reset module 03 respectively, and no additional reset circuit needs to be arranged for the first node N1, thereby simplifying the structure of the ultrasonic fingerprint identification circuit.

[0088] In the compensation stage T20: the first compensation module 10 and the second compensation module 20 are turned on, and the first compensation module 10 and the second compensation module 20 compensate the threshold voltage Vth of the driving transistor M0.

[0089] It can be understood that the control end of the first compensation module 10 is connected with the first signal control end S1, the first pole of the first compensation module 10 is connected with the compensation signal control end Vref, and the second pole of the first compensation module 10 is connected with the third node N3. The control end of the second compensation module 20 is connected with the second signal control end S2, the first pole of the second compensation module 20 is connected with the second node N2, and the second pole of the second compensation module 20 is connected with the first node N1. In the compensation stage T20, the first signal control end S1 and the second signal control end S2 output high level signals, and the first compensation module 10 and the second compensation module 20 are turned on. The compensation signal transmitted by the compensation signal control end Vref is transmitted to the first node N1 through the first compensation module 10, the third node N3, the driving transistor M0, the second node N2 and the second compensation module 20. The potential of the first node N1 gradually changes from Vdd to Vref+Vth. By compensating the first node N1, the deviation of the threshold voltage Vth of the driving transistor M0 can be compensated, the influence of the threshold voltage Vth of the driving transistor M0 on the ultrasonic fingerprint identification can be reduced, and the accuracy of the ultrasonic fingerprint identification can be improved.

[0090] In the signal transmitting stage T2, the ultrasonic module 30 transmits ultrasonic signals.

[0091] It can be understood that, in the signal transmitting stage T2, the ultrasonic module 30 transmits ultrasonic signals outwardly. It should be noted that the signal transmitting stage T2 is for the ultrasonic module 30, and the compensation stage T20 is for the compensation module. The compensation stage T20 is included in the signal transmitting stage T2, and the compensation stage T20 has the same starting time as the signal transmitting stage T2 but ends earlier than the signal transmitting stage T2. The compensation stage T20 at least partially coincides with the signal transmitting stage T2, which can reduce the driving time of the ultrasonic fingerprint identification circuit and improve the efficiency of identification.

[0092] In the signal receiving stage T3, the ultrasonic module 30 receives the reflected ultrasonic signals and generates ridge signals or valley signals; the recovery module 40 is turned on to transmit the negative potential waveform of the reflected ultrasonic signals to the third signal end DB; and the integration module 50 is turned on to transmit the positive potential waveform of the reflected ultrasonic signals to the first node N1.

[0093] It can be understood that, in the signal receiving stage T3, the ultrasonic module 30 receives the ultrasonic signals reflected by the finger or other biological tissues and generates ridge signals and valley signals according to the reflected ultrasonic signals. The ridge signals are used to represent the protrusions in the fingerprint, and the valley signals are used to represent the depressions in the fingerprint. The ridge signals or valley signals are transmitted to the fourth node N4. Since the ridge signals or valley signals include both positive potential waveforms and negative potential waveforms, the positive potential waveforms and the negative potential waveforms need to be separated at the fourth node N4. Only the positive potential waveforms in the ridge signals or valley signals are transmitted to the first node N1.

[0094] Therefore, the recovery module 40 and the integration module 50 are coupled with the fourth node N4. When the recovery module 40 is turned on, it is used to absorb the negative potential waveform in the reflected ultrasonic signals. When the integration module 50 is turned on, it is used to transmit the positive potential waveform in the reflected ultrasonic signals to the first node N1.

[0095] Specifically, the control end of the recovery module 40 is connected to the third signal control end S3, the first pole of the recovery module 40 is connected to the third signal end DB, and the second pole of the recovery module 40 is connected to the fourth node N4. In the signal receiving stage T3, the third signal control end S3 outputs a 0 potential signal. When the ridge signals or valley signals transmitted to the fourth node N4 are negative potential signals, the potential of the control end of the recovery module 40 is high compared with the potential of the fourth node N4. Therefore, the recovery module 40 is turned on, and the negative potential signals of the fourth node N4 are transmitted to the third signal end DB through the recovery module 40.

[0096] The control end of the integration module 50 is connected with the fourth signal control end S4, the first pole of the integration module 50 is connected with the fourth node N4, and the second pole of the integration module 50 is connected with the first end of the capacitor C. In the signal receiving stage T3, the fourth signal control end S4 outputs a 0 potential signal. When the ridge signal or the valley signal transmitted to the fourth node N4 is a positive potential signal, the potential of the control end of the integration module 50 is low compared with the potential of the fourth node N4. Therefore, the integration module 50 is turned on, the positive potential signal of the fourth node N4 is transmitted to the first end of the capacitor C through the integration module 50, the capacitor C is charged, and then the different potential of the first node N1 is maintained. For example, the ridge signal or the valley signal charges the capacitor C, the potential of the first node N1 is increased by△V, and at this time, the potential of the first node N1 is Vref+Vth+△V.

[0097] In the signal identification stage T4, the voltage writing module 60 and the current writing module 70 are turned on, the voltage writing module 60 writes the first signal into the second node N2, the current writing module 70 writes the second signal into the third node N3, and the fingerprint information is determined according to the voltage of the third node N3.

[0098] It can be understood that the control end of the voltage writing module 60 is connected with the first switch signal control end E1, the first pole of the voltage writing module 60 is connected with the first signal end Vdd, and the second pole of the voltage writing module 60 is connected with the second node N2. The control end of the current writing module 70 is connected with the second switch signal control end E2, the first pole of the current writing module 70 is connected with the second signal end Data, and the second pole of the voltage writing module 70 is connected with the third node N3. In the signal identification stage T4, the first switch signal control end E1 and the second switch signal control end E2 both output high level signals, and the voltage writing module 60 and the current writing module 70 are turned on. The first signal end Vdd, the voltage writing module 60, the second node N2, the driving transistor M0, the third node N3, the current writing module 70 and the second signal end Data form a loop. The second signal emitted by the second signal end Data is a current signal. Therefore, when the second signal is fixed, the current in the loop is I=k(Vref+Vth+△V-V N3 -Vth), that is When the current I and the value of the compensation signal Vref are fixed, the potential V N3 The potential△V increased by the ridge signal or the valley signal to the first node N1 can be determined, and then the fingerprint information is determined.

[0099] From the above, it can be seen that the embodiment provided by the application eliminates the influence of the threshold voltage Vth of the driving transistor M0.

[0100] In an optional embodiment provided by the application, with reference to Figure 4 , Figure 5 andFigure 8 As shown in FIG. 1, Figure 8 FIG. 8 is a timing diagram of a driving method of the ultrasonic fingerprint identification circuit 100 shown in FIG. 1.

[0101] It should be noted that, Figure 7 As shown in FIG. 1, Figure 3 FIG. 8 is a timing diagram of a driving method of the ultrasonic fingerprint identification circuit 100 shown in FIG. 1. Figure 8 As shown in FIG. 1, Figure 4 FIG. 8 is a timing diagram of a driving method of the ultrasonic fingerprint identification circuit 100 shown in FIG. 1. Figure 3 As shown in FIG. 1, Figure 4 As shown in FIG. 1, the driving transistor M0 is a P-type transistor. The P-type transistor is turned on under the control of a low-level signal and is turned off under the control of a high-level signal. The N-type transistor is turned on under the control of a high-level signal and is turned off under the control of a low-level signal.

[0102] Based on the same inventive concept, the present application also provides an ultrasonic fingerprint identification device 200, which is described in detail with reference to Figure 9 As shown in FIG. 1, Figure 9 FIG. 1 is a top view of an ultrasonic fingerprint identification device according to an embodiment of the present application. The ultrasonic fingerprint identification device 200 provided by the present application comprises the ultrasonic fingerprint identification circuit 100 provided by any of the above embodiments.

[0103] It should be noted that the ultrasonic fingerprint identification device 200 provided by the present application can be embodied as a mobile phone, a tablet computer, a notebook computer, a time clock, a smart door lock or any product or component having a fingerprint identification function.

[0104] It can be understood that, Figure 9 It should be noted that the ultrasonic fingerprint identification device 200 provided by the present application is only schematically shown in the form of a rectangle, and the actual shape of the ultrasonic fingerprint identification device 200 is not limited. In some other embodiments of the present application, the shape of the ultrasonic fingerprint identification device 200 can also be a rounded rectangle, a circle, an ellipse or a special-shaped structure including an arc structure, and the present application does not make a specific limitation in this regard.

[0105] In summary, the ultrasonic fingerprint identification circuit and its driving method and identification device provided by the present application at least achieve the following beneficial effects:

[0106] The embodiment provided by the present application transmits a compensation signal to the first node in the compensation stage by setting the first compensation module and the second compensation module coupled with the gate of the driving transistor, so that the potential of the first node reaches Vref+Vth. In the signal receiving stage, the first node receives the reflected ultrasonic signal from the ultrasonic module, and the reflected ultrasonic signal charges the first end of the capacitor, so that the potential of the first node is increased to Vref+Vth+△V. In the signal identification stage, the current writing module writes the second signal at the second signal end to the third node, and the second signal is a current signal. Therefore, in the signal identification stage, the current in the loop formed by the first signal end, the voltage writing module, the second node, the driving transistor, the third node, the current writing module and the second signal end is I=k(Vref+Vth+△V-V N3 -Vth). As can be seen from the formula, the threshold voltage of the driving transistor is offset, and the fingerprint identification information can be determined by the potential of the third node. The embodiment provided by the present application eliminates the influence of the threshold voltage of the driving transistor on the ultrasonic fingerprint identification circuit, and improves the accuracy of fingerprint identification.

[0107] Although some specific embodiments of the present application have been described in detail by examples, those skilled in the art should understand that the above examples are only for illustration, but not for limiting the scope of the present application. Those skilled in the art should understand that the above embodiments can be modified without departing from the scope and spirit of the present application. The scope of the present application is defined by the appended claims.

Claims

1. An ultrasonic fingerprint recognition circuit, characterized in that, include: A first signal terminal and a second signal terminal, wherein the first signal terminal is used to receive a first signal and the second signal terminal is used to receive a second signal; A driving transistor, wherein the gate of the driving transistor is connected to a first node, the first terminal of the driving transistor is connected to a second node, and the second terminal of the driving transistor is connected to a third node; the driving transistor is used to generate a driving signal during the signal recognition stage; A first compensation module, wherein the control terminal of the first compensation module is connected to a first signal control terminal, the first end of the first compensation module is connected to a compensation signal terminal, and the second end of the first compensation module is connected to the third node; The second compensation module has a control terminal connected to a second signal control terminal, a first terminal connected to the second node, and a second terminal connected to the first node. The first compensation module and the second compensation module are used together to detect and self-compensate the deviation of the threshold voltage of the driving transistor during the compensation phase; An ultrasound module, wherein a first end of the ultrasound module is connected to a fourth node, the fourth node being coupled to the first node; a second end of the ultrasound module is used to transmit or receive ultrasound signals; the ultrasound module is used to transmit the ultrasound signals during the signal transmission phase, or to receive the reflected ultrasound signals during the signal reception phase and generate ridge signals or valley signals. The recovery module has a control terminal connected to a third signal control terminal, a first terminal connected to a third signal terminal, and a second terminal connected to the fourth node; the recovery module is used to absorb the negative potential waveform of the reflected ultrasonic signal during the signal reception phase. An integration module, wherein the control terminal of the integration module is connected to the fourth signal control terminal, the first terminal of the integration module is connected to the fourth node, and the second terminal of the integration module is connected to the first node; The integration module is used to transmit the positive potential waveform of the reflected ultrasonic signal to the first node during the signal receiving phase; A capacitor, the first end of which is connected to the second end of the integration module, and the second end of which is connected to the first node; the capacitor is used to maintain the potential of the first node; A voltage writing module, wherein the control terminal of the voltage writing module is connected to the first switch signal control terminal, the first terminal of the voltage writing module is connected to the first signal terminal, and the second terminal of the voltage writing module is connected to the second node; the voltage writing module is used to write the first signal output by the first signal terminal to the driving transistor during the signal recognition stage; A current writing module is provided, wherein the control terminal of the current writing module is connected to the second switch signal control terminal, the first terminal of the current writing module is connected to the second signal terminal, and the second terminal of the current writing module is connected to the third node; the current writing module is used to write a second signal to the third node during the signal recognition stage.

2. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The first compensation module includes a first transistor, the gate of the first transistor is connected to the first signal control terminal, the first electrode of the first transistor is connected to the compensation signal terminal, and the second electrode of the first transistor is connected to the third node.

3. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The second compensation module includes a second transistor, the gate of which is connected to the second signal control terminal, the first terminal of which is connected to the second node, and the second terminal of which is connected to the first node.

4. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The ultrasound module includes a transmitting electrode, a receiving electrode, and a piezoelectric layer. The piezoelectric layer is disposed between the transmitting electrode and the receiving electrode. The transmitting electrode is used to transmit the ultrasound signal during the signal transmission phase. The piezoelectric layer is used to receive the reflected ultrasound signal and generate a ridge signal or a valley signal during the signal reception phase. The receiving electrode is used to receive the ridge signal or the valley signal.

5. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The recycling module includes a third transistor, the gate of which is connected to the third signal control terminal, the first terminal of which is connected to the third signal terminal, and the second terminal of which is connected to the fourth node.

6. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The integration module includes a fourth transistor, the control terminal of which is connected to a fourth signal control terminal, the first terminal of which is connected to the fourth node, and the second terminal of which is connected to the first node.

7. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The voltage writing module includes a fifth transistor, the gate of which is connected to the first switch signal control terminal, the first terminal of which is connected to the first signal terminal, and the second terminal of which is connected to the second node.

8. The ultrasonic fingerprint recognition circuit according to claim 1, characterized in that, The current writing module includes a sixth transistor, the gate of which is connected to the second switch signal control terminal, the first terminal of which is connected to the second signal terminal, and the second terminal of which is connected to the third node.

9. A driving method for an ultrasonic fingerprint recognition circuit, characterized in that, For driving the ultrasonic fingerprint recognition circuit according to any one of claims 1-8, the ultrasonic fingerprint recognition circuit includes: a driving transistor, a capacitor, a first compensation module, a second compensation module, an ultrasonic module, a recovery module, an integration module, a voltage writing module, and a current writing module; The driving method includes at least: an initialization phase, a compensation phase, a signal transmission phase, a signal reception phase, and a signal identification phase; During the initialization phase: the recycling module is used as a first reset module. When the first reset module is turned on, the third signal of the third signal terminal is written into the fourth node to reset the fourth node. The voltage writing module is used as a second reset module, and the second compensation module is used as a third reset module. When the second reset module and the third reset module are turned on, the first signal of the first signal terminal is written into the first node to reset the first node. During the compensation phase: the first compensation module and the second compensation module are turned on, and the first compensation module and the second compensation module compensate for the threshold voltage of the driving transistor; During the signal transmission phase: the ultrasonic module transmits ultrasonic signals; During the signal receiving phase: the ultrasound module receives the reflected ultrasound signal and generates a ridge signal or a valley signal; the recovery module is turned on, transmitting the negative potential waveform of the reflected ultrasound signal to the third signal terminal; the integration module is turned on, transmitting the positive potential waveform of the reflected ultrasound signal to the first node; During the signal recognition stage: the voltage writing module and the current writing module are turned on, the voltage writing module writes the first signal to the second node, and the current writing module writes the second signal to the third node, and the fingerprint information is determined based on the voltage of the third node.

10. An ultrasonic fingerprint recognition device, characterized in that, The ultrasonic fingerprint recognition circuit includes any one of claims 1-8.

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