Image sensor having a shifted color filter array pattern and bit line pairs

Abstract

The present disclosure relates to an image sensor having a shifted color filter array pattern and bit line pairs. An imaging device includes a grouping of photodiodes having four photodiodes. Transfer transistors are between each photodiode and a floating diffusion region. Each floating diffusion region is coupled to at most two photodiodes of each grouping at a certain time through the transfer transistors. Buffer transistors are coupled to each floating diffusion region. The buffer transistors can be in a first or second grouping of buffer transistors. At a certain time, a first bit line is coupled to at most two buffer transistors of the first grouping and a second bit line is coupled to at most two buffer transistors of the second grouping. A color filter array of a plurality of groupings containing color filters is disposed on corresponding photodiodes of a photodiode array, wherein each grouping of color filters includes four color filters having the same color, and wherein each grouping of color filters overlaps two groupings of photodiodes.

Description

[0001] Relevant information of divisional application

[0002] This application is a divisional application of a Chinese patent application with the application number 202110436145.6, the application date of April 22, 2021, and the invention title of "Image Sensor with Shifted Color Filter Array Pattern and Bit Line Pairs". Technical Field

[0003] The present disclosure generally relates to image sensors, and in particular but not exclusively, to image sensors including color filter arrays. Background Art

[0004] Image sensors have become ubiquitous and are now widely used in digital cameras, cellular phones, surveillance cameras, and medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, it is desirable to enhance their functionality, performance metrics, etc. in as many ways as possible (e.g., resolution, power consumption, dynamic range, etc.) through both device architecture design and image acquisition processing.

[0005] A typical image sensor operates in response to image light from an external scene incident on the image sensor. The image sensor includes a pixel array having photosensitive elements (e.g., photodiodes), which absorb a portion of the incident image light and generate image charges after absorbing the image light. The image charge of each of the pixels can be measured as an output signal from each photosensitive element that varies according to the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, which is used to produce a digital image (i.e., image data) representing the external scene. Summary of the Invention

[0006] One aspect of the present disclosure relates to an imaging device, comprising: a plurality of groups of photodiodes of a photodiode array, wherein each group of photodiodes includes four adjacent photodiodes in a pixel array; a plurality of groups of transfer transistors, wherein each group of transfer transistors is coupled to a corresponding group of photodiodes, wherein each group of transfer transistors includes four transfer transistors, and wherein each of the four transfer transistors is coupled to a corresponding one of the four photodiodes of the corresponding group of photodiodes; a plurality of floating diffusion regions, wherein each floating diffusion region is coupled to a corresponding group of transfer transistors, and wherein each floating diffusion region is selectively coupled to at most two of the four photodiodes of the corresponding group of photodiodes through the corresponding group of transfer transistors at a certain moment; a plurality of buffer transistors, wherein each buffer transistor is coupled to a corresponding floating diffusion region of the plurality of floating diffusion regions, and wherein the plurality of buffer transistors includes a first group of buffer transistors and a second group of buffer transistors; and a plurality of bit lines arranged in pairs of bit lines, wherein each pair of bit lines is coupled to a corresponding single column of a group of photodiodes in the pixel array, and wherein each pair of bit lines includes: a first bit line selectively coupled to at most two buffer transistors of the first group of buffer transistors at a certain moment; and a second bit line selectively coupled to at most two buffer transistors of the second group of buffer transistors at a certain moment.

[0007] Another aspect of the present disclosure relates to an imaging system comprising: a pixel array coupled to generate image data in response to incident light, the pixel array comprising: a plurality of groups of photodiodes, wherein each group of photodiodes comprises four adjacent photodiodes in the pixel array; a plurality of groups of transfer transistors, wherein each group of transfer transistors is coupled to a corresponding group of photodiodes, wherein each group of transfer transistors comprises four transfer transistors, wherein each of the four transfer transistors is coupled to a corresponding one of the four photodiodes of the corresponding group of photodiodes; a plurality of floating diffusion regions, wherein each floating diffusion region is coupled to a corresponding group of transfer transistors, wherein each floating diffusion region is selectively coupled to at most two of the four photodiodes of the corresponding group of photodiodes by the corresponding group of transfer transistors at a certain moment; a plurality of buffer transistors, wherein each buffer transistor is coupled to a corresponding floating diffusion region of the plurality of floating diffusion regions, wherein the plurality of buffer transistors comprises a first group of buffer transistors and a second group of buffer transistors; a plurality of bit lines arranged in pairs of bit lines, wherein each pair of bit lines is coupled to a corresponding single column of a group of photodiodes in the pixel array, wherein each pair of bit lines comprises: a first bit line selectively coupled to at most two buffer transistors of the first group of buffer transistors at a certain moment; and a second bit line selectively coupled to at most two buffer transistors of the second group of buffer transistors at a certain moment; control circuitry coupled to the pixel array to control the operation of the pixel array; and readout circuitry coupled to the pixel array to read out the image data from the pixel array. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following drawings, in which like reference numerals refer to like components throughout the various views unless otherwise specified.

[0009] Figure 1A Illustrate an example of an imaging system according to the teachings of the present invention that includes an image sensor having a shifted color filter array pattern and bit line pairs.

[0010] Figure 1B Illustrate an example of a pixel circuit having a group of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs according to the teachings of the present invention.

[0011] Figure 2A Illustrate an example of a color pixel array having a group of photodiodes of the same color proximate to one floating diffusion region.

[0012] Figure 2BAn example of a color pixel array having a group of photodiodes that overlap two color filters of a shifted color filter array pattern and are proximate through two floating diffusion regions in accordance with the teachings of the present invention is described.

[0013] Figure 3 An example of a readout of a schematic diagram of a column having a group of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown.

[0014] Figure 4 An example of a readout of another schematic diagram of a column having a group of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown.

[0015] Figures 5A to 5E An example of a readout of yet another schematic diagram of a column having a group of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown.

[0016] Figures 6A to 6C An example of a readout of still another schematic diagram of a column having a group of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown.

[0017] Throughout several views of the drawings, corresponding reference characters indicate corresponding components. Those skilled in the art will appreciate that the elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to assist in improving understanding of the various embodiments of the present invention. Additionally, common but well-understood elements that are useful or necessary in a commercially viable embodiment are often not depicted to facilitate a clearer view of these various embodiments of the present invention. Detailed Description

[0018] Various examples related to reading out groups of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs are described herein. In the following description, numerous specific details are set forth to provide a thorough understanding of the examples. However, those skilled in the relevant art will recognize that the techniques described herein may be practiced without one or more of the specific details or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

[0019] References to "one example" or "an embodiment" in the present specification mean that the particular features, structures, or characteristics described in connection with the example are included in at least one example of the present invention. Thus, the phrases "in one example" or "in an embodiment" that appear throughout the present specification do not necessarily all refer to the same example. Additionally, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.

[0020] For ease of description, spatial relative terms, such as "under", "below",

[0021]

[0022] "center", "middle", etc. are used to describe the relationship of one element or feature to another (other) element or feature, as illustrated in the accompanying drawings. It will be understood that the spatial relative terms are intended to cover different orientations of the device in use or operation in addition to the orientation depicted in the drawings. For example, if the device in the drawings is turned over, elements described as "under other elements or features", "below other elements or features", or "beneath other elements or features" will be oriented as "above other elements or features". Thus, the exemplary terms "under" and "below" can cover both above and below. The device may be oriented in other ways (rotated 90 degrees or in other orientations) and the spatial relative descriptors used herein are interpreted accordingly. Additionally, it will also be understood that when a layer is referred to as "between two layers", it may be the only layer between the two layers, or there may also be one or more intervening layers.

[0023] Throughout the specification, several technical terms are used. These terms shall have their ordinary meaning in the art to which they belong, unless explicitly defined herein or the context of their use will clearly indicate otherwise. It should be noted that throughout this document, element names and symbols may be used interchangeably (e.g., Si and silicon); however, both have the same meaning.

[0024] As will be discussed, various examples of a color pixel array having a grouping of photodiodes included in an imaging system having a shifted color filter array pattern and bit line pairs are disclosed. In various examples, the photodiodes in the color pixel array are organized into groupings of multiple photodiodes (e.g., four photodiodes) coupled to each floating diffusion region. In various examples, the color filter array pattern of the color filter array disposed over the photodiodes is vertically shifted such that two different color filters of the color filter array overlap each grouping of photodiodes. In one example, phase detection autofocus lenses may be dispersed among some of the color filters disposed over the PDAF photodiodes in the imaging system. According to the teachings of the present invention, the shifted color filter array pattern enables four adjacent photodiodes of the same color (which may sometimes be referred to as a 4C unit) to be read out using a pair of bit lines in conjunction with two floating diffusion regions rather than using a pair of bit lines in conjunction with one floating diffusion region, which achieves a high full well capacity (FWC) and an increased readout speed.

[0025] For illustration, Figure 1A An example of an imaging system 100 including a color pixel array 102 in accordance with an embodiment of the present disclosure is described, the color pixel array 102 having an array of photodiodes organized into groupings of photodiodes included in pixels 104. As will be discussed in more detail below, a shifted color filter array pattern is disposed over the array of photodiodes and each column of the groupings of photodiodes can be read out via bit line pairs 112. As shown, imaging system 100 includes a pixel array 102, control circuitry 110, readout circuitry 106, and functional logic 108. In one example, pixel array 102 is a two-dimensional (2D) array including a plurality of photodiodes (e.g., P1, P2, …, Pn). In one example, some of the photodiodes dispersed among the array of photodiodes are configured as phase detection autofocus (PDAF) photodiodes, which are dispersed among the conventional image sensing photodiodes in pixel array 102. As illustrated in the depicted example, pixels 104 are arranged in rows (e.g., R1 to Ry) and columns (e.g., C1 to Cx) to acquire image data of a person, place, object, etc., which can then be used to render a 2D image of the person, place, object, etc. In the example, the phase detection autofocus photodiodes dispersed among pixel array 102 provide phase detection information that can be used for autofocus operations of imaging system 100.

[0026] In one example, in accordance with the teachings of the present invention, after each image sensor photodiode in pixel array 102 has collected the charge by photogenerating its image charge or phase detection charge in response to incident light, readout circuitry 106 reads out the corresponding image data and / or phase detection charge via bitline pairs 112 and then transfers the corresponding image data and / or phase detection charge to functional logic 106. Readout circuitry 106 may be coupled to read data from pixels 104 in pixel array 102. In various examples, readout circuitry 106 may include amplifier circuitry, analog-to-digital conversion (ADC) circuitry, or other circuitry. In one example, readout circuitry 106 may read out image data or phase detection data from pixel 104 via bitline pairs 112, as Figure 1A illustrated. Functional logic 108 may store the image data or even manipulate the image data by applying post-image effects (e.g., cropping, rotation, red-eye removal, brightness adjustment, contrast adjustment, or otherwise).

[0027] Figure 1B FIG. illustrates an example of a schematic diagram of pixel circuit 104 in accordance with the teachings of the present invention, which is included in an image sensor having a shifted color filter array pattern and bitline pairs. It should be understood that Figure 1B the pixel circuit 104 of Figure 1A may be an example of pixel 104 of image sensor 100 as shown in

[0028] In Figure 1BIn the example depicted, pixel circuit 104 is one of a plurality of pixel circuits 104 included in pixel array 102. Pixel circuit 104 includes a plurality of groupings of photodiodes, which in the depicted example are four adjacent photodiodes 114-1, 114-2, 114-3, and 114-4. Each of the photodiodes 114-1, 114-2, 114-3, and 114-4 is coupled to photogenerate charge in response to incident light 128. As will be discussed, in various examples, in accordance with the teachings of the present invention, incident light 128 is directed through a color filter having a shifted color filter array pattern, or a phase detection autofocus lens. Thus, in various examples, two of the four photodiodes 114-1, 114-2, 114-3, and 114-4 are configured to receive incident light 128 that has passed through a color filter having one color, while the other two of the four photodiodes 114-1, 114-2, 114-3, and 114-4 are configured to receive light that has passed through a color filter having a different color. In one example, two of the four photodiodes 114-1, 114-2, 114-3, and 114-4 are configured to receive incident light 128 that has passed through a color filter having one color, while the other two of the four photodiodes 114-1, 114-2, 114-3, and 114-4 are configured to receive light that has passed through a phase detection autofocus (PDAF) lens disposed on a 2x2 PDAF photodiode or a lens dispersed among the color filters of a color filter array.

[0029] Figure 1BThe example depicted also illustrates that a group of transfer transistors is coupled to a group of photodiodes. In the example, the group of transfer transistors includes transfer transistors 116-1, 116-2, 116-3, and 116-4, which are coupled to be controlled in response to transfer transistor control signals TX1, TX2, TX3, and TX4, respectively. As shown, each of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 is coupled between a respective one of the four photodiodes 114-1, 114-2, 114-3, and 114-4 and the floating diffusion region 118. As will be discussed, at most two of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 are coupled to be selectively turned on at a given time in response to the transfer transistor control signals TX1, TX2, TX3, and TX4. For example, in one instance, at the time when transfer transistors 116-1 and 116-2 are selectively turned on to read out image charge information from photodiodes 114-1 and 114-2, respectively, transfer transistors 116-3 and 116-4 are turned off. Similarly, at the time when transfer transistors 116-3 and 116-4 are selectively turned on to read out image charge information from photodiodes 114-3 and 114-4, respectively, transfer transistors 116-1 and 116-2 are turned off. In other instances, only one of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 is selectively turned on during a readout operation, while the other three of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 are turned off.

[0030] As shown in the illustrated example, the floating diffusion region 118 is coupled to a group of transfer transistors that includes transfer transistors 116-1, 116-2, 116-3, and 116-4. As described above, at most two of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 are selectively turned on at a given time. Thus, the floating diffusion region 118 is coupled to receive image charge from at most two of the four photodiodes 114-1, 114-2, 114-3, and 114-4 through a respective at most two of the four transfer transistors 116-1, 116-2, 116-3, and 116-4 that are selectively turned on at that time.

[0031] Figure 1BThe example shown in shows that the reset transistor 120 and the buffer transistor 124 are coupled to a voltage supply and to the floating diffusion region 118. In operation, the reset transistor is coupled to reset the floating diffusion region 118 in response to a reset signal RST. In the example, the buffer transistor has a gate terminal that is coupled to the floating diffusion region 118 to generate an output signal 130 in response to charge that has been transferred from a corresponding photodiode 114 to the floating diffusion region 118 through a corresponding transfer transistor 116.

[0032] The depicted example also shows a bit line pair 112, which includes a first bit line BL1 112-1 and a second bit line BL2 112-2. As discussed above, the pixel circuit 104 is one of a plurality of pixel circuits 104 in the pixel array 102. Thus, the buffer transistor 124 is one of a plurality of buffer circuits 124 included in the pixel array 102. In one example, the buffer transistor 124 selectively coupled to the first bit line BL1 112-1 through a select transistor 126-1 in response to a select signal SEL1 is considered to be included in a first group of buffer transistors. In the example, the buffer transistor 124 selectively coupled to the second bit line BL2 112-2 through a select transistor 126-2 in response to a select signal SEL2 is considered to be included in a second group of buffer transistors. In various examples, depending on the desired configuration, the pixel circuit 104 may include one or both of the select transistor 126-1 and the select transistor 126-2. In a configuration that includes both the select transistor 126-1 and the select transistor 126-2, the buffer transistor 124 may be considered to be in a third group of buffer transistors.

[0033] In operation, the output signal generated by the buffer transistor 124 is selectively coupled to be received as an output signal 130-1 by the first bit line BL1 112-1 through the select transistor 126-1. Similarly, the output signal 130 generated by the buffer transistor 124 is selectively coupled to be received as an output signal 130-2 by the second bit line BL2 112-2 through the select transistor 126-2. In one example, the output signal 130 generated by the buffer transistor 124 may include a current received by a corresponding bit line 112. Thus, the total output signal through a corresponding bit line 112 at a particular time is the sum or aggregate of all currents received from each corresponding pixel circuit 104 coupled to the bit line 112 at that time.

[0034] Figure 2AAn example of a color pixel array 202A including a color filter array disposed on a group of photodiodes 214A, 214B is described. In the example, each group of photodiodes 214A, 214B includes four adjacent photodiodes surrounding four corresponding transfer transistors 216A, 216B, and the four corresponding transfer transistors 216A, 216B surround corresponding floating diffusion regions 218A, 218B. Thus, as shown in the depicted example, each single floating diffusion region 218A, 218B is shared among the four photodiodes included in each corresponding group of photodiodes 214A, 214B through the corresponding transfer transistors 216A, 216B. In the example, the color filter array has a Bayer color filter array pattern. In the depicted example, the red color filter is indicated by an "R" mark, the green color filter is indicated by a "G" mark, and the blue color filter is indicated by a "B" mark. As Figure 2A shown in the example depicted, all four photodiodes of each group of photodiodes 214A, 214B are under the same color filter of the color filter array.

[0035] In various configurations, the 4C-1 floating diffusion region (FD) summing mode transfers the charge of all four photodiodes of each color (red, green, or blue) of the group of photodiodes 214A, 214B to the corresponding shared floating diffusion regions 218A, 218B through the corresponding transfer transistors 216A, 216B. One challenge of the 4C-1 FD summing mode transfer is that typically, the signals from all four photodiodes are too high to be transferred to a single floating diffusion region, or the signals from all four photodiodes are too high to be handled by the circuitry. The solution will have to trade off low photodiode full well capacity or low conversion gain.

[0036] In another configuration, the 4C-2 merging mode transfers the charge of only two of the four photodiodes of each color (red, green, or blue) of the group of photodiodes 214A, 214B to the shared floating diffusion regions 218A, 218B at a certain moment. Thus, it will be necessary to separately read the output signal values in a timely manner, store the output signal values, and then sum the output signal values together later to determine the total signal from the four photodiodes of the same color. Therefore, since it is necessary to read each group of photodiodes 214A, 214B twice to determine the total signal from all four photodiodes of the same color, the speed of the image sensor will be significantly slowed down.

[0037] Figure 2BAn example of a color pixel array 202B having a color filter array disposed on groups of photodiodes 214C, 214D is illustrated. In the example, each group of photodiodes 214C, 214D includes four adjacent photodiodes surrounding four respective transfer transistors 216C, 216D, which surround respective floating diffusion regions 218C, 218D. Thus, as shown in the depicted example, each single floating diffusion region 218C, 218D is shared among the four respective photodiodes included in each respective group of photodiodes 214C, 214D by transfer transistors 216C, 216D. In the example, the color filter array has a Bayer color filter array pattern, with red color filters indicated with an "R" designation, green color filters indicated with a "G" designation, and blue color filters indicated with a "B" designation.

[0038] Figure 2B The color pixel array 202B and Figure 2A One difference between the color pixel array 202A and the color pixel array 202A is that: Figure 2B The color filter array in the color pixel array 202B is relative to Figure 2A The color filter array in Figure 2B Thus, each group of four color filters of the same color (e.g., each group of four red "R" filters, each group of four green "G" filters, or each group of four blue "B" filters) overlaps the two 2x2 groups of photodiodes 214C, 214D below.

[0039] For example, Figure 2B 2 shows that in the leftmost column of groupings of photodiodes, the top two photodiodes of the grouping of photodiodes 214C overlap with the green "G" filter and the bottom two photodiodes of the grouping of photodiodes 214C overlap with the blue "B" filter. Similarly, the top two photodiodes of the grouping of photodiodes 214D overlap with the blue "B" filter and the bottom two photodiodes of the grouping of photodiodes 214D overlap with the green "G" filter, etc. In other words, two groups of photodiodes overlap with each group of color filters having the same color, in accordance with the teachings of the present invention.

[0040] As will be discussed in more detail below, according to the teachings of the present invention, by, for example, Figure 2BShift the color filter array as shown therein such that the 2x2 groupings of four adjacent photodiodes that are all exposed to the same color light are accessed via two floating diffusion regions 218C, 218D rather than one floating diffusion region (e.g., four photodiodes exposed to red "R" light, four photodiodes exposed to green "G" light, or four photodiodes exposed to blue "B"). By doing so, in accordance with the teachings of the present invention, the shifted color filter array pattern enables the use of two floating diffusion regions rather than one floating diffusion region to read out four adjacent photodiodes of the same color at the same time, thereby achieving a high full well capacity (FWC) and an increased read speed with two floating diffusion regions because it takes only one read cycle to read all four adjacent photodiodes.

[0041] For illustration, Figure 3 Shown is a schematic diagram of a readout of a column of groupings of photodiodes in a color pixel array 302 of an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention. It should be understood that Figure 3 the color pixel array 302 can be an example of the pixel circuitry in the color pixel array 202B discussed in Figure 2B or the pixel array 102 as discussed in Figures 1A to 1B and the similarly named and numbered elements described above are coupled and operate similarly hereinafter.

[0042] In the example shown in Figure 3 a column of pixel circuits 304 is shown. As can be appreciated, Figure 3 each pixel circuit 304 shown in Figure 1B can be another example of the pixel circuit 104 described in Figure 1B Thus, the similarly named and numbered elements described above in Figure 3 can be coupled and operate similarly in Figure 2B In addition, the column of pixel circuits 304 can be a schematic example of the leftmost column of the color pixel array 202B shown in Figure 3 which includes filters that are green, blue, green, blue, and green from top to bottom along the column. As shown, in Figure 3 each pixel circuit 304 includes a 2x2 grouping of four photodiodes 314. In the depicted example, the pixel circuits 304 in the top row R of the color pixel array 302 include green "G" photodiodes 314-1, 314-2 at the top and blue "B" photodiodes 314-3, 314-4 at the bottom. Similarly, the pixel circuits 304 in the subsequent rows R+1, R+2, and R+3 include a repeating pattern of blue "B" and green "G", green "G" and blue "B", and blue "B" and green "G" photodiodes, etc. along the column from top to bottom.

[0043] In Figure 3 the example illustrated in, during READ PERIOD 1, the photodiode 314 under the blue "B" filter is read out as shown. In Figure 3 the photodiode 314 under the blue "B" filter in is marked with "B" and is within the virtual ellipse line under READ PERIOD 1. The transfer transistor 316 coupled to the photodiode 314 under the blue "B" filter is selectively turned on as shown, and the transfer transistor 316 coupled to the photodiode 314 under the blue "B" filter is selectively turned off as shown. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 316 of each pixel circuit 304 are turned on at a certain moment. Accordingly, each corresponding floating diffusion region 318 in each pixel circuit 304 is selectively coupled to receive the image charge generated from only two of the four photodiodes 314 under the blue "B" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 314 are turned on, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 318 is not exceeded.

[0044] Each buffer transistor 324 of each pixel circuit 304 generates a corresponding output signal 330 in response to the image charge transferred to the corresponding floating diffusion region 318 through the two corresponding transfer transistors 316 that are selectively turned on. As shown in the example, a pair of bit lines 312 are coupled to each column of the pixel circuit 304. In the depicted example, the buffer transistors 324 of the pixel circuits 304 in rows R and R + 1 are coupled to the first bit line BL1 312-1 through the corresponding selection transistors 326, and the buffer transistors 324 of the pixel circuits 304 in rows R + 2 and R + 3 are coupled to the second bit line BL2 312-2. In one example, it should be understood that the buffer transistors 324 in the columns of the pixel circuits 304 coupled to the first bit line BL1 312-1 through the corresponding selection transistors 326 can be regarded as being in the first group of buffer transistors, and the buffer transistors 324 coupled to the second bit line BL2 312-2 can be regarded as being in the second group of buffer transistors. In the depicted example, it should be understood that the buffer transistors 324 of each corresponding pixel circuit 304 can be coupled to a pair of bit lines 312 along the column from top to bottom in a repeating pattern of N buffer transistors 324 in the first group (e.g., rows R and R + 1) and N buffer transistors 324 in the second group (e.g., rows R + 2 and R + 3), etc. In Figure 3 the example shown in, N = 2.

[0045] In as Figure 3During READ PERIOD 1 as shown, both the output signal 330-0 from the pixel circuit 304 of row R and the output signal 330-1 from the pixel circuit 304 of row R+1 are coupled to be received by the first bit line BL1 312-1. Similarly, both the output signal 330-2 from the pixel circuit 304 of row R+2 and the output signal 330-3 from the pixel circuit 304 of row R+3 are coupled to be received by the second bit line BL2 312-2. In the depicted example, each bit line 312 is coupled to receive at most two output signals 330 from at most two buffer transistors 324 at a certain moment. In one example, the output signal 330 generated by each buffer transistor 324 includes current. Thus, the total output signal 332 is the sum of the currents received by the first bit line BL1 312-1, and the total output signal 334 is the sum of the currents received by the second bit line BL2 312-2.

[0046] Thus, in Figure 3 the example shown, the total output signal 332 of the first bit line BL1 312-1 represents the image charges photogenerated in the four photodiodes 314 under the blue "B" filter in rows R and R+1 of the column. Similarly, the total output signal 334 of the second bit line BL2 312-2 represents the image charges photogenerated in the four photodiodes 314 under the blue "B" filter in rows R+2 and R+3 of the column. As can be appreciated, according to the teachings of the present invention, the image charges read from each four-photodiode group of blue "B" photodiodes are read via two floating diffusion regions rather than one floating diffusion region.

[0047] Continuing Figure 3 with the example shown, the photodiodes 314 under the green "G" filter are read during READ PERIOD 2 as shown. In Figure 3The photodiode 314 under the green "G" filter is marked with "G" and is within the virtual ellipse line under READPERIOD 2. The transfer transistor 316 coupled to the photodiode 314 under the green "G" filter is selectively turned on as shown, and the transfer transistor 316 not coupled to the photodiode 314 under the green "G" filter is selectively turned off as shown. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 316 of each pixel circuit 304 are turned on at a certain moment. Consequently, each corresponding floating diffusion region 318 in each pixel circuit 304 is selectively coupled to receive the image charge generated from only two of the four photodiodes 314 under the green "G" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 314 are turned on, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 318 is not exceeded.

[0048] Each buffer transistor 324 of each pixel circuit 304 generates a corresponding output signal 330 in response to the image charge transferred to the corresponding floating diffusion region 318 through the two selectively turned-on corresponding transfer transistors 316. Thus, in the Figure 3 example shown, during READ PERIOD 2, the total output signal 332 of the first bit line BL1 312-1 represents the image charge generated by the photogeneration in two of the four photodiodes 314 under the green "G" filter in rows R and R+1 of the column. Similarly, the total output signal 334 of the second bit line BL2 312-2 represents the image charge generated by the photogeneration in two of the four photodiodes 314 under the green "G" filter in rows R+2 and R+3 of the column. As can be understood, according to the teachings of the present invention, the image charge read from each four-photodiode group of green "G" photodiodes is read via two floating diffusion regions rather than one floating diffusion region.

[0049] Thus, it should be understood that with Figure 3 the example color pixel array 302 illustrated, only two read cycles are needed to read two rows of a 2x2 group of photodiodes (i.e., 4C cells). However, it should be noted that in the Figure 3 depicted example, the pair of green "G" photodiodes in rows R / R+1 read via the first bit line BL1 312-1 and the pair of green "G" photodiodes in rows R+2 / R+3 read via the second bit line BL2 312-2 are not adjacent photodiode pairs, which may result in a vertical resolution of the green channel lower than the ideal vertical resolution. It should be understood that since the pairs of red "R" photodiodes are also not adjacent in rows R / R+1 and rows R+2 / R+3, the red channel in the next column to the right of the pixel array 302 will also suffer a similar degradation in vertical resolution.

[0050] Figure 4 An example of a readout showing another example schematic of a grouping of photodiodes in a color pixel array 402 of an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown. It should be understood that Figure 4 the color pixel array 402 may be another example of a pixel circuit system of the example discussed above in Figures 2B to 3 or a pixel array 102 as discussed in Figures 1A to 1B and the similarly named and numbered elements described above are coupled and function similarly hereinafter.

[0051] In the example shown in Figure 4 columns of pixel circuits 404 are shown. Similar to the example illustrated in Figure 3 each pixel circuit 404 shown in Figure 4 is another example of the pixel circuit 104 described in Figure 1B Accordingly, the similarly named and numbered elements described above in Figure 1B may be coupled and function similarly in Figure 4 In addition, the columns of pixel circuits 404 may be a schematic example of the leftmost column of the color pixel array 202B shown in Figure 2B which includes a repeating pattern of green, blue, green, blue, and green color filters from top to bottom. As shown, in Figure 4 each pixel circuit 404 includes a 2x2 grouping of four photodiodes 414. In the depicted example, the pixel circuits 404 in the top row R of the color pixel array 402 include green "G" photodiodes 414-1, 414-2 at the top and blue "B" photodiodes 414-3, 414-4 at the bottom. Similarly, the pixel circuits 404 in the subsequent rows R+1, R+2, and R+3 include a repeating pattern of blue "B" and green "G", green "G" and blue "B", and blue "B" and green "G" photodiodes from top to bottom.

[0052] In another example, it should be understood that Figure 4 an example is also illustrated in which phase detection autofocus photodiodes (PDAFs) may be interspersed in the pixel circuits 404 of the color pixel array 402 to provide phase detection autofocus information to the imaging system. In the example depicted in Figure 4 some groupings of green "G" photodiodes are thus configured instead as PDAF photodiodes, which are labeled "PD" in Figure 4 Specifically, in Figure 4In the example described, the pixel circuits 404 in the top row R of the color pixel array 402 can alternatively be the PDAF photodiodes "PD" 414-1, 414-2 on the top, and the blue "B" photodiodes 414-3, 414-4 on the bottom. Similarly, the row R+3 of the pixel circuits 404 alternatively includes the blue "B" photodiodes on the top and the PDAF photodiodes "PD" on the bottom. In the example, Figure 4 the pattern described can continue along the columns of the pixel circuits. In one example, the PDAF photodiodes "PD" are disposed under corresponding PDAF lenses that are also scattered throughout the color pixel array 402.

[0053] In the depicted example, the photodiodes 414 under the blue "B" filter are read out during READ PERIOD 1 as shown. In Figure 4 the photodiodes 414 under the blue "B" filter in are marked with "B" and within the virtual ellipse line under READ PERIOD 1. The transfer transistors 416 coupled to the photodiodes 414 under the blue "B" filter are selectively turned on as shown, and the transfer transistors 416 not coupled to the photodiodes 414 under the blue "B" are selectively turned off as shown. Thus, it should be noted that, in accordance with the teachings of the present invention, only two of the four transfer transistors 416 of each pixel circuit 404 are turned on at a given time. Accordingly, each corresponding floating diffusion region 418 in each pixel circuit 404 is selectively coupled to receive image charges generated from only two of the four photodiodes 414 under the blue "B" filter in each 2x2 grouping of photodiodes. Since only two of the four transfer transistors 414 are turned on, it should be appreciated that, in accordance with the teachings of the present invention, the full well capacity of each floating diffusion region 418 is not exceeded.

[0054] Each buffer transistor 424 of each pixel circuit 404 generates a corresponding output signal 430 in response to image charge transferred to a corresponding floating diffusion region 418 through two corresponding transfer transistors 416 selectively turned on. As shown in the example, a pair of bitlines 412 are coupled to each column of the pixel circuit 404. In the depicted example, the buffer transistors 424 of the pixel circuits 404 in rows R and R+1 are coupled to a first bitline BL1 412-1 through corresponding selection transistors 426, and the buffer transistors 424 of the pixel circuits 404 in rows R+2 and R+3 are coupled to a second bitline BL2 412-2. In one example, it should be understood that the buffer transistors 424 in the columns of the pixel circuits 404 coupled to the first bitline BL1 412-1 through corresponding selection transistors 426 can be regarded as being in a first group of buffer transistors, and the buffer transistors 424 coupled to the second bitline BL2 412-2 can be regarded as being in a second group of buffer transistors. In the depicted example, it should be understood that the buffer transistors 424 of each corresponding pixel circuit 404 can be coupled to the pair of bitlines 412 from top to bottom along the column in a repeating pattern of N buffer transistors 424 in a first group (e.g., rows R and R+1) and N buffer transistors 424 in a second group (e.g., rows R+2 and R+3), etc. In Figure 4 the example shown, N = 2.

[0055] In Figure 4 during READ PERIOD 1 as shown, both the output signal 430-0 from the pixel circuit 404 in row R and the output signal 430-1 from the pixel circuit 404 in row R+1 are coupled to be received by the first bitline BL1 412-1. Similarly, both the output signal 430-2 from the pixel circuit 404 in row R+2 and the output signal 430-3 from the pixel circuit 404 in row R+3 are coupled to be received by the second bitline BL2 412-2. In the depicted example, each bitline 412 is coupled to receive at most two output signals 430 from at most two buffer transistors 424 at a certain moment. In one example, the output signal 430 generated by each buffer transistor 424 includes current. Therefore, the total output signal 432 is the sum of the currents received by the first bitline BL1 412-1, and the total output signal 434 is the sum of the currents received by the second bitline BL2 412-2.

[0056] Therefore, in Figure 4In the example shown, the total output signal 432 of the first bit line BL1 412-1 represents the image charges generated by photo-generation in four photodiodes 414 under the blue "B" filter in rows R and R+1 of the column. Similarly, the total output signal 434 of the second bit line BL2 412-2 represents the image charges generated by photo-generation in four photodiodes 414 under the blue "B" filter in rows R+2 and R+3 of the column. As can be appreciated, according to the teachings of the present invention, the image charges read out from each four-photodiode group of blue "B" photodiodes are read via two floating diffusion regions rather than one floating diffusion region.

[0057] Continue Figure 4 In the example shown, the photodiodes 414 under the green "G" filter are read during READ PERIOD 2 as shown. In Figure 4 the photodiodes 414 under the green "G" filter in are marked with "G" and within the dashed ellipse line under READ PERIOD 2. In an example where PDAF photodiodes are interspersed among conventional image sensing photodiodes, the photodiodes marked "PD" can also be read during this read cycle.

[0058] Figure 4 One difference between the example depicted and Figure 3 the example depicted in is that in Figure 4 the example depicted in, only some of the green "G" or some of the PDAF photodiodes "PD" are read during each read cycle. In this example, the other green "G" or other PDAF photodiodes "PD" are read during a separate read cycle. In this example, the readings from the green photodiodes "G" or PDAF photodiodes "PD" are stored and can then be combined separately with the separate readings from the remaining green photodiodes "G" or PDAF photodiodes "PD" to provide a full readout signal.

[0059] For illustration, Figure 4The example depicted in shows that the transfer transistors 416 coupled to the photodiodes 414 under the green "G" filter or under the PDAF lens "PD" are selectively turned on in the pixel circuit 404 in row R and in the pixel circuit 404 in row R+2 as shown. The transfer transistors 416 not coupled to the photodiodes 414 under the green "G" filter or the PDAF lens "PD" in row R or row R+2 are selectively turned off as shown. Additionally, any transfer transistors 416 in the pixel circuits 404 in rows R+1 or R+3 are not turned on. Thus, it should be noted that, in accordance with the teachings of the present invention, only two of the four transfer transistors 416 in each pixel circuit 404 in row R and in row R+2 are turned on at a given time. Consequently, each corresponding floating diffusion region 418 selectively coupled to receive image charge in each pixel circuit 404 receives image charge generated from only two of the four photodiodes 414 in each 2x2 grouping of photodiodes 414 in rows R and R+2. Since at most only two of the four transfer transistors 414 are turned on in the pixel circuits being read out, it should be appreciated that, in accordance with the teachings of the present invention, the full well capacity of each floating diffusion region 418 is not exceeded during READ PERIOD 2.

[0060] Each buffer transistor 424 of each pixel circuit 404 generates a corresponding output signal 430 in response to the image charge transferred to the corresponding floating diffusion region 418 by the selectively turned on corresponding transfer transistor 416. Thus, in the example shown in Figure 4 during READ PERIOD 2, the total output signal 432 for the first bit line BL1 412-1 is received from the output signal 430-0, which is received through the select transistor 426 of row R and represents the image charge photogenerated in two of the photodiodes 414 under the green "G" filter or the PDAF lens "PD" in row R of the column. It should be noted that the select transistor 426 of row R+1 is turned off during READ PERIOD 2.

[0061] Similarly, during READ PERIOD 2, the total output signal 434 for the second bit line BL1 412-2 is received from the output signal 430-2, which is received through the select transistor 426 of row R+2 and represents the image charge photogenerated in two of the photodiodes 414 under the green "G" filter in row R+2 of the column. It should be noted that the select transistor 426 of row R+3 is turned off during READ PERIOD 2.

[0062] Continue Figure 4The example shown in READ PERIOD 3 reads out the remaining photodiodes 414 under the green "G" filter or under the PDAF lens "PD" as shown. In Figure 4 The remaining photodiodes 414 under the green "G" filter or the PDAF lens "PD" in are marked with "G" and within the virtual ellipse line under READ PERIOD 3. In the example, the photodiodes 414 read out during READ PERIOD 3 under the green "G" filter or under the PDAF lens "PD" can have their readings combined with the individual readings of other photodiodes 414 read out at different times under the green "G" filter or under the PDAF lens "PD". Thus, it should be understood that the readout of the photodiodes 414 under the green "G" filter or under the PDAF lens "PD" is combined with the readout of adjacent photodiodes 414 under the green "G" filter or under the PDAF lens "PD" to achieve an improved resolution in the vertical direction compared to the example discussed in Figure 3 . It should be understood that this benefit is also provided in the next column to the right of the red channel.

[0063] As Figure 4 shown in the example depicted, the transfer transistors 416 coupled to the photodiodes 414 under the green "G" filter or under the PDAF lens "PD" are selectively turned on in the pixel circuits 404 of row R+1 or in the pixel circuits 404 of row R+3 as shown. The transfer transistors 416 not coupled to the photodiodes 414 under the green "G" filter or the PDAF lens "PD" in row R+1 or row R+3 are selectively turned off as shown. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 416 in each pixel circuit 404 in row R+1 and in row R+3 are turned on at a given time. Additionally, none of the transfer transistors 416 in the pixel circuits 404 of row R or R+2 are turned on because these photodiodes have already been read out individually in READ PERIOD 2. Thus, each corresponding floating diffusion region 418 selectively coupled to receive image charge in each pixel circuit 404 receives image charge generated by only two of the four photodiodes 414 in each 2x2 group of photodiodes 414 from the photodiodes in row R+1 and row R+3 and not from any photodiodes in row R and row R+2. Since at most only two of the four transfer transistors 414 are turned on in the pixel circuits 404 being read out, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 418 is not exceeded during READ PERIOD 3.

[0064] Each buffer transistor 424 of each pixel circuit 404 generates a corresponding output signal 430 in response to image charges transferred to a corresponding floating diffusion region 418 through a corresponding transfer transistor 416 selectively turned on. Thus, in the example shown in Figure 4 , during READ PERIOD 3, a total output signal 432 is received from the output signal 430-1 of the first bit line BL1 412-1, and the output signal 430-1 is received through the selection transistor 426 of row R+1, and represents the image charges generated by photo-generation in two photodiodes 414 under the green "G" color filter in row R+1 of the column. It should be noted that the selection transistor 426 of row R is turned off during READ PERIOD 3.

[0065] Similarly, during READ PERIOD 3, a total output signal 434 is received from the output signal 430-3 of the second bit line BL1 412-2, and the output signal 430-3 is received through the selection transistor 426 of row R+3, and represents the image charges generated by photo-generation in two photodiodes 414 under the green "G" color filter or the PDAF lens "PD" in row R+3 of the column. It should be noted that the selection transistor 426 of row R+2 is turned off during READ PERIOD 3.

[0066] It should be noted that according to the teachings of the present invention, the readout of the green "G" photodiodes from the pixel circuits 404 of row R+1 during READ PERIOD 3 can be combined with the stored readout of the green "G" photodiodes from the pixel circuits 404 of row R+2 during READ PERIOD 2 to achieve improved resolution in the vertical direction. In addition, it should be understood that according to the teachings of the present invention, the readout of the green "G" photodiodes or the PDAF photodiodes "PD" from the pixel circuits 404 of row R during READ PERIOD 2 or the readout of the green "G" photodiodes or the PDAF photodiodes "PD" from the pixel circuits 404 of row R+3 during READ PERIOD 3 can also be combined with the stored readouts of the green "G" photodiodes or the PDAF photodiodes "PD" from different read cycles to achieve improved resolution in the vertical direction.

[0067] Figures 5A to 5E An example of the readout showing another schematic diagram of a column of groupings of photodiodes included in a color pixel array 502 of an imaging system having a shifted color filter array pattern and bit line pairs according to the teachings of the present invention is shown. It should be understood that Figures 5A to 5E the color pixel array 502 can be the pixel circuit system discussed above in Figures 2B to 4 or as Figures 1A to 1BAnother example of the pixel array 102 as discussed, and similarly named and numbered elements as described above are similarly coupled and operative hereinafter.

[0068] In Figures 5A to 5E the example shown, a column of pixel circuits 504 is shown. Note that Figures 5A to 5E illustrates a single column of pixel circuits 504 and Figures 5A to 5E the bottom of the column on the left side of Figures 5A to 5E continues at the upper right side of the pixel circuit 504 of Figures 5A to 5E Thus, “below” the pixel circuit 504 in row N on the lower left side of Figures 5A to 5E is the pixel circuit 504 in row N+1 on the upper right side of

[0069] Similar to Figures 3 to 4 the example illustrated in Figures 5A to 5E each pixel circuit 504 shown in Figure 1B is another example of the pixel circuit 104 described in Figure 1B Thus, similarly named and numbered elements as described above in Figures 5A to 5E may be similarly coupled and operative in Figure 2B In addition, the column of pixel circuits 504 may be a schematic example of the leftmost column of the color pixel array 202B shown in Figures 5A to 5E which includes a repeating pattern of green, blue, green, blue, and green color filters from top to bottom. As shown, in

[0070] In Figures 5A to 5E the example of, the pixel circuit 504 in row 1 of the color pixel array 502 includes green “G” photodiodes, or in another example PDAF photodiodes “PD” 514-1, 514-2 at the top and blue “B” photodiodes 514-3, 514-4 at the bottom. Similarly, the pixel circuits 504 in subsequent rows 2, …, N-1, N, N+1, N+2, …, 2N-1 and 2N include a repeating pattern of blue “B” and green “G”, green “G” and blue “B”, blue “B” and green “G”, green “G” and blue “B”, blue “B” and green “G”, green “G” and blue “B”, blue “B” and green “G” photodiodes etc. from top to bottom along the column. In another example which includes PDAF photodiodes “PD”, it should be understood that the green “G” photodiodes in the pixel circuits 504 of rows N, N+1 and 2N are replaced with PDAF photodiodes “PD” as shown.

[0071] Thus, it should be understood that Figures 5A to 5EThe example illustration of pixel circuit 504 shown therein illustrates 2N pixel circuits 504, where N = 4, because in Figures 5A to 5E the specific example shown therein illustrates eight pixel circuits 504. However, in other examples, it should be understood that N can be a lower or higher number, for example, N = 8 and so on. In the depicted example, there is a repeating pattern where for the first N rows of the column of pixel circuits 504 there are selection transistors 526 coupled to the first bit line BL1 512-1 and for the next N rows of the pixel circuits 504 there are selection transistors coupled to the second bit line BL2 512-2 and so on. In an example with a distributed PDAF photodiode "PD", the PDAF photodiode "PD" is located in rows 1, N, N + 1, and 2N as shown. In one example, it should be understood that buffer transistors 524 in the column of pixel circuits 504 coupled to the first bit line BL1 512-1 through corresponding selection transistors 526 can be considered in a first group of buffer transistors, and buffer transistors 524 coupled to the second bit line BL2 512-2 through corresponding selection transistors 526 can be considered in a second group of buffer transistors.

[0072] Figure 5A The example depicted in Figure 5A shows READ PERIOD 1, during which green "G" photodiodes or PDAF photodiodes "PD" are read from rows 1 and N + 1. Thus, in an example where N = 4, green "G" photodiodes or PDAF photodiodes "PD" are read from row 1 and from row 5. Similarly, in an example where N = 8, green "G" photodiodes or PDAF photodiodes "PD" are read from row 1 and from row 9 and so on. In

[0073] The transfer transistors 516 coupled to the photodiodes 514 under the green "G" filter or the PDAF photodiode "PD" are selectively turned on in rows 1 and N+1 as shown, and the transfer transistors 516 not coupled to the photodiodes 514 under the green "G" filter or the PDAF photodiode "PD" are selectively turned off as shown. All transfer transistors in the pixel circuits 504 of rows 2, …, N-1, N, N+2, …, 2N-1 and 2N are turned off. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 516 of each pixel circuit 504 are turned on in the pixel circuits 504 read out during READ PERIOD 1 at a certain moment. Thus, each corresponding floating diffusion region 518 in each pixel circuit 504 read out is selectively coupled to receive the image charge generated by only two of the four photodiodes 514 in each 2x2 group of photodiodes under the green "G" filter or the PDAF photodiode "PD". Since only two of the four transfer transistors 514 are turned on in the pixel circuits 504 read out from rows 1 and N+1 during READ PERIOD 1 at a certain moment, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 518 is not exceeded.

[0074] Each buffer transistor 524 of each pixel circuit 504 generates a corresponding output signal 530 in response to the image charge transferred to the corresponding floating diffusion region 518 through the two corresponding transfer transistors 516 selectively turned on. In Figure 5A during READ PERIOD 1, only the buffer transistors 524 of the pixel circuits 504 in rows 1 and N+1 generate the corresponding output signals 530-1, 530-5 because the pixel circuits 504 in rows 2, …, N-1, N, N+2, …, 2N-1 and 2N are not read out during READ PERIOD 1. As shown in the example, a pair of bit lines 512 are coupled to each column of the pixel circuits 504. In the depicted example, the buffer transistors 524 of the pixel circuits 504 in rows 1 and N+1 are respectively coupled to the first bit line BL1 512-1 through the corresponding selection transistors 526 and are coupled to the second bit line BL2 512-2.

[0075] During READ PERIOD 1 as shown in Figure 5A the output signal 530-1 from the pixel circuit 504 in row 1 is coupled to be received by the first bit line BL1 512-1, and the output signal 530-5 from the pixel circuit 504 in row N+1 is coupled to be received by the second bit line BL2 512-2. In Figures 5A to 5EIn the example depicted, each bit line 512 is coupled to receive at most two output signals 530 from at most two buffer transistors 524 at a given time. In Figure 5A In the specific example depicted, during READ PERIOD 1, each bit line 512 is coupled to receive only one output signal 530-1, 530-5 from the buffer transistors 524 of the pixel circuits 504 of rows 1 and N+1, respectively, at a given time. In one example, the output signal 530 generated by each buffer transistor 524 includes current. Thus, the total output signal 532 is the sum of the currents received by the first bit line BL1 512-1, and the total output signal 534 is the sum of the currents received by the second bit line BL2 512-2. Since the first bit line BL1 512-1 and the second bit line BL2 512-2 receive only one output signal 530 during READ PERIOD 1, the total output signal 532 is equal to the output signal 530-1 and the total output signal 534 is equal to the output signal 530-5 during READ PERIOD 1.

[0076] Figure 5B The example depicted shows READ PERIOD 2, during which the blue "B" photodiodes are read out from rows 1 and 2 and from rows N+1 and N+2. Thus, in an example where N = 4, the blue "B" photodiodes are read out from rows 1 and 2 and from rows 5 and 6. Similarly, in an example where N = 8, the blue "B" photodiodes are read out from rows 1 and 2 and from rows 9 and 10, and so on. In Figure 5B The photodiodes 514 being read out and under the blue "B" filter are within the virtual ellipse line during READ PERIOD 2.

[0077] The transfer transistors 516 coupled to the photodiodes 514 under the blue "B" filter are selectively turned on in rows 1 and 2 as shown, and the transfer transistors 516 not coupled to the photodiodes 514 under the blue "B" filter are selectively turned off as shown. All transfer transistors in the pixel circuits 504 of the remaining rows N - 1, N, N + 2, …, 2N - 1 and 2N are turned off. Thus, it should be noted that in accordance with the teachings of the present invention, at a certain moment during READ PERIOD 2, only two of the four transfer transistors 516 of each pixel circuit 504 are turned on in the pixel circuits 504 read out from rows 1 and 2 and rows N + 1 and N + 2. Consequently, each corresponding floating diffusion region 518 in each pixel circuit 504 read out is selectively coupled to receive image charges generated from only two of the four photodiodes 514 under the blue "B" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 514 are turned on in the pixel circuits 504 read out from rows 1 and 2 and rows N + 1 and N + 2 at a certain moment during READ PERIOD 2, in accordance with the teachings of the present invention, the full well capacity of each floating diffusion region 518 is not exceeded.

[0078] Each buffer transistor 524 of each pixel circuit 504 generates a corresponding output signal 530 in response to the image charges transferred to the corresponding floating diffusion region 518 through the two corresponding transfer transistors 516 selectively turned on. In Figure 5B during READ PERIOD 2, only the buffer transistors 524 of the pixel circuits 504 in rows 1 and 2 and rows N + 1 and N + 2 generate the corresponding output signals 530 - 1 and 530 - 2 and output signals 530 - 5 and 530 - 6 respectively, because the pixel circuits 504 of the remaining rows N - 1, N, …, 2N - 1 and 2N are not read out during READ PERIOD 2. As shown in the example, a pair of bit lines 512 are coupled to each column of the pixel circuits 504. In the depicted example, the buffer transistors 524 of the pixel circuits 504 in rows 1 and 2 and rows N + 1 and N + 2 are coupled to the first bit line BL1 512 - 1 and the second bit line BL2 512 - 2 through the corresponding selection transistors 526 respectively.

[0079] In as Figure 5BDuring READ PERIOD 2 as shown, the output signals 530-1 and 530-2 of the pixel circuits 504 from rows 1 and 2 are coupled to be received by the first bit line BL1 512-1, and the output signals 530-5 and 530-6 of the pixel circuits 504 from rows N+1 and N+2 are coupled to be received by the second bit line BL2 512-2. Therefore, the total output signal 532 is the sum of the currents received by the first bit line BL1 512-1, which is equal to the sum of the output signals 530-1 and 530-2 of the pixel circuits 504 from rows 1 and 2 during READ PERIOD 2. Similarly, the total output signal 534 is the sum of the currents received by the second bit line BL2 512-2, which is equal to the sum of the output signals 530-5 and 530-6 of the pixel circuits 504 from rows N+1 and N+2 during READ PERIOD 2.

[0080] Therefore, in Figure 5B In the example shown, the total output signal 532 of the first bit line BL1 512-1 represents the image charges generated by light in the four photodiodes 514 under the blue "B" filter in rows 1 and 2 of the column. Similarly, the total output signal 534 of the second bit line BL2 512-2 represents the image charges generated by light in the four photodiodes 514 under the blue "B" filter in rows N+1 and N+2 of the column. As can be understood, according to the teachings of the present invention, the image charges read out from each four-photodiode group of the blue "B" photodiodes are read via two floating diffusion regions instead of one floating diffusion region.

[0081] Figure 5C The example depicted in Figure 5C shows READ PERIOD N-1, during which the green "G" photodiodes are read out from rows 2 and N-1 and from rows N+2 and 2N-1. Therefore, in the example where N = 4, the green "G" photodiodes are read out from rows 2 and 3 and from rows 6 and 7. It should be understood that in the example where N = 4, "row 2" can also be equivalent to "row N-2" and "row N+2" can also be equivalent to "row 2N-2". Therefore, in the example where N = 8, the green "G" photodiodes can also be read out from rows 6 and 7 (rows N-2 and N-1) and from rows 14 and 15 (rows 2N-2 and 2N-1), and so on. In Figure 5C the photodiodes 514 being read out and under the green "G" filter are within the virtual ellipse line under READ PERIOD N-1.

[0082] Figure 5C The operation of the color pixel array 502 in Figure 5BThe operation of the color pixel array 502 in [reference] is substantially similar, except that the green "G" photodiodes are read out from rows 2 and N-1 and rows N+2 and 2N-1 (where N = 4). Thus, in accordance with the teachings of the present invention, only two of the four transfer transistors 516 of each pixel circuit 504 are turned on in the pixel circuits 504 read out from rows 2 and N-1 and rows N+2 and 2N-1 during READ PERIOD N-1 at a certain moment. Consequently, each corresponding floating diffusion region 518 in each pixel circuit 504 being read out is selectively coupled to receive the image charge generated from only two of the four photodiodes 514 under the green "G" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 514 are turned on in the pixel circuits 504 read out from rows 2 and N-1 and rows N+2 and 2N-1 during READ PERIOD N-1 at a certain moment, it should be understood that, in accordance with the teachings of the present invention, the full well capacity of each floating diffusion region 518 is not exceeded.

[0083] In addition, during READ PERIOD N-1 as shown in Figure 5C , the output signals 530-2 and 530-3 of the pixel circuits 504 from rows 2 and N-1 are coupled to be received by the first bit line BL1 512-1, and the output signals 530-6 and 530-7 of the pixel circuits 504 from rows N+2 and 2N-1 are coupled to be received by the second bit line BL2 512-2. Thus, the total output signal 532 is the sum of the currents received by the first bit line BL1 512-1, which is equal to the sum of the output signals 530-2 and 530-3 of the pixel circuits 504 from rows 2 and N-1 during READ PERIOD N-1. Similarly, the total output signal 534 is the sum of the currents received by the second bit line BL2 512-2, which is equal to the sum of the output signals 530-6 and 530-7 of the pixel circuits 504 from rows N+2 and 2N-1 during READ PERIOD N-1.

[0084] Therefore, in the example shown in Figure 5C , the total output signal 532 of the first bit line BL1 512-1 represents the image charge generated by the four photodiodes 514 under the green "G" filter in rows 2 and N-1 of the column. Similarly, the total output signal 534 of the second bit line BL2 512-2 represents the image charge generated by the four photodiodes 514 under the green "G" filter in rows N+2 and 2N-1 of the column. As can be understood, in accordance with the teachings of the present invention, the image charge read out from each four-photodiode group of green "G" photodiodes is read via two floating diffusion regions instead of one floating diffusion region.

[0085] Figure 5D The example depicted in Figure 5D shows READ PERIOD N, during which blue "B" photodiodes are read out from rows N-1 and N and from rows 2N-1 and 2N. Thus, in the example where N = 4, blue "B" photodiodes are read out from rows 3 and 4 and from rows 7 and 8. Thus, in the example where N = 8, blue "B" photodiodes are read out from rows 7 and 8 and from rows 15 and 16, and so on. In Figure 5D The photodiode 514 being read out and under the blue "B" filter is within the virtual ellipse line under READ PERIOD N.

[0086] Figure 5D The operation of the color pixel array 502 in

[0086] can be substantially similar to the operation of the color pixel array 502 in the above Figures 5B to 5C Figures 5B to 5C , except that blue "B" photodiodes are read out from rows N-1 and N and rows 2N-1 and 2N. Thus, according to the teachings of the present invention, only two of the four transfer transistors 516 of each pixel circuit 504 are turned on in the pixel circuit 504 read out from rows N-1 and N and rows 2N-1 and 2N during READ PERIOD N at a certain moment. Thus, each corresponding floating diffusion region 518 in each pixel circuit 504 being read out is selectively coupled to receive the image charge generated from only two of the four photodiodes 514 under the blue "B" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 514 are turned on in the pixel circuit 504 read out from rows N-1 and N and rows 2N-1 and 2N during READ PERIOD N at a certain moment, it should be understood that, according to the teachings of the present invention, the full well capacity of each floating diffusion region 518 is not exceeded.

[0087] In addition, during READ PERIOD N as shown in Figure 5D Figure 5D , the output signals 530-3 and 530-4 of the pixel circuits 504 from rows N-1 and N are coupled to be received by the first bit line BL1 512-1, and the output signals 530-7 and 530-8 of the pixel circuits 504 from rows 2N-1 and 2N are coupled to be received by the second bit line BL2 512-2. Thus, the total output signal 532 is the sum of the currents received by the first bit line BL1 512-1, which is equal to the sum of the output signals 530-3 and 530-4 of the pixel circuits 504 from rows N-1 and N-1 during READ PERIOD N. Similarly, the total output signal 534 is the sum of the currents received by the second bit line BL2 512-2, which is equal to the sum of the output signals 530-7 and 530-8 of the pixel circuits 504 from rows 2N-1 and 2N during READ PERIOD N.

[0088] Thus, inFigure 5D In the example shown in Figure 5D , the total output signal 532 of the first bit line BL1 512-1 represents the image charge generated by photo-generation in the four photodiodes 514 under the blue "B" filter in rows N-1 and N of the column. Similarly, the total output signal 534 of the second bit line BL2 512-2 represents the image charge generated by photo-generation in the four photodiodes 514 under the blue "B" filter in rows 2N-1 and 2N of the column. As can be understood, according to the teachings of the present invention, the image charge read out from each four-photodiode group of blue "B" photodiodes is read via two floating diffusion regions instead of one floating diffusion region.

[0089] Figure 5E The example depicted in Figure 5E shows READ PERIOD N+1, during which the green "G" photodiodes or PDAF photodiodes "PD" are read out from row N and from row 2N. Thus, in an example where N = 4, the green "G" photodiodes or PDAF photodiodes "PD" are read out from rows 4 and 8. Thus, in an example where N = 8, the green "G" photodiodes or PDAF photodiodes "PD" are read out from rows 8 and 16, and so on. In Figure 5E the green "G" photodiodes or PDAF photodiodes "PD" being read out are within the virtual ellipse line under READ PERIOD N+1.

[0090] Figure 5E The operation of the color pixel array 502 in Figure 5E can be substantially similar to the operation of the color pixel array 502 described above Figure 5A except that the green "G" photodiodes or PDAF photodiodes "PD" are read out from rows N and 2N. Thus, according to the teachings of the present invention, only two of the four transfer transistors 516 of each pixel circuit 504 are turned on in the pixel circuits read out from rows N and 2N during READ PERIOD N+1 at a certain moment. Thus, each corresponding floating diffusion region 518 in each pixel circuit 504 being read out is selectively coupled to receive the image charge generated by only two of the four photodiodes 514 under the green "G" filter or "PD" photodiodes in each 2x2 group of photodiodes 514. Since only two of the four transfer transistors 514 are turned on in the pixel circuits 504 read out from rows N and 2N during READ PERIOD N+1 at a certain moment, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 518 is not exceeded.

[0091] In addition, in as Figure 5EDuring the READ PERIOD N+1 as shown, the output signal 530-4 of the pixel circuit 504 from row N is coupled to be received by the first bit line BL1 512-1, and the output signal 530-8 of the pixel circuit 504 from row 2n is coupled to be received by the second bit line BL2 512-2. Since only one output signal 530 is received by the first bit line BL1 512-1 and the second bit line BL2 512-2 during the READ PERIOD N+1, the total output signal 532 is equal to the output signal 530-4 and the total output signal 534 is equal to the output signal 530-8 during the READ PERIOD N+1.

[0092] Therefore, it should be understood that with Figures 5A to 5E the example color pixel array 502 illustrated, 2N rows of a 2x2 grouping of photodiodes can be read out in N+1 read cycles. Thus, in the case of N = 4, 8 rows can be read in 5 read cycles, or in the case of N = 8, 16 rows can be read in 9 read cycles, and so on. In other words, in the case of N = 8 and thus only 16 rows being read in 9 read cycles, on average only 2.25 read cycles are required to read 4 rows of a 2x2 grouping of photodiodes (i.e., 4 rows of 4C cells), because 16 / 4 = 4, and because 9 / 4 = 2.25. Additionally, it should be understood that Figures 5A to 5E the example color pixel array 502 illustrated can also accommodate the option of reading out PDAF photodiodes "PD" that are scattered among the pixel circuits 504, as discussed in accordance with the teachings of the present invention.

[0093] Figures 6A to 6C An example of the readout of a column of a grouping of photodiodes included in a color pixel array 602 of an imaging system having a shifted color filter array pattern and bit line pairs in accordance with the teachings of the present invention is shown. It should be understood that Figures 6A to 6C the color pixel array 602 of Figures 2B to 5E can be the pixel circuit system discussed above in Figures 1A to 1B or another example of the pixel array 102 as discussed in

[0094] In Figures 6A to 6C the example shown, columns of pixel circuits 604 are shown. As can be understood, Figures 6A to 6C each pixel circuit 604 shown in Figure 1B can be another example of the pixel circuit 104 described in Figure 1B Thus, the similarly named and numbered elements described above in Figures 6A to 6C can be similarly coupled and function inFigure 2B A schematic example of the leftmost column of the color pixel array 202B shown in [reference], which includes a repeating pattern of green, blue, green, blue, and green color filters from top to bottom. As Figure 6A shown in [reference], each pixel circuit 604 includes a 2x2 grouping of two photodiodes 614. In the depicted example, the pixel circuits 604 in the top row R of the color pixel array 602A include green "G" photodiodes 614-1, 614-2 at the top, and blue "B" photodiodes 614-3, 614-4 at the bottom. Similarly, the pixel circuits 604 in the subsequent rows R+1, R+2, R+3, and R+4 include a repeating pattern of blue "B" and green "G", green "G" and blue "B", blue "B" and green "G", and green "G" and blue "B" photodiodes from top to bottom. In the example, Figure 6A the pattern illustrated in [reference] can continue along the columns of the pixel circuits 604.

[0095] In another example, it should be understood that Figures 6B to 6C an example is also illustrated in which phase detection autofocus photodiodes (PDAF) can be dispersed in the pixel circuits 604 of the color pixel array 602B to provide phase detection autofocus information to the imaging system. Thus, Figures 6B to 6C one difference between the example shown in [reference] and Figure 6A the example shown in [reference] is that in Figures 6B to 6C the example shown in [reference], the green "G" photodiodes in rows R+3 and R+4 are instead configured as PDAF photodiodes, which are labeled "PD" in Figures 6B to 6C [reference]. In the example, Figures 6B to 6C the pattern illustrated in [reference] can continue along the columns of the pixel circuits 604. In one example, the PDAF photodiodes "PD" are placed under corresponding PDAF lenses that are also dispersed throughout the color pixel array 602B.

[0096] Return to reference Figure 6AIn the example depicted, during READ PERIOD 1, the photodiode 614 under the blue "B" filter is read out as shown. The transfer transistor 616 coupled to the photodiode 614 under the blue "B" filter is selectively turned on as shown, and the transfer transistor 616 not coupled to the photodiode 614 under the blue "B" filter is selectively turned off as shown. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 616 of each pixel circuit 604 are turned on at a certain moment. Consequently, each corresponding floating diffusion region 618 in each pixel circuit 604 is selectively coupled to receive image charge generated from only two of the four photodiodes 614 under the blue "B" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 614 are turned on, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 618 is not exceeded.

[0097] Each buffer transistor 624 of each pixel circuit 604 generates a corresponding output signal 630 in response to the image charge transferred to the corresponding floating diffusion region 618 through the two corresponding transfer transistors 616 selectively turned on. As shown in the example, a pair of bit lines 612 are coupled to each column of the pixel circuits 604. In the depicted example, the buffer transistors 624 of the pixel circuits 604 in rows R and R + 1 are coupled to the first bit line BL1 612-1 through the corresponding selection transistors 626, and the buffer transistors 624 of the pixel circuits 604 in rows R + 2 and R + 3 are coupled to the second bit line BL2 612-2.

[0098] In one example, it should be understood that the buffer transistors 624 in the columns of the pixel circuits 604 coupled to the first bit line BL1 612-1 through the corresponding selection transistors 626 can be regarded as being in the first group of buffers, and the buffer transistors 624 coupled to the second bit line BL2 612-2 can be regarded as being in the second group of buffer transistors.

[0099] In Figures 6A to 6C In the example depicted, it should be noted that some pixel circuits 604 include two selection transistors 626. Specifically, as shown in the depicted example, the pixel circuits 604 in rows R, R + 2, R + 4, etc. include a first selection transistor 626-1 coupled between the buffer transistor 624 and the first bit line BL1 612-1, and a second selection transistor 626-2 coupled between the buffer transistor 624 and the second bit line BL1 612-2. Thus, in the depicted example, these pixel circuits 604 have the flexibility to be selectively coupled to either the first bit line BL1 612-1 or the second bit line BL1 612-2.

[0100] Thus, in various examples, it should be understood that the plurality of buffer transistors 624 in the color pixel array can include: a first subset of buffer transistors 624 included in a first group, which is selectively coupled to a first bit line BL1 612-1 through a first selection transistor 626-1; a second subset of buffer transistors included in a second group of buffer transistors, which is selectively coupled to a second bit line BL2 612-2 through a second selection transistor 626-2; and a third subset of buffer transistors included in both the first group of buffer transistors and the second group of buffer transistors.

[0101] Thus, in the depicted example, it should be understood that the buffer transistors 624 of each corresponding pixel circuit 604 can be coupled to the pair of bit lines 612 from top to bottom in the following repeating pattern: buffer transistors 624 of the third group (e.g., row R selectively coupled to both the first bit line BL1 612-1 and the second bit line BL2 612-2 through the first and second selection transistors 626-1 and 626-2, respectively); buffer transistors 624 of the first group (e.g., row R+1 selectively coupled to the first bit line BL1 612-1 through the first selection transistor 626-1); another buffer transistor 624 of the third group (e.g., row R+2 selectively coupled to the first bit line BL1 612-1 and the second bit line BL2 612-2 through the first and second selection transistors 626-1 and 626-2, respectively); buffer transistors 624 of the second group (e.g., row R+3 selectively coupled to the second bit line BL2 612-1 through the second selection transistor 626-2), and so on. In one example, the pattern continues along the column.

[0102] During READ PERIOD 1 as shown in Figure 6A both the output signal 630-0 of the pixel circuit 604 from row R and the output signal 630-1 of the pixel circuit 604 from row R+1 are coupled to be received by the first bit line BL1 612-1. Similarly, both the output signal 630-2 of the pixel circuit 604 from row R+2 and the output signal 630-3 of the pixel circuit 604 from row R+3 are coupled to be received by the second bit line BL2 612-2. In the depicted example, each bit line 612 is coupled to receive at most two output signals 630 from at most two buffer transistors 624 at a certain moment. In one example, the output signal 630 generated by each buffer transistor 624 includes current. Thus, the total output signal 632 is the sum of the currents received by the first bit line BL1 612-1, and the total output signal 634 is the sum of the currents received by the second bit line BL2 612-2.

[0103] Thus, in Figure 6AIn the example shown during READ PERIOD 1, the total output signal 632 of the first bit line BL1 612-1 represents the image charge generated by photo-generation in four photodiodes 614 under the blue "B" filter in rows R and R+1 of the column. Similarly, the total output signal 634 of the second bit line BL2 612-2 represents the image charge generated by photo-generation in four photodiodes 614 under the blue "B" filter in rows R+2 and R+3 of the column. As can be understood, according to the teachings of the present invention, the image charge read out from each four-photodiode group of blue "B" photodiodes is read via two floating diffusion regions instead of one floating diffusion region.

[0104] Continue Figure 6A In the example depicted in, the photodiodes 614 under the green "G" filter are read during READ PERIOD 2 as shown. In Figure 6A The photodiodes 614 under the green "G" filter in are marked with "G" and are within the virtual ellipse line under READ PERIOD 2. The transfer transistors 616 coupled to the photodiodes 614 under the green "G" filter are selectively turned on as shown, and the transfer transistors 616 not coupled to the photodiodes 614 under the green "G" filter are selectively turned off as shown. Thus, it should be noted that according to the teachings of the present invention, only two of the four transfer transistors 616 of each pixel circuit 604 are turned on at a certain moment. Consequently, each corresponding floating diffusion region 618 in each pixel circuit 604 is selectively coupled to receive the image charge generated by only two of the four photodiodes 614 under the green "G" filter in each 2x2 group of photodiodes. Since only two of the four transfer transistors 614 are turned on, it should be understood that according to the teachings of the present invention, the full well capacity of each floating diffusion region 618 is not exceeded.

[0105] Each buffer transistor 624 of each pixel circuit 604 generates a corresponding output signal 630 in response to the image charge transferred to the corresponding floating diffusion region 618 by the two corresponding transfer transistors 616 selectively turned on. In the depicted example, the buffer transistors 624 of the pixel circuits 604 in rows R+1 and R+2 are coupled to the first bit line BL1 612-1 via corresponding selection transistors 626, and the buffer transistors 624 of the pixel circuits 604 in rows R+3 and R+4 are coupled to the second bit line BL2 612-2.

[0106] In as Figure 6ADuring READ PERIOD 2 as shown, both the output signal 630-1 from the pixel circuit 604 of row R+1 and the output signal 630-2 from the pixel circuit 604 of row R+2 are coupled to be received by the first bit line BL1 612-1. Similarly, both the output signal 630-3 from the pixel circuit 604 of row R+3 and the output signal 630-4 from the pixel circuit 604 of row R+4 are coupled to be received by the second bit line BL2 612-2. In the depicted example, each bit line 612 is coupled to receive at most two output signals 630 from at most two buffer transistors 624 at a certain moment. Thus, the total output signal 632 is the sum of the currents received by the first bit line BL1 612-1, and the total output signal 634 is the sum of the currents received by the second bit line BL2 612-2.

[0107] Thus, in Figure 6A the example shown during READ PERIOD 2 in, the total output signal 632 of the first bit line BL1 612-1 represents the image charges generated by photo-generation in the four photodiodes 614 under the green "G" filter of rows R+1 and R+2 of the column. Similarly, the total output signal 634 of the second bit line BL2 612-2 represents the image charges generated by photo-generation in the four photodiodes 614 under the green "G" filter of rows R+3 and R+4 of the column. As can be understood, according to the teachings of the present invention, the image charges read out from each four-photodiode group of green "G" photodiodes are read via two floating diffusion regions instead of one floating diffusion region.

[0108] It should be noted that since some rows are selectively coupled to the first bit line BL1 612-1 and the second bit line BL2 612-2 respectively through the first selection transistor 616-1 and the second selection transfer transistor 616-2 as shown, according to the teachings of the present invention, Figure 6A one difference between the example shown in and the previously described example is that all the photodiode groups of the same color to be read out (e.g., blue, green, and red in the next column) are adjacent photodiode pairs from adjacent rows, which provides improved vertical resolution. For example, Figure 6A in the example shown in, it is possible to read the blue photodiode "B" from row R+2 to the second bit line BL2 612-2 through the second transfer transistor 616-2 during READ PERIOD 1 as shown, and read the green photodiode "G" from row R+2 to the first bit line BL1 612-1 through the first transfer transistor 616-1 during READ PERIOD 2. In addition, according to the teachings of the present invention, only two read cycles are required to read out four rows (e.g., 4C units) of a 2x2 group of photodiodes.

[0109] As described above, Figures 6B to 6C illustrate another example in which a phase detection autofocus photodiode (PDAF) can be in pixel circuits 604 dispersed in color pixel array 602B to provide phase detection autofocus information to an imaging system. During READ PERIOD 1 Figures 6B to 6C the operation of color pixel array 602B in Figure 6A can be substantially similar to the operation of color pixel array 602A in Figure 6A above, during which the photodiode 614 under the blue "B" filter is read out. During READ PERIOD 2, it is also in a substantially similar manner as the way of reading out the green "G" filter from rows R+1 and R+2 of color pixel array 602A from Figures 6B to 6C that the photodiode 614 under the green "G" filter is read out from rows R+1 and R+2 of color pixel array 602B from

[0110] However, during READ PERIOD 2, the PDAF photodiode "PD" is read out from rows R+3 and R+4 of Figures 6B to 6C color pixel array 602B. Specifically, Figure 6B illustrate an example in which the left pair of PDAF photodiodes "PD" is read out from rows R+3 and R+4 of color pixel array 602B, while Figure 6C illustrate an example in which the right pair of PDAF photodiodes "PD" is read out from rows R+3 and R+4 of color pixel array 602B. Relative to the Figures 6B to 6C example illustrated in

[0111] Now specifically referring to Figure 6B the example illustrated during READ PERIOD 2 in Figure 6BDuring READ PERIOD 2, the left pair of PDAF photodiodes "PD" in rows R+3 and R+4 being read out are within the high and narrow virtual ellipse line. As shown, the transfer transistor 616-3 of row R+3 and the transfer transistor 616-1 of row R+4 selectively coupled to the "PD" photodiode 614 being read out are turned on, and as shown, the transfer transistor 616-4 of row R+3 and the transfer transistor 616-2 of row R+4 selectively coupled to the "PD" photodiode 614 not being read out are turned off.

[0112] The floating diffusion region 618 coupled to the transfer transistor 616-3 is coupled to receive charge from the "PD" photodiode 614-3 of row R+3. The floating diffusion region 618 coupled to the transfer transistor 616-1 is coupled to receive charge from the "PD" photodiode 614-1 of row R+4. Accordingly, the buffer transistor 614 of row R+3 is coupled to generate an output signal 630-3, and the output signal 630-3 is coupled to be received by the second bit line BL2 612-2 through the selection transistor 626 of row R+3 during READ PERIOD 2. Similarly, the buffer transistor 614 of row R+4 is coupled to generate an output signal 630-4, and the output signal 630-4 is also coupled to be received by the second bit line BL2 612-2 through the second selection transistor 626-2 of row R+4 during READ PERIOD 2. In one example, the output signal 630 generated by each buffer transistor 624 includes a current. Accordingly, the total output signal 634 for reading out the left pair of "PD" photodiodes is the sum of the currents received by the second bit line BL2 612-2 Figure 6B during READ PERIOD 2.

[0113] Now specifically referring to Figure 6C the example illustrated in Figure 6C During READ PERIOD 2, the right pair of PDAF photodiodes "PD" in rows R+3 and R+4 being read out are within the high and narrow virtual ellipse line. As shown, the transfer transistor 616-4 of row R+3 and the transfer transistor 616-2 of row R+4 selectively coupled to the "PD" photodiode 614 being read out are turned on, and as shown, the transfer transistor 616-3 of row R+3 and the transfer transistor 616-1 of row R+4 selectively coupled to the "PD" photodiode 614 not being read out are turned off.

[0114] The floating diffusion region 618 coupled to the transfer transistor 616-4 is coupled to receive charge from the "PD" photodiode 614-4 of row R+3. The floating diffusion region 618 coupled to the transfer transistor 616-2 is coupled to receive charge from the "PD" photodiode 614-2 of row R+4. Thus, the buffer transistor 614 of row R+3 is coupled to generate an output signal 630-3, and the output signal 630-3 is coupled to be received by the second bit line BL2 612-2 through the selection transistor 626 of row R+3 during READ PERIOD 2. Similarly, the buffer transistor 614 of row R+4 is coupled to generate an output signal 630-4, and the output signal 630-4 is also coupled to be received by the second bit line BL2 612-2 through the second selection transistor 626-2 of row R+4 during READ PERIOD 2. In one example, the output signal 630 generated by each buffer transistor 624 includes current. Thus, the total output signal 634 for reading the right pair of "PD" photodiodes is the sum of the currents received by the second bit line BL2 612-2 during Figure 6C READ PERIOD 2 of

[0115] In various examples, it should be understood that in Figures 6B to 6C , the transfer transistor control signal coupled to control the transfer transistor coupled to the left pair of PDAF photodiodes "PD" and the transfer transistor control signal coupled to control the transfer transistor coupled to the right pair of PDAF photodiodes "PD" are always complementary to each other. Thus, in one example, a single transfer transistor control signal can be generated to control the transfer transistors coupled to the PDAF photodiodes "PD". In that example, an inverter is coupled to receive the single transfer transistor control signal. In that example, the transfer transistors coupled to the left pair of PDAF photodiodes "PD" are coupled to receive the single transfer transistor control signal, and the transfer transistors coupled to the right pair of PDAF photodiodes "PD" are coupled to receive the output of the inverter coupled to receive the single transfer transistor control signal. In another similar example, the transfer transistors coupled to the right pair of PDAF photodiodes "PD" are coupled to receive the single transfer transistor control signal, and the transfer transistors coupled to the left pair of PDAF photodiodes "PD" are coupled to receive the output of the inverter coupled to receive the single transfer transistor control signal coupled to receive the single transfer transistor control signal.

[0116] Thus, it should be understood that in accordance with the teachings of the present invention, in the Figures 6B to 6CThe examples described herein can also read out PDAF photodiode "PD" information as well as conventional image photodiode information. In various examples, it should be noted that information from the left pair of PDAF photodiodes can be separated from information from the right pair of PDAF photodiodes in different spatial positions or in different frames.

[0117] The foregoing description of the illustrated examples of the invention, including what is described in the abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific examples of the invention are described herein for illustrative purposes, various modifications are possible within the scope of the invention, as will be recognized by those skilled in the relevant art.

[0118] These modifications can be made to the invention in light of the above detailed description. The terms used in the appended claims should not be construed as limiting the invention to the specific embodiments disclosed in the specification. Rather, the scope of the invention will be determined entirely by the appended claims, which are to be construed in accordance with established principles of claim interpretation.

Claims

1. An imaging device, comprising: multiple groups of photodiodes of a photodiode array, wherein each group of photodiodes includes four adjacent photodiodes in a pixel array; multiple groups of transfer transistors, wherein each group of transfer transistors is coupled to a corresponding group of photodiodes, wherein each group of transfer transistors includes four transfer transistors, and wherein each of the four transfer transistors is coupled to a corresponding one of the four photodiodes of the corresponding group of photodiodes; multiple floating diffusion regions, wherein each floating diffusion region is coupled to a corresponding group of transfer transistors, and wherein each floating diffusion region is selectively coupled to at most two of the four photodiodes of the corresponding group of photodiodes through the corresponding group of transfer transistors at a certain moment; multiple buffer transistors, wherein each buffer transistor is coupled to a corresponding floating diffusion region among the multiple floating diffusion regions, and wherein the multiple buffer transistors include a first group of buffer transistors and a second group of buffer transistors; multiple bit lines, which are arranged as pairs of bit lines, wherein each pair of bit lines is coupled to a corresponding single column of the groups of photodiodes in the pixel array, and wherein each pair of bit lines includes: a first bit line, which is selectively coupled to at most two buffer transistors of the first group of buffer transistors at a certain moment; and a second bit line, which is selectively coupled to at most two buffer transistors of the second group of buffer transistors at a certain moment; a color filter array, the color filter array including multiple groups of color filters disposed on corresponding photodiodes of the photodiode array, wherein each group of color filters includes four color filters having the same color, wherein each group of color filters overlaps with two groups of photodiodes, and wherein at a moment when the first bit line is coupled to only one buffer transistor of the first group and the second bit line is coupled to only one buffer transistor of the second group, at least one of the only one buffer transistor of the first group and the only one buffer transistor of the second group is coupled to a corresponding floating diffusion region coupled to two photodiodes, and the two photodiodes are configured as phase detection autofocus PDAF photodiodes of the pixel array.

2. The imaging device according to claim 1, wherein the two groups of photodiodes overlapping with the group of color filters are in the same single column of the groups of photodiodes in the pixel array.

3. The imaging device according to claim 1, wherein at a moment when the first bit line is coupled to two buffer transistors of the first group, the two buffer transistors of the first group are coupled to adjacent floating diffusion regions in the pixel array, and wherein at a moment when the second bit line is coupled to two buffer transistors of the second group, the two buffer transistors of the second group are coupled to adjacent floating diffusion regions in the pixel array.

4. The imaging device according to claim 1, At a moment when the first bit line is coupled to two buffer transistors of the first group, the two buffer transistors of the first group are coupled to respective floating diffusion regions each coupled to two corresponding photodiodes that both overlap color filters having the same color, and At a moment when the second bit line is coupled to two buffer transistors of the second group, the two buffer transistors of the second group are coupled to respective floating diffusion regions each coupled to two corresponding photodiodes that both overlap color filters having the same color.

5. The imaging device according to claim 1, further comprising a plurality of selection transistors, wherein the plurality of selection transistors includes a first group of selection transistors and a second group of selection transistors, wherein each selection transistor of the first group of selection transistors is coupled between the corresponding buffer transistor of the first group of buffer transistors and the first bit line in each pair of bit lines of the corresponding single column of the group of photodiodes coupled to the pixel array, and wherein each selection transistor of the second group of selection transistors is coupled between the corresponding buffer transistor of the second group of buffer transistors and the second bit line in each pair of bit lines of the corresponding single column of the group of photodiodes coupled to the pixel array.

6. The imaging device according to claim 5, wherein the plurality of groups of photodiodes are arranged in a repeating pattern along each column of the groups of photodiodes in the pixel array, and the repeating pattern sequentially includes: N adjacent groups of photodiodes coupled to the corresponding buffer transistors coupled to the first bit line through the corresponding selection transistors of the first group of selection transistors; and N adjacent groups of photodiodes coupled to the corresponding buffer transistors coupled to the second bit line through the corresponding selection transistors of the second group of selection transistors.

7. The imaging device according to claim 1, wherein each buffer transistor has a gate terminal coupled to the corresponding floating diffusion region to generate an output signal in response to image charge received by the corresponding floating diffusion region from at most two of the four photodiodes of the corresponding group of photodiodes.

8. The imaging device according to claim 7, wherein the first bit line is selectively coupled to receive the sum of the output signals from at most two buffer transistors of the first group of buffer transistors at a certain moment, and wherein the second bit line is selectively coupled to receive the sum of the output signals from at most two buffer transistors of the second group of buffer transistors at a certain moment.

9. An imaging system, comprising: a pixel array coupled to generate image data in response to incident light, the pixel array including: a plurality of groups of photodiodes, wherein each group of photodiodes includes four adjacent photodiodes in the pixel array; Multiple groups of transfer transistors, wherein each group of transfer transistors is coupled to a corresponding group of photodiodes, wherein each group of transfer transistors includes four transfer transistors, and wherein each of the four transfer transistors is coupled to a corresponding one of the four photodiodes of the corresponding group of photodiodes; Multiple floating diffusion regions, wherein each floating diffusion region is coupled to a corresponding group of transfer transistors, wherein each floating diffusion region is selectively coupled to at most two of the four photodiodes of the corresponding group of photodiodes through the corresponding group of transfer transistors at a certain moment; Multiple buffer transistors, wherein each buffer transistor is coupled to a corresponding floating diffusion region among the multiple floating diffusion regions, and wherein the multiple buffer transistors include a first group of buffer transistors and a second group of buffer transistors; Multiple bit lines, which are arranged as pairs of bit lines, wherein each pair of bit lines is coupled to a corresponding single column of a group of photodiodes in the pixel array, and wherein each pair of bit lines includes: A first bit line, which is selectively coupled to at most two buffer transistors of the first group of buffer transistors at a certain moment; and A second bit line, which is selectively coupled to at most two buffer transistors of the second group of buffer transistors at a certain moment; A color filter array, the color filter array including multiple groups of color filters disposed on corresponding photodiodes of the photodiode array, wherein each group of color filters includes four color filters having the same color, and wherein each group of color filters overlaps with two groups of photodiodes, wherein at the moment when the first bit line is coupled to only one buffer transistor of the first group and the second bit line is coupled to only one buffer transistor of the second group, at least one of the only one buffer transistor of the first group and the only one buffer transistor of the second group is coupled to a corresponding floating diffusion region coupled to two photodiodes, and the two photodiodes are configured as phase detection autofocus PDAF photodiodes of the pixel array; Control circuitry, which is coupled to the pixel array to control the operation of the pixel array; and Readout circuitry, which is coupled to the pixel array to read out the image data from the pixel array.

10. The imaging system according to claim 9, further comprising functional logic coupled to the readout circuitry to store the image data read out from the pixel array.

11. The imaging system according to claim 9, wherein the readout circuitry is coupled to read out the image data from the pixel array through the multiple bit lines.

12. The imaging system according to claim 9, wherein the two groups of photodiodes overlapping with the group of color filters are in the same single column of the groups of photodiodes in the pixel array.

13. The imaging system according to claim 9, wherein the multiple groups of color filters are arranged in a Bayer pattern.

14. The imaging system according to claim 9, wherein at the moment when the first bit line is coupled to the two buffer transistors of the first group, the two buffer transistors of the first group are coupled to adjacent floating diffusion regions in the pixel array, and wherein at the moment when the second bit line is coupled to the two buffer transistors of the second group, the two buffer transistors of the second group are coupled to adjacent floating diffusion regions in the pixel array.

15. The imaging system according to claim 9, wherein at the moment when the first bit line is coupled to the two buffer transistors of the first group, the two buffer transistors of the first group are coupled to respective floating diffusion regions each coupled to two corresponding photodiodes each overlapping a color filter having the same color, and wherein at the moment when the second bit line is coupled to the two buffer transistors of the second group, the two buffer transistors of the second group are coupled to respective floating diffusion regions each coupled to two corresponding photodiodes each overlapping a color filter having the same color.

16. The imaging system according to claim 9, wherein the pixel array further includes a plurality of selection transistors, wherein the plurality of selection transistors includes a first group of selection transistors and a second group of selection transistors, wherein each selection transistor of the first group of selection transistors is coupled between the corresponding buffer transistor of the first group of buffer transistors and the first bit line in each pair of bit lines of the corresponding single column of the group of photodiodes coupled to the pixel array, and wherein each selection transistor of the second group of selection transistors is coupled between the corresponding buffer transistor of the second group of buffer transistors and the second bit line in each pair of bit lines of the corresponding single column of the group of photodiodes coupled to the pixel array.

17. The imaging system according to claim 16, wherein the plurality of groups of photodiodes are arranged in a repeating pattern along each column of the groups of photodiodes in the pixel array, wherein the repeating pattern sequentially includes: N adjacent groups of photodiodes coupled to the corresponding buffer transistors coupled to the first bit line through the corresponding selection transistors of the first group of selection transistors; and N adjacent groups of photodiodes coupled to the corresponding buffer transistors coupled to the second bit line through the corresponding selection transistors of the second group of selection transistors.

18. The imaging system according to claim 9, wherein each buffer transistor has a gate terminal, and the gate terminal is coupled to the corresponding floating diffusion region to generate an output signal in response to image charges received by the corresponding floating diffusion region from at most two of the four photodiodes of the corresponding group of photodiodes.

19. The imaging system according to claim 18, wherein the first bit line is selectively coupled to receive the sum of the output signals from at most two of the buffer transistors of the first group of buffer transistors at a certain moment, and Wherein the second bit line is selectively coupled to receive, at a certain moment, the sum of the output signals of at most two of the buffer transistors of the second group from the buffer transistors.

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