Single-phase three-level double-buck energy storage inverter circuit

Abstract

A single-phase three-level dual-step-down energy storage inverter circuit includes switching transistors S1, S2, S3, S4, S5, S6, S7, and S8; diodes D1, D2, and D3; inductors L1 and L2; and capacitors C1 and C2. The circuit comprises a dual-step-down structure formed by the connection of switching transistors S2 and S3, diodes D1 and D2, and inductors L1 and L2, and a bidirectional switching transistor formed by the connection of switching transistors S4 and S5. This single-phase three-level dual-step-down energy storage inverter circuit eliminates the reverse recovery problem of the switching transistor body diodes and the risk of bridge arm shoot-through. Furthermore, this inverter circuit offers advantages such as low switching transistor voltage stress, low switching losses, high reliability, and high efficiency.

Description

Technical Field

[0001] This invention relates to the field of power electronic energy conversion technology, specifically a single-phase three-level dual-step-down energy storage inverter circuit. Background Technology

[0002] Energy storage inverters are the core component of microgrid energy storage systems and are crucial for enabling bidirectional energy flow. With the rapid development of microgrid power generation technology, the performance requirements for energy storage inverters are becoming increasingly stringent. Traditional energy storage inverters commonly use a two-level topology, which leads to problems such as high voltage stress on the switching transistors and a large total harmonic distortion (THD) rate in the output voltage, hindering further improvements in their performance characteristics.

[0003] Compared to two-level inverter topologies, three-level inverter topologies have the following advantages: (1) reduced voltage stress on the switching transistors, facilitating the selection of switching transistor models, while also reducing switching losses and improving system efficiency; (2) reduced losses in the filter inductor; and (3) reduced output voltage THD, improving output power quality. Therefore, researching new high-performance three-level energy storage inverter topologies is of great significance to the development of microgrid power generation technology. Summary of the Invention

[0004] This invention provides a single-phase three-level dual buck energy storage inverter circuit. The energy storage inverter circuit adopts a dual buck structure, eliminating the reverse recovery problem of the switching diode and the risk of bridge arm shoot-through. At the same time, the energy storage inverter circuit has the advantages of low switching voltage stress, low switching loss, low output harmonic content, and high reliability.

[0005] The technical solution adopted in this invention is as follows:

[0006] A single-phase three-level dual buck energy storage inverter circuit includes switching transistors S1, S2, S3, S4, S5, S6, S7, and S8, diodes D1, D2, and D3, inductors L1 and L2, and capacitors C1 and C2.

[0007] The positive terminal of capacitor C1 is connected to the drain of switching transistor S1, and the connection node forms the terminal p.

[0008] The negative terminal of capacitor C2 is connected to the source of switch S8, and the connection node forms the terminal m.

[0009] The positive terminal of capacitor C2 is connected to the negative terminal of capacitor C1 and the source of switch S4, and their connection nodes form the terminal n; the drain of switch S4 is connected to the drain of switch S5.

[0010] The drain of switch S8 is connected to the source of switch S6, the source of switch S7, the anode of diode D1, and the anode of diode D2, and the connection nodes form the endpoint d.

[0011] The source of switch S1 is connected to the drain of switch S2 and the drain of switch S3 respectively, and their connection nodes form the endpoint c.

[0012] The source of the switching transistor S3 is connected to the cathode of diode D2 and the other end of inductor L2, and the connection node forms the endpoint b.

[0013] The source of switch S2 is connected to the source of switch S5, the cathode of diode D1, and the anode of diode D3, and their connection nodes form terminal a; the cathode of diode D3 is connected to one end of inductor L1.

[0014] The drain of the switching transistor S6 is connected to the other end of the inductor L1 and the load R, respectively. L One end is connected;

[0015] The drain of the switching transistor S7 is connected to one end of the inductor L2 and the load R, respectively. L The other end is connected.

[0016] In this energy storage inverter circuit, switching transistors S2 and S3, diodes D1 and D2, inductors L1 and L2 are connected to form a dual buck converter structure.

[0017] In this energy storage inverter circuit, switching transistors S4 and S5 are connected in series to form a bidirectional switching transistor, which enables bidirectional power flow.

[0018] The endpoints p and m are connected to the output side of the bidirectional DC-DC converter, and the input side of the bidirectional DC-DC converter is connected to the energy storage battery.

[0019] The switching transistors S1 to S8 are all MOSFETs with body diodes or IGBTs.

[0020] When the energy storage inverter circuit is operating normally, it includes the following six operating modes:

[0021] Operating mode 1: The circuit operates at the output voltage u. o During the positive half-cycle, switches S1, S2, S7, and S8 are turned on, while the remaining switches are turned off. The energy storage battery supplies power to inductor L1 and load R. L Power supply, inductor L1 current i L1 Linear increase. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =+U s .

[0022] Operating mode two: The circuit operates at the output voltage u. oDuring the positive half-cycle, switches S5, S7, and S8 are turned on, while the remaining switches are turned off. The energy storage battery charges capacitor C1, causing its voltage to rise; capacitor C2 charges inductor L1 and load R. L With power supply, the voltage across capacitor C2 drops, and the current i in inductor L1 increases. L1 Linear increase. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =+1 / 2U s .

[0023] Operating mode 3: The circuit operates at the output voltage u. o During the positive half-cycle, switch S7 is turned on, and the other switches are turned off. The energy storage battery charges capacitors C1 and C2, causing the voltages of capacitors C1 and C2 to rise; the current i in inductor L1... L1 Freewheeling current flows through diode D1 and into the load R L Power supply, current i L1 Linear decrease. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =0.

[0024] Operating mode four: The circuit operates at the output voltage u. o During the negative half-cycle, switch S6 is turned on, and the other switches are turned off. The energy storage battery charges capacitors C1 and C2, causing the voltages of capacitors C1 and C2 to rise; the current i in inductor L2... L2 Freewheeling current flows through diode D2 and into load R L Power supply, current i L2 Linear decrease. In this mode, the output AC current i o =-i L2 The voltage u between endpoints a and b ab =0.

[0025] Operating mode 5: The circuit operates at the output voltage u. o During the negative half-cycle, switches S1, S3, S4, and S6 are turned on, while the remaining switches are turned off. The energy storage battery charges capacitor C2, causing its voltage to rise; capacitor C1 charges inductor L2 and load R. L With power supply, the voltage across capacitor C1 drops, and the current i in inductor L2 increases. L2 Linear increase. In this mode, the output AC current i o =-i L2 The voltage u between endpoints a and b ab =-1 / 2U s .

[0026] Operating mode six: The circuit is now operating at the output voltage u. oDuring the negative half-cycle, switches S1, S3, S6, and S8 are turned on, while the remaining switches are turned off. The energy storage battery supplies power to inductor L2 and load R. L Power supply, inductor L2 current i L2 Linear increase. In this mode, the output AC current i o =-i L2 The voltage u between endpoints a and b ab =-U s .

[0027] This invention discloses a single-phase three-level dual-step-down energy storage inverter circuit, with the following technical advantages:

[0028] 1) The circuit topology of the energy storage inverter circuit of the present invention adopts a dual buck structure, which retains the advantages of the dual buck structure, such as no reverse recovery problem of the switching diode and no bridge arm shoot-through risk.

[0029] 2) The circuit topology of the energy storage inverter circuit of this invention introduces a bidirectional switching transistor between the midpoint of the split capacitor and one bridge arm, which is ±U s The implementation of the / 2 level provides a flow path, thus enabling the topology to achieve three-level functionality.

[0030] 3) Compared with the two-level topology, the circuit topology of the energy storage inverter circuit of the present invention reduces the voltage and current stress of the switching transistor, which is beneficial to the selection of the switching transistor. At the same time, it also reduces the opening loss and output THD value, which is beneficial to improving the output power quality and increasing the power conversion efficiency.

[0031] 4) The circuit topology of the energy storage inverter circuit of the present invention uses switching transistors S1 and S8 to clamp the voltage, which improves the reliability of the topology. Attached Figure Description

[0032] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0033] Figure 1 This is a diagram of the main topology of a single-phase three-level dual-step-down energy storage inverter circuit according to the present invention.

[0034] Figure 2 This is a circuit diagram of the working mode of a single-phase three-level dual buck energy storage inverter circuit according to the present invention;

[0035] Figure 3 This is a circuit diagram of the second working mode of a single-phase three-level dual-step-down energy storage inverter circuit according to the present invention;

[0036] Figure 4 This is a three-circuit diagram of the working mode of a single-phase three-level dual-step-down energy storage inverter circuit according to the present invention;

[0037] Figure 5This is a circuit diagram showing the four operating modes of a single-phase three-level dual-step-down energy storage inverter circuit according to the present invention;

[0038] Figure 6 This is a circuit diagram showing the five operating modes of a single-phase three-level dual-step-down energy storage inverter circuit according to the present invention;

[0039] Figure 7 The present invention provides a circuit diagram of the working mode six of a single-phase three-level dual buck energy storage inverter circuit.

[0040] Figure 8 This diagram shows the six operating modes of the switching transistors S1 to S8 in the circuit of this invention.

[0041] Figure 9 This is a diagram showing the pulse signal distribution for the switching transistors S1 to S8 in the circuit of this invention.

[0042] Figure 10 The output voltage u of the circuit of this invention in steady state o and output current i o Waveform diagram.

[0043] Figure 11 The circuit of this invention provides the current i flowing through inductor L1 in steady state. L1 Waveform diagram.

[0044] Figure 12 The circuit of this invention provides the current i flowing through inductor L2 in steady state. L2 Waveform diagram.

[0045] Figure 13 The voltage u between terminals a and b in the circuit of this invention under steady state. ab Waveform diagram.

[0046] Figure 14 The voltage u across capacitors C1 and C2 in the circuit of this invention under steady state. c1 u c2 Waveform diagram. Detailed Implementation

[0047] like Figure 1 As shown, a single-phase three-level dual-buck type energy storage inverter circuit includes: an energy storage battery, a bidirectional DC-DC converter, switching transistors S1 to S8, diodes D1 to D3, inductors L1 and L2, and capacitors C1 and C2; the connection relationships between the components are as follows:

[0048] The positive terminal of capacitor C1 is connected to the drain of switching transistor S1, and the connection node forms the terminal p.

[0049] The negative terminal of capacitor C2 is connected to the source of switch S8, and the connection node forms the terminal m.

[0050] The positive terminal of capacitor C2 is connected to the negative terminal of capacitor C1 and the source of switch S4, and their connection nodes form the terminal n; the drain of switch S4 is connected to the drain of switch S5.

[0051] The drain of switch S8 is connected to the source of switch S6, the source of switch S7, the anode of diode D1, and the anode of diode D2, and the connection nodes form the endpoint d.

[0052] The source of switch S1 is connected to the drain of switch S2 and the drain of switch S3 respectively, and their connection nodes form the endpoint c.

[0053] The source of the switching transistor S3 is connected to the cathode of diode D2 and the other end of inductor L2, and the connection node forms the endpoint b.

[0054] The source of switch S2 is connected to the source of switch S5, the cathode of diode D1, and the anode of diode D3, and their connection nodes form terminal a; the cathode of diode D3 is connected to one end of inductor L1.

[0055] The drain of the switching transistor S6 is connected to the other end of the inductor L1 and the load R, respectively. L One end is connected;

[0056] The drain of the switching transistor S7 is connected to one end of the inductor L2 and the load R, respectively. L The other end is connected.

[0057] In the circuit, the switching transistors S2 and S3, diodes D1 and D2, and inductors L1 and L2 are connected to form a double buck converter structure.

[0058] In the circuit, switching transistors S4 and S5 are connected in series to form a bidirectional switching transistor.

[0059] In the circuit, the switching transistors S1 to S8 are all MOSFETs or IGBTs. Each of the switching transistors S1 to S8 is connected in reverse parallel with a diode.

[0060] The specific experimental parameters of the energy storage inverter circuit of this invention are as follows:

[0061] Output AC voltage u o The effective value is 220V, the frequency is 50Hz, and the DC voltage U on the output side of the bidirectional DC-DC converter is... s The voltage is 400V, the capacitors C1 and C2 are 4700μF, the switching frequency is 20kHz, the inductors L1 and L2 are 3mH, and the load R is... L The resistance is 80Ω.

[0062] A single-phase three-level dual-buck type energy storage inverter circuit has six operating modes during normal operation:

[0063] like Figure 2As shown, in operating mode one: the circuit operates at the output voltage u. o During the positive half-cycle, switches S1, S2, S7, and S8 are turned on, while the remaining switches are turned off. The energy storage battery supplies power to inductor L1 and load R. L Power supply, inductor L1 current i L1 Linear increase. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =+U s .

[0064] like Figure 3 As shown, in operating mode two: the circuit operates at output voltage u. o During the positive half-cycle, switches S5, S7, and S8 are turned on, while the remaining switches are turned off. The energy storage battery charges capacitor C1, causing its voltage to rise; capacitor C2 charges inductor L1 and load R. L With power supply, the voltage across capacitor C2 drops, and the current i in inductor L1 increases. L1 Linear increase. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =+1 / 2U s .

[0065] like Figure 4 As shown, in operating mode three: the circuit operates at output voltage u. o During the positive half-cycle, switch S7 is turned on, and the other switches are turned off. The energy storage battery charges capacitors C1 and C2, causing the voltages of capacitors C1 and C2 to rise; the current i in inductor L1... L1 Freewheeling current flows through diode D1 and into the load R L Power supply, current i L1 Linear decrease. In this mode, the output AC current i o =i L1 The voltage u between endpoints a and b ab =0.

[0066] like Figure 5 As shown, in operating mode four: the circuit operates at output voltage u. o During the negative half-cycle, switch S6 is turned on, and the other switches are turned off. The energy storage battery charges capacitors C1 and C2, causing the voltages of capacitors C1 and C2 to rise; the current i in inductor L2... L2 Freewheeling current flows through diode D2 and into load R L Power supply, current i L2 Linear decrease. In this mode, the output AC current i o =-i L2 The voltage u between endpoints a and b ab =0.

[0067] like Figure 6 As shown, in operating mode five: the circuit operates at output voltage u. o During the negative half-cycle, switches S1, S3, S4, and S6 are turned on, while the remaining switches are turned off. The energy storage battery charges capacitor C2, causing its voltage to rise; capacitor C1 charges inductor L2 and load R. L With power supply, the voltage across capacitor C1 drops, and the current i in inductor L2 increases. L2 Linear increase. In this mode, the output AC current i o =-i L2 The voltage u between terminals a and b ab =-1 / 2U s .

[0068] like Figure 7 As shown, in operating mode six: the circuit operates at output voltage u. o During the negative half-cycle, switches S1, S3, S6, and S8 are turned on, while the remaining switches are turned off. The energy storage battery supplies power to inductor L2 and load R. L Power supply, inductor L2 current i L2 Linear increase. In this mode, the output AC current i o =-i L2 The voltage u between terminals a and b ab =-U s .

[0069] Figure 8 This diagram illustrates the six operating modes of the switching transistors S1 to S8 in the circuit of this invention, where "1" indicates that the switching transistor is on, and "0" indicates that the switching transistor is off. Figure 8 It can be seen that the circuit has six operating modes in one working cycle. When u o When >0, voltage u ab There are 0 and +U s / 2、+U s Three states, when u o When <0, voltage u ab There are 0 and -U s / 2、-U s Three states.

[0070] Figure 9 This is a pulse signal distribution diagram corresponding to the switching transistors S1 to S8 in the circuit of this invention. Figure 9 As shown, during any two adjacent level switching periods, the switching transistors cooperate with each other to continuously switch their switching states to achieve three levels.

[0071] Figure 10 The output voltage u of the circuit of this invention in steady state o and output current i oThe waveform diagram is used to better observe the relationship between the output voltage and current. The current i... o It has been expanded tenfold from its original size. Figure 10 It can be seen that the output voltage u o and output current i o The waveforms all maintained good sinusoidal characteristics.

[0072] Figure 11 The circuit of this invention provides the current i flowing through inductor L1 in steady state. L1 Waveform diagram, by Figure 11 It can be seen that inductor L1 only operates during the positive half-cycle, which is consistent with the theoretical analysis.

[0073] Figure 12 The circuit of this invention provides the current i flowing through inductor L2 in steady state. L2 Waveform diagram, by Figure 12 It can be seen that inductor L2 only operates during the negative half-cycle, consistent with theoretical analysis.

[0074] Figure 13 The voltage u between terminals a and b in the circuit of this invention under steady state. ab Waveform diagram, from Figure 13 It can be seen that the voltage u ab The waveform conforms to the operating characteristics of a three-level circuit, proving that the invented circuit can achieve three-level functionality.

[0075] Figure 14 The voltage u across capacitors C1 and C2 in the circuit of this invention under steady state. c1 u c2 Waveform diagram, from Figure 14 It can be seen that the voltages of the two capacitors remain in dynamic equilibrium, proving that the invented circuit can effectively achieve the potential balance at the midpoint of the capacitors.

[0076] The present invention provides a single-phase three-level dual buck energy storage inverter circuit that eliminates the reverse recovery problem of the switching diode and the risk of bridge arm shoot-through. At the same time, the inverter circuit also has the advantages of low switching voltage stress, low switching loss, high reliability and high efficiency.

Claims

1. A single-phase three-level dual-step-down energy storage inverter circuit, comprising switching transistors S1, S2, S3, S4, S5, S6, S7, S8, diodes D1, D2, D3, inductors L1, L2, and capacitors C1, C2; characterized in that: The positive terminal of capacitor C1 is connected to the drain of switching transistor S1, and the connection node forms the terminal p. The negative terminal of capacitor C2 is connected to the source of switching transistor S8, and the connection node forms the terminal m. The positive terminal of capacitor C2 is connected to the negative terminal of capacitor C1 and the source of switch S4, and the connection node forms the terminal n; the drain of switch S4 is connected to the drain of switch S5. The drain of switch S8 is connected to the source of switch S6, the source of switch S7, the anode of diode D1, and the anode of diode D2, and the connection node forms the endpoint d. The source of switch S1 is connected to the drain of switch S2 and the drain of switch S3 respectively, and their connection nodes form the endpoint c. The source of the switching transistor S3 is connected to the cathode of diode D2 and the other end of inductor L2, and the connection node forms the endpoint b. The source of switch S2 is connected to the source of switch S5, the cathode of diode D1, and the anode of diode D3, and their connection nodes form terminal a; the cathode of diode D3 is connected to one end of inductor L1. The drain of the switching transistor S6 is connected to the other end of the inductor L1 and the load R, respectively. L One end is connected; The drain of the switching transistor S7 is connected to one end of the inductor L2 and the load R, respectively. L The other end is connected.

2. The single-phase three-level dual-step-down energy storage inverter circuit according to claim 1, characterized in that: In this energy storage inverter circuit, switching transistors S2 and S3, diodes D1 and D2, inductors L1 and L2 are connected to form a dual buck converter structure.

3. The single-phase three-level dual-step-down energy storage inverter circuit according to claim 1, characterized in that: In this energy storage inverter circuit, switching transistors S4 and S5 are connected in series to form a bidirectional switching transistor, which enables bidirectional power flow.

4. The single-phase three-level dual-step-down energy storage inverter circuit according to claim 1, characterized in that: The endpoints p and m are connected to the output side of the bidirectional DC-DC converter, and the input side of the bidirectional DC-DC converter is connected to the energy storage battery.

5. The single-phase three-level dual-step-down energy storage inverter circuit according to claim 1, characterized in that: The switching transistors S1 to S8 are all MOSFETs with body diodes or IGBTs.

6. The single-phase three-level dual-step-down energy storage inverter circuit according to any one of claims 1 to 5, characterized in that: When the energy storage inverter circuit is operating normally, it includes the following six operating modes: Operating mode 1: The circuit operates at the output voltage at this time. u o During the positive half-cycle, switching transistors S1, S2, S7, and S8 are turned on, while the remaining switching transistors are turned off. The energy storage battery affects the inductor L1 and the load R. L Power supply, current in inductor L1 i L1 Linear rise; in this mode, the output AC current increases linearly. i o = i L1 Voltage between endpoints a and b u ab =+U s ; Operating mode two: The circuit operates at the output voltage at this time. u o During the positive half-cycle, switches S5, S7, and S8 are turned on, while the remaining switches are turned off; the energy storage battery charges capacitor C1, causing the voltage of capacitor C1 to rise; capacitor C2 charges inductor L1 and load R. L With power supply, the voltage across capacitor C2 drops, and the current through inductor L1 increases. i L1 Linear rise; in this mode, the output AC current increases linearly. i o = i L1 Voltage between endpoints a and b u ab =+1 / 2U s ; Operating mode 3: The circuit operates at the output voltage at this time. u o During the positive half-cycle, switch S7 is turned on, and the other switches are turned off; the energy storage battery charges capacitors C1 and C2, and the voltages of capacitors C1 and C2 rise; the current in inductor L1... i L1 Freewheeling current flows through diode D1 and into the load R L Power supply, current i L1 Linear decrease; in this mode, the output AC current decreases linearly. i o = i L1 Voltage between endpoints a and b u ab =0; Operating mode four: The circuit operates at the output voltage at this time. u o During the negative half-cycle, switch S6 is turned on, and the other switches are turned off; the energy storage battery charges capacitors C1 and C2, causing the voltages of capacitors C1 and C2 to rise; the current in inductor L2... i L2 Freewheeling current flows through diode D2 and into load R L Power supply, current i L2 Linear decrease; in this mode, the output AC current decreases linearly. i o =- i L2 Voltage between endpoints a and b u ab =0; Operating mode 5: The circuit operates at the output voltage at this time. u o During the negative half-cycle, switches S1, S3, S4, and S6 are turned on, while the remaining switches are turned off; the energy storage battery charges capacitor C2, causing the voltage of capacitor C2 to rise; capacitor C1 charges inductor L2 and load R. L With power supply, the voltage across capacitor C1 drops, and the current in inductor L2 increases. i L2 Linear rise; in this mode, the output AC current increases linearly. i o =- i L2 Voltage between endpoints a and b u ab =-1 / 2U s ; Operating mode six: The circuit operates at the output voltage at this time. u o During the negative half-cycle, switches S1, S3, S6, and S8 are turned on, while the remaining switches are turned off; the energy storage battery supplies power to inductor L2 and load R. L Power supply, inductor L2 current i L2 Linear rise; in this mode, the output AC current increases linearly. i o =- i L2 Voltage between endpoints a and b u ab =-U s .

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