A dual mode microwave power amplifier circuit for electronic warfare and communication systems

Abstract

The application discloses a dual-mode microwave power amplifier circuit for electronic warfare and communication systems and belongs to the technical field of microwave integrated circuits. The dual-mode microwave power amplifier circuit comprises an ultra-wideband front-stage amplification circuit and an ultra-wideband rear-stage amplification circuit. The ultra-wideband front-stage amplification circuit amplifies input signals and adjusts gate voltages. The rear-stage amplification circuit further amplifies output signals of the front stage and outputs the signals. Both the two-stage amplification circuits can switch between ultra-wideband and single communication frequency bands through reconfigurable branches. The switching can be realized by adjusting control voltages. Moreover, the center frequency of the single passband can be changed by changing the values of capacitors and inductors in the reconfigurable branches. The mode switching between the ultra-wideband and the communication frequency band can be realized through on-chip voltage control. The performance is maintained well before and after the switching, and the problem of dual-mode operation of high-performance power amplifiers in the ultra-wideband and the communication frequency band is solved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of microwave integrated circuits, and particularly relates to a dual-mode microwave power amplifier circuit for electronic warfare and communication systems. BACKGROUND

[0002] As a core device at the end of the transmitting link, the power amplifier (PA) plays a vital role in the effective distance of the entire wireless communication system. With the development of integrated electronic technology, the demand for multi-mode operation of microwave power amplifiers is increasing. Among them, the ultra-wideband (e.g., more than 5 times the frequency range) microwave power amplifier can meet the needs of radar and electronic warfare, while the typical communication frequency band is often narrow and requires high efficiency. Therefore, how to integrate the two working modes of electronic warfare and communication has become a great challenge for integrated electronic systems.

[0003] In 2014, Anthony Ghiotto et al. of Bordeaux University in France designed an entire power amplifier with dual-mode operation of ultra-wideband and narrowband, which contains an ultra-wideband and a narrowband power amplifier. The entire power amplifier is complex and has poor efficiency. In the ultra-wideband mode, the in-band output power is greater than 18 dBm in the frequency range of 4.5-18 GHz, and the PAE is greater than 8%. In the narrowband mode, the in-band output power is greater than 30 dBm in the frequency range of 8.5-10.5 GHz, and the PAE is greater than 7%. See [A. Ghiotto, E. Kerhervé, N. Demirel, A. Larie, P. Garrec and Y. Mancuso, "Dual-mode power amplifier module with in-band reconfigurable output power for multifunctional radar and radio communication systems," 2014 International Radar Conference, 2014, pp. 1-3, doi: 10.1109 / RADAR.2014.7060397.].

[0004] In 2015, Ming-Lung Lee et al. of Taiwan University designed a multi-mode power amplifier with adjustable input matching network and broadband output matching network, which can work in three different modulation modes at 1.95, 2.35, 2.45 GHz frequencies, respectively. The gain is greater than 41 dB, and the output power is greater than 28 dBm, but it is limited to switching between several narrow communication frequency bands. See [Lee M L, Liou C Y, Tsai W T, et al. Fully Monolithic BiCMOS Reconfigurable Power Amplifier for Multi-Mode and Multi-Band Applications [J]. IEEE Transactions on Microwave Theory & Techniques, 2015, 63(2): 614-624.].

[0005] In 2016, Pierre Ferris et al. of Grenoble University in France used adjustable capacitors and switch adjustment matching network to realize a power amplifier that covers 700-900 MHz in 2G / 3G / 4G three modes, but it does not cover the electronic warfare system frequency band. See [P. Ferris, G. Tant, A. Giry, J. D. Arnould and J. M. Fournier, "A 130-nm SOI CMOS reconfigurable multimode multiband power amplifier for 2G / 3G / 4G handset applications," 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2016, pp. 254-257, doi: 10.1109 / RFIC.2016.7508299.].

[0006] In 2018, Kwangseok Choi et al. of Seoul National University in South Korea designed a 6-18GHz power amplifier based on a coupled-line diplexer that can operate in two frequency bands of 5-11GHz and 9-18GHz, respectively, but the power amplifier cannot switch between electronic warfare and communication systems, see [K. Choi, H. Park, M. Kim, J. Kim and Y. Kwon, "A 6-18-GHz Switchless Reconfigurable Dual-Band Dual-Mode PA MMIC Using Coupled-Line-Based Diplexer," in IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 12, pp. 5685-5695, Dec. 2018, doi: 10.1109 / TMTT.2018.2879356.].

[0007] In 2022, Jaehun Lee et al. of the Korea Advanced Institute of Science and Technology designed a power amplifier based on a reconfigurable transmission line transformer that can operate in two frequency bands of n257 and n260 for 5G communication, respectively, but also does not cover the electronic warfare frequency band, see [J. Lee, J.-S. Paek and S. Hong, "Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power Amplifier for 5G Communication Radios," in IEEE Transactions on Microwave Theory and Techniques, vol. 70, no. 1, pp. 801-812, Jan. 2022, doi: 10.1109 / TMTT.2021.3122533.].

[0008] Current multi-mode power amplifier designs mainly focus on switching between two or several narrow frequency bands, and do not involve switching between ultra-wideband and typical communication frequency bands (such as 2.3GHz-2.7GHz, relative bandwidth 16%). Since there is no single chip that can simultaneously realize ultra-wideband and communication frequency band dual-mode operation, the realization of high-performance power amplifiers that simultaneously cover electronic warfare systems and communication systems is still a blank. SUMMARY

[0009] The purpose of the present application is to provide a dual-mode microwave power amplifier circuit for electronic warfare and communication systems, which can realize ultra-wideband and communication frequency band dual-mode operation while ensuring high performance of the power amplifier.

[0010] To achieve the above object, the present application adopts the following technical solutions:

[0011] A dual-mode microwave power amplifier circuit for electronic warfare and communication system, comprising a front-stage amplification circuit, a rear-stage amplification circuit, and a DC blocking capacitor C B2 ;

[0012] The front-stage amplification circuit comprises a DC blocking capacitor C B1 , a stabilizing resistor R in , input matching inductors L0 and L1, a transistor Q0, an output matching inductor L2, first, second, and third reconfigurable branches, a gate power supply circuit, and a drain power supply circuit; one end of the DC blocking capacitor C B1 serves as the input of the front-stage amplification circuit, and the other end is connected in sequence to the stabilizing resistor R in , the input matching inductors L0 and L1, and the gate of the transistor Q0; the source of the transistor Q0 is grounded, and the drain is connected to one end of the output matching inductor L2, and the other end of the output matching inductor L2 is connected to one end of the DC blocking capacitor C B2 ; the first reconfigurable branch is connected in parallel between the stabilizing resistor R in and the input matching inductor L0, the second reconfigurable branch is connected in parallel between the input matching inductor L0 and the input matching inductor L1, and the third reconfigurable branch and the gate power supply circuit are both connected in parallel between the input matching inductor L1 and the gate of the transistor Q0; the three reconfigurable branches have the same structure and each comprise a capacitor C pn , an inductor L pn , a DC blocking capacitor C sn , and a switching transistor Q sn ; the capacitor C pn and the inductor L pn are connected in parallel to form a bandpass network, one end of which is connected to the drain of the switching transistor Q sn via the DC blocking capacitor C sn , and the source of the switching transistor Q sn is grounded; the gates of the switching transistor Q sn in the first, second, and third reconfigurable branches are connected and are all connected to a DC control power supply V gc ; the other end of each reconfigurable branch is connected to a corresponding access point; the gate power supply circuit is connected in parallel between the input matching inductor L1 and the gate of the transistor Q0 and comprises an input matching inductor L g , a blocking resistor R G1 , and a blocking capacitor C c1 ; one end of the input matching inductor L g is connected between the inductor L1 and the gate of the transistor Q0, and the other end is connected to one end of the blocking resistor R G1 ; the other end of the blocking resistor RG1 DC power supply V gs1 and one end of coupling capacitor C c1 , the other end of coupling capacitor C c1 is grounded; the drain power supply circuit is connected in parallel between output matching inductor L2 and DC blocking capacitor C B2 , and is composed of inductor L D1 and decoupling capacitor C c2 ; one end of inductor L D1 is connected between output matching inductor L2 and DC blocking capacitor C B2 , the other end is connected to DC power supply V ds1 and one end of decoupling capacitor C c2 , respectively, the other end of decoupling capacitor C c2 is grounded.

[0013] The post-stage amplification circuit comprises gate matching microstrip lines MLIN1, MLIN2, MLIN3, MLIN4, MLIN5, inductors L g and L d , DC blocking resistor R G2 , decoupling capacitors C c3 and C B3 , fourth, fifth and sixth reconfigurable branches, first, second and third RC networks, transistors Q1, Q2 and Q3, and a post-stage power supply circuit; one end of the gate matching microstrip line MLIN1 is connected to the other end of the DC blocking capacitor C B2 as the input of the post-stage amplification circuit, the other end is connected in sequence to inductor L g , gate matching microstrip lines MLIN2, MLIN3, one end of DC blocking resistor R G2 , the other end of DC blocking resistor R G2 is connected to one end of decoupling capacitor C c3 and power supply voltage V gs2 , respectively, the other end of decoupling capacitor C c3 is grounded; the common connection point of gate matching microstrip line MLIN1 and inductor L g is connected to one end of the first RC network and the fourth reconfigurable branch, respectively; the other end of the first RC network is connected to the gate of transistor Q1, the source of transistor Q1 is grounded, and the drain is connected to one end of inductor L d , the other end of inductor L d is connected to one end of MLIN5 through MLIN4; the other end of MLIN5 is connected to the post-stage power supply circuit and one end of decoupling capacitor C B3 , respectively, the other end of decoupling capacitor C B3 is the output of the post-stage amplification circuit; inductor L gThe common junction of the gate-matched microstrip line MLIN2 is connected to one end of the second RC network and the fifth reconfigurable stub, respectively. The other end of the second RC network is connected to the gate of transistor Q2. The source of transistor Q2 is grounded, and the drain is connected to inductor L. d The common connection between MLIN4 and MLIN5; the common connections of gate matching microstrip lines MLIN2 and MLIN3 are respectively connected to one end of the third RC network and the sixth reconfigurable stub, the other end of the RC network is connected to the gate of transistor Q3, the source of transistor Q3 is grounded, and the drain is connected to the common connection of gate matching microstrip lines MLIN4 and MLIN5; the subsequent power supply circuit includes a series inductor L D2 and the capacitor C connected in parallel to ground c4 L D2 and C c4 The common contact is connected to the DC power supply V. ds2 All three RC networks consist of resistors R n and capacitor C n The components are connected in parallel; the fourth, fifth, and sixth reconfigurable branches have the same structure as the first reconfigurable branch, and the switching transistor Q in the fourth, fifth, and sixth reconfigurable branches is... sn The gates are connected and all are connected to the DC control power supply V. gc .

[0014] It should be noted that: capacitor C pn Inductor L pn DC blocking capacitor C sn Switching transistor Q sn Resistance R n and capacitor C n The range of values ​​for n in the equation is: n = 1, 2, 3.

[0015] This invention proposes a dual-mode microwave power amplifier circuit for electronic warfare and communication systems, comprising an ultra-wideband preamplifier circuit and an ultra-wideband post-amplifier circuit. The ultra-wideband preamplifier circuit amplifies the input signal and adjusts the gate voltage, while the ultra-wideband post-amplifier circuit further amplifies the output signal from the preamplifier circuit. Both circuits can switch between ultra-wideband and single-passband modes via reconfigurable stubs. Switching is achieved by adjusting the control voltage, and the center frequency of the single passband can be changed simply by altering the values ​​of the capacitors and inductors in the reconfigurable stubs. On-chip voltage control enables mode switching between ultra-wideband and communication bands, maintaining good performance before and after switching, thus achieving dual-mode operation of a high-performance power amplifier in both ultra-wideband and communication bands. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of Example 1;

[0017] Figure 2 The image shows the simulation results of Example 1. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in conjunction with the following specific embodiments and with reference to the accompanying drawings.

[0019] Example 1

[0020] like Figure 1 As shown, this embodiment provides a dual-mode microwave power amplifier circuit for electronic warfare and communication systems, including a pre-amplifier circuit, a post-amplifier circuit, and a DC blocking capacitor C between the pre-amplifier circuit and the post-amplifier circuit. B2 The specific structures of the preamplifier and power amplifier circuits are set according to the aforementioned content and will not be repeated here. In the preamplifier circuit, the transistor input terminal is matched using an inductor, resistor, and microstrip line, and the output terminal is matched using a microstrip line. After passing through a DC blocking capacitor, it is connected to the multi-stage traveling wave amplifier circuit via a microstrip line. A reconfigurable stub is introduced into the entire circuit. By changing the control voltage of the switching transistor in the reconfigurable stub, the switching between ultra-wideband and communication bands can be achieved. Specifically:

[0021] When the control voltage V gc At -30V, the reconfigurable stub is turned off, and the power amplifier operates in ultra-wideband mode. The RF signal is first amplified by the preamplifier circuit consisting of transistor Q0 and its matching network. A smaller transistor Q0 is selected for matching to achieve flat amplification across the ultra-wideband. The RF signal output from the preamplifier circuit then passes through the DC blocking capacitor C. B2 The signal then enters the subsequent amplifier circuit. When the reconfigurable stub is turned off, the subsequent amplifier circuit is a distributed amplifier topology with a low-pass structure. The microstrip line MLIN1 at the input still participates in the output matching of transistor Q0. Transistors Q1, Q2, and Q3 are selected with different sizes to achieve optimal power and efficiency matching. The drain matching inductor L of transistor Q1... d Select an inductor for matching. DC blocking capacitor C B1 C B2 C B3 An external large capacitor is selected to effectively block DC at low frequencies, and an AC blocking inductor L is used. D1 and L D2 Choose an external large inductor to prevent low-frequency signal leakage.

[0022] When the control voltage V gc When the voltage is 0V, the bandpass network of the reconfigurable stub operates. At this time, the power amplifier operates in communication mode. This is because the gate and drain artificial transmission lines of the distributed amplifier are connected through a series inductor and the parasitic capacitance C of the transistor... gs and C dsThe artificial transmission line is a low-pass structure. When the switch tube is turned on, the series inductance of the artificial transmission line and the parasitic C of the transistor gs The parallel LC network in the reconfigurable branch forms a band-pass structure to switch the operating frequency band to a narrow frequency band and forms an out-of-band suppression. The capacitor C s The DC from the gate of the artificial transmission line is blocked so that it cannot enter the switch tube to increase the drain-source current and power consumption. The switch tube Q s The capacitor C s The addition of the capacitor C s The capacitor C is set to 1000 pF to move the low-end cutoff frequency of the band-stop network to a lower frequency to form a band-pass network again. Since the 1000 pF capacitor is too large in area on the chip, the 1000 pF capacitor is selected to be placed off-chip. The in-chip Pad of the LC network is connected to one pole of the 1000 pF double-pole ceramic capacitor through a gold wire. The other pole is connected to the switch tube through a gold wire. The parasitic inductance and resistance of the gold wire slightly affect the out-of-band suppression, but do not affect the overall operation of the power amplifier.

[0023] Since the switch tube itself can be equivalent to a series resistance and capacitance in parallel with a small capacitor when turned off, the parasitic parallel small capacitor of the switch tube resonates with the inductance L in the parallel LC network when the control voltage V gc = -30 V when the power amplifier operates in the ultra-wideband mode. Therefore, a resistance of about 1 Ω is selected in series with the inductance L in the LC network to solve the resonance problem. Although a larger resistance can completely eliminate the resonance, the large resistance will also absorb the resonance energy to make the band-pass network invalid. However, a small resistance cannot completely eliminate the influence of resonance. Since the size of the parasitic capacitor of the switch tube is positively correlated with the size of the switch tube, different sizes of switch tubes are selected in different reconfigurable branches to eliminate the influence of resonance, and the size of the selected switch tube does not deteriorate the out-of-band suppression. Figure 1 The resistance is not added to the LC parallel network and L in series in the embodiment. The parasitic resistance of the inductance itself and the appropriate size of the switch tube are combined to eliminate the influence of resonance and not to deteriorate the out-of-band suppression.

[0024] Figure 2 The simulation result graph of the embodiment 1, from Figure 2It can be known that the amplification circuit has the working frequency of 0.03-6GHz, the output power greater than 41.3dBm, the power additional efficiency greater than 48% and the gain greater than 18dB in the ultra-wideband working mode; and has the working frequency of 2.4-2.7GHz, the output power greater than 40.6dBm and the power additional efficiency greater than 49% in the single communication frequency band working mode.

[0025] In conclusion, the application provides a novel dual-mode power amplifier circuit for electronic warfare and communication system, the mode switching between the ultra-wideband and communication can be realized by adjusting the control voltage of the reconfigurable branch switch transistor, and the high-performance power amplification in the dual-mode working of the ultra-wideband and communication frequency band is realized.

Claims

1. A dual-mode microwave power amplifier circuit for electronic warfare and communication systems, comprising a pre-stage amplification circuit, a post-stage amplification circuit, a blocking capacitor C disposed between the pre-stage amplification circuit and the post-stage amplification circuit, B2 characterized in that The front-stage amplification circuit comprises a DC blocking capacitor C B1 , a stabilizing resistor R in , input matching inductors L0 and L1, a transistor Q0, an output matching inductor L2, first, second and third reconfigurable branches, a gate supply circuit and a drain supply circuit; one end of the DC blocking capacitor C B1 serves as the input of the front-stage amplification circuit, and the other end is connected in sequence with the stabilizing resistor R in , the input matching inductor L0, the input matching inductor L1 and the gate of the transistor Q0, the source of the transistor Q0 is grounded, the drain is connected to one end of the output matching inductor L2, and the other end of the output matching inductor L2 is connected to one end of the DC blocking capacitor C B2 ; the first reconfigurable branch is connected in parallel between the stabilizing resistor R in and the input matching inductor L0, the second reconfigurable branch is connected in parallel between the input matching inductor L0 and the input matching inductor L1, and the third reconfigurable branch and the gate supply circuit are both connected in parallel between the input matching inductor L1 and the gate of the transistor Q0; the three reconfigurable branches have the same structure and each comprises a capacitor C pn , an inductor L pn , a DC blocking capacitor C sn and a switching transistor Q sn ; the capacitor C pn and the inductor L pn are connected in parallel to form a band-pass network, one end of which is connected to the drain of the switching transistor Q sn via the DC blocking capacitor C sn , the source of the switching transistor Q sn is grounded, the gates of the switching transistor Q sn in the first, second and third reconfigurable branches are connected and are all connected to a DC control power supply V gc ; the other end is connected to a respective access point; the gate supply circuit is connected in parallel between the input matching inductor L1 and the gate of the transistor Q0 and comprises an input matching inductor L g , a AC blocking resistor R G1 and a AC blocking capacitor C c1 ; one end of the input matching inductor L g is connected between the inductor L1 and the gate of the transistor Q0, the other end is connected to one end of the AC blocking resistor R G1 , the other end of the AC blocking resistor R G1 is respectively connected to a DC power supply V gs1 and one end of a coupling capacitor C c1 , the other end of the coupling capacitor C c1 is grounded; the drain supply circuit is connected in parallel between the output matching inductor L2 and the DC blocking capacitor C B2 and is composed of an inductor L D1 and a decoupling capacitor C c2 ; the inductor L D1 one end of the output matching inductor L2 and the dc blocking capacitor C B2 between, the other end of the dc blocking capacitor C ds1 is connected to one end of the decoupling capacitor C c2 , the other end of the decoupling capacitor C c2 is grounded; The back-stage amplification circuit comprises: gate matching microstrip lines MLIN1, MLIN2, MLIN3, MLIN4, MLIN5, inductors L g , and L d , DC blocking resistor R G2 , decoupling capacitors C c3 and C B3 , fourth, fifth and sixth reconfigurable branches, first, second and third RC networks, transistors Q1, Q2 and Q3, and a back-stage power supply circuit; one end of the gate matching microstrip line MLIN1 is connected to the input of the back-stage amplification circuit, and the other end is connected to a DC blocking capacitor C B2 , the inductor L g , the gate matching microstrip lines MLIN2 and MLIN3, and one end of the DC blocking resistor R G2 ; the other end of the DC blocking resistor R G2 is connected to one end of the decoupling capacitor C c3 and the power supply voltage V gs2 , respectively, and the other end of the decoupling capacitor C c3 is grounded; the common connection point of the gate matching microstrip line MLIN1 and the inductor L g is connected to one end of the first RC network and the fourth reconfigurable branch, respectively; the other end of the first RC network is connected to the gate of the transistor Q1, the source of the transistor Q1 is grounded, and the drain is connected to one end of the inductor L d ; the other end of the inductor L d is connected to one end of the MLIN5 through the MLIN4; the other end of the MLIN5 is connected to the back-stage power supply circuit and one end of the decoupling capacitor C B3 , respectively, and the other end of the decoupling capacitor C B3 serves as the output of the back-stage amplification circuit; the common connection point of the inductor L g and the gate matching microstrip line MLIN2 is connected to one end of the second RC network and the fifth reconfigurable branch, respectively, and the other end of the second RC network is connected to the gate of the transistor Q2, the source of the transistor Q2 is grounded, and the drain is connected to the common connection point between the inductor L d and the MLIN4; the common connection point of the gate matching microstrip lines MLIN2 and MLIN3 is connected to one end of the third RC network and the sixth reconfigurable branch, respectively, and the other end of the RC network is connected to the gate of the transistor Q3, the source of the transistor Q3 is grounded, and the drain is connected to the common connection point of the gate matching microstrip lines MLIN4 and MLIN5; the back-stage power supply circuit comprises the inductor L D2 and the capacitor C c4 connected in parallel to the ground, and the common connection point of L D2 and C c4 is connected to the DC power supply V ds2 ; the three RC networks are all composed of resistors R n and capacitors C n Parallelly composed; the fourth, fifth and sixth reconfigurable branches are all the same in structure as the first reconfigurable branch, the gate of the switch transistor Q sn in the fourth, fifth and sixth reconfigurable branches is connected, and all are connected to the direct current control power supply V gc .

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