High-side power switch drive circuit with overcurrent protection

Abstract

This invention discloses a high-side power switch drive circuit with overcurrent protection, belonging to the technical field of power MOSFET drives. It includes a NAND gate, a delay circuit, an AND gate, a drive circuit, a resistor R1, a P-channel MOSFET, and an overcurrent detection circuit. While MOSFET drive circuits can determine if a MOSFET chip is in an overcurrent condition by detecting the value of VDS(ON), overcurrent detection based on VDS(ON) is affected by whether the load is open-circuited and whether the MOSFET is conducting. This invention achieves overcurrent detection of the P-channel MOSFET by monitoring the value of VDS(ON), and output is restored only when the control signal EN is re-enabled. Verification shows that this invention ensures the normal operation of the solenoid valve, increases product reliability, and meets the development requirements for the localization of aerospace equipment.

Description

Technical Field

[0001] This invention belongs to the technical field of power MOSFET driving, and particularly relates to a high-side power switch driving circuit with overcurrent protection. Background Technology

[0002] In full-authority electronic control (FAIC) systems for aero engines, high-side power switching circuits are extensively used for controlling solenoid valves. Solenoid valves are crucial control components in aero-engine control systems, directly affecting the opening, closing, or reversing of engine fuel and lubricating oil lines. The proper functioning of these solenoid valves directly impacts engine operation and safety. Therefore, high-side power switching circuits are directly related to the performance and operational safety of the entire engine control system.

[0003] Traditional high-side power switching circuits are all based on intelligent power switching chips and can achieve functions such as overcurrent protection. However, there are no domestically produced high-side power switching integrated chips that meet the needs of aerospace equipment. To meet the requirements of domestic production of aerospace equipment, high-side power switching circuits can only be implemented based on power MOSFETs. However, MOSFETs have a weak overload withstand capability, which greatly limits their practical use. How to design a reliable and reasonable overcurrent protection circuit plays a crucial role in fully utilizing the advantages of MOSFET power transistors and avoiding their weaknesses. It is also an important prerequisite for the reliable operation of high-side power switches. Summary of the Invention

[0004] In view of this, the present invention provides a high-side power switch drive circuit with overcurrent protection to realize a reliable drive scheme for P-channel MOSFETs. When the external load detects a short circuit or other fault, the high-side power switch will be automatically disconnected and will remain disconnected to avoid irreversible damage to the P-channel MOSFETs due to multiple outputs. Whether the high-side power switch is turned on again after an overcurrent is controlled by software, which is more flexible and improves the reliability of the system.

[0005] A high-side power switch drive circuit with overcurrent protection includes a NAND gate circuit, a delay circuit, an AND gate circuit, a drive circuit, a resistor R1, a P-channel MOSFET, and an overcurrent detection circuit. The output terminal of the external software control signal EN is electrically connected to one input terminal of the AND gate circuit and the NAND gate circuit, respectively. The output terminal of the overcurrent detection circuit is connected to the other input terminal of the NAND gate circuit.

[0006] The input terminal of the delay circuit is connected to the output terminal of the NAND gate circuit, and the output terminal is connected to the other input terminal of the AND gate circuit.

[0007] The output of the AND gate is connected to the input of the drive circuit, and the two ends of the resistor R1 are connected to the output of the drive circuit and the gate of the P-channel MOS transistor, respectively.

[0008] The two input terminals of the overcurrent detection circuit are connected to the output terminal of the driving circuit and the drain of the P-channel MOS transistor, respectively, and the source of the P-channel MOS transistor is connected to the power supply VDD.

[0009] The beneficial effects of the present invention are as follows:

[0010] MOSFET drive circuits can determine whether a MOSFET chip is in an overcurrent condition by detecting the value of VDS(ON). However, overcurrent detection based on VDS(ON) is affected by whether the load is open-circuited and whether the MOSFET is conducting. This invention achieves overcurrent detection of the P-channel MOSFET by monitoring the value of VDS(ON). Output is only restored when the control signal EN is re-enabled, thus avoiding irreversible situations for the MOSFET. Verification shows that this invention can ensure the normal operation of the solenoid valve, increase product reliability, and meet the development requirements of domestically produced aerospace equipment. A high-side power switching circuit with overcurrent protection is implemented using only optocouplers, conventional gate circuits, and commonly used components such as resistors, capacitors, and MOSFETs. It has a simple structure, is easy to use, and has low cost; it can be designed entirely domestically, and the circuit parameters are adjustable and have a wide range of applications. Applied to full-authority digital electronic controllers for various types of aero-engines, it has undergone various engine system tests and aircraft installation verifications, demonstrating stable and reliable system operation. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a functional block diagram of a high-side power switching circuit with overcurrent protection according to the present invention.

[0013] Figure 2 This is a hardware schematic diagram of a high-side power switch circuit with overcurrent protection function according to the present invention. Detailed Implementation

[0014] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0015] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. This disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0016] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionalities besides one or more of the aspects set forth herein.

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments. A certain type of engine fuel solenoid valve has a driving voltage of not less than 25V and a driving current of not less than 2A, and its function of realizing overcurrent protection is explained.

[0018] See Figure 1 The circuit hardware schematic is as follows Figure 2 As shown, it includes a NAND gate circuit, a delay circuit, an AND gate circuit, a driver circuit, a resistor R1, a P-channel MOSFET, and an overcurrent detection circuit. The software control signal EN is connected to the input terminals of both the AND and NAND gate circuits. The other input terminal of the NAND gate circuit is connected to the output terminal of the overcurrent detection circuit. The input terminal of the delay circuit is connected to the output terminal of the NAND gate circuit, and the output terminal of the delay circuit is connected to the other input terminal of the AND gate circuit. The output terminal of the AND gate circuit is connected to the input terminal of the driver circuit. The two ends of the resistor R1 are connected to the output terminal of the driver circuit and the gate of the P-channel MOSFET, respectively. The two input terminals of the overcurrent detection circuit are connected to the output terminal of the driver circuit and the drain of the P-channel MOSFET, respectively. The source of the P-channel MOSFET is connected to the power supply VDD. The power supply VDD voltage is 28V, the resistance of resistor R1 is 10Ω, and the P-channel MOSFET selected is the VISHAY SQD40P10-40L-GE3, whose drain current ID can reach 38A, meeting the requirements.

[0019] like Figure 2 As shown, the time delay circuit includes resistor R2, capacitor C1, and diode Q3. One end of resistor R2 is connected to both the output of the NAND gate and the positive terminal of diode Q3, while the other end of resistor R2 is connected to both the negative terminal of diode Q3 and one end of capacitor C1. The other end of capacitor C1 is connected to ground. The selected NAND gate is ON Semiconductor's MC74HC00ADG, and the AND gate is ON Semiconductor's MC74HC08ADG, both powered by +5VDC. According to the component datasheet, the MC74HC00ADG output high-level voltage is 4.9V, and the MC74HC08ADG input high-level threshold voltage is 3.5V. The resistance of resistor R2 is 10KΩ, and the capacitance of capacitor C1 is 4.7nF. Therefore, according to the capacitor discharge model, the delay time τ = 0.33 * R2 * C1 = 15.5µs.

[0020] The delay time τ of the above delay circuit is related to R2 and C1 as follows: τ = K * resistance value of resistor R2 * capacitance value of capacitor C1, where the constant K is determined by the ratio of the high-level voltage output of the NAND gate to the high-level voltage input of the AND gate.

[0021] The driving circuit includes resistors R6, R7, and R8, and an NPN transistor Q4. Resistor R8 is connected to the base of NPN transistor Q4 and the output of the AND gate, respectively. The collector of NPN transistor Q4 is connected to one end of resistor R7. The other end of resistor R7 is connected to one end of resistor R6 and the left end of resistor R1. The other end of resistor R6 is connected to the VDD power supply. The emitter of NPN transistor Q4 is connected to ground. The resistance of R8 is 1KΩ, R7 is 20KΩ, and R6 is 10KΩ. The NPN transistor Q4 is an ON Semiconductor MMBT2222ALT1G. When the AND gate output is high, Q4 is in saturation, resulting in a P-channel gate voltage of 21V, which is less than the VDD power supply voltage of 28V, thus turning on the P-channel MOSFET.

[0022] like Figure 2As shown, the overcurrent detection circuit includes an optocoupler U3, a pull-up resistor R4, a current-limiting resistor R3, an accelerating capacitor C2, a current-limiting resistor R5, and a protection diode Q2. One end of the current-limiting resistor R3 is connected to the drain of the P-channel MOSFET, and the other end of the current-limiting resistor R3 is connected to the positive terminal of the LED of the optocoupler U3. The negative terminal of the LED of the optocoupler U3 is connected to one end of the accelerating capacitor C2 and one end of the current-limiting resistor R5. The other end of the accelerating capacitor C2 is connected to the negative terminal of the protection diode Q2 and the left end of the resistor R1. The other end of the current-limiting resistor R5 is connected to the positive terminal of the protection diode Q2. The output collector of the optocoupler U3 is connected to one end of the pull-up resistor R4 and the input terminal of the NAND gate. The other end of the pull-up resistor R4 is connected to the power supply VCC. The output emitter of the optocoupler U3 is connected to ground. The selected optocoupler is the VISHAY TCET1100, with a maximum response time of 10µs. The pull-up resistor R4 is 4.7KΩ, the current-limiting resistors R3 and R5 are 5KΩ, the accelerating capacitor C2 is 0.1µF, and the protection diode Q2 is the ON Semiconductor BAS21HT1G. The accelerating capacitor C2 primarily functions to accelerate the process. When the drive circuit is turned on, the gate voltage of the P-channel MOSFET drops instantaneously to 18.7V, and the voltage at the G terminal drops instantaneously from 28V to 18V. Since the voltage across the capacitor cannot change abruptly, the input voltage of the optocoupler diode drops instantaneously to 18V, causing the optocoupler to conduct rapidly. Overcurrent detection is based on the operating characteristics of MOSFETs. Specifically, under normal conditions, the MOSFET chip operates in the constant current region, with a relatively low VDS(ON) voltage. However, when an overcurrent fault occurs, the MOSFET chip exits the constant current region and enters the variable resistance region. The VDS(ON) voltage increases with the increase of current, and when the MOSFET chip is turned on, the VGS voltage remains essentially constant. Therefore, the characteristic of VDS(ON) voltage increasing with current can be converted into a change in VDG voltage, thus achieving the overcurrent detection function. The response time of the overcurrent detection circuit is mainly affected by the optocoupler U3, whose maximum response time is 10µs, which is less than the delay time τ of the delay circuit.

[0023] The operation of a high-side power switching circuit with overcurrent protection includes the following steps:

[0024] Step 1: When the software control signal EN is low, AND gate U2 outputs a low level and NAND gate U1 outputs a high level. Then, NPN transistor Q4 is in the off state, the collector voltage of NPN transistor is the same as VDD power supply, P-channel MOSFET is in the off state, optocoupler U3 is in the off state, and the overcurrent detection result ERROR is high.

[0025] Step 2: When no overcurrent fault occurs, the software control signal EN changes from low to high at time T0. Due to the existence of the delay circuit, the output signal of the delay circuit will only become low after T0+15.5µs. Therefore, at time T0, the AND gate circuit U2 outputs a high level, the NPN transistor Q4 is in saturation conduction, and the collector voltage of the NPN transistor is ground. Thus, the gate voltage of the P-channel MOSFET is less than the power supply voltage VDD, and the P-channel MOSFET is in conduction. Consequently, the optocoupler U3 is in conduction. The overcurrent detection circuit response time is 10µs, which is less than the delay time τ of the delay circuit. Therefore, within the time period T0 to T0+15.5µs, the overcurrent detection result ERROR will become low, the NAND gate output will become high, and the diode Q3 will conduct. The charging time is negligible, ensuring that the delay circuit output quickly changes from low to high. When no overcurrent fault occurs and the software enable signal EN is high, the P-channel MOSFET remains in conduction.

[0026] Step 3: If an overcurrent fault occurs while the P-channel MOSFET is conducting, the drain voltage of the P-channel MOSFET will decrease. When the voltage difference between the drain and the gate decreases to a level that prevents the optocoupler U3 from conducting, the overcurrent detection result ERROR will go high. The delay circuit will then output a low level after 15.5us, which will turn off the P-channel MOSFET. The P-channel MOSFET will only turn on again when the software enable signal EN changes from low to high.

[0027] In practical applications, this invention has been used in a full-authority digital electronic controller for a certain type of engine. After various system tests and installation verifications, the system has proven to be stable and reliable, capable of driving solenoid valves and providing overcurrent protection, thus greatly improving the reliability of the electronic controller product.

[0028] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A high-side power switch drive circuit with overcurrent protection, characterized in that, This includes NAND gates, delay circuits, AND gates, driver circuits, resistor R1, a P-channel MOSFET, and an overcurrent detection circuit, wherein: The output terminal of the external software control signal EN is electrically connected to one input terminal of the AND gate circuit and the NAND gate circuit respectively, and the output terminal of the overcurrent detection circuit is connected to the other input terminal of the NAND gate circuit. The input terminal of the delay circuit is connected to the output terminal of the NAND gate circuit, and the output terminal is connected to the other input terminal of the AND gate circuit. The output of the AND gate is connected to the input of the drive circuit, and the two ends of the resistor R1 are connected to the output of the drive circuit and the gate of the P-channel MOS transistor, respectively. The two input terminals of the overcurrent detection circuit are connected to the output terminal of the driving circuit and the drain of the P-channel MOSFET, respectively, and the source of the P-channel MOSFET is connected to the power supply VDD. The delay circuit includes a resistor R2, a capacitor C1, and a diode Q3, wherein: the input terminal of the resistor R2 is connected to the output terminal of the NAND gate circuit and the anode of the diode Q3, the output terminal is connected to the cathode of the diode Q3 and the input terminal of the capacitor C1, and serves as one input terminal of the AND gate circuit, and the output terminal of the capacitor C1 is grounded. The delay time τ of the delay circuit is related to R2 and C1 as follows: τ = K The resistance value of resistor R2 The capacitance value of capacitor C1, wherein the constant K is determined by the ratio of the high level output of the NAND gate to the high level input of the AND gate; The driving circuit includes resistors R6, R7, and R8, and an NPN transistor Q4. The two ends of resistor R8 are connected to the base of the NPN transistor Q4 and the output of an AND gate, respectively. The collector of the NPN transistor Q4 is connected to one end of resistor R7. The other end of resistor R7 is connected to one end of resistor R6 and the input of resistor R1, respectively. The other end of resistor R6 is connected to the VDD power supply. The emitter of transistor Q4 is grounded.

2. The high-side power switch drive circuit according to claim 1, characterized in that, The overcurrent detection circuit includes an optocoupler U3, a pull-up resistor R4, a current-limiting resistor R3, an accelerating capacitor C2, a current-limiting resistor R5, and a protection diode Q2, wherein: One end of the current-limiting resistor R3 is connected to the drain of the P-channel MOS transistor, and the other end is connected to the anode of the light-emitting diode included in the optocoupler U3. The cathode of the light-emitting diode is connected to one end of the accelerating capacitor C2 and one end of the current-limiting resistor R5, respectively. The other end of the accelerating capacitor C2 is connected to the cathode of the protection diode Q2 and the input terminal of the resistor R1, respectively. The other end of the current-limiting resistor R5 is connected to the anode of the protection diode Q2. The output collector of the optocoupler U3 is connected to one end of the pull-up resistor R4 and the input terminal of the NAND gate circuit. The other end of the pull-up resistor R4 is connected to the power supply VCC. The output emitter of the optocoupler U3 is grounded.

3. The high-side power switch drive circuit according to claim 2, characterized in that, The accelerating capacitor C2 is used to accelerate the response of the overcurrent detection circuit.

4. The high-side power switch drive circuit according to claim 1, characterized in that, The delay time τ of the delay circuit should be greater than the response time of the overcurrent detection circuit.

5. A high-side power switch driving method with overcurrent protection, characterized in that, Using the circuit as described in any one of claims 1 to 4, the steps include: Step 1: When the software control signal EN is low, AND gate U2 outputs a low level and NAND gate U1 outputs a high level. Then, NPN transistor Q4 is in the off state, the collector voltage of NPN transistor is the same as VDD power supply, P-channel MOSFET is in the off state, optocoupler U3 is in the off state, and overcurrent detection result ERROR is high level. Step 2: When no overcurrent fault occurs, the software control signal EN changes from low to high at time T0. Due to the existence of the delay circuit, the output signal of the delay circuit only becomes low after T0 + τ. Therefore, at time T0, the AND gate circuit U2 outputs a high level, the NPN transistor Q4 is in saturation and conduction state, and the collector voltage of the NPN transistor Q4 is ground. Therefore, the gate voltage of the P-channel MOSFET is less than the power supply voltage VDD, so the P-channel MOSFET is in conduction state, causing the optocoupler U3 to be in conduction state. The response time of the overcurrent detection circuit is less than the delay time τ of the delay circuit. Therefore, within the time period T0 - (T0 + τ), the overcurrent detection result ERROR becomes low, and the output of the AND gate circuit becomes high, ensuring that the output of the delay circuit changes from low to high. When no overcurrent fault occurs and the software enable signal EN is high, the P-channel MOSFET remains in the on state. Step 3: When an overcurrent fault occurs during the conduction process of the P-channel MOSFET, the drain voltage of the P-channel MOSFET will decrease. When the voltage difference between the drain and the gate decreases to the point that the optocoupler U3 cannot be turned on, the overcurrent detection result ERROR becomes high. Then the delay circuit outputs a low level after time τ, which can turn off the P-channel MOSFET. The P-channel MOSFET will turn on again when the software enable signal EN changes from low to high.

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