A quad-tree structure array field effect transistor terahertz detector chip

Abstract

The application discloses a kind of field effect transistor terahertz detector chips of quadtree structure array, including chip substrate and field effect transistor terahertz detector array;Field effect transistor terahertz detector array is prepared on the surface of chip substrate using semiconductor technology, and is arranged in quadtree structure array on chip substrate;Field effect transistor terahertz detector is composed of field effect transistor and terahertz antenna, and the characteristic size of terahertz antenna is smaller and the center frequency is higher closer to the center position of field effect transistor terahertz detector array;The field effect transistor terahertz detector of different terahertz frequency band is integrated on a chip in the application, can realize the detection of wide-spectrum terahertz wave, solve the problem that the current field effect transistor terahertz detector detects narrow spectrum, and the array arrangement mode of quadtree structure can effectively reduce the area of chip, to reduce chip cost.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of terahertz detection, and particularly relates to a field effect transistor terahertz detector chip with a quadtree structure array. BACKGROUND

[0002] Terahertz waves are electromagnetic waves with a frequency of 0.1-10 THz and a wavelength of 30 μm-3 mm, and are located between the millimeter wave and infrared light wave bands in the electromagnetic wave spectrum. Terahertz waves are located in the intersection area of optics and electronics, and have the characteristics of visible light and microwaves, such as high transmissivity, low energy, high spatial resolution, and large information carrying capacity. These special properties make them have wide applications in the fields of nondestructive testing, nondestructive imaging, biological macromolecule fingerprint identification, ultrafast wireless communication, and space exploration, and in recent years, they have received widespread attention from researchers at home and abroad. The practical application of terahertz technology cannot be achieved without high-sensitivity detection of terahertz waves. The field effect transistor terahertz detector is a kind of plasmonic terahertz detector, and has very high sensitivity and ultrafast response speed, strong anti-interference ability, and is basically not affected by heat sources in the environment. Moreover, the preparation process is mature, and the feature size is in the micro-nanometer level, so that array preparation can be achieved. However, the field effect transistor terahertz detectors based on planar antennas reported at present generally have a narrow detection frequency width, and are not suitable for wide-spectrum terahertz detection applications. The quadtree structure is actually a coding method for compressing data of a grid data structure; a spatial region is recursively divided into four quadrants n times, and each division forms n sub-quadrants. The structure has a wide application prospect when applied to quantity research.

[0003] Patent application CN105679778B discloses a terahertz detector chip, which has a first MOS detection tube and a second MOS detection tube, a low-noise amplifier for amplifying a direct current signal output after rectification of signals received by the first MOS detection tube and the second MOS detection tube, a common connection of drain electrodes of the first MOS detection tube and the second MOS detection tube to an input end of the low-noise amplifier, a common grounding of source electrodes of the first MOS detection tube and the second MOS detection tube, a connection of a gate electrode of the first MOS detection tube to a first sheet antenna through a first impedance matcher, and a connection of a gate electrode of the second MOS detection tube to a second sheet antenna through a second impedance matcher. The application achieves the integration of the antenna, the detection tube and the amplifier to a certain extent, and miniaturizes the detector, but still has a narrow detection frequency width, and the application of wide-spectrum terahertz detection is limited. SUMMARY

[0004] In order to overcome the above-mentioned deficiencies of the prior art, the purpose of the present application is to provide a field effect transistor terahertz detector chip with a quadtree structure array, which can cover a wide frequency spectrum and save chip area by arranging field effect transistor terahertz detectors in a quadtree structure array, thereby improving the frequency detection range of the field effect transistor terahertz detector.

[0005] In order to achieve the above-mentioned purpose, the present application provides the following technical solutions:

[0006] A field effect transistor terahertz detector chip with a quadtree structure array comprises a chip substrate 1 and a field effect transistor terahertz detector 2 on the chip substrate 1; the field effect transistor terahertz detector 2 is arranged in a quadtree structure array on the chip substrate 1.

[0007] The field effect transistor terahertz detector 2 comprises a field effect transistor 8, which comprises a gate 9, a source 10 and a drain 11; the field effect transistor 8 is connected to a terahertz antenna 7 through the gate 9; in operation, a bias voltage is applied to the gate 9 to form a conductive channel below the gate 9; the terahertz antenna 7 receives terahertz radiation emitted by an external terahertz source and transmits the induced electric signal to the gate 9 of the field effect transistor 8, which is then coupled into the conductive channel from the gate 9, mixed with plasmons in the conductive channel, and generates an electric signal at the source 10 and the drain 11.

[0008] The quadtree structure divides the surface of the chip substrate 1 into a plurality of square sub-regions; the area of each sub-region in a layer closer to the center is one-fourth of the area of each sub-region in a layer farther from the center; and each sub-region comprises a field effect transistor terahertz detector 2, thereby forming an array of field effect transistor terahertz detectors 2.

[0009] The material of the chip substrate 1 is selected from silicon, silicon carbide or sapphire to provide support for the field effect transistor terahertz detector 2.

[0010] The field effect transistor 8 comprises a metal oxide field effect transistor, a high electron mobility transistor or a graphene field effect transistor.

[0011] The terahertz antenna 8 comprises a patch antenna, a bowtie antenna, a log-periodic antenna or a spiral antenna.

[0012] The present application has the following beneficial effects:

[0013] Integrating terahertz detectors of different terahertz frequency bands on one chip can cover a wide frequency spectrum and solve the problem of narrow frequency spectrum detection of the current field effect transistor terahertz detector.

[0014] The arrangement mode of the quadtree structure array, the center frequency of the terahertz antenna in each sub-region close to the center increases by one time, and the characteristic size is reduced by 1 / 2, so that the detection of wide frequency terahertz waves is realized, and the spatial division of the field effect transistor terahertz detector array on the chip substrate is reasonable, the area of the chip substrate can be effectively reduced, so that the cost is saved. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 It is a schematic diagram of the overall structure of the terahertz detector chip of the quadtree structure array of the application.

[0016] Figure 2 It is a schematic diagram of the arrangement mode of the quadtree structure array.

[0017] Figure 3 It is a schematic diagram of the field effect transistor terahertz detector structure.

[0018] Figure 4 It is a schematic diagram of the field effect transistor terahertz detector detection system.

[0019] In the figure: 1-chip substrate, 2-field effect transistor terahertz detector, 3-first level sub-region of quadtree structure, 4-second level sub-region of quadtree structure, 5-third level sub-region of quadtree structure, 6-fourth level sub-region of quadtree structure, 7-terahertz antenna, 8-field effect transistor, 9-gate, 10-source, 11-drain, 12-terahertz wave, 13-terahertz source, 14-terahertz lens, 15-terahertz detector chip, 16-printed circuit board, 17-phase-locked amplifier. DETAILED DESCRIPTION

[0020] The application is further described below in combination with embodiments and with reference to the accompanying drawings.

[0021] As Figure 1 shown, a field effect transistor terahertz detector chip of a quadtree structure array includes a chip substrate 1 and a field effect transistor terahertz detector 2 on the chip substrate 1; the chip substrate 1 is a material such as silicon, silicon carbide or sapphire that can provide a supporting action for the field effect transistor terahertz detector 2. The field effect transistor terahertz detector 2 is prepared on the chip substrate by a semiconductor processing technology, forming a field effect transistor terahertz detector chip of a quadtree structure array as Figure 1 shown.

[0022] As Figure 2As shown, the array of field effect transistor terahertz detectors 2 is arranged on the chip substrate 1 in a quadtree structure. The quadtree structure divides the surface of the chip substrate 1 into square region units, and the area of each region closer to the center is one quarter of the area of the region farther from the center. The area of the quadtree structure second-level sub-region 4 is one quarter of the area of the quadtree structure first-level sub-region 3, the area of the quadtree structure third-level sub-region 5 is one quarter of the area of the quadtree structure second-level sub-region 4, and the area of the quadtree structure fourth-level sub-region 6 is one quarter of the area of the quadtree structure third-level sub-region 5. Each unit region includes a field effect transistor terahertz detector, thereby forming the array structure of the field effect transistor terahertz detectors 2. The field effect transistor terahertz detector 2 includes a field effect transistor 7 and a terahertz antenna 8. As shown in the field effect transistor terahertz detector detection system diagram Figure 3 As shown, the field effect transistor includes a gate 9, a source 10, and a drain 11. The terahertz antenna 7 is used to receive terahertz radiation and transmit the induced electrical signal to the gate 9 of the field effect transistor 8, and the gate 9 is coupled to the conductive channel of the field effect transistor terahertz detector 2 and mixed with the plasmon in the conductive channel to generate an electrical signal at the source 10 and the drain 11.

[0023] As shown in the field effect transistor terahertz detector detection system diagram Figure 4 As shown in the field effect transistor terahertz detector detection system diagram, the terahertz wave 12 is emitted by the terahertz source 13, collimated and focused on the field effect transistor terahertz detector chip 15 through the terahertz lens 14, the electrodes of the field effect transistor are connected to the pads of the printed circuit board 16 through the lead wire, and the pads are connected to the lock-in amplifier 17 through the lead wire, and the electrical signal generated by the field effect transistor is read out, thereby realizing the power detection of the terahertz radiation.

[0024] According to the diffraction limit theory of light, the minimum converging spot area of the terahertz wave decreases with the increase of the terahertz wave frequency, so in the quadtree structure array, the terahertz antenna at the outer position of the quadtree structure array has a lower center frequency, and the terahertz antenna at the inner position of the quadtree structure array has a higher center frequency, which can ensure that the light spot of the terahertz wave covers all the terahertz detector units in the terahertz detector array as much as possible. According to the plane antenna transceiver theory, the characteristic size of the terahertz antenna is λ / 4, wherein λ is the wavelength of the terahertz wave, so the characteristic size of the terahertz antenna decreases with the increase of the terahertz wave frequency. Based on the above theory, the arrangement of the quadtree structure array is designed as follows: the center frequency of the terahertz antenna in the first-level sub-region of the quadtree structure is 0.2 THz, the characteristic size is 375 μm, and the detection range is 0.1-0.3 THz; the center frequency of the terahertz antenna in the second-level sub-region is 0.4 THz, the characteristic size is 187.5 μm, and the detection range is 0.2-0.6 THz; the center frequency of the terahertz antenna in the third-level sub-region is 0.8 THz, the characteristic size is 93.75 μm, and the detection range is 0.4-1.2 THz; the center frequency of the terahertz antenna in the fourth-level sub-region is 1.6 THz, the characteristic size is 46.875 μm, and the detection range is 0.8-2.4 THz.

[0025] According to the above design, the application can realize the coverage of a wide terahertz frequency band of 0.1-2.4 THz, and can also reduce the total area of the chip through reasonable design of the quadtree structure array arrangement.

Claims

1. A field-effect transistor terahertz detector chip with a quadtree structure array, comprising a chip substrate (1) and a field-effect transistor terahertz detector (2) on the chip substrate (1); characterized in that: The field-effect transistor terahertz detector (2) is arranged in a quadtree structure on the chip substrate (1).

2. The field-effect transistor terahertz detector chip with a quadtree structure array according to claim 1, characterized in that: The field-effect transistor terahertz detector (2) includes a field-effect transistor (8), which includes a gate (9), a source (10), and a drain (11). The field-effect transistor (8) is connected to the terahertz antenna (7) through the gate (9). When the field-effect transistor (8) is working, a bias voltage is applied to the gate (9) to form a conductive channel below the gate (9). The terahertz antenna (7) receives terahertz radiation emitted by an external terahertz source and transmits the induced electrical signal to the gate (9) of the field-effect transistor (8). The signal is then coupled to the conductive channel through the gate (9) and mixed with the plasmons in the conductive channel to generate electrical signals at the source (10) and drain (11).

3. The field-effect transistor terahertz detector chip with a quadtree structure array according to claim 1, characterized in that: The quadtree structure divides the surface of the chip substrate (1) into several square sub-regions. The area of ​​each sub-region of the same size near the center layer is one-quarter of the area of ​​the sub-region of the same size near the outer layer. Each sub-region includes a field-effect transistor terahertz detector (2), thereby forming a field-effect transistor terahertz detector (2) array.

4. The field-effect transistor terahertz detector chip with a quadtree structure array according to claim 1, characterized in that: The chip substrate (1) is made of silicon, silicon carbide or sapphire to provide support for the field-effect transistor terahertz detector (2).

5. A field-effect transistor terahertz detector chip with a quadtree structure array according to claim 2, characterized in that: The field-effect transistor (8) includes a metal-oxide field-effect transistor, a high electron mobility transistor, or a graphene field-effect transistor.

6. The field-effect transistor terahertz detector chip with a quadtree structure array according to claim 2, characterized in that: The terahertz antenna (7) includes patch antennas, butterfly antennas, log-periodic antennas, or spiral antennas.

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