Solid state disk computing power sharing method, system, device and storage medium

Abstract

The present application relates to the field of computing power sharing, and discloses a computing power sharing method, system, device and storage medium of a solid state disk. The method comprises the following steps: a Host master system analyzes the input and output states of a first solid state system and a second solid state system based on a preset PCIE protocol, and obtains the second solid state system in an idle state; target data to be operated is sent to the second solid state system; the second solid state system receives the target data, performs operation processing on the target data, obtains result data, and sends the result data to an HMB cache system and operation completion information to the Host master system; the Host master system receives the operation completion information, sends notification information to the first solid state system; the first solid state system receives the notification information, and acquires the result data from the HMB cache system according to the notification information.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of computing power sharing, in particular to a computing power sharing method and system of a solid state disk, a device and a storage medium. BACKGROUND

[0002] In the DRAM-less SSD supporting the NVMe interface protocol, the DRAM base can utilize the host memory buffer (HMB) function of the NVMe to solve the cache problem of multiple hard disk devices. HMB is a function introduced in the NVMe 1.2 protocol, which allows the SSD to use the host memory to improve its performance. The memory constitutes a data interaction model based on the memory base command.

[0003] Under this model, the PCIE device can exist in the form of a cluster in the bus, and the HMB function provides multiple ways to alleviate the decline of I / O performance. The NVMe interface provides very fast transmission speed between the host and the SSD master, so the SSD hard disk can access the host memory without causing performance loss. Since the host memory can be accessed from the operating system of the host and the SSD hard disk, a solution to the idle computing power of multiple SSD hard disks is provided. SUMMARY

[0004] The main purpose of the present application is to solve the technical problem of idle computing power of multiple SSD hard disks.

[0005] The first aspect of the present application provides a computing power sharing method of a solid state disk, which is applied to a computing power sharing system of the solid state disk, and the computing power sharing system of the solid state disk comprises a first solid state system, a second solid state system, a Host master system and an HMB cache system. The computing power sharing method of the solid state disk comprises the following steps:

[0006] The Host master system analyzes the input and output state of the first solid state system and the second solid state system based on a preset PCIE protocol, and obtains the second solid state system in an idle state.

[0007] The target data to be operated is sent to the second solid state system;

[0008] The second solid state system receives the target data, processes the target data, obtains result data, and sends the result data to the HMB cache system and sends operation completion information to the Host master system;

[0009] The Host master system receives the operation completion information and sends notification information to the first solid state system;

[0010] The first solid state system receives the notification information, and obtains result data from the HMB cache system according to the notification information.

[0011] Optionally, in the first implementation manner of the first aspect, the obtaining of the second solid state system in the idle state based on the preset PCIE protocol and the analysis of the input and output states of the first solid state system and the second solid state system comprises:

[0012] The obtaining of the first solid state system in the read-write state based on the preset PCIE protocol and the analysis of the input and output states of the first solid state system, and the obtaining of the second solid state system in the idle state based on the preset PCIE protocol and the analysis of the input and output states of the second solid state system.

[0013] Optionally, in the second implementation manner of the first aspect, the notification information comprises a cache address and a target data name, and the obtaining of the result data from the HMB cache system according to the notification information comprises:

[0014] determining whether the target data name is a data name of a preset shared operation;

[0015] if the target data name is the data name of the shared operation, obtaining the result data from the HMB cache system according to the cache address.

[0016] Optionally, in the third implementation manner of the first aspect, the result data comprises a target transfer address.

[0017] Optionally, in the fourth implementation manner of the first aspect, after the obtaining of the result data from the HMB cache system according to the notification information, the method further comprises:

[0018] the first solid state system performs transfer processing on transfer data corresponding to the result data according to the target transfer address, to obtain transferred transfer data.

[0019] Optionally, in the fifth implementation manner of the first aspect, before the Host master system receives the operation completion information and sends the notification information to the first solid state system, the method further comprises:

[0020] the HMB cache system receives the result data and sends cache preparation information to the Host master system.

[0021] the Host master system receives the cache preparation information.

[0022] Optionally, in a sixth implementation form of the first aspect of the application, the Host master system receives the operation completion information, and sends notification information to the first solid-state system, including:

[0023] The Host master system receives the operation completion information, and transmits notification information to the first solid-state system based on the cache preparation information and the operation completion information.

[0024] The second aspect of the application provides a computing power sharing system of a solid-state disk, including: a first solid-state system, a second solid-state system, a Host master system, and an HMB cache system.

[0025] The Host master system is configured to analyze input and output states of the first solid-state system and the second solid-state system based on a preset PCIE protocol, and obtain a second solid-state system in an idle state.

[0026] The target data to be operated is sent to the second solid-state system.

[0027] The second solid-state system is configured to receive the target data, perform operation processing on the target data, obtain result data, and send the result data to the HMB cache system and operation completion information to the Host master system.

[0028] The Host master system is configured to receive the operation completion information, and send notification information to the first solid-state system.

[0029] The first solid-state system is configured to receive the notification information, and obtain result data from the HMB cache system according to the notification information.

[0030] The third aspect of the application provides a computing power sharing device of a solid-state disk, including: a memory and at least one processor, the memory stores instructions, and the memory and the at least one processor are interconnected through a circuit; the at least one processor calls the instructions in the memory, so that the computing power sharing device of the solid-state disk executes the above-mentioned computing power sharing method of the solid-state disk.

[0031] The fourth aspect of the application provides a computer readable storage medium, which stores instructions, and when the instructions are run on a computer, the computer executes the above-mentioned computing power sharing method of the solid-state disk.

[0032] In the embodiment of the present application, through sharing computing power among the plurality of SSDs in the cluster of the PCIE bus, when the first SSD hard disk is busy at the IO interface, the Host master utilizes the CPU of the relatively idle second SSD hard disk to calculate the data related to GC and other data, and returns the result data to the HMB cache, and finally the Host master informs the first SSD hard disk to take the result data from the HMB cache. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 An embodiment of the method for sharing computing power of a solid state disk in the embodiment of the present application is shown.

[0034] Figure 2 An embodiment of the system for sharing computing power of a solid state disk in the embodiment of the present application is shown.

[0035] Figure 3 An embodiment of the device for sharing computing power of a solid state disk in the embodiment of the present application is shown. DETAILED DESCRIPTION

[0036] The embodiment of the present application provides a method, system and device for sharing computing power of a solid state disk and a storage medium.

[0037] The terms "first", "second", "third", "fourth" and the like (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" or "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0038] For the sake of understanding, the specific flow of the embodiment of the present application is described below, please refer to Figure 1 An embodiment of the method for sharing computing power of a solid state disk in the embodiment of the present application is applied to the system for sharing computing power of the solid state disk, which includes a first solid state system, a second solid state system, a Host master system and an HMB cache system. The method for sharing computing power of the solid state disk includes:

[0039] 101、The Host master system analyzes the input and output state of the first solid state system and the second solid state system based on the preset PCIE protocol, and obtains the second solid state system in the idle state;

[0040] In the embodiment, the Host host system reads the input and output state of the first solid state system and the second solid state system from the PCIE bus by using the PCIE protocol, that is, the signal transmission state of the IO interface, and obtains that the first solid state system is busy and the second solid state system is in an idle state.

[0041] Further, the following steps can be performed at 1011:

[0042] 1011. Based on the preset PCIE protocol, the input and output state of the first solid state system is analyzed to obtain the read-write state of the first solid state system, and based on the preset PCIE protocol, the input and output state of the second solid state system is analyzed to obtain the idle state of the second solid state system.

[0043] In the step 1011, the Host host system reads the input and output state of the first solid state system as the IO interface being busy, and the input and output state of the second solid state system as the IO interface being idle. Each solid state disk has a built-in CPU, and the CPU can perform data operation in the idle state to avoid idle computing power.

[0044] 102. The target data to be operated is sent to the second solid state system;

[0045] In the embodiment, the Host host system sends the data that can be operated to the idle second solid state system for operation by the CPU of the second solid state system.

[0046] 103. The second solid state system receives the target data, performs operation processing on the target data to obtain result data, and sends the result data to the HMB cache system and sends operation completion information to the Host host system;

[0047] In the embodiment, the second solid state system receives the target data through the PCIE bus, performs operation on the target data based on the idle CPU, obtains the result data of the operation, and then sends the result data to the HMB cache system and notifies the Host host system that the operation is completed.

[0048] Further, after 103, the following can also be performed:

[0049] 1031. The HMB cache system receives the result data and sends cache preparation information to the Host host system;

[0050] 1032. The Host host system receives the cache preparation information.

[0051] In the steps 1031-1032, when the HMB cache system completely receives the result data, the information of completing cache is sent to the Host system. The Host system receives the information of completing cache and the information of completing operation, and can inform the first solid system to obtain the result data from the HMB cache system.

[0052] Further, based on the steps 1031-1032, the step 104 can be executed as follows:

[0053] 1041. The Host system receives the information of completing operation, and based on the cache preparation information and the information of completing operation, transmits the notification information to the first solid system.

[0054] In the step 1041, the Host system receives the information of completing operation and the cache preparation information, and then transmits the notification information to the first solid system, so as to avoid that when the operation is completed but the cache preparation is not successful, the first solid system obtains the data from the HMB cache, resulting in incomplete data acquisition.

[0055] 104. The Host system receives the information of completing operation, and transmits the notification information to the first solid system; 105. The first solid system receives the notification information, and according to the notification information, obtains the result data from the HMB cache system.

[0056] In the steps 104-105, the Host system receives the information of completing operation, which indicates that the second solid system has completed operation, and then informs the first solid system to directly pull the result data from the HMB cache system, and the first solid system does not need to further interact with the Host.

[0057] Further, the notification information includes the cache address and the target data name, and the step 105 can be executed as follows:

[0058] 1051. It is judged whether the target data name is the data name of the preset shared operation.

[0059] 1052. If the target data name is the data name of the shared operation, the result data is obtained from the HMB cache system according to the cache address.

[0060] In the steps 1051-1052, the target data name in the notification information is first judged, because there are N solid systems forming a cluster through the PCIE bus, and the notification information can be broadcast transmission, so each received solid system needs to analyze whether the target data name is the data name of the shared operation of itself. If the target data name is the data name of the shared operation of itself, the result data is obtained from the HMB cache system based on the cache address in the notification information.

[0061] Further, the result data includes a target carrying address, and the following step can be performed after the step 105:

[0062] 106. The first solid state system carries the carrying data corresponding to the result data according to the target carrying address, to obtain carried carrying data.

[0063] In the embodiment, a block includes multiple pages, and after the SSD works for a period of time, the block is all written. If a block is to be erased, the valid pages in the block must be copied to other places first, and then the old block is erased. The page that has been written on the SSD must be erased before being written again, instead of being directly overwritten. This is determined by the working principle of Nand Flash. Therefore, to avoid the subsequent reduction of the reading and writing speed of the SSD, the concept of GC is generated. GC (Garbage Collection) refers to the process of transferring existing data to other flash memory locations and completely deleting some useless data. The carrying data is the object data that needs GC, and naturally has the original storage address and the target carrying address. The GC operation of the first solid state system is completed by the second solid state system, and the result data generated includes the target carrying address. The first solid state system carries the carrying data corresponding to the result data according to the target carrying address, to obtain carried carrying data. It should be noted that the carrying data and the target data are not equivalent relations, and the target data also has the storage address of the carrying data.

[0064] In the embodiment of the application, multiple SSDs can share computing power with each other in the cluster of the PCIE bus. When the first SSD hard disk is busy at the IO interface, the host control utilizes the CPU of the relatively idle second SSD hard disk to calculate the GC and other related data, and returns the result data to the HMB cache. Finally, the host control notifies the first SSD hard disk to take the result data from the HMB cache.

[0065] The computing power sharing method of the solid state disk in the embodiment of the application is described above, and the computing power sharing system of the solid state disk in the embodiment of the application is described below. Please refer to Figure 2 The computing power sharing system of the solid state disk in the embodiment of the application includes a first solid state system 201, a second solid state system 202, a host control system 203, and an HMB cache system 204.

[0066] The host control system 201 is configured to analyze the input and output states of the first solid state system and the second solid state system based on a preset PCIE protocol, to obtain the second solid state system in an idle state.

[0067] sending target data to be operated to the second solid system;

[0068] the second solid system 202 is configured to receive the target data, perform operation processing on the target data to obtain result data, and send the result data to the HMB cache system and send operation completion information to the Host system;

[0069] the Host system 203 is configured to receive the operation completion information and send notification information to the first solid system;

[0070] the first solid system 201 is configured to receive the notification information, and according to the notification information, obtain result data from the HMB cache system.

[0071] The Host system 201 is specifically configured to:

[0072] based on a preset PCIE protocol, analyze the input and output state of the first solid system to obtain a first solid system in a read-write state, and based on a preset PCIE protocol, analyze the input and output state of the second solid system to obtain a second solid system in an idle state.

[0073] The notification information includes a cache address and a target data name, and the second solid system 202 is specifically configured to:

[0074] determine whether the target data name is a preset shared operation data name;

[0075] If it is a shared operation data name, result data is obtained from the HMB cache system according to the cache address.

[0076] The result data includes a target transfer address, and the first solid system 201 is specifically configured to:

[0077] According to the target transfer address, transfer processing is performed on the transfer data corresponding to the result data to obtain transferred transfer data.

[0078] The HMB cache system 201 is specifically configured to:

[0079] receive the result data and send cache preparation information to the Host system;

[0080] The Host system receives the cache preparation information.

[0081] The Host system 203 is specifically configured to:

[0082] Receiving the operation completion information, transmitting notification information to the first solid system based on the cache preparation information and the operation completion information.

[0083] In the embodiment of the application, a plurality of SSDs can share computing power with each other in a cluster of a PCIE bus, when the first SSD hard disk is busy at an IO interface, the host controller utilizes a CPU of a relatively idle second SSD hard disk to calculate data related to GC and other data, and returns result data to an HMB cache, and finally the host controller notifies the first SSD hard disk to take the result data from the HMB cache.

[0084] The above Figure 2 The computing power sharing system of the solid state disk in the embodiment of the application is described in detail from the perspective of a modular functional entity, and the computing power sharing device of the solid state disk in the embodiment of the application is described in detail from the perspective of hardware processing.

[0085] Figure 3 is a structural schematic diagram of a computing power sharing device of a solid state disk provided by the embodiment of the application. The computing power sharing device 300 of the solid state disk can be quite different due to different configurations or performances, and can include one or more processors (central processing units, CPU) 310 (for example, one or more processors) and a memory 320, and one or more storage media 330 (for example, one or more mass storage devices) storing application programs 333 or data 332. The memory 320 and the storage media 330 can be temporary storage or persistent storage. The programs stored in the storage media 330 can include one or more modules (not shown in the figure), and each module can include a series of instruction operations on the computing power sharing device 300 of the solid state disk. Furthermore, the processor 310 can be configured to communicate with the storage media 330 and execute a series of instruction operations in the storage media 330 on the computing power sharing device 300 of the solid state disk.

[0086] The computing power sharing device 300 based on the solid state disk can also include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input / output interfaces 360, and / or one or more operating systems 331, such as Windows Serve, Mac OS X, Unix, Linux, FreeBSD, and the like. Those skilled in the art can understand that the computing power sharing device 300 based on the solid state disk can include more or fewer components than those shown, or some components can be combined, or different components can be arranged. Figure 3 The structure of the computing power sharing device of the solid state disk shown does not constitute a limitation on the computing power sharing device based on the solid state disk, and can include more or fewer components than those shown, or some components can be combined, or different components can be arranged.

[0087] The application further provides a computer readable storage medium, which can be a nonvolatile computer readable storage medium or a volatile computer readable storage medium, and the computer readable storage medium stores instructions, and the instructions make a computer execute the steps of the computing power sharing method of the solid state disk when the instructions are run on the computer.

[0088] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system or system, unit can refer to the corresponding processes in the foregoing method embodiments, and will not be described here.

[0089] The integrated unit, if realized in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the application or the whole or part of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the application. The foregoing storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various program code storage media.

[0090] The above-described embodiments are only used to illustrate the technical solutions of the application, rather than limit them; although the application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the application.

Claims

1. A method for sharing computing power of a solid state disk, characterized in that, The method for sharing computing power of the solid state disk is applied to a computing power sharing system of the solid state disk, and the computing power sharing system of the solid state disk comprises a first solid state system, a second solid state system, a Host main control system and an HMB cache system. The method for sharing computing power of the solid state disk comprises the following steps: The Host main control system analyzes input and output states of the first solid state system and the second solid state system based on a preset PCIE protocol, and obtains the second solid state system in an idle state; Target data to be operated is sent to the second solid state system; The second solid state system receives the target data, processes the target data, obtains result data, and sends the result data to the HMB cache system and sends operation completion information to the Host main control system; The Host main control system receives the operation completion information, and sends notification information to the first solid state system; The first solid state system receives the notification information, and according to the notification information, obtains result data from the HMB cache system, wherein the result data comprises target carrying address; The first solid state system processes carrying data corresponding to the result data according to the target carrying address, and obtains carried carrying data.

2. The computing power sharing method of the solid state disk according to claim 1, characterized in that, The method for sharing computing power of the solid state disk comprises the following steps: The Host main control system analyzes input and output states of the first solid state system and the second solid state system based on a preset PCIE protocol, and obtains the second solid state system in an idle state; 3. The computing power sharing method of the solid state disk according to claim 1, wherein, The Host main control system analyzes input and output states of the first solid state system and the second solid state system based on a preset PCIE protocol, and obtains the second solid state system in an idle state; The notification information comprises a cache address and a target data name, and the method for sharing computing power of the solid state disk comprises the following steps: It is judged whether the target data name is a data name of preset shared operation; 4. The computing power sharing method of the solid state disk according to claim 1, characterized in that, If the data name is a shared operation data name, result data is obtained from the HMB cache system according to the cache address. Before the Host main control system receives the operation completion information and sends notification information to the first solid state system, the method for sharing computing power of the solid state disk further comprises the following steps: The HMB cache system receives the result data, and sends cache preparation information to the Host main control system; 5. The computing power sharing method of the solid state disk according to claim 4, characterized in that, The Host main control system receives the cache preparation information. The Host main control system receives the operation completion information, and sends notification information to the first solid state system, which comprises the following steps:

6. A computing power sharing system of a solid state disk, characterized in that, The Host main control system receives the operation completion information, and based on the cache preparation information and the operation completion information, transmits notification information to the first solid state system. The computing power sharing system of the solid state disk comprises a first solid state system, a second solid state system, a Host main control system and an HMB cache system; The Host main control system is configured to analyze input and output states of the first solid state system and the second solid state system based on a preset PCIE protocol, and obtain the second solid state system in an idle state; sending target data to be operated to the second solid-state system; the second solid-state system is configured to receive the target data, perform operation processing on the target data to obtain result data, and send the result data to the HMB cache system and send operation completion information to the Host system; the Host system is configured to receive the operation completion information and send notification information to the first solid-state system; the first solid-state system is configured to receive the notification information, obtain result data from the HMB cache system according to the notification information, and the result data includes a target moving address; the first solid-state system is configured to move moving data corresponding to the result data according to the target moving address to obtain moved moving data.

7. A computing power sharing device of a solid state disk, characterized in that, The solid state disk computing power sharing device comprises a memory and at least one processor, the memory stores instructions, and the memory and the at least one processor are interconnected through a circuit; The at least one processor calls the instructions in the memory to enable the solid state disk computing power sharing device to perform the solid state disk computing power sharing method of any one of claims 1-5.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that The computer program is executed by the processor to implement the solid state disk computing power sharing method of any one of claims 1-5.

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