Silicon wafer double-sided polishing device and silicon wafer double-sided polishing device
By designing a flow channel in the carrier lining of the double-sided polishing device of the silicon wafer, the problem of deterioration of the surface flatness of the silicon wafer caused by the accumulation of polishing liquid is solved, and the effect of reducing the degree of polishing at the peripheral edge is achieved and the surface flatness of the silicon wafer is improved.
Patent Information
- Application Number
- CN202211718365.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-29
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2042-12-29
AI Technical Summary
During the polishing process of the existing silicon wafer double-sided polishing device, the polishing liquid is concentrated in the gap between the periphery of the silicon wafer and the inner wall of the accommodating part, resulting in an increase in the polishing degree at the periphery of the silicon wafer and the deterioration of the surface flatness, which cannot meet the high requirements of flatness by semiconductor technology.
A carrier member of a double-sided polishing device of silicon wafer is designed, and the inner lining forms a flow channel to discharge the polishing liquid gathered in the gap between the outer peripheral surface of the silicon wafer and the inner peripheral surface of the inner lining, reducing the amount of polishing liquid at the periphery.
Through the design of the flow channel, the amount of polishing liquid at the periphery of the silicon wafer is reduced, the difference between the polishing degree at the periphery and the center is reduced, and the surface flatness of the silicon wafer is improved.
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Figure CN115816267B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor silicon wafer production, and in particular to a carrier of a silicon wafer double-sided polishing device and a silicon wafer double-sided polishing device. Background Art
[0002] In the production process of semiconductor silicon wafers, it is usually necessary to perform double-sided polishing on the silicon wafers to remove damage on the surface of the silicon wafers caused during the silicon wafer forming process and to form the surface of the silicon wafers into a mirror-like state. This process is usually completed using a silicon wafer double-sided polishing device.
[0003] In the double-sided polishing device for silicon wafers, the silicon wafer is carried in a carrier. Specifically, the carrier may be disposed between upper and lower polishing pads and may be formed with a receiving portion that penetrates the carrier, and the silicon wafer may be received in the receiving portion to move with the carrier relative to the upper and lower polishing pads, thereby achieving that both circular main surfaces of the silicon wafer are polished by the upper and lower polishing pads.
[0004] During the above-mentioned polishing process, the polishing liquid from the polishing pad will accumulate in the gap between the outer peripheral surface of the silicon wafer and the inner peripheral wall of the accommodating portion, thereby increasing the amount of polishing liquid at the periphery of the silicon wafer, resulting in an increase in the degree of polishing of the two circular main surfaces of the silicon wafer close to the periphery of the silicon wafer, thereby causing the surface flatness of the silicon wafer to deteriorate.
[0005] With the continuous development of semiconductor technology, the requirements for the surface flatness of silicon wafers are getting higher and higher. Due to the existence of the above problems, conventional silicon wafer double-sided polishing devices can no longer meet such requirements. Summary of the invention
[0006] In order to solve the above technical problems, the embodiments of the present invention hope to provide a carrier for a silicon wafer double-sided polishing device and a silicon wafer double-sided polishing device, which can reduce the polishing degree at the periphery of the silicon wafer, thereby reducing the difference between the polishing degree at the periphery and the center of the silicon wafer, and improving the surface flatness of the silicon wafer.
[0007] The technical solution of the present invention is achieved in this way:
[0008] In a first aspect, an embodiment of the present invention provides a carrier for a double-sided polishing device for a silicon wafer, the carrier comprising:
[0009] a body formed with a through hole;
[0010] An annular liner is inserted into the through hole of the main body, and the liner is used to accommodate a silicon wafer, wherein the liner is formed with a guide channel so that the polishing liquid accumulated in the gap between the outer peripheral surface of the silicon wafer and the inner peripheral surface of the liner can be discharged through the guide channel.
[0011] In a second aspect, an embodiment of the present invention provides a double-sided polishing device for a silicon wafer, wherein the double-sided polishing device for a silicon wafer comprises the carrier according to the first aspect.
[0012] An embodiment of the present invention provides a carrier for a double-sided polishing device for a silicon wafer and a double-sided polishing device for a silicon wafer. Since a guide channel is formed on the inner lining, the polishing liquid accumulated in the above-mentioned gap can be gradually discharged through the guide channel, so that a small amount of polishing liquid is always maintained in the gap, thereby reducing the polishing degree at the periphery of the silicon wafer and improving the surface flatness of the silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 A schematic top view of a carrier of a double-sided polishing device for a silicon wafer according to an embodiment of the present invention;
[0014] Figure 2 For along Figure 1 A schematic partial cross-sectional view taken along line AA in FIG.
[0015] Figure 3 A partial cross-sectional schematic diagram of an inner lining of a carrier according to a preferred embodiment of the present invention;
[0016] Figure 4 A partial cross-sectional schematic diagram of an inner lining of a carrier according to another preferred embodiment of the present invention;
[0017] Figure 5 A partial cross-sectional schematic diagram of an inner lining of a carrier according to a more preferred embodiment of the present invention;
[0018] Figure 6 is a schematic top view of a carrier according to another embodiment of the present invention;
[0019] Figure 7 is a schematic top view of an inner lining of a carrier according to an embodiment of the present invention;
[0020] Figure 8 is a schematic top view of a silicon wafer double-side polishing device according to an embodiment of the present invention;
[0021] Fig. 9 Schematic diagram of a front view of a silicon wafer double-side polishing device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0022] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.
[0023] See also Figure 1 and Figure 2 Combined with Figure 8 and Fig. 9The embodiment of the present invention provides a carrier 10 of a silicon wafer double-side polishing device, and the carrier 10 may include:
[0024] A body 11 having a through hole 11H formed therein;
[0025] The ring-shaped liner 12 is inserted into the through hole 11H of the body 11, and the liner 12 is used to accommodate the silicon wafer W, wherein the liner 12 is formed with a guide channel 12P, such as Figure 2 As shown in FIG. 1 , the polishing liquid PL accumulated in the gap G between the outer peripheral surface WS of the silicon wafer W and the inner peripheral surface 12S of the liner 12 can be discharged through the guide channel 12P, as shown in FIG. Figure 2 The polishing fluid is schematically shown by straight arrows in the figure, such as being discharged to a lower polishing pad 50 which will be described in further detail below.
[0026] For the carrier 10 according to the embodiment of the present invention, since the inner lining 12 is formed with a guide channel 12P, the polishing liquid PL accumulated in the above-mentioned gap G can be gradually discharged through the guide channel 12P, so that a small amount of polishing liquid PL is always maintained in the gap G, thereby reducing the polishing degree at the periphery of the silicon wafer W and improving the surface flatness of the silicon wafer.
[0027] Regarding the inlet where the polishing liquid PL in the gap G flows into the guide channel 12P, in a preferred embodiment of the present invention, see Figure 3 The inlet 12P-I of the guide channel 12P may be formed at the bottom 12B of the liner 12, where the bottom 12B is, for example, Figure 3 The portion enclosed by the dotted box can, in this way, drain the polishing liquid PL in the gap G as much as possible. In addition, when the inlet 12P-I is formed at the bottom 12B, the height of the polishing liquid PL above the inlet 12P-I is maximized, thereby promoting the polishing liquid PL to be discharged from the gap G in a faster manner.
[0028] As for the outlet of the polishing liquid PL in the gap G from the guide channel 12P, in a preferred embodiment of the present invention, see Figure 4 The outlet 12P-O of the guide channel 12P can be formed on the bottom surface 12BS of the liner 12. In this way, the discharged polishing liquid PL can be discharged to the lower polishing pad 50 as described above. For example, if the outlet 12P-O is formed on the outer peripheral surface of the liner 12, see Figure 1 It is easy to understand that the outflowing polishing liquid PL will enter the gap between the outer peripheral surface of the liner 12 and the through hole 11H. When such a gap is small, it is not conducive to the discharge of the polishing liquid PL.
[0029] In a more preferred embodiment of the present invention, see Figure 5 The guide channel 12P may be a groove 12R recessed from the bottom surface 12BS of the liner 12. In this way, the advantages of the inlet 12P-I of the guide channel 12P being formed at the bottom 12B of the liner 12 and the outlet 12P-O of the guide channel 12P being formed on the bottom surface 12BS of the liner 12 can be simultaneously obtained.
[0030] As described in detail below with respect to the double-sided polishing device 1 for silicon wafers, during the polishing process, the silicon wafer W moves with the carrier 10 relative to the upper polishing pad 40 and the lower polishing pad 50 to achieve polishing. In the case where there is a gap G between the outer peripheral surface WS of the silicon wafer W and the inner peripheral surface 12S of the liner 12, the above movement may cause the carrier 10 to impact the silicon wafer W, resulting in adverse effects such as fragmentation. In this regard, in a preferred embodiment of the present invention, see Figure 6 The carrier 10 may further include a buffer layer 13 disposed between the body 11 and the liner 12. Thus, when the above-mentioned movement produces an impact on the silicon wafer W, the buffer layer 13 may buffer the impact, thereby reducing, for example, a fragmentation rate.
[0031] Preferably, see Figure 7 The inner liner 12 may be formed with a plurality of flow guide channels 12P, such as Figure 7 8 guide channels 12P are shown as examples, and the multiple guide channels 12P can be evenly distributed in the circumferential direction of the liner 12. In this way, the polishing liquid PL at each position in the circumferential direction of the silicon wafer W can be effectively discharged, thereby ensuring the surface flatness.
[0032] See also Figure 8 The embodiment of the present invention further provides a silicon wafer double-side polishing device 1, and the silicon wafer double-side polishing device 1 may include a carrier 10 according to the above-mentioned embodiments of the present invention.
[0033] See also Figure 8 The body 11 may be disc-shaped and have external teeth 11T, as in Figure 8 As schematically shown by thick solid lines, the silicon wafer double-side polishing device 1 may also include:
[0034] The inner gear ring 20 has inner gear ring outer teeth 20T, as shown in Figure 8 Also schematically shown by a thick solid line;
[0035] The outer gear ring 30 is arranged on the periphery of the inner gear ring 20, and the outer gear ring 30 has outer gear ring inner teeth 30T, such as Figure 8 Also schematically shown by a thick solid line;
[0036] The outer teeth 11T of the main body are used to mesh with the outer teeth 20T of the inner gear ring and the inner teeth 30T of the outer gear ring. Thus, when the inner gear ring 20 and the outer gear ring 30 rotate respectively, the carrier 10 and the silicon wafer W carried in the carrier 10 can be driven to move.
[0037] See also Fig. 9 The silicon wafer double-side polishing device 1 may further include an upper polishing pad 40 and a lower polishing pad 50 respectively disposed above and below the carrier 10 to clamp the carrier 10 .
[0038] See also Fig. 9 The silicon wafer double-sided polishing device 1 may also include an upper fixed plate 60 arranged above the upper polishing pad 40 and a lower fixed plate 70 arranged below the lower polishing pad 50, and the upper fixed plate 60 and the lower fixed plate 70 are used to provide a clamping force for the upper polishing pad 40 and the lower polishing pad 50 to clamp the carrier 10.
[0039] It should be noted that the technical solutions described in the embodiments of the present invention can be combined arbitrarily without conflict.
[0040] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A carrier for a double-sided polishing device for a silicon wafer, characterized in that: The bearing member comprises: a body formed with a through hole; an annular liner inserted into the through hole of the body, the liner being used to accommodate a silicon wafer, wherein the liner is formed with a guide channel so that the polishing liquid accumulated in the gap between the outer peripheral surface of the silicon wafer and the inner peripheral surface of the liner can be discharged through the guide channel, so that the amount of the polishing liquid in the gap is reduced, thereby reducing the polishing degree at the periphery of the silicon wafer and improving the surface flatness of the silicon wafer; and A buffer layer is provided between the body and the liner, Wherein, the inlet of the guide channel is formed at the bottom of the lining, Wherein, the outlet of the guide channel is formed on the bottom surface of the lining, Wherein, the guide channel is a groove recessed from the bottom surface of the liner.
2. The carrier according to claim 1, characterized in that The inner liner is formed with a plurality of flow guiding channels, and the plurality of flow guiding channels are evenly distributed in the circumferential direction of the inner liner.
3. A double-sided polishing device for silicon wafers, characterized in that: The silicon wafer double-side polishing device comprises the carrier according to claim 1 or 2.
4. The double-sided polishing device for silicon wafers according to claim 3, characterized in that: The main body is in a disc shape and has external teeth, and the silicon wafer double-sided polishing device also includes: An inner gear ring, wherein the inner gear ring has inner gear ring external teeth; An outer gear ring disposed on the periphery of the inner gear ring, the outer gear ring having inner teeth of the outer gear ring; Wherein, the outer teeth of the main body are used to mesh with the outer teeth of the inner gear ring and the inner teeth of the outer gear ring.
5. The double-sided polishing device for silicon wafers according to claim 4, characterized in that: The double-side polishing device for silicon wafers also includes an upper polishing pad and a lower polishing pad which are respectively arranged above and below the carrier to clamp the carrier.
6. The double-sided polishing device for silicon wafers according to claim 5, characterized in that: The double-sided silicon wafer polishing device also includes an upper fixed plate arranged above the upper polishing pad and a lower fixed plate arranged below the lower polishing pad, and the upper fixed plate and the lower fixed plate are used to provide a clamping force for the upper polishing pad and the lower polishing pad to clamp the carrier.
Citation Information
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