Display module, display device, and bonding impedance testing method
Through the automated testing of the bonding impedance test module, the problems of low efficiency and space waste in the bonding impedance test of the AMOLED display module are solved, and efficient and economical bonding impedance testing is achieved, which improves the process yield and reduces costs.
Patent Information
- Application Number
- CN202211199613.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-29
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2042-09-29
AI Technical Summary
The prior art has low testing efficiency, wastes circuit board space, and is costly when testing the bonding impedance of an AMOLED display module.
A binding impedance test module is used, including a binding test part, a control unit and a binding resistance test unit. The test binding part between the circuit board, flexible circuit board, source driver chip and display panel is connected through a signal line to realize automatic testing of the binding impedance.
Save PCB space, improve test efficiency, increase PCB pitch, improve process yield, reduce test time and equipment investment, and reduce costs.
Smart Images

Figure CN115831014B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of display product manufacturing, and in particular to a display module, a display device and a method for testing binding impedance. Background Art
[0002] With the continuous development of AMOLED (Active-matrix organic light-emitting diode) panels, flexible and full-screen displays are poised to become a trend in the coming years. However, the development of new technologies inevitably brings new technical challenges. With the rapid iteration of foldable products, AMOLED flexible products are rapidly finding breakthroughs in this area, with foldable phones, foldable tablets, and foldable laptops quickly capturing people's attention. Related AMOLED source ICs are simplified versions of small-size DICs. However, medium and large-size displays require a combination of a timing controller (TCON) and multiple source ICs. During actual production, the stability of each product's COP (Chip on Panel) bonding process (bonding between the source driver IC and display panel), FOP (FPC on Panel) process (bonding between the flexible printed circuit board (PCB) and source driver IC), and FOB (FPC on Board) process (bonding between the PCB and the flexible printed circuit board) must be monitored. This requires three bonding impedance measurements for each product to continuously assess process stability, but this testing method is inefficient and costly. Summary of the Invention
[0003] In order to solve the above technical problems, the present invention provides a display module, a display device and a method for testing bonding impedance, which solve the problem that bonding impedance testing wastes circuit board space and has low testing efficiency.
[0004] To achieve the above-mentioned object, the technical solution adopted in the embodiment of the present invention is: a display module including a circuit board, a flexible circuit board, a source driver chip and a display panel that are bound together, and also including a binding impedance testing module, wherein the binding impedance testing module includes:
[0005] a binding test portion, comprising a first test binding portion provided between the circuit board and the flexible circuit board, a second test binding portion between the flexible circuit board and the source driver chip, and a third test binding portion between the source driver chip and the display panel, wherein the first test binding portion, the second test binding portion, and the third test binding portion are connected via a test signal line;
[0006] a control unit comprising a signal output portion for outputting a control signal and a processing portion for processing a feedback signal;
[0007] The binding resistance value testing unit is configured to obtain a binding impedance test value according to the control signal, and output the feedback signal including the test value of the binding impedance;
[0008] The processing unit is used to compare the test value with a preset impedance value according to the feedback signal and output a comparison result.
[0009] Optionally, the binding impedance test value is the sum of the binding impedance of the first test binding part, the binding impedance of the second test binding part, and the binding impedance of the third test binding part.
[0010] Optionally, the binding impedance test value is m, and the processing unit compares the first value a with the preset impedance value, wherein a=n*m, when the binding impedance test value is greater than the first preset value, n is less than 1, and when the binding impedance test value is less than the second preset value, n is greater than 1.
[0011] Optionally, a timing controller is provided on the circuit board, the control unit is integrated into the timing controller, and the binding resistance test unit and the processing unit are integrated into the source driver chip.
[0012] Optionally, a timing controller is provided on the circuit board, the control unit and the processing unit are integrated into the timing controller, and the binding resistance test unit is integrated into the source driver chip.
[0013] Optionally, the binding resistance testing unit includes:
[0014] a comparison amplifier, wherein a first input terminal of the comparison amplifier is connected to the third test binding portion to receive a first reference voltage;
[0015] a second reference voltage providing unit connected to the second input terminal of the comparison amplifier, and configured to provide a second reference voltage equal to the first reference voltage;
[0016] The bonding impedance test value acquiring unit is configured to acquire the bonding impedance test value when the output terminal of the comparison amplifier outputs a zero level, wherein the output terminal of the comparison amplifier outputs a zero level when the second reference voltage is equal to the first reference voltage.
[0017] Optionally, a first resistor for voltage division is connected in series between the first input terminal of the comparison amplifier and the binding test unit.
[0018] Optionally, the second reference voltage providing unit includes a fixed voltage signal providing circuit and an adjustable resistor.
[0019] Optionally, a plurality of first function binding portions are provided between the circuit board and the flexible circuit board, and the first test binding portion is provided on at least one side of an arrangement direction of the plurality of first function binding portions.
[0020] Optionally, a plurality of second functional binding portions are provided between the flexible circuit board and the source driver chip, and the second test binding portion is provided on at least one side of an arrangement direction of the plurality of second functional binding portions.
[0021] Optionally, a plurality of third functional binding portions are provided between the source driver chip and the display panel, and the third test binding portion is provided on at least one side of an arrangement direction of the plurality of third functional binding portions.
[0022] An embodiment of the present invention further provides a display device, comprising the above-mentioned display module.
[0023] An embodiment of the present invention further provides a bonding impedance testing method for testing the above-mentioned display module, comprising the following steps:
[0024] outputting a control signal including information for starting a bonding impedance test;
[0025] acquiring a binding impedance between the display panel and the binding element according to the control signal, and outputting the feedback signal including a test value of the binding impedance;
[0026] The test value or the preset impedance value is compared according to the feedback signal, and a comparison result is output.
[0027] The beneficial effects of the present invention are: there is no need to set up separate test points on the circuit board, and the first test binding part between the circuit board and the flexible circuit board, the second test binding part between the flexible circuit board and the source driver chip, and the third test binding part between the source driver chip and the display panel are connected through signal lines, so that the first test binding part, the second test binding part and the third test binding part are located in the same test chain, and the binding impedances between two adjacent devices in the circuit board, the flexible circuit board, the source driver chip and the display panel are merged into a whole for automatic testing, saving space on the circuit board and improving test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A schematic diagram showing a test module for bonding impedance in the related art;
[0029] Figure 2A schematic diagram showing a bonding impedance test module in an embodiment of the present invention;
[0030] Figure 3 A schematic diagram showing a binding resistance test unit in an embodiment of the present invention;
[0031] Figure 4 A schematic diagram showing a bonding impedance test module in an embodiment of the present invention;
[0032] Figure 5 A schematic diagram showing a flexible circuit board in an embodiment of the present invention;
[0033] Figure 6 A schematic diagram showing a source driver chip in an embodiment of the present invention. DETAILED DESCRIPTION
[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the described embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present invention.
[0035] In the description of the present invention, it should be noted that terms such as "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are intended solely to facilitate and simplify the description of the present invention and are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0036] refer to Figure 1 ( Figure 1Only a binding impedance test structure corresponding to a flexible circuit board is shown in the figure). In the conventional technical solution, the display module includes a circuit board 1, a flexible circuit board 2, and a source driver chip 3 that are bound to each other. The source driver chip 3 is directly bound to the non-display area of the display panel 4. A first binding portion 11 is provided between the circuit board 1 and the flexible circuit board 2, a second binding portion 12 is provided between the flexible circuit board 2 and the source driver chip 3, and a third binding portion 13 is provided between the source driver chip 3 and the display panel 4. The binding process of each of the first binding portion 11, the second binding portion 12, and the third binding portion 13 is the same. Each of the first binding portion 11, the second binding portion 12, and the third binding portion 13 is independently arranged. For example, the first binding portion 11 includes two groups of first binding pins located on the circuit board 1 and two groups of second binding pins located on the flexible circuit board 2. Each group of corresponding binding pins can be bound together by anisotropic conductive adhesive (ACF), that is, a bonding process, and the resistance generated at the bonding is the bonding impedance.
[0037] The test points 5 corresponding to the first binding part 11, the second binding part 12 and the third binding part 13 are all set on the circuit board 1. At the binding impedance test station, the multimeter Pogo PIN method is used, and the probe is directly inserted into the test point 5 to detect the impedance. The first binding part 11, the second binding part 12 and the third binding part 13 must all be tested, and all the test points 5 are set on the circuit board 1, occupying the space of the circuit board 1. And when the X-axis length (length in the extension direction) of the circuit board 1 is constant, increasing the number of gold fingers will inevitably challenge the factory yield. First, from the current design point of view, the pitch (the distance between two adjacent binding pins) that can guarantee the yield is about 270um. If 12 more pins (reference Figure 1 Each test point on the flexible circuit board 2 corresponds to 12 pins), so if four FPCs are set up, 48 pins will be added, which will inevitably further aggravate the reduction of pitch and sharply reduce the yield rate. Secondly, due to the testing requirements of ART, centralized testing is required after bonding, which not only increases testing time but also requires increased equipment investment. With such a complicated design, it is obvious that the test plan for medium and large-sized ART cannot be fully applied to the design experience of small-sized ART.
[0038] For small-sized products, ART (Artificial Intelligence) (ART) monitoring is relatively simple because there's only one DIC, and there's relatively ample space for the MFPC. However, for large-sized AMOLED NB or TPC products, due to their high signal traffic and numerous pin counts, the bonding area between the FOP and FOB is extremely limited, given the fixed size of the PCBA (Printed Circuit Board + Assembly). Adding impedance test points to the PCB would significantly consume space. Furthermore, with four to six source ICs, there would be eight to twelve sets of ART (impedance) test points. All of these test points would need to be placed on the PCB for automatic line inspection. This not only wastes PCB space but also requires an additional station for ART testing and comparison, reducing efficiency and increasing costs.
[0039] refer to Figure 2 、 Figure 3 and Figure 4 To address the above problems, this embodiment provides a display module, comprising a circuit board 1, a flexible circuit board 2, a source driver chip 3, and a display panel 4 that are bound together, and also comprising a binding impedance testing module, wherein the binding impedance testing module comprises:
[0040] The binding test section 102 includes a first test binding section 10 provided between the circuit board 1 and the flexible circuit board 2, a second test binding section 20 between the flexible circuit board 2 and the source driver chip 3, and a third test binding section 30 between the source driver chip 3 and the display panel 4, wherein the first test binding section 10, the second test binding section 20, and the third test binding section 300 are connected via a test signal line;
[0041] A control unit, comprising a signal output unit 101 for outputting a control signal and a processing unit 104 for processing a feedback signal;
[0042] The binding resistance value testing unit 103 is configured to obtain a binding impedance test value according to the control signal, and output the feedback signal including the binding impedance test value;
[0043] The processing unit 103 is configured to compare the test value with a preset impedance value according to the feedback signal, and output a comparison result.
[0044] In this embodiment, compared Figure 1The impedance test structure is designed, the setting of the test point on the circuit board 1 is cancelled, the pitch on the circuit board 1 is increased, and the yield rate is improved. The first test binding part 10 provided between the circuit board 1 and the flexible circuit board 2, the second test binding part 20 between the flexible circuit board 2 and the source driver chip 3, and the third test binding part 30 between the source driver chip 3 and the display panel 4 are connected through a signal line, so that the first test binding part 10, the second test binding part 20 and the third test binding part 30 are located in the same test link, and the binding impedances between two adjacent devices in the circuit board 1, the flexible circuit board 2, the source driver chip 3 and the display panel 4 are combined into a whole for automatic testing, which saves space on the circuit board 1 and improves test efficiency.
[0045] In this embodiment, the bonding impedance test can be uniformly detected at the lighting station and / or continuously monitored during use. Compared with the traditional solution, the PINs (binding pins, that is, the first test binding part 10 uses binding pins) between the circuit board 1 and the flexible circuit board 2 can be reduced by 40 (for example, for a sample of 4 FPC Bonding, if the number of FPC Bonding increases, the number of saved PINs will increase again). In the first direction (perpendicular to the direction from the display panel 4 to the circuit board 1, and perpendicular to the light-emitting surface of the display panel 4), the pitch of the bonding area (FOB) of the flexible circuit board 2 will increase from 241um to 252um ( Figure 1 In the traditional solution shown, the effective PIN placement area (including functional pins and test binding pins serving as the first test binding portion 10) of the flexible circuit board 2 is 58 mm, and this size cannot be increased due to size limitations. The number of pins in the binding area of the flexible circuit board 2 is compressed to 240 at the limit, and the pitch is 241 μm. In this embodiment, the number of test binding pins is reduced, so that the pitch of the flexible circuit board 2 is increased to 252 μm, increasing the spacing between two adjacent pins, thereby greatly increasing process feasibility and improving the FOB process yield, thereby alleviating process bottlenecks.
[0046] It should be noted that Figure 2 and Figure 3 All are schematic diagrams. Figure 2 Four flexible circuit boards 2 are provided, and only the binding impedance test module corresponding to one flexible circuit board 2 is shown. The structures of the binding impedance test modules corresponding to the other flexible circuit boards 2 are the same.
[0047] In an exemplary embodiment, the bonding impedance test value is the sum of the bonding impedance of the first test bonding part 10 , the bonding impedance of the second test bonding part 20 , and the bonding impedance of the third test bonding part 30 .
[0048] In this embodiment, in order to avoid occupying the space of the circuit board and reduce the distribution of test lines, the first test binding part 10, the second test binding part 20 and the third test binding part 30 are located in the same link. When performing the test, the binding impedance of the first test binding part 10, the binding impedance of the second test binding part 20 and the binding impedance of the third test binding part 30 are tested as a whole impedance.
[0049] In an exemplary embodiment, the binding impedance test value is m, and the processing unit compares the first value a with the preset impedance value, wherein a=n*m, when the binding impedance test value is greater than the first preset value, n is less than 1, and when the binding impedance test value is less than the second preset value, n is greater than 1.
[0050] When the bonding impedance test value m is greater than the first preset value, by setting n to be less than 1, the larger impedance test value is reduced to the smaller first value, which is beneficial to reducing power consumption and test voltage value.
[0051] When the binding impedance test value m is less than the second preset value, by setting n to be greater than 1, the impedance test value with a smaller value is increased to the first value with a larger value, thereby avoiding the problem of being unable to measure due to the binding test value being too small.
[0052] In this embodiment, the bonding impedance testing module is integrated into the timing controller on the circuit board and / or the source driver chip, which simplifies the structure and realizes real-time detection of bonding impedance.
[0053] In an exemplary embodiment, a timing controller is provided on the circuit board, the control unit is integrated into the timing controller, and the binding resistance test unit and the processing unit are integrated into the source driver chip 3 .
[0054] In an exemplary embodiment, a timing controller is provided on the circuit board 1. The control unit and the processing unit 104 are integrated into the timing controller, and the bonding resistance test unit is integrated into the source driver chip 3. The source driver chip 3 can transmit the monitored bonding impedance data (i.e., the obtained bonding impedance test value) to the Tcon (timing controller) in real time. The Tcon can compare the test value with the preset impedance value and calculate the necessary compensation data based on the comparison result to improve the display effect.
[0055] In an exemplary embodiment, the binding resistance testing unit 103 includes:
[0056] a comparison amplifier 100 , wherein a first input terminal of the comparison amplifier 100 is connected to the third test binding unit 30 to receive a first reference voltage;
[0057] A second reference voltage providing unit 200 is connected to the second input terminal of the comparison amplifier 100 and is used to provide a second reference voltage equal to the first reference voltage;
[0058] The bonding impedance test value acquiring unit is configured to acquire the bonding impedance test value when the output terminal of the comparison amplifier 100 outputs a zero level. When the second reference voltage is equal to the first reference voltage, the output terminal of the comparison amplifier 100 outputs a zero level.
[0059] In an exemplary embodiment, a first resistor R2 for voltage division is connected in series between the first input terminal of the comparison amplifier 100 and the binding test unit. Figure 3 The resistance value R1 of the binding test part is the binding impedance test value to be measured, one end of the first resistor R2 is connected to the binding test part, one end of the first resistor is grounded, and the first resistor R2 is connected in series between the first input end and the binding test part.
[0060] Exemplarily, the first resistor R2 is an adjustable resistor, such as a sliding rheostat, but is not limited thereto.
[0061] A better voltage dividing effect can be achieved by adjusting the resistance of the first resistor R2.
[0062] In an exemplary embodiment, the second reference voltage providing unit includes a fixed voltage signal providing circuit and an adjustable resistor R3.
[0063] refer to Figure 3The signal input by the timing controller is input into the source driver chip 3 through the first test binding part 10, the second test binding part 20 and the third test binding part 30, and is divided by the bonding impedance R1 (the sum of the bonding impedance of the first test binding part 10, the binding impedance of the second test binding part 20 and the binding impedance of the third test binding part 30) and the first resistor R2. The non-inverting end (i.e., the first input end) of the comparison amplifier 100 obtains the Vref value (i.e., the first reference voltage value), and a fixed voltage signal Vin- is provided by the fixed signal providing circuit. By adjusting the adjustable R3, the Vref- value (i.e., the second reference voltage value) of the inverting end (i.e., the second input end) of the comparison amplifier 100 can be obtained. The output (i.e., the output end of the comparison amplifier 100) outputs different results according to the size of the Vref and Vref- signals. When Vref and Vref- are equal, the Output outputs zero level. Since the Input (the fixed voltage signal provided by the timing controller) and the value of the first resistor R2 are known, the magnitude (Ω or KΩ level) and value of the resistance of R1 can be obtained, and the value is saved inside the source driver chip 3. When the timing controller sends an instruction, the source driver chip 3 and the timing controller transmit data through the P2P (Peer to Peer (peer-to-peer network, based on PPP point-to-point protocol) protocol, and the resistance of R1 is passed to the timing controller to realize automatic monitoring of the binding impedance at the lighting station, so as to realize automatic monitoring of the binding impedance at the lighting station.
[0064] Exemplarily, the timing controller compares the received bonding impedance test value with a preset impedance value, and then outputs the test result by selecting a Pass screen and an NG screen according to a preset rule, but the present invention is not limited thereto.
[0065] refer to Figure 5 In an exemplary embodiment, a plurality of first function binding parts 40 are provided between the circuit board 1 and the flexible circuit board 2, and the first test binding part 10 is provided on at least one side of the arrangement direction of the plurality of first function binding parts 40.
[0066] refer to Figure 2 The flexible circuit board 2 and the circuit board 1 are connected by the first test binding portion 10 in a first direction (reference Figure 5In the X-direction (in the X-direction), the flexible circuit board 2 includes two opposing sides. To accurately test the binding impedance between the flexible circuit board 2 and the circuit board 1, tests are performed on the opposing sides of the flexible circuit board 2 in the first direction. Multiple first-function binding portions 40 are arranged along the first direction, and first test binding portions 10 are provided on opposing sides of the multiple first-function binding portions 40. The first direction is parallel to the light-emitting surface of the display panel 4 and perpendicular to the direction from the flexible circuit board 2 to the circuit board 1. Exemplarily, both the first test binding portions 10 and the first function binding portions 40 utilize binding pins.
[0067] refer to Figure 5 In an exemplary embodiment, a plurality of second function binding parts 50 are provided between the flexible circuit board 2 and the source driver chip 3, and a second test binding part 20 is provided on at least one side of the arrangement direction of the plurality of second function binding parts 50.
[0068] The flexible circuit board 2 and the source driver chip 3 are connected by the second test binding part 20, in the first direction (reference Figure 5 In the X direction in the drawing, the flexible circuit board 2 includes two opposite sides. In order to accurately test the binding impedance between the flexible circuit board 2 and the source driver chip 3, tests are performed on the opposite sides of the flexible circuit board 2. The plurality of second-function binding portions 50 are arranged along the first direction, and the second test binding portions 20 are respectively provided on the opposite sides of the plurality of second-function binding portions 50.
[0069] In an exemplary embodiment, a plurality of third functional binding portions (for transmitting display signals) 60 are provided between the source driver chip 3 and the display panel 4. The plurality of third functional binding portions 60 are arranged along the extension direction of the source driver chip 3, for example, along Figure 5 As shown in the first direction (direction X), the third test binding portion 30 is provided on at least one side of the arrangement direction of the plurality of third function binding portions 60 .
[0070] The display panel 4 and the source driver chip 3 are bound and connected through the third test binding part 30. In the first direction, the source driver chip 3 includes two opposite sides. In order to accurately test the binding impedance between the display panel 4 and the source driver chip 3, tests are performed on the opposite sides of the source driver chip 3 respectively. Multiple third functional binding parts 60 are arranged along the first direction, and the third test binding parts 30 are respectively provided on the opposite sides of the multiple third functional binding parts 60.
[0071] Illustratively, at least two first test binding portions 10 are disposed at corners of the flexible circuit board 2, located on a side close to the circuit board 1, and symmetrically relative to a centerline 50 of the flexible circuit board 2 in the first direction. This design helps conserve layout space on the flexible circuit board 2 and allows routing to be done away from other functional components.
[0072] Exemplarily, at least two second test binding portions 20 are respectively arranged at the corners of the flexible circuit board 2 and are located on a side away from the circuit board 1, symmetrical with respect to the center line 50 of the flexible circuit board 2 in the first direction, with reference to Figure 2 Such a design is beneficial to saving the layout space of the flexible circuit board 2 and avoiding other functional components for routing.
[0073] Exemplarily, the connection line between the second test binding part 20 and the first test binding part 10 located on the same side of the center line 50 of the flexible circuit board 2 in the first direction is roughly parallel to the center line 50, so that the length of the connection line between the second test binding part 20 and the first test binding part 10 can be reduced, thereby reducing impedance.
[0074] Exemplarily, the spacing between two adjacent third test binding parts 30 of the source driver chip 3 is smaller than the spacing between two adjacent second test binding parts 20 on the flexible circuit board 2; and / or, the spacing between two adjacent third test binding parts 30 of the source driver chip 3 is smaller than the spacing between two adjacent first test binding parts 10 on the flexible circuit board 2; such a design is conducive to setting a larger number of source driver chips 3 that meet the requirements on the display panel.
[0075] For example, the width of the connection line between the third test binding portion 30 of the source driver chip 3 and the second test binding portion 20 on the flexible circuit board 2 is smaller than the width of the connection line between the second test binding portion 20 and the first test binding portion 10 on the flexible circuit board 2. This design not only facilitates the binding of the display panel and the flexible circuit board 2 to occupy space, but also helps to fix the test binding impedance to the flexible circuit board so that it is not easily damaged (because the connection line between the third test binding portion 30 of the source driver chip 3 and the second test binding portion 20 on the flexible circuit board 2 is more susceptible to damage during transportation or shaking, while the connection line between the second test binding portion 20 and the first test binding portion 10 on the flexible circuit board 2 is relatively stable on the surface of the flexible circuit board 2).
[0076] An embodiment of the present invention further provides a display device, comprising the above-mentioned display module.
[0077] An embodiment of the present invention further provides a bonding impedance testing method for testing the above-mentioned display module, comprising the following steps:
[0078] outputting a control signal including information for starting a bonding impedance test;
[0079] acquiring a binding impedance between the display panel 4 and the binding element according to the control signal, and outputting the feedback signal including a test value of the binding impedance;
[0080] The test value or the preset impedance value is compared according to the feedback signal, and a comparison result is output.
[0081] It will be understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present invention, and the present invention is not limited thereto. Persons skilled in the art will readily appreciate that various modifications and improvements can be made without departing from the spirit and substance of the present invention, and such modifications and improvements are also considered within the scope of protection of the present invention.
Claims
1. A display module comprising a circuit board, a flexible circuit board, a source driver chip and a display panel that are bound together, characterized in that: The invention also includes a bonding impedance testing module, wherein the bonding impedance testing module includes: a binding test portion, comprising a first test binding portion provided between the circuit board and the flexible circuit board, a second test binding portion between the flexible circuit board and the source driver chip, and a third test binding portion between the source driver chip and the display panel, wherein the first test binding portion, the second test binding portion, and the third test binding portion are connected via a test signal line; a control unit comprising a signal output portion for outputting a control signal and a processing portion for processing a feedback signal; The binding resistance value testing unit is configured to obtain a binding impedance test value according to the control signal, and output the feedback signal including the test value of the binding impedance; The processing unit is used to compare the test value with a preset impedance value according to the feedback signal and output a comparison result; The binding resistance test unit includes: a comparison amplifier, wherein a first input terminal of the comparison amplifier is connected to the third test binding portion to receive a first reference voltage; a second reference voltage providing unit connected to the second input terminal of the comparison amplifier, and configured to provide a second reference voltage equal to the first reference voltage; The bonding impedance test value acquiring unit is configured to acquire the bonding impedance test value when the output terminal of the comparison amplifier outputs a zero level, wherein the output terminal of the comparison amplifier outputs a zero level when the second reference voltage is equal to the first reference voltage.
2. The display module according to claim 1, wherein: The bonding impedance test value is the sum of the bonding impedance of the first test bonding part, the bonding impedance of the second test bonding part, and the bonding impedance of the third test bonding part.
3. The display module according to claim 2, wherein: The binding impedance test value is m, and the processing unit compares the first value a with the preset impedance value, wherein a=n*m, when the binding impedance test value is greater than the first preset value, n is less than 1, and when the binding impedance test value is less than the second preset value, n is greater than 1.
4. The display module according to claim 1, wherein: A timing controller is provided on the circuit board, the control unit is integrated into the timing controller, and the binding resistance test unit and the processing unit are integrated into the source driver chip.
5. The display module according to claim 1, wherein: A timing controller is provided on the circuit board, the control unit and the processing unit are integrated into the timing controller, and the binding resistance test unit is integrated into the source driver chip.
6. The display module according to claim 1, wherein: A first resistor for voltage division is connected in series between the first input terminal of the comparison amplifier and the binding test unit.
7. The display module according to claim 1, wherein: The second reference voltage providing unit includes a fixed voltage signal providing circuit and an adjustable resistor.
8. The display module according to claim 1, wherein: A plurality of first function binding portions are provided between the circuit board and the flexible circuit board, and the first test binding portion is provided on at least one side of an arrangement direction of the plurality of first function binding portions.
9. The display module according to claim 1, wherein: A plurality of second functional binding portions are provided between the flexible circuit board and the source driver chip, and a second test binding portion is provided on at least one side of an arrangement direction of the plurality of second functional binding portions.
10. The display module according to claim 1, wherein: A plurality of third function binding portions are provided between the source driver chip and the display panel, and the third test binding portion is provided on at least one side of an arrangement direction of the plurality of third function binding portions.
11. A display device, characterized in that: A display module comprising any one of claims 1-10.
12. A method for testing bonding impedance, characterized in that: For testing the display module according to any one of claims 1 to 10, comprising the following steps: outputting a control signal including information for starting a bonding impedance test; acquiring a binding impedance between the display panel and the binding element according to the control signal, and outputting the feedback signal including a test value of the binding impedance; The test value or the preset impedance value is compared according to the feedback signal, and a comparison result is output.
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