Low temperature atomic layer etching using a noble gas

Abstract

A method of etching silicon at a low temperature is provided. The method includes forming an inert layer from condensation of a noble gas on exposed surfaces, such as a plurality of sidewalls of a feature, at a low temperature to passivate the sidewalls prior to an etch process. The method further includes flowing a fluorine-containing precursor gas into a chamber to form a fluorine-containing layer on the inert layer. The method further includes exposing the fluorine-containing layer and the inert layer to an energy source to form a passivation layer on a plurality of exposed portions of a substrate and exposing the substrate to ions to etch the substrate.

Description

[0001] BACKGROUND

[0002] TECHNICAL FIELD

[0003] The present disclosure relates generally to methods of etching using noble gases at cryogenic temperatures. BACKGROUND

[0004] Reliably producing nanometer and smaller features is one of the technical challenges of very large scale integration (VLSI) and ultra large scale integration (ULSI) for the next generation of semiconductor devices. However, as the limits of circuit technology are pushed, the shrinking size of VLSI and ULSI interconnect technology has additional demands on processing capabilities. Reliably forming gate structures on substrates is critical to implementing VLSI and ULSI and continuing efforts to increase circuit density with the quality of individual substrates and dies.

[0005] To reduce manufacturing costs, integrated circuit chip (IC) manufacturers require higher throughput and better device yield and performance for each silicon substrate processed. Some manufacturing techniques being explored in current development for next generation devices include processing at cryogenic temperatures. Dry reactive ion etching of substrates uniformly maintained at cryogenic temperatures enables ions to bombard the upward facing surface of material disposed on the substrate with reduced spontaneous etching, resulting in the formation of trenches with smooth, vertical sidewalls. Additionally, the selectivity of etching one material over another can be improved at cryogenic temperatures. For example, the selectivity between silicon (Si) and silicon dioxide (SiO2) increases exponentially with decreasing temperature.

[0006] Conventional cryogenic fluorine-based etching processes tend to isotropically etch, which can cause over-etching of the sidewalls of high aspect ratio features, resulting in loss of critical dimensions of the features. One solution to protect the sidewalls from over-etching involves forming a passivation layer on the sidewalls, such that the bottom portion of the feature is bombarded by ions while the sidewalls are maintained protected by the passivation layer. However, it is often difficult to balance the ratio of etching gas and passivation layer forming gas to properly control the passivation rate and etching rate. Additionally, as the aspect ratio varies, the passivation rate and etching rate also vary, which adds additional challenges to achieving consistent uniform etching of multiple structures of different sizes on a chip.

[0007] Therefore, there is a need for improved methods of etching at cryogenic temperatures. SUMMARY

[0008] The present disclosure relates generally to methods of etching using noble gases at cryogenic temperatures.

[0009] In one aspect, a method of etching a feature in a substrate is provided. The method includes cooling a substrate positioned in a chamber to a temperature below a triple point temperature of a first noble gas. The method further includes flowing a first noble gas into the chamber to form an inert layer on a plurality of exposed portions of the substrate. The method further includes flowing a fluorine-containing precursor gas into the chamber to form a fluorine-containing layer on the inert layer. The method further includes exposing the fluorine-containing layer and the inert layer to an energy source to form a passivation layer on the plurality of exposed portions of the substrate, and exposing the substrate to ions to etch the substrate.

[0010] The plurality of embodiments can include one or more of the following. The temperature can be from about -105 degrees Celsius to about -120 degrees Celsius. The first noble gas can be selected from xenon and krypton. The fluorine-containing precursor gas can be selected from SF6, NF3, and F2. Exposing the substrate to ions can further include applying an RF bias voltage to the substrate, and forming the ions from a second noble gas. The second noble gas can be selected from helium, neon, argon, and xenon. The substrate can include a silicon oxide layer disposed on a silicon layer.

[0011] In another aspect, a method of etching a feature in a substrate is provided. The method includes receiving a substrate including silicon on a substrate support in a chamber, the substrate support having a cooler operable to cool the substrate. The method further includes cooling the substrate by cooling the cooler to a temperature of about -100 degrees Celsius or less. The method further includes flowing a xenon precursor gas into the chamber to coat portions of a surface of the silicon with a xenon layer. The method further includes flowing a fluorine-containing precursor gas into the chamber to coat the xenon layer with a fluorine-containing layer. The method further includes exposing the xenon layer and the fluorine-containing layer to an energy source to form a xenon fluoride passivation layer, and exposing the substrate to ions to etch silicon from the surface of the silicon.

[0012] The plurality of embodiments can include one or more of the following. The temperature can be from about -105 degrees Celsius to about -120 degrees Celsius. The fluorine-containing precursor gas can be selected from SF6, NF3, and F2. Exposing the substrate to ions can further include applying an RF bias voltage to an electrode in the substrate support, and flowing a noble gas into the chamber. The noble gas can be helium. The xenon fluoride passivation layer can be formed on a plurality of sidewalls of a feature formed in the substrate, and the xenon fluoride passivation layer prevents or slows lateral etching of the feature when the feature is etched in a vertical direction in the substrate. A silicon oxide layer can be formed on at least a portion of the silicon. The substrate can have at least one feature on the substrate extending a feature depth from a top surface of the substrate to a bottom surface, the at least one feature having a width defined by a first sidewall and a second sidewall, wherein the passivation layer is formed on the top surface of the substrate, the first sidewall of the at least one feature, the second sidewall, and the bottom surface.

[0013] In yet another aspect, a method of etching a feature in a substrate is provided. The method includes receiving a substrate comprising silicon on a substrate support in a chamber, the substrate having a substrate surface and at least one feature formed on the substrate, the at least one feature extending from the substrate surface and having a plurality of sidewalls and a bottom surface, the substrate support having a chiller operable to cool the substrate. The method further includes cooling the substrate by cooling the chiller to a temperature of about -100 degrees Celsius or less. The method further includes forming a passivation layer over the substrate surface, the plurality of sidewalls, and the bottom surface of the at least one feature. Forming the passivation layer includes flowing a xenon precursor gas into the chamber to coat portions of the substrate surface with a xenon layer, flowing a fluorine-containing precursor gas into the chamber to coat the xenon layer with a fluorine-containing layer, and exposing the xenon layer and the fluorine-containing layer to a plasma to form the passivation layer. The method further includes exposing the substrate to ions to etch silicon from the bottom surface.

[0014] The various embodiments can include one or more of the following. The temperature can be from about -105 degrees Celsius to about -120 degrees Celsius. The fluorine-containing precursor gas can be selected from the group consisting of SF6, NF3, and F2. Exposing the substrate to ions further includes applying an RF bias voltage to an electrode in the substrate support and flowing a noble gas into the chamber. The noble gas can be helium.

[0015] In another aspect, a non-transitory computer readable medium has stored thereon instructions that, when executed by a processor, cause a process to perform operations of the above-described method. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to enable a thorough and complete understanding of the above-mentioned features of the present disclosure, a more detailed description will be obtained with reference to the embodiments, some of which will be illustrated in the appended drawings. It is noted, however, that the appended drawings are intended only for purposes of illustration and are not to be construed as limiting the scope of the present disclosure, as the present disclosure can admit other equally effective embodiments.

[0017] FIG. 1 A cross-sectional view of one example of a plasma processing chamber according to aspects disclosed herein is shown.

[0018] FIG. 2 A flowchart of a method of etching a feature in a substrate according to aspects disclosed herein is shown.

[0019] FIGS. 3A-3E Various stages of an etching process according to aspects disclosed herein are shown.

[0020] For the sake of clarity, the same reference numbers will be used in the description of the same elements across figures. It should be noted that elements from one embodiment can be beneficially incorporated into other embodiments, without requiring further description thereof. DETAILED DESCRIPTION

[0021] The disclosure below describes low temperature etching of features. Certain details are set forth in the description and figures below to provide a thorough understanding of various embodiments of the disclosure. Other details describing, for example, known structures and systems are not set forth in the disclosure below to avoid unnecessarily obscuring the description of various embodiments of the disclosure. Moreover, the descriptions of apparatuses described herein are intended merely as illustrative and are not intended to limit the scope of the embodiments described herein. FIGS. 1-3E

[0022] Many of the details, operations, dimensions, angles and other features shown in the figures are merely illustrative of particular embodiments. Thus, other embodiments can have other details, components, dimensions, angles and features without departing from the spirit or scope of the disclosure. Moreover, further embodiments of the disclosure can be practiced without several of the details described below.

[0023] Features are recesses in a substrate surface. Features can have many different shapes, including but not limited to cylindrical, elliptical, rectangular, square, other polygonal recesses, and trenches.

[0024] Aspect ratio is a comparison of the depth of a feature to the critical dimension (e.g., width / diameter) of the feature. Features formed by the disclosed methods can be high aspect ratio features. In some embodiments, high aspect ratio features are features having an aspect ratio of at least about 5, at least about 10, at least about 20, at least about 30, at least about 40, at least about 50, at least about 60, at least about 80, or at least about 100. The critical dimension of features formed by the disclosed methods can be about 200 nm or less, such as about 100 nm or less, about 50 nm or less, or about 20 nm or less.

[0025] ​In some etching processes, low temperature etching, such as cryogenic etching, is used to remove material in a device having high aspect ratio (HAR) features at cold temperatures. Cryogenic etching cools the device during the etching process to prevent unwanted side reactions that can affect the etch profile of the features. Conventional cryogenic fluorine-based etching processes tend to isotropically etch, which can over-etch the sidewalls of the features, resulting in feature critical dimension loss. One solution to protect the sidewalls from over-etching uses oxygen to passivate the silicon sidewalls of the features. The oxygen reacts with the silicon sidewalls to form a silicon oxide passivation layer, such that the bottom portion of the features is subjected to ion bombardment while the sidewalls are protected by the silicon oxide passivation layer. However, it is difficult to balance the ratio of fluorine and oxygen to control the passivation rate and the etch rate. Further, as the aspect ratio changes, the passivation rate and the etch rate also change, which makes it difficult to achieve consistent uniform etching of multiple structures with different aspect ratios on the same chip. Further, the formation of the silicon oxide passivation layer consumes silicon from the sidewalls of the features, which can affect the critical dimensions of the features.

[0026] In one aspect of the disclosure, a method for etching at low temperature is provided. The method forms an inert layer on an exposed surface, such as a sidewall of a feature, from a noble gas to passivate the sidewall prior to an etching process. The inert layer inhibits spontaneous etching, thereby enabling the etching of HAR features using aggressive chemistries, such as fluorine.

[0027] In one embodiment, a substrate containing a feature is cooled to a temperature near the triple point of a noble gas. Without being bound by theory, it is believed that cooling the substrate to a temperature near the triple point of the noble gas allows the condensed noble gas to flow by surface dispersion forces and passivate the exposed surface of the feature. Unlike passivation with oxygen, the inert layer does not consume silicon like known oxygen-based processes. The substrate is then exposed to a fluorine-containing gas to form a fluorine-containing layer on the inert layer. The presence of the inert layer prevents the fluorine-containing gas from etching the feature. The inert layer and the fluorine-containing layer are then exposed to an energy source, such as a plasma or ultraviolet photon activation, to form a passivation layer from the inert layer and the fluorine-containing layer. The substrate is then exposed to ions to anisotropically etch material from the upward facing surface of the substrate.

[0028] FIG. 1is a cross-sectional schematic view of one example of a plasma processing chamber 100, shown configured as an etch chamber, having a substrate support assembly 101. The plasma processing chamber 100 can be used to perform the cryogenic etch processes described herein. The substrate support assembly 101 is operable to uniformly maintain a surface or workpiece, such as a substrate 300, at a cryogenic processing temperature. Dry reactive ion etching of a substrate 300 maintained at a cryogenic processing temperature enables ions to bombard a top surface of a material disposed on the substrate 300 with reduced spontaneous etching, such that a trench having smooth, vertical sidewalls is formed. For example, diffusion of ions in a pore of a low-k dielectric material disposed on a substrate 300 uniformly maintained at a cryogenic processing temperature is reduced while the ions continue to bombard the top surface of the low-k dielectric material, to form a trench having smooth, vertical sidewalls. Further, selectivity of etching one material over another material can be improved at a cryogenic processing temperature. For example, selectivity between silicon (Si) and silicon dioxide (SiO2) increases exponentially with decreasing temperature.

[0029] The plasma processing chamber 100 includes a chamber body 102 having sidewalls 104, a bottom 106, and a lid 108 that enclose a processing region 110. An injection apparatus 112 is coupled to the sidewalls 104 and / or the lid 108 of the chamber body 102. A gas panel 114 is coupled to the injection apparatus 112 to allow process gas to be provided into the processing region 110. The injection apparatus 112 can be one or more nozzles or inlet ports, or alternatively, a showerhead. Process gas, along with any process byproducts, is removed from the processing region 110 through an exhaust port 116 formed in the sidewalls 104 or the bottom 106 of the chamber body 102. The exhaust port 116 is coupled to a pumping system 127 including a throttle valve and a pump for controlling the vacuum level within the processing region 110.

[0030] The process gas can be energized to form a plasma within the processing region 110. The process gas can be energized by capacitively or inductively coupling RF power to the process gas. A plurality of coils 118 are disposed above the lid 108 of the plasma processing chamber 100 and are coupled to an RF power source 122 through a matching circuit 120. The RF power source 122 can be a low frequency, high frequency, or very high frequency.

[0031] The substrate support assembly 101 is disposed in a processing region 110 below an injection apparatus 112. The substrate support assembly 101 includes an ESC 103 and an ESC base assembly 105. The ESC base assembly 105 is coupled to the ESC 103 and a utilities plate 107. The utilities plate 107 is supported by a ground plate 111 and is configured to facilitate electrical, cooling, heating, and gas connections to the substrate support assembly 101. The ground plate 111 is supported by a bottom 106 of a processing chamber. An insulating plate 109 insulates the utilities plate 107 from the ground plate 111.

[0032] The ESC base assembly 105 includes a base channel 115 coupled to a cryogenic chiller 117. The cryogenic chiller 117 provides a base fluid, such as a refrigerant, to the base channel 115 such that the ESC base assembly 105 can be maintained at a predetermined cryogenic temperature, and thus the substrate 300 can be maintained at a predetermined cryogenic temperature. Similarly, the utilities plate 107 includes a utilities channel 113 coupled to a chiller 119. The chiller 119 provides a utilities fluid to the utilities channel 113 such that the utilities plate 107 is maintained at a predetermined temperature. In one example, the base fluid maintains the ESC base assembly 105 at a higher temperature than the temperature of the utilities plate 107. In an aspect, which can be combined with other aspects described herein, the cryogenic chiller 117 is coupled to an interface box to control the flow rate of the base fluid. The base fluid contains a composition that remains liquid at cryogenic temperatures below -50 degrees Celsius at operating pressures. The base fluid is typically electrically insulating such that an electrical path through the base fluid is not formed when circulated through the substrate support assembly 101. Non-limiting examples of suitable utilities fluids include fluorinated heat transfer fluids.

[0033] The ESC 103 has a support surface 130 and a bottom surface 132 opposite the support surface 130. The ESC 103 can be made of a ceramic material, such as aluminum oxide (AI2O3), aluminum nitride (AIN), or other suitable materials or polymers, e.g., polyimide, polyether ether ketone (PEEK), polyaryletherketone (PAEK), etc.

[0034] The ESC 103 includes a chucking electrode 126 disposed in the ESC 103. The chucking electrode 126 can be configured as a monopolar or bipolar electrode, or other suitable arrangement. The chucking electrode 126 is coupled through an RF filter to a chucking power supply 134 with the utilities plate 107, which provides DC power to electrostatically secure the substrate 300 to the support surface 130 of the ESC 103. The RF filter prevents RF power used to form a plasma (not shown) within the plasma processing chamber 100 from damaging electrical equipment or presenting an electrical hazard outside the chamber.

[0035] The ESC 103 includes one or more resistive heaters 128 embedded in the ESC 103. The resistive heaters 128 are used to control the temperature of the ESC 103, which is cooled by the ESC base assembly 105; such that a low temperature process temperature suitable for processing a substrate 300 disposed on a support surface 130 of the substrate support assembly 101 can be maintained. The resistive heaters 128 are coupled to a heater power supply 136 through the utility plate 107 and an RF filter. The RF filter prevents RF power used to form a plasma (not shown) within the plasma processing chamber 100 from damaging electrical equipment or presenting an electrical hazard outside the chamber. The heater power supply 136 can provide 500 Watts or more of power to the resistive heaters 128. The heater power supply 136 includes a controller (not shown) for controlling the operation of the heater power supply 136, which is typically configured to heat the substrate 300 to a predetermined low temperature temperature. In one aspect, which can be combined with other aspects described herein, the resistive heaters 128 include a plurality of laterally separated heating zones, wherein the controller enables at least one zone of the resistive heaters 128 to be preferentially heated relative to the resistive heaters 128 in one or more of the remaining zones. For example, the resistive heaters 128 can be arranged concentrically in a plurality of separated heating zones. The resistive heaters 128 maintain the substrate 300 at a low temperature process temperature suitable for processing. In one aspect, which can be combined with other aspects described herein, the low temperature process temperature is less than about -10 degrees Celsius. For example, the low temperature process temperature is between about -10 degrees Celsius and about -150 degrees Celsius.

[0036] The plasma processing chamber 100 further includes a system controller 160 operable to control various aspects of the plasma processing chamber 100. The system controller 160 facilitates control and automation of the overall plasma processing chamber 100 and can include a central processing unit (CPU), memory, and support circuits (or I / O). Software instructions and data can be coded and stored within the memory for instruction of the CPU. The system controller 160 can communicate with one or more of the components of the plasma processing chamber 100 via, for example, a system bus. The program (or computer instructions) readable by the system controller 160 determines which task to perform at which time. In some aspects, the program is software capable of including code for controlling one or more components of the plasma processing chamber 100. Although shown as a single system controller 160, it is understood that multiple system controllers can be used with the aspects described herein.

[0037] FIG. 2 A flow diagram of a method 200 of etching a feature in a substrate according to aspects disclosed herein is shown. FIGS. 3A-3EThe various stages of the etching process according to the aspects disclosed herein are shown. Although method 200 and FIGS. 3A-3E This discussion is in the context of etching high aspect ratio features in a silicon substrate, but it should be understood that method 200 can be used to etch other features in other types of substrates.

[0038] Method 200 begins with operation 210, loading a substrate into a chamber, such as... FIG. 1 The plasma processing chamber 100 is depicted in the image. In one example, a substrate 300 is positioned on a substrate support assembly (such as substrate support assembly 101) having a cooler (such as cooler 119) operable to cool the substrate. The substrate can be substrate 300. Substrate 300 includes a bulk silicon layer 310 on which a mask layer 312, such as a dielectric layer, such as a silicon oxide layer, is disposed. Substrate 300 without mask layer 312 (i.e., only silicon layer 310) can also be processed according to method 200. Substrate 300 has at least one feature 320 formed on substrate 300. At least one feature 320 extends a feature depth from top surface 322 of substrate 300 to bottom surface 324. At least one feature 320 has a width defined by a first sidewall 326a and a second sidewall 326b.

[0039] Method 200 continues at operation 220, wherein substrate 300 is cooled to a cryogenic temperature. As used herein, a cryogenic temperature refers to a temperature of about -100 degrees Celsius or lower. In some examples, the cryogenic temperature may be within a range, such as from about -160 degrees Celsius to -150 degrees Celsius, or from about -140 degrees Celsius to -120 degrees Celsius, or between about -120 degrees Celsius and about -100 degrees Celsius. In some examples, substrate 300 is cooled to a temperature of about -100 degrees Celsius or lower, or about -120 degrees Celsius or lower, or about -140 degrees Celsius or lower, or about -150 degrees Celsius or lower. In these or other examples, substrate 300 may be cooled to a temperature of about -150 degrees Celsius or higher, or about -140 degrees Celsius or higher, or about -120 degrees Celsius or higher, or about -100 degrees Celsius or higher. The ideal range will depend on a variety of factors, including but not limited to the chemical composition used (e.g., the triple point temperature of the rare gas used), the geometry of the etched features, and the type of material being etched. As mentioned elsewhere in this document, the temperature of the substrate can be controlled via a cooler. The temperature of the cooler can be lower than the temperature of the substrate itself.

[0040] As used herein, unless otherwise stated, the temperature of the substrate is intended to refer to the temperature of the substrate support assembly. This temperature may also be referred to as the cooler temperature. The substrate support assembly can control the temperature of the substrate using various heating and cooling mechanisms.

[0041] In one aspect, cooling the substrate to a cryogenic temperature can involve flowing a cooling fluid through a conduit in or near the substrate support. In another aspect, cooling the substrate to a cryogenic temperature can involve circulating a single or mixed refrigerant within the substrate support at the cryogenic temperature. In one example, a cryogenic cooler 117 is used to cool the substrate 300 to a cryogenic temperature.

[0042] Method 200 continues at operation 230, wherein a rare gas mixture is introduced into the chamber to coat multiple portions of the substrate with an inert layer 330, such as FIG. 3B As shown. The rare gas mixture includes, consists of, or is substantially composed of a first rare gas. As used herein, the term "substantially composed of a first rare gas" means that the rare gas content of the rare gas mixture is greater than or equal to about 95%, 98%, or 99% of the rare gas mixture. The first rare gas is selected from argon (Ar), helium (He), neon (Ne), xenon (Xe), krypton (Kr), or combinations thereof. In one example, the first rare gas is xenon or a xenon precursor gas. In another example, the first rare gas is krypton. The rare gas mixture is generally etchant-free, meaning that the rare gas mixture does not contain any etchant gas. In one example, the processing region 110 consists of or is substantially composed of the first rare gas during operation 230. In one example, operation 230 is a plasma-free operation, meaning that there is no plasma in the processing region 110. Unlike oxygen passivation, the inert layer 330 does not consume silicon as known oxygen-based processes.

[0043] When the first rare gas condenses on the exposed surface of the substrate 300, an inert layer 330 is formed. FIG. 3B In the depicted example, an inert layer 330 is formed on the top surface 322, the bottom surface 324, the first sidewall 326a, and the second sidewall 326b. The inert layer 330 can be a conformal layer or a non-conformal layer. During operation 230, a rare gas mixture flows into the processing region 110 while the substrate 300 is maintained at a low temperature. The low temperature is chosen so that the rare gas mixture can flow through surface dispersion forces and passivate the exposed surfaces of the substrate 300. In one example, the low temperature is chosen to cover the triple point temperature of the rare gas.

[0044] In one example, the noble gas is xenon. The triple point temperature of xenon is about -112 degrees Celsius. The cryogenic temperature is maintained in a range from about -140 degrees Celsius to about -100 degrees Celsius, for example, in a range from about -120 degrees Celsius to about -105 degrees Celsius or from about -112 degrees Celsius to about -105 degrees Celsius. Maintaining the substrate at the cryogenic temperature encompassing the triple point temperature allows the xenon to flow as a gas into the processing region 110 and condense on the cooled substrate 300 to form a xenon layer and passivate the exposed surfaces of the features.

[0045] In another example, the noble gas is krypton. The triple point of krypton is about -158 degrees Celsius. The cryogenic temperature is maintained in a range from about -150 degrees Celsius to about -170 degrees Celsius, for example, in a range from about -158 degrees Celsius to about -150 degrees Celsius. Cooling the substrate to a temperature slightly around or slightly above -158 degrees Celsius allows the condensed krypton to form a krypton layer and passivate the exposed surfaces of the features.

[0046] In one example, during operation 230, the flow rate of the noble gas can be from about 50 seem to about 500 seem (e.g., from about 50 seem to about 300 seem) for a 300 mm substrate in a chamber of appropriate size. The noble gas can flow into the chamber to maintain a total chamber pressure of about 10 mTorr to about 100 mTorr (e.g., between about 25 mTorr to about 80 mTorr; between about 30 mTorr to about 70 mTorr; between about 25 mTorr to about 40 mTorr; or between about 60 mTorr to about 80 mTorr).

[0047] The method 200 continues at operation 240, where a fluorine-containing gas mixture flows into the chamber to coat the inert layer 330 with a fluorine-containing layer 340, as shown. FIG. 3C The fluorine-containing gas mixture includes, consists of, or consists essentially of a fluorine-containing gas. As used herein, the term "consists essentially of a fluorine-containing gas" means that the fluorine gas component of the fluorine-containing gas mixture is greater than or equal to about 95%, 98%, or 99% of the fluorine-containing gas mixture. The fluorine-containing gas is selected from SF6, NF3, F2, C4H8, CHF3, or a combination thereof. In one example, the fluorine-containing precursor gas is NF3. In another example, the fluorine-containing precursor gas is SF6. In one example, the processing region 110 consists of or consists essentially of the fluorine-containing gas. In one example, operation 240 is a plasma-free operation, meaning that a plasma is not present in the processing region 110 during operation 240.

[0048] In one aspect, the fluorine-containing gas mixture further includes a noble gas. The noble gas can be selected from argon (Ar), helium (He), neon (Ne), xenon (Xe), krypton (Kr), or a combination thereof.

[0049] When the fluorine-containing gas condenses on the exposed surface of the inert layer 330, a fluorine-containing layer 340 is formed. In the depicted example, the fluorine-containing layer 340 is formed on the top surface 332 of the inert layer 330, the bottom surface 334 of the inert layer 330, the first sidewall 336a of the inert layer 330, and the second sidewall 336b of the inert layer 330. The fluorine-containing layer 340 can be a conformal layer or a non-conformal layer. During operation 240, a rare gas mixture is flowed into the chamber while the substrate is maintained at a cryogenic temperature. The cryogenic temperature is selected such that the fluorine-containing gas is able to flow by surface dispersion forces and passivate the surface of the substrate. In one example, the fluorine-containing gas is SF6and the cryogenic temperature is maintained at about -120 degrees Celsius to about -105 degrees Celsius. Maintaining the substrate at this cryogenic temperature allows the fluorine-containing gas to flow into the chamber as a gas and condense on the deposited inert layer 330. FIG. 3C

[0050] In one example, during operation 240, the flow rate of the fluorine-containing gas can be from about 50 seem to about 500 seem (e.g., from about 50 seem to about 300 seem) for a 300 mm substrate in a chamber of appropriate size. The fluorine-containing gas can be flowed into the chamber to maintain a total chamber pressure of about 30 mTorr to about 110 mTorr (e.g., between about 30 mTorr to about 100 mTorr; between about 40 mTorr to about 80 mTorr; between about 40 mTorr to about 50 mTorr; or between about 70 mTorr to about 80 mTorr). In one example, the total chamber pressure during operation 240 is slightly higher than the total chamber pressure during operation 230. For example, the total chamber pressure during operation 230 can be from about 25 mTorr to about 80 mTorr, while the total chamber pressure during operation 240 can be from about 40 mTorr to about 85 mTorr.

[0051] In one example, operations 230 and 240 do not overlap, meaning that the rare gas flow of operation 230 stops before the fluorine-containing gas flow of operation 240 begins flowing into the processing region 110. In another example, operations 230 and 240 partially overlap, meaning that the rare gas of operation 230 is still flowing into the processing region when the fluorine-containing gas of operation 240 begins.

[0052] At operation 250, the inert layer 330 and the fluorine-containing layer 340 are exposed to energy to form a passivation layer 350, as depicted in FIG. 3C. In one example, the passivation layer 350 is formed by exposing the inert layer 330 and the fluorine-containing layer 340 to a plasma. In another example, the passivation layer 350 is formed by exposing the inert layer 330 and the fluorine-containing layer 340 to a remote plasma. In one example, the passivation layer 350 is formed by exposing the inert layer 330 and the fluorine-containing layer 340 to a remote plasma formed from a gas mixture of H2and N2. In another example, the passivation layer 350 is formed by exposing the inert layer 330 and the fluorine-containing layer 340 to a remote plasma formed from a gas mixture of H2and Ar. FIG. 3D ​The energy activates the inert layer 330 and the fluorine-containing layer 340, while forming a passivation layer 350 on the sidewalls 326a, 326b of the feature 320. Without being bound by theory, it is believed that the passivation layer 350 prevents or slows lateral etching of the feature 320 when the feature 320 is etched in a vertical direction. In one example where the inert layer 330 is formed of xenon and the fluorine-containing layer 340 is formed of SF6, the inert layer 330 and the fluorine-containing layer 340 react to form a xenon fluoride passivation layer. Xenon forms stable molecules with fluorine. The xenon fluoride can include at least one of xenon difluoride (XeF2), xenon tetrafluoride (XeF4), and xenon hexafluoride (XeF6).

[0053] The energy source provides excitation energy, such as energy having an ultraviolet or RF frequency, to activate the deposited inert layer 330 and the fluorine-containing layer 340 to form the passivation layer 350. In one aspect, the energy is formed from an ultraviolet (UV) source and the UV photons activate the deposited inert layer 330 and the fluorine-containing layer 340 to form the passivation layer 350. In one example, the UV power can be from about 20% to about 100% (e.g., from about 20% to about 80%; from about 30% to about 50%). The UV power can be between about 200 Watts to about 3,000 Watts (e.g., between about 1,100 Watts to about 2,500 Watts; between about 1,500 Watts to about 2,000 Watts). In another example, the UV power can be from about 20% to about 100% (e.g., from about 20% to about 80%; from about 30% to about 50%). The UV power can be between about 200 Watts to about 1,000 Watts (e.g., between about 200 Watts to about 500 Watts; between about 250 Watts to about 350 Watts).

[0054] In another aspect, the energy is a plasma formed from a radio frequency (RF) power in the presence of a plasma precursor gas mixture. Exposure to the RF power ionizes at least a portion of the plasma precursor gas mixture, thereby forming the plasma. The RF power is applied at a frequency between about 10 kHz and about 14 MHz at a power level between about 1,000 W and about 5,000 W (e.g., between about 2,000 W and about 3,000 W, or about 2,500 W) to generate the plasma. In one example, a frequency of 13.56 MHz is used. In another example, a lower frequency of up to 400 kHz (e.g., 350 kHz) is used. The secondary power can be applied at a power level from about 10 Watts to about 500 Watts (e.g., from about 200 Watts to about 400 Watts; about 250 Watts). The plasma precursor gas mixture includes an inert gas. In one example, the inert gas is helium, and the plasma activation generates helium ions in the processing region 110 that activate the deposited inert layer 330 and the fluorine-containing layer 340 to form the passivation layer 350. In another example, the inert gas includes a combination of argon and helium, and the plasma activation generates ions in the processing region 110 that activate the deposited inert layer 330 and the fluorine-containing layer 340 to form the passivation layer 350. In one example, the operation 250 is a biasless process, meaning that no bias is applied to the substrate.

[0055] In one aspect, during the operation 250, the inert layer 330 and the fluorine-containing layer 340 are exposed to an ion flux to form the passivation layer 350. The ion flux can be one or more types of atomic or molecular species having low ion energy. Thus, in one aspect, the species promote a reaction of the inert layer 330 with the fluorine-containing layer 340, rather than chemically reacting with the inert layer 330 and the fluorine-containing layer 340, and thus the ion flux is derived from a source gas that has relatively low chemical reactivity with the target components. Exemplary ion species include helium ions, neon ions, xenon ions, nitrogen ions, or argon ions in conjunction with helium ions.

[0056] In one example, during the operation 250, the flow rate of helium gas can be from about 100 seem to about 500 seem (e.g., from about 100 seem to about 300 seem) for a 300 mm substrate in a chamber of appropriate dimensions. The helium gas can be flowed into the chamber to maintain a total chamber pressure of about 10 mTorr to about 30 mTorr (e.g., between about 10 mTorr to about 20 mTorr; or between about 20 mTorr to about 30 mTorr). In one example, a cryogenic temperature is maintained during the operation 250. In some implementations, the temperature of the substrate can be ramped to between about 500 degrees Celsius to about 1100 degrees Celsius, such as about 800 degrees Celsius.

[0057] At operation 260, the substrate / feature is bombarded with an ion flux to etch the substrate. In one example, the ion flux is anisotropic such that the exposure of the passivated sidewalls of the feature is reduced. The ion flux bombards the overlying portions of the passivation layer 350 over the horizontal surfaces, such as the top surface 322 and the bottom surface 324 of the substrate feature as shown. FIG. 3E FIG. 3E Removing the passivation layer 350 over the top surface 322 exposes the mask layer 312, while removing the passivation layer over the bottom surface 324 exposes the silicon material at the bottom of the feature 320. Portions 360a, 360b of the passivation layer 350 remain on the sidewalls 326a, 326b.

[0058] The ion flux can be generated using the same gas and low frequency RF power from operation 250. The ion flux can be generated from the inert gas using low frequency RF source power. The ion flux can be one or more types of atomic or molecular species having low ion energy. Exemplary ion species include helium ions, neon ions, xenon ions, nitrogen ions, argon ions, or combinations thereof, the species having low ion potential such that a very low plasma DC bias can be provided to reduce the energy level of the ion flux. It is advantageous for the process pressure to be less than 10 mTorr to achieve more directionality, and more advantageously less than 5 mTorr. It has been found that low RF power in the order of 50 W to 100 W is advantageous to modify low-k dielectric films by dislodging carbon species from the silicon-oxide matrix, depending on the ion potential of the feed gas.

[0059] In one example, the inert gas is helium and the plasma activation generates helium ions in the processing region 110 that bombard and activate the passivation layer 350. In another example, the inert gas is a mixture of helium and argon and the plasma activation generates helium ions in the processing region 110 that bombard and activate the passivation layer 350. Fluorine from the activated passivation layer 350 etches silicon from the bottom surface 324 of the substrate 300.

[0060] During operation 260, a bias is also applied to the substrate 300 to direct the ions toward the horizontal surfaces of the substrate 300. The bias can be generated using power from about 50 Watts to about 1500 Watts (e.g., from about 50 Watts to about 250 Watts; or from about 50 Watts to about 100 Watts). In one aspect, the RF bias power is applied to an electrode in the substrate support assembly 101, such as the chuck electrode 126. In one example, the RF bias power can be applied at less than 500 Watts, such as between about 50 Watts to about 250 Watts, such as about 50 Watts to about 100 Watts, the RF bias power having a frequency between about 2 MHz to about 13.56 MHz.

[0061] Without being bound by theory, it is believed that bombarding the passivation layer 350 with ion flux separates the fluorine from the noble elements, allowing the fluorine to bind with silicon of the silicon layer 310 and remove or "etch" silicon from the silicon layer 310. The etching of operation 260 can be considered an atomic layer etch or a molecular level etch (MLE) as the portions removed are on the order of the size of molecular components in the silicon film.

[0062] Note that operations 230-260 can be repeatedly performed or cycled in a loop of passivation layer repair, followed by etching of the gate material, to achieve a target etch depth of the silicon material.

[0063] Implementations can include one or more of the following potential advantages. By utilizing the passivation and etching techniques described herein, features having high aspect ratios can be etched and shaped in a controlled manner, which can provide a target profile having substantially sharp right angles and upright (e.g., straight, vertical) sidewalls with steep slopes and accurate dimensions. The use of an inert layer of noble gas as a precursor for the etching provides a solution that allows for atomic layer etching at low temperatures. Atomic layer etching at low temperatures can reduce or eliminate sidewall etching and provide more vertical features, which improves device performance and yield. Furthermore, since the precursor of the first layer is inert, corrosive chemical components like fluorine can be used for the etching process while suppressing any spontaneous etching.

[0064] Accordingly, implementations are provided for etching silicon material to form features having target edge / corner profiles and aspect ratios. By utilizing passivation and etching modes, controlled ion trajectories / directivity and sidewall / corner passivation protection can be obtained to etch a silicon layer in a manner that produces multiple features in the silicon layer having precise and right angle corner and vertical sidewall profiles and feature aspect ratios. Furthermore, the passivation and etching processes can be performed in a single chamber without breaking vacuum, which reduces the complexity of the system.

[0065] Implementations described in this specification and all of the functional operations described in this specification can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structural means disclosed in this specification and structural equivalents thereof, or in combinations of them. Implementations described in this specification can be implemented as one or more non-transitory computer program products, i.e., one or more computer programs tangibly embodied in a machine readable storage medium for execution by, or to control the operation of, data processing apparatus, e.g., a programmable processor, a computer, or multiple processors or computers.

[0066] The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[0067] The term“data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of the above items, which code was produced by a development process. Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. The term“processor” encompasses all processing apparatus, including both general and special purpose processors and any one or more processors of any kind of digital computer.

[0068] Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0069] When introducing elements of the disclosure or the exemplary aspects thereof, the articles“a,”“an,”“the” and“said” are intended to mean that there are one or more of the elements. The terms“comprising,”“including,” and“having” are intended to be inclusive and mean that there can be additional elements other than the listed elements.

[0070] The terms“comprising,”“including,” and“having” are intended to be inclusive and mean that there can be additional elements other than the listed elements.

[0071] While the foregoing is directed to aspects of the disclosure, other and further aspects of the disclosure can be devised without departing from the basic scope thereof, and the scope of the disclosure is determined by the following claims.

Claims

1. A method for etching features in a substrate, comprising: The substrate positioned in the chamber is cooled to a temperature below the triple point temperature of the first rare gas; The first rare gas is allowed to flow into the chamber to form an inert layer on multiple exposed portions of the substrate; A fluorine-containing precursor gas is introduced into the chamber to form a fluorine-containing layer on the inert layer; The fluorine-containing layer and the inert layer are exposed to an energy source to form a passivation layer on the plurality of exposed portions of the substrate; as well as The substrate is exposed to ions to etch it.

2. The method of claim 1, wherein the temperature is from -105 degrees Celsius to -120 degrees Celsius.

3. The method of claim 1, wherein the first rare gas is selected from xenon and krypton.

4. The method of claim 3, wherein the fluorine-containing precursor gas is selected from SF6, NF3 and F2.

5. The method of claim 1, wherein exposing the substrate to ions further comprises: An RF bias voltage is applied to the substrate; as well as The ions are formed from the second rare gas.

6. The method of claim 5, wherein the second rare gas is selected from helium, neon, argon, and xenon.

7. The method of claim 6, wherein the substrate comprises a silicon oxide layer disposed on a silicon layer.

8. A method for etching features in a substrate, comprising: A substrate comprising silicon is received on a substrate support in a chamber, the substrate support having a cooler and operable to cool the substrate; The substrate is cooled by cooling the cooler to -100 degrees Celsius or lower. Xenon precursor gas is introduced into the chamber to coat multiple portions of the silicon surface with a xenon layer; A fluorine-containing precursor gas is introduced into the chamber to coat the xenon layer with a fluorine-containing layer; The xenon layer and the fluorine-containing layer are exposed to an energy source to form a xenon fluoride passivation layer; as well as The substrate is exposed to ions to etch silicon from the surface of the silicon.

9. The method of claim 8, wherein the temperature is from -105 degrees Celsius to -120 degrees Celsius.

10. The method of claim 9, wherein the fluorine-containing precursor gas is selected from SF6, NF3 and F2.

11. The method of claim 8, wherein exposing the substrate to ions further comprises: An RF bias voltage is applied to the electrodes in the substrate support; as well as The rare gas is allowed to flow into the chamber.

12. The method of claim 11, wherein the rare gas is helium.

13. The method of claim 11, wherein the xenon fluoride passivation layer is formed on a plurality of sidewalls of the feature, the feature being formed in the substrate, and the xenon fluoride passivation layer prevents or slows down lateral etching of the feature when the feature is etched in the substrate in a vertical direction.

14. The method of claim 11, further comprising: A silicon oxide layer formed on at least a portion of the silicon.

15. The method of claim 11, wherein the substrate has at least one feature on the substrate, the at least one feature extending from a top surface of the substrate to a bottom surface, the at least one feature having a width defined by a first sidewall and a second sidewall, wherein the passivation layer is formed on the top surface of the substrate, the first sidewall, the second sidewall, and the bottom surface of the at least one feature.

16. A method for etching features in a substrate, comprising: A substrate comprising silicon is received on a substrate support in a chamber. The substrate has a substrate surface and at least one feature formed on the substrate, the at least one feature extending from the substrate surface and having a plurality of sidewalls and a bottom surface. The substrate support has a cooler operable to cool the substrate. The substrate is cooled by cooling the cooler to -100 degrees Celsius or lower. A passivation layer is formed over the substrate surface, the plurality of sidewalls of the at least one feature, and the bottom surface, wherein forming the passivation layer includes: Xenon precursor gas is introduced into the chamber to coat multiple portions of the substrate surface with a xenon layer; A fluorine-containing precursor gas is introduced into the chamber to coat the xenon layer with a fluorine-containing layer; and The xenon layer and the fluorine-containing layer are exposed to plasma to form the passivation layer; and The substrate is exposed to ions to etch silicon from the bottom surface.

17. The method of claim 16, wherein the temperature is from -105 degrees Celsius to -120 degrees Celsius.

18. The method of claim 17, wherein the fluorine-containing precursor gas is selected from SF6, NF3 and F2.

19. The method of claim 16, wherein exposing the substrate to ions further comprises: An RF bias voltage is applied to the electrodes in the substrate support; as well as The rare gas is allowed to flow into the chamber.

20. The method of claim 19, wherein the rare gas is helium.

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