A CMOS inverter single-particle effect prediction method based on a residual neural network

Abstract

A CMOS inverter single particle effect prediction method based on a residual neural network, K sets of single particle effect parameter data of a CMOS inverter are designed, TCAD software is used to simulate each set of data, and K single particle effect curves of the CMOS inverter are obtained, the abscissa of the single particle effect curve is time, and the ordinate is current or voltage, that is, a transient current curve or a transient voltage curve; in the simulation process, time is divided into L-1 intervals with L time points, each time point corresponds to a data point on the single particle effect curve, the single particle effect parameters are extracted from the single particle effect curve, the data of the data point and the characteristic parameters of the single particle effect are used as a sample set; a residual neural network prediction model is trained by using the sample set, and the model output is a predicted single particle effect curve or a characteristic parameter of the single particle effect. The present application improves the efficiency of the study of the single particle effect of the CMOS inverter.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of CMOS inverter, and particularly relates to a CMOS inverter single-particle effect prediction method based on a residual neural network. BACKGROUND

[0002] CMOS inverter is the core of almost all digital integrated circuit designs, and has the advantages of high fault tolerance, extremely high input resistance, extremely low static power consumption, and insensitivity to noise and interference. The CMOS inverter circuit is composed of two enhancement mode MOS field effect tubes, in which the PMOS tube (loading tube) is pulled up, and the NMOS tube (driving tube) is pulled down. The inverter unit is an essential logic unit in various integrated circuits, and its structure and function make the single event effect of the unit more common and obvious. At the same time, when the single event pulse is large enough, the single particle transient effect will trigger the flip of the device state, affect the logic state of the inverter, and then propagate to the next stage of the combinational logic circuit, thereby affecting the performance of the entire circuit, and seriously threatening the stability and reliability of the integrated circuit. Therefore, the research on the single particle effect in the CMOS inverter is particularly important. Single particle effect includes single event upset (SEU), single event transient (SET) and single event latchup (SEL). According to whether the device is physically damaged, the single particle effect can be divided into soft error and hard error.

[0003] The traditional simulation method for obtaining the single particle effect in the CMOS inverter is mainly circuit simulation based on a circuit level model and hybrid simulation based on a device numerical simulation tool TCAD to establish a model. Before studying the single particle effect of the inverter, a device model needs to be established based on the TCAD software, a structure model needs to be established by using the software, doping needs to be set, a grid needs to be divided, a physical model needs to be set according to the required simulation, a hybrid simulation circuit of the device model and the circuit model needs to be established, and then a solver is used to solve the carrier continuity equation, Poisson equation, lattice temperature equation and other differential equations corresponding to the physical model.

[0004] The traditional simulation method for obtaining the single particle effect in the CMOS inverter is mainly circuit simulation based on a circuit level model and hybrid simulation based on a device numerical simulation tool TCAD to establish a model. NMOS and PMOS need to be modeled respectively, and then connected into an inverter through sdevice, and then simulation can be performed. The workload is several times that of simulating ordinary devices. However, only simulating a single FinFET tube requires a huge amount of work, the simulation time is long, the simulation efficiency is low, and the simulation process is difficult to converge.

[0005] Overall, the shortcomings of the prior art can be summarized as follows:

[0006] 1. As device feature sizes continue to shrink, especially after entering the nanoscale era, non-ideal effects in field-effect transistors, such as short-channel effects, quantum effects, parasitic effects, and parameter instability, have an increasingly prominent impact on device performance. Further miniaturization of devices is severely limited by many factors, including device structure, materials, and operating mechanisms. FinFET devices can not only suppress short-channel effects and improve subthreshold characteristics by enhancing gate control capabilities, but also have the advantage of compatibility with traditional processes.

[0007] 2. The single-event effect (SEE) of FinFET devices has become one of the most challenging problems affecting the reliability of modern SEE, impacting the reliability of modern electronic systems in space and terrestrial applications.

[0008] 3. Traditional FinFET device single-event effect simulation steps are cumbersome, simulation time is long, simulation efficiency is low, and the simulation process is difficult to converge.

[0009] 4. The simulation of single-event effects of traditional inverters requires separate modeling of NMOS and PMOS, and then connecting them into an inverter through sdevice before simulation can be performed. The workload is several times that of simulating ordinary devices. Summary of the Invention

[0010] To overcome the shortcomings of the prior art, the present invention aims to provide a CMOS inverter single-event effect (SEE) prediction method based on residual neural network. By inputting different particle incident conditions, the single-event effect curve and corresponding characteristic parameters can be obtained quickly and accurately. The neural network model used in the experiment has high prediction accuracy, which solves the problems of long development cycle, low efficiency and difficulty in convergence of traditional single-event effect research methods.

[0011] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0012] A method for predicting single-event effects in CMOS inverters based on residual neural networks includes the following steps:

[0013] Step 1: Design K sets of single-event effect (SEE) parameter data for the CMOS inverter. Use TCAD software to simulate each set of data to obtain K SEE curves for the CMOS inverter. The horizontal axis of the SEE curve is time, and the vertical axis is current or voltage, i.e., transient current curve or transient voltage curve. During the simulation, the time is divided into L-1 intervals with L time points. Each time point corresponds to a data point on the SEE curve. Extract the SEE parameters from the SEE curve. The data points and the characteristic parameters of the SEE are used as a sample set.

[0014] Among them, the single-event effect parameters include linear transfer energy (LET), particle incident position (x), particle incident angle (θ), and particle incident characteristic distance (Wt_hi); the characteristic parameters of the single-event effect include output current I0 and total output charge Q0.

[0015] Step 2: Randomly divide the sample set into training set and validation set according to the proportion; standardize the single-event effect parameters of the training set and validation set respectively;

[0016] Step 3: Construct a residual neural network prediction model;

[0017] Step 4: Train the residual neural network prediction model using the training set and validation set, and iteratively update the network parameters of the residual neural network prediction model using the backpropagation algorithm to obtain the trained prediction model; wherein, the input is the single-event effect parameters, and when used to predict the single-event effect curve, the output is the single-event effect curve fitted by L data points; when used to predict the feature parameters of the single-event effect, the output is the feature parameters of the single-event effect.

[0018] Step 5: Input different single-event effect parameters of the CMOS inverter into the trained residual neural network prediction model to obtain the predicted single-event effect curve or the characteristic parameters of the single-event effect.

[0019] In an embodiment of the present invention, by continuously changing the single-event effect parameters of the CMOS inverter, K sets of single-event effect parameter data are obtained. Then, TCAD software is used to simulate each set of single-event effect parameter data, and the single-event effect parameters and the characteristic parameters of the single-event effect are extracted, thus obtaining a sample set with a sample size of K. During the simulation, other parameters besides the single-event effect parameters remain unchanged.

[0020] In an embodiment of the present invention, the residual neural network prediction model comprises an input layer, a first fully connected layer, a convolutional layer, a second fully connected layer, and an output layer connected in sequence.

[0021] The input layer is used for inputting different single-event effect parameters of the CMOS inverter; the number of neurons in the input layer is the same as the number of single-event effect parameters of the CMOS inverter.

[0022] The first fully connected layer expands the dimension of the input vector, and the batch normalization layer is used to prevent overfitting;

[0023] The convolutional layer includes a first convolutional layer and a second convolutional layer, which are used to convolve the features output by the fully connected layer;

[0024] The second fully connected layer reduces the dimensionality of the output vector, and the batch normalization layer is used to prevent overfitting.

[0025] The output layer is used to output the single-event effect transient characteristic curve or single-event effect characteristic parameters of the CMOS inverter; the number of neurons in the output layer is the same as the number of data points taken from the single-event effect transient characteristic curve of the CMOS inverter or the number of single-event effect characteristic parameters of the CMOS inverter.

[0026] Compared with existing technologies, this invention uses a residual neural network to study the relationship between the single-event effect (SEE) influencing factor of CMOS inverters and the transient current or transient voltage curves. This allows for the rapid prediction of transient current or transient voltage curves based on the SEE influencing factor, as well as the rapid prediction of the curve's characteristic parameters. This enables accurate and rapid prediction of the SEE of CMOS inverters, solving the problems of long processing time and non-convergence in traditional simulation-based methods for modeling CMOS inverters and simulating SEE using simulation software. This improves the efficiency of SEE research on CMOS inverters. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the CMOS inverter used in Embodiment 1 of the present invention.

[0028] Figure 2 This is the transfer characteristic curve of the CMOS inverter in Embodiment 1 of the present invention.

[0029] Figure 3 This is a schematic diagram illustrating the influence of different single-event effect parameters on the transfer characteristic curve of a CMOS inverter in Embodiment 1 of the present invention.

[0030] Figure 4 This is a schematic diagram of the residual neural network prediction model of the present invention. Among them, (a) is the residual neural network prediction model of Example 1, and (b) is the residual neural network prediction model of Example 2.

[0031] Figure 5 This is a comparison chart of the predicted values ​​and the actual values ​​of the single-event transient voltage curves of the CMOS inverter in the test set in Embodiment 1 of the present invention. Figure 5 (a)-(f) are comparison charts of the predicted and actual values ​​of six randomly selected single-event transient voltage curves.

[0032] Figure 6 This is a comparison of the mean squared error (MSE) between the predicted and actual values ​​in Embodiment 1 of the present invention with the prediction results of the residual neural network and machine learning.

[0033] Figure 7This is a comparison chart of the predicted value and the actual value of the single-event transient current curve of the CMOS inverter in the test set in Embodiment 1 of the present invention. Figure 5 (a)-(f) are comparison charts of the predicted and actual values ​​of six randomly selected single-event transient current curves.

[0034] Figure 8 This is a comparison of the mean squared error (MSE) between the predicted and actual values ​​in Embodiment 1 of the present invention with the prediction results of the residual neural network and machine learning.

[0035] Figure 9 The figures show a comparison between the predicted and actual values ​​of the characteristic parameters of the single-event effect in Embodiment 2 of the present invention, and a comparison between the prediction results of the residual neural network and machine learning; where (a)-(b) are comparisons between the predicted and actual values ​​of the total current I0 and the total charge Q0, respectively; and (c)-(d) are comparisons between the prediction results of the residual neural network and machine learning for the total current I0 and the total charge Q0, respectively.

[0036] Figure labeling: 1 High-k dielectric, 2 Source region, 3 Drain region, 4 Field oxide layer, 5 Substrate. Detailed Implementation

[0037] The embodiments of the present invention will be described in detail below with reference to examples. However, those skilled in the art will understand that the following examples are only for illustrating the present invention and should not be regarded as limiting the scope of the present invention.

[0038] Example 1

[0039] A method for predicting single-event effects in CMOS inverters based on residual neural networks includes the following steps:

[0040] Step 1: Obtain multiple sets of single-event effect curves for the CMOS inverter and extract the data (voltage or current) from the data points on the curves as a sample set. The single-event effect curves can be transient voltage curves or transient current curves.

[0041] Among them, the single-event effect parameters of the CMOS inverter include linear transfer energy (LET), particle incident position (x), particle incident angle (θ), and particle incident characteristic distance (Wt_hi).

[0042] refer to Figure 1This is a schematic diagram of the CMOS inverter in this embodiment. The CMOS inverter consists of two enhancement-mode MOS field-effect transistors, where the PMOS transistor (load transistor) is pulled up and the NMOS transistor (drive transistor) is pulled down. The PMOS transistor is a P-type FinFET device, and the NMOS transistor is an N-type FinFET device. The device includes a high-k dielectric 1, a source region 2, a drain region 3, a field oxide layer 4, and a substrate 5. The parameters of this FinFET device are as follows:

[0043] The thickness of the high-k dielectric 1 is 2 nm. The uniform doping concentration of the source region 2 is 1 × 10⁻⁶. 20 / cm 3 The uniform doping concentration of drain region 3 is 1×10⁻⁶. 20 / cm 3 The gate length LG is 30 nm. The fin height is 40 nm. The fin width is 14 nm. The work function WF applied across the device is 4.5 V. The uniform doping concentration of substrate 5 is 1 × 10⁻⁶. 17 / cm 3 In this embodiment, the dopant can be phosphorus or boron, thereby obtaining a P-type or N-type FinFET device.

[0044] refer to Figure 2 The basic characteristics and transient voltage curves of the CMOS inverter in this invention are shown.

[0045] This invention obtains a dataset of single-event transient current curves and characteristic parameters of CMOS inverters through hybrid simulation of TCAD device models.

[0046] refer to Figure 3 This is a schematic diagram illustrating the influence of different single-event effect parameters on the transient voltage curve of a CMOS inverter in Embodiment 1 of the present invention.

[0047] By continuously changing the single-event effect parameters of the above CMOS inverter, 3000 sets of data were obtained, with the parameter values ​​as follows:

[0048] The linear transport energy (LET) is set to 10 MeV / cm, 20 MeV / cm, 30 MeV / cm, 40 MeV / cm, 50 MeV / cm, 60 MeV / cm, 70 MeV / cm, 80 MeV / cm, 90 MeV / cm, and 100 MeV / cm. The particle incident position (x) is set to 25 nm, 50 nm, 75 nm, 100 nm, 125 nm, 150 nm, 175 nm, 200 nm, and 225 nm. The particle incident angle (θ) is set to -30°, -15°, 0°, 15°, and 30°. The characteristic distance of particle incident (Wt_hi) is set to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, and 35 nm.

[0049] The above combination yields a total of 3150 sets of data. After sorting and deleting some irregular data, 3000 sets of data are retained.

[0050] Then, TCAD software is used to simulate each set of parameter data (other parameters remain unchanged) to obtain 3000 single-event effect curves of the CMOS inverter. The corresponding single-event effect parameters and data points (current or voltage) are extracted to obtain a sample set with a sample size of 3000.

[0051] Specifically, the transient current curve and transient voltage curve obtained by the TCAD simulation software, i.e., the single-event effect curve, have time on the horizontal axis and current or voltage on the vertical axis. During the simulation, the time is divided into 200 intervals within a fixed time period, that is, the time is divided into 200 intervals with 201 time points. Each time point corresponds to a data point on the single-event effect curve. Therefore, the curve predicted by the neural network model is also the curve formed by connecting 201 points.

[0052] Step 2: Randomly divide the 3000 sets of data in the sample set into training set, validation set and test set in a ratio of 8:1:1; standardize the single-event effect parameters of the CMOS inverters in the training set and validation set respectively.

[0053] Standardization transforms data into a distribution with a mean of 0 and a standard deviation of 1. The transformation function is shown in the equation: Normalization transforms a series of data into a fixed interval or range, typically [0,1]. A commonly used transformation function is shown in the following equation:

[0054] Standardizing or normalizing data is done to eliminate the influence of different features of the sample having different magnitudes.

[0055] Step 3: Construct a residual neural network prediction model.

[0056] Specifically, the input to the residual neural network prediction model is the single-event effect parameter of the CMOS inverter, and the output of the residual neural network prediction model is the transient current curve of the single-event effect of the CMOS inverter, which is also the single-event effect curve of this invention.

[0057] The residual neural network structure used in this invention has been optimized to quickly and accurately obtain the single-event transient current curves and characteristic parameters of CMOS inverters. (Reference) Figure 4 In (a), the residual neural network prediction model consists of an input layer, a first fully connected layer, a convolutional layer, a second fully connected layer, and an output layer connected in sequence.

[0058] The input layer is used for inputting different single-event effect parameters of the CMOS inverter; the number of neurons in the input layer is the same as the number of single-event effect parameters of the CMOS inverter.

[0059] The first fully connected layer consists of two fully connected layers, which can expand the dimension of the input vector, and the batch normalization layer is used to prevent overfitting;

[0060] The convolutional layer includes a first convolutional layer and a second convolutional layer, which are used to convolve the features output by the fully connected layer;

[0061] The second fully connected layer consists of three fully connected layers. The output vector is reduced in dimensionality, and the batch normalization layer is used to prevent overfitting.

[0062] The output layer is used to output the single-event transient characteristic curve of the CMOS inverter; the number of neurons in the output layer is the same as the number of data points taken from the single-event transient characteristic curve of the CMOS inverter.

[0063] In the residual neural network prediction model constructed in this embodiment, the number of neurons in the input layer is 4. The dimension is expanded to 600 through two fully connected layers of the first fully connected layer. The features output by the fully connected layer are convolved to 64*150 through the first and second convolutional layers. Then, the dimension is reduced to 201 neurons through three fully connected layers of the second fully connected layer. The result is output through the output layer.

[0064] Step 4: Train the residual neural network prediction model using the training set and validation set, and iteratively update the network parameters of the residual neural network prediction model using the backpropagation method to obtain the trained prediction model.

[0065] Specifically, during the training process, the data of the CMOS inverter single-event effect transient current curves or transient voltage curves in the training set and validation set are used as labels; by calculating the loss function ReLU for each batch of training, the network parameters are optimized by backpropagation using the SGD optimizer until the residual neural network prediction model converges, and the trained residual neural network prediction model is obtained.

[0066] Step 5: Input the single-event effect parameters of the CMOS inverters in the test set into the trained residual neural network prediction model to obtain the predicted transient current curve of the single-event effect of the CMOS inverters.

[0067] refer to Figure 5 As can be seen, the residual neural network in this embodiment 1 can predict the transient voltage curve of the single-event effect of the CMOS inverter very well.

[0068] refer to Figure 6As can be seen, the residual neural network in this embodiment 1 has a much stronger predictive ability for the single-event transient voltage curve of the CMOS inverter than other machine learning algorithms, and the mean square error of the residual neural network for predicting the single-event transient voltage curve of the CMOS inverter is not large.

[0069] refer to Figure 7 As can be seen, the residual neural network in this embodiment 1 can predict the transient current curve of the single-event effect of the CMOS inverter very well.

[0070] refer to Figure 8 As can be seen, the residual neural network in this embodiment 1 has a much stronger predictive ability for the single-event transient current curve of the CMOS inverter than other machine learning algorithms, and the mean square error of the residual neural network for predicting the single-event transient current curve of the CMOS inverter is not large.

[0071] Example 2

[0072] A method for predicting single-event effects in CMOS inverters based on residual neural networks includes the following steps:

[0073] Step 1: Obtain multiple sets of single-event effect curves of the CMOS inverter, and extract the single-event effect parameters and characteristic parameters of the single-event effect as a sample set;

[0074] Among them, the single-event effect parameters of the CMOS inverter include linear transfer energy (LET), particle incident position (x), particle incident angle (θ), and particle incident characteristic distance (Wt_hi); the characteristic parameters of the single-event effect of the CMOS inverter include output current I0 and total output charge Q0.

[0075] Specifically, the formula for calculating the output current I0 is as shown in equation (1):

[0076]

[0077] In equation (1), q is the electron charge, and μ n It is electron mobility, N a N is the doping concentration of the channel, N is the linear density of electron-hole pairs, ε is the dielectric constant, and x is the doping concentration of the channel. p It is the width of the PN junction depletion region;

[0078] The formula for calculating the total output charge Q0 is as shown in equation (2):

[0079]

[0080] In equation (2), I drain It is the source-drain current of the FinFET device;

[0081] The formula for calculating the linear energy transfer (LET) is as shown in equation (3):

[0082]

[0083] In equation (3), the unit is MeV / cm, where dE Δ It is the energy lost when a single particle is incident at a distance dx, through ionization upon collision with the material.

[0084] Step 2: Randomly divide the 3000 sets of data in the sample set into training set, validation set and test set in a ratio of 8:1:1; standardize the single-event effect parameters of the CMOS inverters in the training set and validation set respectively.

[0085] Step 3: Construct a residual neural network prediction model;

[0086] Specifically, the input to the residual neural network prediction model is the single-event effect parameters of the CMOS inverter, and the output of the residual neural network prediction model is the characteristic parameters of the single-event effect of the CMOS inverter.

[0087] refer to Figure 4 In (b), the residual neural network prediction model comprises an input layer, a fully connected layer, a convolutional layer, a fully connected layer, and an output layer connected in sequence.

[0088] The input layer is used for inputting different single-event effect parameters of the CMOS inverter; the number of neurons in the input layer is the same as the number of single-event effect parameters of the CMOS inverter.

[0089] The first fully connected layer consists of two fully connected layers, which can expand the dimension of the input vector, and the batch normalization layer is used to prevent overfitting;

[0090] The convolutional layer section contains two convolutional layers, with convolutional units used to convolve the features output by the fully connected layer;

[0091] The second fully connected layer consists of three fully connected layers. The output vector is reduced in dimensionality, and the batch normalization layer is used to prevent overfitting.

[0092] The output layer is used to output the single-event effect characteristic parameters of the CMOS inverter; the number of neurons in the output layer is the same as the number of single-event effect characteristic parameters of the CMOS inverter.

[0093] In the residual neural network prediction model constructed in this embodiment, the number of neurons in the input layer is 4. The dimension is expanded to 200 through two fully connected layers in the first fully connected layer. The features output by the fully connected layer are convolved to 32*50 through the first and second convolutional layers. Then, the dimension is reduced to 2 neurons through three fully connected layers in the second fully connected layer. The result is output through the output layer.

[0094] Step 4: Train the residual neural network prediction model using the training set and validation set, and iteratively update the network parameters of the residual neural network prediction model using the backpropagation method to obtain the trained prediction model.

[0095] Specifically, during the training process, the characteristic parameters of the single-event effect of CMOS inverters in the training and validation sets are used as labels; the network parameters are optimized by backpropagation using the SGD optimizer by calculating the loss function ReLU for each batch of training until the residual neural network prediction model converges, thus obtaining the trained residual neural network prediction model.

[0096] The neural network training method used in this invention, including the selection of loss function and the use of early stopping, can prevent overfitting and achieve better training results.

[0097] Step 5: Input the single-event effect parameters of the CMOS inverters in the test set into the trained residual neural network prediction model to obtain the characteristic parameters of the predicted single-event effect of the CMOS inverters.

[0098] refer to Figure 9 As can be seen, the residual neural network in this embodiment 2 can predict the characteristic parameters of the single-event effect of CMOS inverters very well, and the prediction ability of the residual neural network for the characteristic parameters of the single-event effect of CMOS inverters is much higher than that of other machine learning algorithms.

[0099] The dataset input values ​​selected in this invention can reflect the actual operating conditions and device parameters of a CMOS inverter, and have generalization significance, enabling the trained residual neural network model to be extended to the application requirements of actual prediction.

[0100] Although the present invention has been described in detail in this specification with general description and specific embodiments, some modifications or improvements can be made to it, which will be obvious to those skilled in the art. Therefore, all such modifications or improvements made without departing from the spirit of the present invention are within the scope of protection claimed by the present invention.

Claims

1. A method for predicting single-event effects in CMOS inverters based on residual neural networks, characterized in that, Includes the following steps: Step 1: Design K sets of single-event effect parameter data for the CMOS inverter. Use TCAD software to simulate each set of data to obtain K single-event effect curves for the CMOS inverter. The horizontal axis of the single-event effect curve is time, and the vertical axis is current or voltage. During the simulation, the time is divided into L-1 intervals with L time points. Each time point corresponds to a data point on the single-event effect curve. Extract the single-event effect parameters from the single-event effect curve, the data of the data point, and the characteristic parameters of the single-event effect as a sample set. Among them, the single-event effect parameters include linear transfer energy (LET), particle incident position (x), particle incident angle (θ), and particle incident characteristic distance (Wt_hi); the characteristic parameters of the single-event effect include output current I0 and total output charge Q0. Step 2: Randomly divide the sample set into training set and validation set according to the proportion; standardize the single-event effect parameters of the training set and validation set respectively; Step 3: Construct a residual neural network prediction model; Step 4: Train the residual neural network prediction model using the training set and validation set, and iteratively update the network parameters of the residual neural network prediction model using the backpropagation algorithm to obtain the trained prediction model; wherein, the input is the single-event effect parameters, and when used to predict the single-event effect curve, the output is the single-event effect curve fitted by L data points; when used to predict the feature parameters of the single-event effect, the output is the feature parameters of the single-event effect. Step 5: Input different single-event effect parameters of the CMOS inverter into the trained residual neural network prediction model to obtain the predicted single-event effect curve or the characteristic parameters of the single-event effect.

2. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 1, characterized in that, The formula for calculating the output current I0 is as follows: In the formula, q is the electron charge, and μ is the electron charge. n It is electron mobility, N a N is the doping concentration of the channel, N is the linear density of electron-hole pairs, ε is the dielectric constant, and x is the doping concentration of the channel. p It is the width of the PN junction depletion region; The formula for calculating the total output charge Q0 is as follows: In the formula, I drain It is the source-drain current of the FinFET device; The formula for calculating the Linear Transfer Energy (LET) is as follows: In the formula, the unit is MeV / cm, where dE Δ It is the energy lost when a single particle is incident at a distance dx, through ionization upon collision with the material.

3. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 1, characterized in that, The CMOS inverter circuit consists of two enhancement-mode MOS field-effect transistors, with the PMOS transistor being pulled up and the NMOS transistor being pulled down. The PMOS transistor is a P-type FinFET device, and the NMOS transistor is an N-type FinFET device.

4. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 1, characterized in that, By continuously changing the single-event effect parameters of the CMOS inverter, K sets of single-event effect parameter data are obtained. Then, TCAD software is used to simulate each set of single-event effect parameter data and extract the single-event effect parameters and the characteristic parameters of the single-event effect, thus obtaining a sample set with a sample size of K. During the simulation, other parameters besides the single-event effect parameters remain unchanged.

5. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 1, characterized in that, The residual neural network prediction model comprises an input layer, a first fully connected layer, a convolutional layer, a second fully connected layer, and an output layer connected in sequence. The input layer is used for inputting different single-event effect parameters of the CMOS inverter; the number of neurons in the input layer is the same as the number of single-event effect parameters of the CMOS inverter. The first fully connected layer expands the dimension of the input vector, and the batch normalization layer is used to prevent overfitting; The convolutional layer includes a first convolutional layer and a second convolutional layer, which are used to convolve the features output by the fully connected layer; The second fully connected layer reduces the dimensionality of the output vector, and the batch normalization layer is used to prevent overfitting. The output layer is used to output the single-event effect transient characteristic curve or single-event effect characteristic parameters of the CMOS inverter; the number of neurons in the output layer is the same as the number of data points taken from the single-event effect transient characteristic curve of the CMOS inverter or the number of single-event effect characteristic parameters of the CMOS inverter.

6. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 5, characterized in that, When used to predict single-event effect curves, the residual neural network prediction model has 4 neurons in the input layer, two layers in the first fully connected layer, which expands the dimension to 600, and the convolutional layer convolves the features output by the first fully connected layer to 64*150. The second fully connected layer has three layers, which reduces the dimension to 201 neurons, and the result is output through the output layer.

7. The method for predicting single-event effects of CMOS inverters based on residual neural networks according to claim 5, characterized in that, When used to predict feature parameters of single-event effects, the residual neural network prediction model has 4 neurons in the input layer, two fully connected layers in the first layer, which expands the dimension to 200, and the convolutional layer convolves the features output by the first fully connected layer to 32*50. The second fully connected layer has three layers, which reduces the dimension to 2 neurons, and the result is output through the output layer.

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