A variable-gain active phase shifter capable of bidirectional operation

Abstract

The present invention discloses a variable gain active phase shifter capable of bidirectional operation, which includes an impedance matching network, a polyphase filter, a vector modulator, and a digital control module. The impedance matching network consists of a pair of impedance matching networks, and this pair of impedance matching networks are respectively connected to a system with an external characteristic impedance of 50 ohms. One of the pair of differential signal lines on the left side of the polyphase filter is connected to one of the pair of impedance matching networks, and the two pairs of differential signal lines Q and I on the right side are connected to the inside of the vector modulator through switches. The vector modulator is respectively connected to the polyphase filter and the other impedance matching network. The output end of the digital control circuit is connected to the vector modulator, and the input end is connected to an externally input digital control signal port. The present invention realizes the bidirectional operation and bidirectional matching of the active phase shifter, and at the same time has TX and RX dual modes, which can reduce the area and modulation gain.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit design, and particularly relates to a variable gain active phase shifter that can work bidirectionally. Background Art

[0002] In order to meet the requirements of high data transmission rate and low cost for the fifth-generation mobile network, phased array technology has emerged as the key technology for the development of high-speed wireless communication technology. A phased array system has multiple array antennas and transceiver components, and changes the direction and intensity of the equivalent beam by controlling the amplitude and phase of the signals radiated by each antenna. Multiple signals enhance or cancel each other out in space, and a narrow-direction beam can be formed, concentrating the energy in the specific direction required, increasing the transmission distance and reducing interference. Therefore, the phased array system needs to have a smaller array size while having precise beam control capabilities. As one of the important modules of the phased array, the phase shifter affects the beam steering resolution, pointing accuracy, and control range. Its response speed determines the switching time of the beam direction. Therefore, the phase shifter needs to have the characteristics of high precision, small size, and low cost.

[0003] Phase shifters that can adjust the phase of signals are mainly divided into active phase shifters and passive phase shifters. Reflection loads and switched filter structures are usually used to implement passive phase shifters. The reflection load structure phase shifter has a narrow bandwidth and low phase accuracy; the switched filter structure phase shifter has a large chip size and high insertion loss. Compared with passive phase shifters, active phase shifters generally refer to vector sum phase shifters, which have the advantages of small area, low insertion loss, and high phase shifting accuracy. However, currently, most active phase shifters are unidirectional phase shifters, which are applied to the RX and TX two channels in the phased array system, occupying double the area. In the channel, an additional variable gain amplifier or attenuator is required to modulate the signal gain, which not only reduces the integration level but also increases the cost.

[0004] In view of this, it is necessary to design a phase shifter that can work bidirectionally and can modulate gain to solve the above problems. Summary of the Invention

[0005] The main purpose of the present invention is to provide a variable gain active phase shifter that can work bidirectionally, so as to solve the problems that the unidirectional active phase shifter occupies double the area in the receiving and transmitting two channels of the transceiver component and cannot modulate the gain.

[0006] To achieve the above object, the present invention provides a variable gain active phase shifter capable of bidirectional operation, which is characterized by comprising an impedance matching network, a polyphase filter, a vector modulator, and a digital control module; the impedance matching network consists of a pair of impedance matching networks, and this pair of impedance matching networks are respectively connected to a system with an external characteristic impedance of 50 ohms. One of the pair of differential signal lines on the left side of the polyphase filter is connected to one of the pair of impedance matching networks, and the two pairs of differential signal lines Q and I on the right side are connected to the inside of the vector modulator through switches. The vector modulator is respectively connected to the polyphase filter and the other impedance matching network. The output end of the digital control circuit is connected to the vector modulator, and the input end is connected to an externally input digital control signal port.

[0007] A further improvement of the present invention is that the polyphase filter is composed of four resistors R1, four capacitors C1, four resistors R2, and four capacitors C2. The four resistors R1 and the four capacitors C1 are cross-connected in series to form a first-order RC network, and the four resistors R2 and the four capacitors C2 are cross-connected in series to form another first-order RC network. The two are cascaded to form a second-order polyphase filter.

[0008] A further improvement of the present invention is that the vector modulator is composed of switches K1 to K7, QVGA, and IVGA. The two pairs of differential signal lines Q and I on the left side of the vector modulator are connected to the input ends of QVGA and IVGA through switches K2 and K3, and are connected to the output ends of QVGA and IVGA through switches K1 and K4; the pair of differential signal lines on the right side are connected to the output ends of QVGA and IVGA through switches K5 and K7, and are connected to the input ends of QVGA and IVGA through K6.

[0009] A further improvement of the present invention is that the switches K1, K4, K5, and K7 only include series-connected NMOS transistors, the switches K2 and K3 include parallel-connected NMOS transistor KT1 and series-connected NMOS transistors, and the switch K6 includes a parallel-connected inductor L5 and series-connected NMOS transistors.

[0010] A further improvement of the present invention is that QVGA and IVGA have the same structure and are composed of a Gilbert cell and a low additional phase shift VGA.

[0011] A further improvement of the present invention lies in that the input end of the Gilbert cell is a differential signal I / Qin+ and I / Qin- port, which are respectively connected to the gates of M2 and M3 and the gates of M1 and M4. The drains of M1 to M4 are cross-connected to the differential ends of the differential inductor L1. L1 is connected to the power supply through a center tap. The drains of M5 and M6 are respectively connected to the sources of M1 and M2 and the sources of M3 and M4. The gate of M5 is connected to the bias signal I / QBias through the switch S and connected to the ground through the switch SN. The gate of M6 is connected to the bias signal I / QBias through the switch SN and connected to the ground through the switch S. The sources of M5 to M6 are all connected to the drain of M7. The gate of M7 is connected to the bias signal I / Q-DAC, and the source is connected to the ground. The input end of the low additional phase shift VGA is connected to the output end of the Gilbert cell. The differential ports of L1 are respectively connected to the gates of M8 to M9 and the gates of M10 to M11 through the capacitor C. The gates of M8 and M11 and the gates of M9 and M10 are respectively connected to the bias signals V1 and V2 through the resistors R. The drains of M8 to M11 are cross-connected to the differential ends of the inductor L2. The sources of M8 to M11 are connected to the ground. L2 is connected to the power supply through a center tap, and the differential ends are the output ports I / Qout+ and I / Qout.

[0012] A further improvement of the present invention lies in that the digital control circuit is composed of an SPI and a decoding circuit, a phase modulation DAC, and a gain modulation DAC. The output end is connected to the vector modulator. The output ends of the SPI and the decoding circuit are respectively connected to switches K1 to K7, an amplitude modulation DAC, and a phase modulation DAC. The output end of the phase modulation DAC is connected to the Gilbert cell, and the output end of the gain modulation DAC is connected to the low additional phase shift VGA.

[0013] A further improvement of the present invention lies in that the phase modulation DAC is composed of four NMOS transistors M12 to M15, six groups of PMOS current mirror arrays with different sizes but the same structure from the first group to the sixth group, and bias PMOS transistors M29 to M30. The gain modulation DAC is composed of NMOS transistors M16 to M17, PMOS transistors M25 to M28, and five groups of PMOS current mirror arrays with different sizes but the same structure from the seventh group to the eleventh group.

[0014] A further improvement of the present invention lies in that the source of M29 is connected to the power supply, the gate and drain are connected to the source of M30, and the gate and drain of M30 are connected to the reference current source; the sources of M15 and M13 are both grounded, the gate and drain of M15 are connected to each other as port Q-DAC, and the gate and drain of M13 are connected to each other as port I-DAC; the gate and drain of M14 are connected to each other as port Q-Bias, and the source is connected to port Q-DAC; the gate and drain of M12 are connected to each other as port I-Bias, and the source is connected to port I-DAC; in the first group of current mirrors, the drain of the left M18 is connected to the drain of M14, the source is connected to the drain of M20, and the gate is respectively connected to the gate of M30 and the power supply through switches K1 and K1N; the drain of the right M19 is connected to the drain of M12, the source is connected to the drain of M21, and the gate is respectively connected to the gate of M30 and the power supply through switches K2 and K2N; the source of M20 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M18; the source of M21 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M19; the other second to sixth groups of current mirrors all adopt the same structure and jointly form an array with the first group.

[0015] A further improvement of the present invention lies in that the sources of M16 and M17 are grounded, the drain and gate of M16 are connected to each other as port V1, and the gate and drain of M17 are connected to each other as port V2; the source of M26 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M25. The gate of M25 is connected to the gate of M30, and the drain is connected to port V1; the source of M28 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M27; the gate of M27 is connected to the gate of M30, and the drain is connected to port V2; in the seventh group of current mirrors, the drain of the left M22 is connected to port V1, and the gate is respectively connected to the gate of M30 and the power supply through switches S1 and S1N; the drain of the right M23 is connected to port V2, and the gate is respectively connected to the gate of M30 and the power supply through switches S1N and S1; the other eighth to eleventh groups of current mirrors adopt the same structure and jointly form an array with the seventh group; the control signal inputs of all switches in the DAC are connected to the output terminals of the SPI and decoding circuit.

[0016] The beneficial effects of the present invention are as follows: In the present invention, a second-order polyphase filter is used as an orthogonal signal generator in the TX mode and as an orthogonal signal synthesizer in the RX mode. A switch is used to switch the working direction of the vector modulator, ultimately realizing the bidirectional operation of the active phase shifter, reducing the area occupied by the active phase shifter in the transceiver component, and lowering the cost. The present invention not only designs a matching network at the port, but also adds a matching network inside the switch, enabling the matching network inside the switch to follow the switch to access or disconnect from the circuit. By virtue of the different matching networks in the TX mode and the RX mode, the port can be well matched with a 50-ohm load in any mode. The present invention adopts a VGA with a cross-coupled structure to achieve the modulation gain while reducing the additional phase shift caused, enabling the bidirectional active phase shifter to perform amplitude modulation, further improving the integration level and reducing the cost. Description of the Drawings

[0017] Figure 1 is the structural block diagram of the variable gain active phase shifter that can work bidirectionally according to the present invention;

[0018] Figure 2 is the circuit structure diagram of the QVGA and IVGA inside the vector modulator:

[0019] Figure 3 is the circuit structure diagram of the phase modulation DAC and the gain modulation DAC;

[0020] Figures 4(a) and 4(b) are respectively the orthogonal error simulation diagrams of the PPF in the TX and RX modes;

[0021] Figures 5(a) and 5(b) are respectively the phase response simulation diagrams of the present invention during phase modulation in the TX and RX modes;

[0022] Figures 6(a) and 6(b) are respectively the gain response simulation diagrams of the present invention during phase modulation in the TX and RX modes;

[0023] Figures 7(a) and 7(b) are respectively the simulation diagrams of the present invention during gain modulation in the TX and RX modes;

[0024] Figure 8 is the present invention in the TX and RX modes |S 11 | and |S 22 | simulation diagrams. Detailed Embodiments

[0025] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] It should be emphasized that during the description of the present invention, various formulas and constraints are distinguished by using consistent labels before and after, but it does not exclude using different labels to denote the same formula and / or constraint. The purpose of such a setting is to more clearly illustrate the features of the present invention.

[0027] As Figure 1 shown, an embodiment of the present invention provides a variable - gain active phase shifter structure that can work bidirectionally, including an impedance matching network, poly - phase filters (PPF), a vector modulator, and a digital control module.

[0028] The impedance matching network is jointly composed of impedance matching network 1 and impedance matching network 2. The impedance matching network 1 and impedance matching network 2 are connected to a system with an external characteristic impedance of 50 ohms. A pair of differential signal lines on the left side of the PPF is directly connected to impedance matching network 1, and two pairs of differential signal lines Q / I on the right side are connected to the inside of the vector modulator through switches. The left side of the vector modulator is connected to the PPF, and the right side is connected to impedance matching network 2. The output end of the digital control circuit is connected to the vector modulator, and the input end is connected to an externally input digital control signal port.

[0029] The PPF is composed of four resistors R1, four capacitors C1, four resistors R2, and four capacitors C2. The four resistors R1 and four capacitors C1 are cross - connected in series to form a first - order RC network, and the four resistors R2 and four capacitors C2 are cross - connected in series to form another first - order RC network. The two are cascaded to form a second - order PPF.

[0030] In the TX mode, the second - order PPF serves as a quadrature signal generator, thereby realizing the generation of quadrature signals within a relatively wide frequency band. Modulated by the digital control module, the vector modulator modulates the amplitude and selects the polarity of the I and Q quadrature signals, so that the synthesized output signal has a certain phase and gain. In the RX mode, the signal is input from the RF2 port, first undergoes amplitude modulation and polarity selection by the vector modulator, and then signal synthesis is performed by the PPF. At this time, the PPF serves as a quadrature adder, and two signals with the same phase but different amplitudes are synthesized into an output signal in a quadrature manner. The switch in the vector modulator is used to switch the working direction of the phase shifter, thereby realizing the TX and RX modes. The gain and phase of the output signal are controlled by adjusting the gain and polarity of the I and Q signals by the vector modulator. The vector modulator is controlled by the digital control module, and the control logic is generated by the decoding circuit, thereby realizing 5 - bit phase modulation and 4 - bit gain modulation.

[0031] Figure 2The circuit diagrams of QVGA and IVGA inside the vector modulator for adjusting gain in the embodiments of the present invention. The vector modulator consists of switches K1-K7, QVGA, and IVGA. The two pairs of differential line signals Q and I on the left side of the vector modulator are respectively connected to the input terminals of QVGA and IVGA through switches K2 and K3, and are respectively connected to the output terminals of QVGA and IVGA through switches K1 and K4; the pair of differential signal lines on the right side are connected to the output terminals of QVGA and IVGA through switches K5 and K7, and are connected to the input terminals of QVGA and IVGA through K6. The switches K1, K4, K5, and K7 only include series NMOS transistors, the switches K2 and K3 include parallel NMOS transistor KT1 and series NMOS transistors, and the switch K6 includes parallel inductor L5 and series NMOS transistors. Through the switches, L5 is disconnected from the circuit in the TX mode, and L5 is connected to the circuit in the RX mode, thereby realizing the matching between the RF2 port and 50 ohms in the two modes. The structures of QVGA and IVGA are the same, and they are composed of Gilbert cells and low additional phase shift VGAs. The input terminals of the Gilbert cell are differential signal I / Qin+ and I / Qin- ports, which are respectively connected to the gates of M2 and M3 and the gates of M1 and M4. The drains of M1-4 are cross-connected to the differential ends of inductor L1. L1 is connected to the power supply through a center tap. The drains of M5 and M6 are respectively connected to the sources of M1, M2 and M3, M4. The gate of M5 is connected to the bias signal I / QBias through switch S and connected to ground through switch SN. The gate of M6 is connected to the bias signal I / QBias through switch SN and connected to ground through switch S. The sources of M5-6 are all connected to the drain of M7. The gate of M7 is connected to the bias signal I / Q-DAC, and the source is connected to ground; the input terminal of the low additional phase shift VGA is connected to the output terminal of the Gilbert cell. The differential ports of L1 are respectively connected to the gates of M8-9 and M10-11 through capacitors C. The gates of M8 and M11 and the gates of M9 and M10 are respectively connected to the bias signals V1 and V2 through resistors R. The drains of M8-M11 are cross-connected to the differential ends of inductor L2. The sources of M8-M11 are connected to ground. L2 is connected to the power supply through a center tap, and the differential ends are output ports I / Qout+ and I / Qout. The Gilbert cell modulates the amplitude and polarity of I and Q, so that the synthesized output signal has a controllable phase shift and an invariant amplitude; the low additional phase shift VGA adopts a cross-coupled structure to reduce the phase change caused by gate-drain parasitic capacitance. M8-M11 are all in the saturation state, and the modulation gain of the low additional phase shift is realized by changing the biases of V1 and V2.

[0032] Figure 3 The circuit structure diagrams of the phase modulation DAC and the gain modulation DAC in the above embodiments of the present invention.

[0033] The digital control circuit consists of an SPI and decoding circuit, a phase modulation DAC, and a gain modulation DAC, and its output terminal is connected to the vector modulator. The output terminals of the SPI and decoding circuit are respectively connected to switches K1 to K7, an amplitude modulation DAC, and a phase modulation DAC. The output terminal of the phase modulation DAC is connected to a Gilbert cell, and the output terminal of the gain modulation DAC is connected to a low additional phase shift VGA.

[0034] The phase modulation DAC consists of four NMOS transistors M12 to M15, six groups of PMOS current mirror arrays with different sizes but the same structure from the first group to the sixth group, and bias PMOS transistors M29 to M30. The source of M29 is connected to the power supply, and its gate and drain are both connected to the source of M30. The gate and drain of M30 are connected to a reference current source. The sources of M15 and M13 are both grounded. The gate and drain of M15 are connected to each other as port Q-DAC, and the gate and drain of M13 are connected to each other as port I-DAC. The gate and drain of M14 are connected to each other as port Q-Bias, and its source is connected to port Q-DAC. The gate and drain of M12 are connected to each other as port I-Bias, and its source is connected to port I-DAC. In the first group of current mirrors, the drain of the left M18 is connected to the drain of M14, its source is connected to the drain of M20, and its gate is respectively connected to the gate of M30 and the power supply through switches K1 and K1N; the drain of the right M19 is connected to the drain of M12, its source is connected to the drain of M21, and its gate is respectively connected to the gate of M30 and the power supply through switches K2 and K2N; the source of M20 is connected to the power supply, its gate is connected to the gate of M29, and its drain is connected to the source of M18; the source of M21 is connected to the power supply, its gate is connected to the gate of M29, and its drain is connected to the source of M19; the other second group to the sixth group of current mirrors all adopt the same structure and form an array together with the first group. The gain modulation DAC consists of NMOS transistors M16 to M17, PMOS transistors M25 to M28, and five groups of PMOS current mirror arrays with different sizes but the same structure from the seventh group to the eleventh group. The sources of M16 and M17 are grounded. The drain and gate of M16 are connected to each other as port V1, and the gate and drain of M17 are connected to each other as port V2. The source of M26 is connected to the power supply, its gate is connected to the gate of M29, and its drain is connected to the source of M25. The gate of M25 is connected to the gate of M30, and its drain is connected to port V1. The source of M28 is connected to the power supply, its gate is connected to the gate of M29, and its drain is connected to the source of M27. The gate of M27 is connected to the gate of M30, and its drain is connected to port V2. In the seventh group of current mirrors, the drain of the left M22 is connected to port V1, and its gate is respectively connected to the gate of M30 and the power supply through switches S1 and S1N; the drain of the right M23 is connected to port V2, and its gate is respectively connected to the gate of M30 and the power supply through switches S1N and S1; the other eighth group to the eleventh group of current mirrors adopt the same structure and form an array together with the seventh group. The control signal inputs of all switches in the DAC are all connected to the output terminal of the SPI and decoding circuit.

[0035] The phase modulation DAC adjusts the magnitude of the tail current of the Gilbert cell to control the phase. The currents flowing into Q and I can be independently adjusted to achieve a high-precision current ratio, and at the same time, it basically meets the requirement that the sum of the currents remains unchanged, thereby reducing the gain error during phase modulation. The gain modulation DAC changes the biases of V1 and V2 to control the gain of the low-added-phase-shift VGA, ensuring that the total current magnitude of M1 and M2 tubes remains unchanged and stabilizing the impedance of the output node of the low-added-phase-shift VGA, further reducing the added phase shift. The I1 and I2 paths are always-on branches, making V1 and V2 always higher than the threshold voltage, ensuring that the M8 - M11 tubes are in the saturation state.

[0036] As shown in Fig. 4(a), in the above embodiment of the present invention, the second-order PPF can obtain a lower quadrature error in the TX mode. As shown in Fig. 4(b), in the above embodiment of the present invention, the addition of KT1 in the RX mode improves the isolation when K2 and K3 are turned off, reduces the influence of the impedance changes of the pre-stage QVGA and IVGA on the PPF, and thus reduces the quadrature error.

[0037] Figs. 5(a) and 5(b) are respectively the phase response simulation diagrams of the above embodiment of the present invention during phase modulation in the TX and RX modes, and Figs. 6(a) and 6(b) are respectively the gain response simulation diagrams of the above embodiment of the present invention during phase modulation in the TX and RX modes. It can be seen that the bidirectional phase shift function is achieved, and it has performance comparable to that of a unidirectional active phase shifter.

[0038] Figs. 7(a) and 7(b) are respectively the simulation diagrams of the above embodiment of the present invention during gain modulation in the TX and RX modes. It can be seen that a low added phase shift is generated within the 11.25 dB gain modulation range.

[0039] Figure 8 is the |S 11 | and |S 22 | simulation diagrams of the above embodiment of the present invention in the TX and RX modes. It can be seen that good matching between the ports and 50 ohms in the TX and RX modes is achieved through the above impedance matching network.

[0040] The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A variable-gain active phase shifter capable of bidirectional operation, characterized in that It includes an impedance matching network, a polyphase filter, a vector modulator, and a digital control circuit; the impedance matching network consists of a pair of impedance matching networks, and each of this pair of impedance matching networks is connected to a system with an external characteristic impedance of 50 ohms. One pair of differential signal lines on the left side of the polyphase filter is connected to one of the pair of impedance matching networks, and the two pairs of differential signal lines Q and I on the right side are connected to the inside of the vector modulator through switches. The vector modulator is respectively connected to the polyphase filter and the other impedance matching network. The output end of the digital control circuit is connected to the vector modulator, and the input end is connected to an externally input digital control signal port; The polyphase filter is composed of four resistors R1, four capacitors C1, four resistors R2, and four capacitors C2. The four resistors R1 and the four capacitors C1 are cross-connected in series to form a first-order RC network, and the four resistors R2 and the four capacitors C2 are cross-connected in series to form another first-order RC network. The two are cascaded to form a second-order polyphase filter; The vector modulator consists of switches K1 - K7, QVGA, and IVGA. The two pairs of differential signal lines Q and I on the left side of the vector modulator are connected to the input ends of QVGA and IVGA through switches K2 and K3, and are connected to the output ends of QVGA and IVGA through switches K1 and K4; The pair of differential signal lines on the right side are connected to the output ends of QVGA and IVGA through switches K5 and K7, and are connected to the input ends of QVGA and IVGA through K6.

2. The variable-gain active phase shifter capable of bidirectional operation according to claim 1, characterized in that: The switches K1, K4, K5, and K7 only contain series NMOS transistors. The switches K2 and K3 contain parallel NMOS transistor KT1 and series NMOS transistors. The switch K6 contains a parallel inductor L5 and series NMOS transistors.

3. The variable-gain active phase shifter capable of bidirectional operation according to claim 1, characterized in that: The structures of QVGA and IVGA are the same, and they are composed of Gilbert cells and low-added-phase-shift VGAs.

4. The variable-gain active phase shifter capable of bidirectional operation according to claim 3, characterized in that: The input ends of the Gilbert cell are differential signal I / Qin+ and I / Qin- ports, which are respectively connected to the gates of M2 and M3 and the gates of M1 and M4. The drains of M1 - 4 are cross-connected to the differential ends of differential inductor L1. L1 is connected to the power supply through a center tap. The drains of M5 and M6 are respectively connected to the sources of M1 and M2 and the sources of M3 and M4. The gate of M5 is connected to the bias signal I / QBias through switch S and connected to ground through switch SN. The gate of M6 is connected to the bias signal I / QBias through switch SN and connected to ground through switch S. The sources of M5 - 6 are all connected to the drain of M7. The gate of M7 is connected to the bias signal I / Q-DAC, and the source is connected to ground; the input end of the low-added-phase-shift VGA is connected to the output end of the Gilbert cell. The differential ports of L1 are respectively connected to the gates of M8 - 9 and the gates of M10 - 11 through capacitors C; the gates of M8 and M11 and the gates of M9 and M10 are respectively connected to the bias signals V1 and V2 through resistors R. The drains of M8 - M11 are cross-connected to the differential ends of inductor L2. The sources of M8 - M11 are connected to ground. L2 is connected to the power supply through a center tap, and the differential ends are the output ports I / Qout+ and I / Qout.

5. The variable-gain active phase shifter capable of bidirectional operation according to claim 1, characterized in that: The digital control circuit consists of an SPI and decoding circuit, a phase modulation DAC, and a gain modulation DAC. The output end is connected to the vector modulator. The output ends of the SPI and decoding circuit are respectively connected to switches K1 - K7, an amplitude modulation DAC, and a phase modulation DAC. The output end of the phase modulation DAC is connected to a Gilbert cell, and the output end of the gain modulation DAC is connected to a low additional phase shift VGA.

6. The variable-gain active phase shifter capable of bidirectional operation according to claim 5, characterized in that: The phase modulation DAC consists of four NMOS transistors M12 - M15, six groups of PMOS current mirror arrays with different sizes but the same structure from the first group to the sixth group, and bias PMOS transistors M29 - M30. The gain modulation DAC consists of NMOS transistors M16 - M17, PMOS transistors M25 - M28, and five groups of PMOS current mirror arrays with different sizes but the same structure from the seventh group to the eleventh group.

7. The variable-gain active phase shifter capable of bidirectional operation according to claim 6, characterized in that: The source of M29 is connected to the power supply, and the gate and drain are connected to the source of M30. The gate and drain of M30 are connected to the reference current source. The sources of M15 and M13 are both grounded. The gate and drain of M15 are connected together as port Q - DAC, and the gate and drain of M13 are connected together as port I - DAC. The gate and drain of M14 are connected together as port Q - Bias, and the source is connected to port Q - DAC. The gate and drain of M12 are connected together as port I - Bias, and the source is connected to port I - DAC. In the first group of current mirrors, the drain of the left - hand side M18 is connected to the drain of M14, the source is connected to the drain of M20, and the gate is respectively connected to the gate of M30 and the power supply through switches K1 and K1N. The drain of the right - hand side M19 is connected to the drain of M12, the source is connected to the drain of M21, and the gate is respectively connected to the gate of M30 and the power supply through switches K2 and K2N. The source of M20 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M18. The source of M21 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M19. The other second group to the sixth group of current mirrors all adopt the same structure and together with the first group form an array.

8. The variable-gain active phase shifter capable of bidirectional operation according to claim 6, characterized in that: The sources of M16 and M17 are grounded. The drain and gate of M16 are connected as port V1, and the gate and drain of M17 are connected as port V2. The source of M26 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M25. The gate of M25 is connected to the gate of M30, and the drain is connected to port V1. The source of M28 is connected to the power supply, the gate is connected to the gate of M29, and the drain is connected to the source of M27. The gate of M27 is connected to the gate of M30, and the drain is connected to port V2. In the seventh group of current mirrors, the drain of the left - hand side M22 is connected to port V1, and the gate is respectively connected to the gate of M30 and the power supply through switches S1 and S1N. The drain of the right - hand side M23 is connected to port V2, and the gate is respectively connected to the gate of M30 and the power supply through switches S1N and S1. The other eighth group to the eleventh group of current mirrors adopt the same structure and together with the seventh group form an array. The control signal inputs of all switches in the DAC are connected to the output end of the SPI and decoding circuit.

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