A method for improving clock synchronization accuracy and stability of distributed clock synchronization system

By using an improved clock servo system in the distributed full ballistic test of kilometer target track of light weapons, combined with Kalman filtering and smooth filtering algorithms for clock synchronization, the problem of difficult to achieve submicron second-level clock synchronization accuracy and stability in the existing technology is solved, and higher clock synchronization accuracy and stability are achieved.

CN115865249BActive Publication Date: 2025-04-25ZHONGBEI UNIV
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202211290359.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-21
Publication Date
2025-04-25
Estimated Expiration
2042-10-21

AI Technical Summary

Technical Problem

In the distributed full ballistic test of kilometer target track of light weapons, it is difficult for the prior art to achieve submicrosecond clock synchronization accuracy and stability, especially when there are many clock nodes, long communication paths and multiple intermediate nodes.

Method used

The improved clock servo system is used, and the master-slave clock nodes are synchronized with Kalman filtering and smoothing filtering algorithms. The optimal state estimates of clock deviation and drift are calculated through Kalman filtering, and the fluctuations are reduced through smoothing filtering, and calibration parameters are passed for clock update.

Benefits of technology

The clock synchronization accuracy and stability of the distributed clock synchronization system are significantly improved. The clock synchronization accuracy of a single node reaches tens of nanoseconds, which greatly improves stability, meeting the test needs of submicroseconds.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115865249B_ABST
    Figure CN115865249B_ABST
Patent Text Reader

Abstract

The invention relates to the field of clock synchronization of a distributed network system, and in particular to a method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system. The distributed clock synchronization system comprises a master control machine and slave nodes, wherein the master control machine comprises a clock synchronization timing and triggering device and a switch; the slave node comprises a switch and a clock synchronization timing and triggering device, and each slave node is connected to the switch of the master control machine through the switch; an improved clock servo system is provided in the clock synchronization timing and triggering device, and the improved clock servo system calculates the optimal state estimation value of the master-slave clock deviation and clock drift of the t-th synchronization period by using a Kalman filtering algorithm through the optimal state estimation value of the t-1th synchronization period, obtains the clock deviation calibration parameter after the optimal state estimation value of the clock deviation is subjected to a smoothing filtering algorithm, and the clock deviation calibration parameter is passed to a clock update function to calibrate the slave clock time, thereby ensuring that the accuracy of the master and slave clock nodes meets the test requirements.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The invention relates to the field of distributed network system clock synchronization, in particular to a method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system, which can be used for clock synchronization of a distributed full trajectory test of a kilometer target track of light weapons. Background Art

[0002] High-precision clock synchronization technology based on the IEEE1588 protocol plays an important role in military and scientific research fields such as power systems, aerospace, and conventional weapons testing. For distributed full-trajectory testing of light weapons targets, all master and slave clock nodes within a kilometer need to have high-stability sub-microsecond timing accuracy to complete the relevant tests, so it is necessary to optimize and improve the clock synchronization algorithm and clock servo system.

[0003] The IEEE1588 protocol has set standards for clock synchronization and provides relevant open source technology to support researchers from all walks of life to carry out corresponding development. In the patent application for clock synchronization device and method and clock servo system and method for improving the IEEE1588 protocol (CN114301561 A), an algorithm combining Kalman filtering and PID is proposed through the improvement of the clock servo system. The timing accuracy of this method can reach tens of microseconds. In the patent application for a dual compensation clock synchronization method based on the IEEE1588 protocol (CN 111812970 A), a method is proposed to optimize the clock deviation value by obtaining the dominant individual and PID control parameters through a particle swarm algorithm, and to compensate for clock drift and clock deviation by combining Kalman filtering. The timing accuracy of this method can reach several microseconds and has high stability. Both methods provide ideas for the optimization of clock synchronization algorithms.

[0004] In order to meet the high-stability sub-microsecond precision clock synchronization requirements of distributed full-trajectory testing of light weapons at a kilometer target range, the present invention provides a method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system. Summary of the invention

[0005] In view of the characteristics of clock synchronization in the distributed full-trajectory test of light weapons on a kilometer target track, which has many clock nodes, a long communication path and multiple intermediate nodes such as switches, the present invention provides a method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system to achieve sub-microsecond clock synchronization of each clock node in the kilometer target track.

[0006] The present invention is implemented by adopting the following technical scheme: a method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system, the distributed clock synchronization system comprising a master control machine and various slave nodes, the master control machine comprising a PC, a Beidou timing module, a clock synchronization timing and triggering device and a switch, the clock synchronization timing and triggering device in the master control machine serves as a master clock node, the Beidou timing module serves as a root master clock, the Beidou timing module is connected to the clock synchronization timing and triggering device, the clock synchronization timing and triggering device is connected to the switch, and the PC is connected to the clock synchronization timing and triggering device; the slave node comprises a switch and a clock synchronization timing and triggering device, the clock synchronization timing and triggering device in the slave node serves as a slave clock node, the switch is connected to the clock synchronization timing and triggering device, and each slave node is connected to the switch of the master control machine through a corresponding node switch to realize communication with the master control machine;

[0007] The clock synchronization and triggering device contains an improved clock servo system. The improved clock servo system synchronizes the master and slave clock nodes through Kalman filtering and smoothing filtering algorithms. The Kalman filtering algorithm calculates the optimal state estimation value of the master-slave clock deviation and clock drift of the t-1 synchronization period through the optimal state estimation value of the t-1 synchronization period. The optimal state estimation value of the clock deviation is passed through the smoothing filtering algorithm to obtain the clock deviation calibration parameter. The clock deviation calibration parameter is passed to the clock update function to calibrate the slave clock time, thereby ensuring that the accuracy of the master and slave clock nodes meets the test requirements.

[0008] In the above-mentioned method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system, the calculation process of the clock deviation calibration parameter specifically includes a Kalman filtering stage and a smoothing filtering stage;

[0009] The Kalman filter stage consists of two parts: the prediction stage and the update stage. The specific process is as follows:

[0010] (1) Prediction stage

[0011] The optimal state estimate of the t-1th synchronization period is and the input value U of the tth synchronization cycle t , calculate the prior estimate of the state quantity of the tth synchronization period U t =[φ offset(t) φ drift(t) ] T is the optimal state estimate of the tth synchronization period The input value is the optimal state estimate after the Kalman filter updates The error signal δ(t) used as the feedback signal to compare with the input is solved by the PI controller. F is the state transfer matrix and B is the control matrix.

[0012] The optimal state estimate of the t-1th synchronization period is The covariance matrix P t-1 , calculate the covariance matrix P of the tth synchronization period t A priori estimate of Q is the covariance diagonal matrix of the interference signal;

[0013] (2) Update phase

[0014] The covariance matrix P of the tth synchronization period is t A priori estimate of and the covariance matrix R of the measurement noise, we get the Kalman gain matrix K of the tth synchronization period t =P t - H T (HP t - H T +R) - ; H is the observation matrix;

[0015] The Kalman gain matrix K of the tth synchronization period is t , observation value z t and the prior estimate The corrected state quantity of the t-th synchronization cycle is calculated, that is, the optimal state estimate value of the state quantity of the t-th synchronization cycle

[0016] In the Kalman filter stage, the optimal state estimate of the tth synchronization period is calculated

[0017] In the smoothing filter stage, the offset value of the tth synchronization period after Kalman filtering enters the smoothing filter for filtering, y t =α·x′ t +(1-α)y t-1 , where y t is the filtering result of the tth synchronization period, i.e., the clock deviation calibration parameter; x′ t is the offset value after Kalman filtering in the tth synchronization period, and α is the smoothing coefficient.

[0018] The above method for improving the clock synchronization accuracy and stability of the distributed clock synchronization system is that in the PTP protocol, when the clock period is modulated by the step adjustment, in order to maintain phase consistency, the step adjustment must be a multiple of the output clock period. In actual use, the clock period is related to the crystal frequency. For an ordinary 20ppm crystal, there is a maximum error of 20us per second, so the clock period is not the theoretically stable 500ms. To reduce the error, a coefficient θ is multiplied on the basis of the step adjustment in the clock update function. Among them, T′ S =T1-T0,T′ S The actual period for sending Sync messages. T0 and T1 are the times for the master clock node to send two Sync messages to the slave clock node.

[0019] The method provided by the present invention starts from the influence of the frequency drift of the crystal oscillator on the clock synchronization accuracy in the clock synchronization device, and improves and optimizes the clock servo system by introducing Kalman filtering and smoothing filtering, so that the clock synchronization accuracy in a single node reaches tens of nanoseconds and its stability is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic diagram of the distributed clock synchronization system for the light weapons kilometer target range.

[0021] Figure 2 This is the overall framework diagram of the original clock servo system.

[0022] Figure 3 This is the overall framework diagram of the improved clock servo system.

[0023] Figure 4 This is the result diagram of the single node synchronization of the original clock servo system.

[0024] Figure 5 This is a single-node timing result diagram of the method of the present invention.

[0025] Figure 6 This is the frequency modulation schematic diagram for the clock update function. DETAILED DESCRIPTION

[0026] Schematic diagram of the distributed clock synchronization system for the light weapons kilometer target track Figure 1 As shown, it includes a master control machine and slave nodes.

[0027] The main control machine includes a PC, a Beidou timing module, a clock synchronization and triggering device and a switch. The clock synchronization and triggering device in the main control machine serves as the main clock node, the Beidou timing module serves as the root master clock, the Beidou timing module is connected to the clock synchronization and triggering device, the clock synchronization and triggering device is connected to the switch, and the PC is connected to the clock synchronization and triggering device.

[0028] The slave node includes a switch and a clock synchronization timing and triggering device. The clock synchronization timing and triggering device in the slave node serves as a slave clock node. The switch and the clock synchronization timing and triggering device are connected.

[0029] Since the communication path is long, each slave node communicates with the master machine through the corresponding node switch connected to the master machine's switch.

[0030] The implementation of this method is based on the following:

[0031] (1) The master clock node is equipped with a domestic BeiDou timing module, and the BeiDou satellite provides an accurate clock source for the entire distributed clock synchronization system;

[0032] (2) Since the communication between the master and slave clock nodes passes through the switch in the master control machine and the corresponding slave clock node switch, a certain amount of time will be consumed when passing through the two intermediate nodes. In order to improve the clock synchronization accuracy of the system, P2P transparent clocks and switches with PTP protocol are used to calculate the residence time of the message passing through the intermediate nodes during the clock synchronization process.

[0033] The overall framework of the original clock servo system is as follows Figure 2 As shown in the figure. The PTP protocol engine uses the acquired timestamp information to calculate the delay value before filtering under the delay request-response mechanism and the P2P transparent clock mechanism, and uses the delay value after passing through the IIR filter to calculate the offset value before filtering. After passing through the FIR filter, the offset value is frequency compensated by the PI controller and the slave clock node time is updated to keep the master and slave clock nodes synchronized.

[0034] The FIR filter in the original servo clock system is an exponential filter, which can predict the clock deviation value well. However, due to the large number of nodes and long communication path of the light weapon target channel distributed clock synchronization system, the error caused by the crystal oscillator on the master and slave clock nodes cannot be ignored. The algorithm in the present invention starts with the frequency drift generated by the crystal oscillator, improves the clock servo system, introduces the Kalman filter algorithm and the smoothing filter algorithm, and improves the synchronization accuracy and stability of the distributed clock synchronization system.

[0035] In the clock synchronization of the light weapons target track, since the crystal oscillators used by the master and slave clock nodes are not exactly the same and under the influence of factors such as temperature and device aging, the crystal oscillators will produce frequency drift, thereby introducing clock drift into the system and affecting the synchronization accuracy of the master and slave clock nodes. Clock drift is defined as the time rate of change of the master and slave clock deviations. Because in each synchronization cycle, the original clock servo system will obtain an offset value, so the clock drift expression is

[0036]

[0037] Where offset(t) is the clock deviation value calculated in the tth synchronization cycle, T S The synchronization cycle.

[0038] The improved clock servo system is as follows Figure 3 As shown, the offset value obtained under the original clock servo system and the drift value obtained by formula (1) as input will be passed through the Kalman filter and smoothing filter proposed by the present invention, and then the master-slave clock synchronization is performed.

[0039] The use of Kalman filtering can better control clock drift, more accurately estimate clock deviation values, and eliminate interference in clock deviation and transmission. In the implementation process, the Kalman filter algorithm calculates the optimal state estimation value of the master-slave clock deviation and clock drift in the t-th synchronization cycle through the optimal state estimation value of the t-1th synchronization cycle. The details are as follows:

[0040] To accurately estimate the optimal state estimate of the clock deviation in the t-th synchronization period, it is necessary to know the clock deviation value offset(t) and the clock drift value drift(t) calculated by the PTP protocol engine in the t-th synchronization period.

[0041] Therefore, the definition is the optimal state estimate of the tth synchronization period; U t =[φ offset(t) φ drift(t) ] T is the optimal state estimate of the tth synchronization period The input value of the optimal state estimate after the Kalman filter updates The error signal δ(t) used as the feedback signal to compare with the input (offset(t), drift(t)) is solved after passing through the original clock servo PI controller.

[0042] The mathematical model of the PI controller is as follows:

[0043]

[0044] The state equation of this system is:

[0045]

[0046] P t =F·P t-1 ·F T +Q (4)

[0047] Among them, P t is the optimal state estimate of the tth synchronization period The covariance matrix of t is the interference signal introduced into the system; Q is r t The covariance diagonal matrix of is the state transfer matrix; matrix is the control matrix.

[0048] The observation equation of the Kalman filter is:

[0049]

[0050] Among them, z t is the observation value, the matrix H = [1 0] is the observation matrix; w t To measure noise.

[0051] According to the Kalman filter principle, the algorithm iteration process includes two parts: prediction phase and update phase. The specific process is as follows:

[0052] (1) Prediction stage

[0053] As shown in formula (6), the optimal state estimate of the t-1th synchronization period is and the input value U of the tth synchronization cycle t , calculate the prior estimate of the state quantity of the tth synchronization period

[0054]

[0055] As shown in formula (7), the optimal state estimate of the t-1th synchronization period is The covariance matrix P t-1 , calculate the covariance matrix P t A priori estimate of

[0056]

[0057] (2) Update phase

[0058] As shown in formula (8), the prior estimate of the covariance matrix P(t) of the tth synchronization period is and the covariance matrix R of the measurement noise, we get the Kalman gain matrix K of the tth synchronization period t ;

[0059]

[0060] As shown in formula (9), the Kalman gain matrix K of the tth synchronization period is t , observation value z t and the prior estimate of the state quantity of the tth synchronization period Calculate the optimal state estimate of the modified state quantity of the tth synchronization cycle

[0061]

[0062] As shown in formula (10), the Kalman gain matrix K t and the prior estimate of the t-th synchronization period Calculate the covariance matrix P at time t t .

[0063]

[0064] Through the above process, the optimal state estimation value of the tth synchronization cycle is calculated

[0065] The offset value after Kalman filtering enters the smoothing filter to reduce fluctuations. The formula is as follows:

[0066] y t =α·x′ t +(1-α)y t-1 (12)

[0067] Among them, y t is the filtering result of the offset value of the tth synchronization period, i.e., the clock deviation calibration parameter; x′ t is the offset value after Kalman filtering in the tth synchronization period; α is the smoothing coefficient (0<α<1).

[0068] The offset value after Kalman filtering and smoothing filtering is passed to the clock update function updateClock as a calibration parameter to calibrate the slave clock time, thereby ensuring that the accuracy of the master and slave clock nodes meets the test requirements.

[0069] The clock update function includes the frequency modulation of the clock. The frequency modulation process is as follows: Figure 6 As shown, it is assumed that the slave clock node A wants to synchronize the time of the master clock node B. With a synchronization period T S = 0.5S, for example, within 1S, the master clock node B sends two Sync messages to the slave clock node A, and the message sending times are T B0 and T B1 ; The time when the message is received from clock node A is T A0 and T A1 Without considering the change of path delay and residence time, if the clock frequencies of A and B are equal, then in the same time interval, the accumulated deviation of time of A and B should be the same, that is, T A1 -T A0=T B1 -T B0 If T A1 -T A0 >T B1 -T B0 , it means that the clock frequency of A is faster than that of B, and the clock frequency of A should be slowed down; if T A1 -T A0 <T B1 -T B0 , it means that the clock frequency of A is slower than that of B. To increase the clock frequency of A, the value of the step adjustment is

[0070] In the PTP protocol, when the clock is modulated by the step adjustment, in order to maintain phase consistency, the step adjustment must be a multiple of the output clock period. In actual use, the clock period is related to the crystal frequency. For an ordinary 20ppm crystal, there is a maximum error of 20us per second, so the clock period is not the theoretically stable 500ms. To reduce the error, a coefficient θ is multiplied on the basis of the step adjustment, as shown in formula (13).

[0071]

[0072] Among them, T′ S =T B1 -T B0 (Unit: ns) is the actual period for sending Sync messages.

[0073] A method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system, wherein the clock synchronization accuracy is higher and the stability is better.

[0074] The original clock servo system ordered a node time synchronization result as follows Figure 4 As shown in Figure 1, the timing result is within 100ns, and there is a certain amount of fluctuation. The single-node timing result after using the method provided by the present invention is as follows Figure 5 As shown, the timing accuracy is within 35ns and is more stable. The data under the two methods are processed to obtain the results in Table 1. As can be seen from Table 1, the maximum master-slave clock deviation value under the original servo clock system is about 126.00ns, the average master-slave clock deviation value is about 24.89ns, and the variance of the master-slave clock deviation value is about 440.63ns. The maximum master-slave clock deviation value under the algorithm provided by the present invention is about 27.00ns, the average master-slave clock deviation value is about 8.87ns, and the variance of the master-slave clock deviation value is about 30.56ns. Compared with the original clock servo system, the clock synchronization accuracy of the method provided by the present invention is improved by 64.36%, and the stability is improved by 93.06%.

[0075] In order to achieve the best time synchronization accuracy in the system, some important parameters need to be adjusted before clock synchronization, and the impact of network traffic and filtering effect on synchronization accuracy should be comprehensively considered. The details are as follows: Synchronization period T S =0.5s, the number of Kalman filter iterations is N=5, and the smoothing coefficient α in the smoothing filter is 0.1.

[0076] Table 1 (ns)

[0077]

Claims

1. A method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system, characterized by: The distributed clock synchronization system includes a master control machine and slave nodes. The master control machine includes a PC, a Beidou timing module, a clock synchronization timing and triggering device and a switch. The clock synchronization timing and triggering device in the master control machine serves as a master clock node, the Beidou timing module serves as a root master clock, the Beidou timing module is connected to the clock synchronization timing and triggering device, the clock synchronization timing and triggering device is connected to the switch, and the PC is connected to the clock synchronization timing and triggering device; The slave node includes a switch and a clock synchronization timing and triggering device, the clock synchronization timing and triggering device in the slave node serves as a slave clock node, the switch and the clock synchronization timing and triggering device are connected, and each slave node is connected to the switch of the master control machine through the corresponding node switch to realize communication with the master control machine; The clock synchronization and triggering device has an improved clock servo system. The improved clock servo system synchronizes the master and slave clock nodes through Kalman filtering and smoothing filtering algorithms. The Kalman filtering algorithm calculates the optimal state estimation value of the master-slave clock deviation and clock drift of the t-th synchronization period through the optimal state estimation value of the t-1th synchronization period. The optimal state estimation value of the clock deviation is passed through the smoothing filtering algorithm to obtain the clock deviation calibration parameter. The clock deviation calibration parameter is passed to the clock update function to calibrate the slave clock time, thereby ensuring that the accuracy of the master and slave clock nodes meets the test requirements; The calculation process of the clock deviation calibration parameters specifically includes a Kalman filter stage and a smoothing filter stage; The Kalman filter stage consists of two parts: the prediction stage and the update stage. The specific process is as follows: (1) Prediction stage The optimal state estimate of the t-1th synchronization period is and the input value U of the tth synchronization cycle t , calculate the prior estimate of the state quantity of the tth synchronization period U t =[φ offset(t) φ drift(t) ] T is the optimal state estimate of the tth synchronization period The input value is the optimal state estimate after the Kalman filter updates The error signal δ(t) used as the feedback signal to compare with the input is solved by the PI controller. F is the state transfer matrix and B is the control matrix. The optimal state estimate of the t-1th synchronization period is The covariance matrix P t-1 , calculate the covariance matrix P of the tth synchronization period t A priori estimate of Q is the covariance diagonal matrix of the interference signal; (2) Update phase The covariance matrix P of the tth synchronization period is t A priori estimate of and the covariance matrix R of the measurement noise, we get the Kalman gain matrix of the tth synchronization period H is the observation matrix, The Kalman gain matrix K of the tth synchronization period is t , observation value z t and the prior estimate The corrected state quantity of the t-th synchronization cycle is calculated, that is, the optimal state estimate value of the state quantity of the t-th synchronization cycle In the Kalman filter stage, the optimal state estimate of the tth synchronization period is calculated In the smoothing filter stage, the offset value of the tth synchronization period after Kalman filtering enters the smoothing filter for filtering, y t =α·x′ t +(1-α)y t-1 , where y t is the filtering result of the tth synchronization period, i.e., the clock deviation calibration parameter; x′ t is the offset value after Kalman filtering in the tth synchronization period, and α is the smoothing coefficient.

2. A method for improving the clock synchronization accuracy and stability of a distributed clock synchronization system according to claim 1, characterized in that: In the clock update function, a coefficient θ is multiplied on the step adjustment amount. Among them, T S ′=T1-T0,T S ' is the actual period of sending Sync messages, T0 and T1 are the sending times of two Sync messages sent by the master clock node to the slave clock node.

Citation Information

Patent Citations

  • Double-compensation clock synchronization method based on IEEE1588 protocol

    CN111812970A

  • Clock synchronization device and method for improving IEEE1588 protocol and clock servo system and method

    CN114301561A