Hybrid buck-boost dc-dc converter with flying capacitor

By introducing a hybrid buck-boost DC-DC converter topology with flying capacitors, the problems of large size and high cost of traditional converters are solved, and efficient and low-cost power conversion is achieved.

CN115882722BActive Publication Date: 2026-03-20UNIV OF SCI & TECH OF CHINA
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-13
Publication Date
2026-03-20

AI Technical Summary

Technical Problem

Traditional buck-boost converters suffer from large size and high cost, especially due to the increased chip cost and size caused by the size and voltage tolerance requirements of inductors and switching transistors.

Method used

A hybrid buck-boost DC-DC converter topology with flying capacitors is adopted. By introducing flying capacitors to assist inductor charging in both boost and buck modes, the inductor current and the conduction loss of the switching transistors are reduced, and the voltage rating of the switching transistors is optimized.

Benefits of technology

While ensuring high efficiency, the size of inductors and switching transistors has been reduced, thus reducing the chip area and cost. At the same time, voltage withstand issues have been avoided, resulting in more efficient power conversion.

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Abstract

The present disclosure provides a hybrid buck-boost DC-DC converter with a flying capacitor, comprising: an input node connected to an input voltage source for receiving an input voltage; a power inductor having one end connected to the input node and the other end connected to a first switch node; a flying capacitor having one end connected to the first switch node and the other end connected to a second switch node; a first switch tube having one end connected to the second switch node and the other end grounded; a second switch tube having one end connected to the input node and the other end connected to the second switch node; a third switch tube having one end connected to the first switch node and the other end connected to an output node for outputting an output voltage; a fourth switch tube having one end connected to the second switch node and the other end connected to the output node; and an output terminal connected to the output node, the output terminal comprising an output capacitor and a load resistor arranged in parallel, the output terminal generating a load current under the action of the output voltage.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of electronic devices, integrated circuit technology, and in particular to a hybrid buck-boost DC-DC converter with flying capacitor. BACKGROUND

[0002] In a battery-powered mobile device, the actual supply voltage required by the system circuit can be higher or lower than the battery voltage. The most typical application scenario: powered by a lithium battery, generating a fixed 3.3V to power the system, and as the lithium battery is used for a long time, the battery voltage decreases from 5V to 2.5V. Therefore, when the battery voltage is higher than 3.3V, the system needs a buck DC-DC converter, and when the battery voltage is lower than 3.3V, the system needs a boost DC-DC converter. In this case, a buck-boost DC-DC converter with both boost and buck functions provides a good solution.

[0003] The conventional buck-boost converter is a cascade of a conventional boost converter and a buck converter, so there are always two power tubes in series with the inductor in the power path, while a pure boost or buck converter has only one power tube in series with the inductor. Therefore, the on-resistance of the power tube of the conventional buck-boost converter is large, and in order to improve the efficiency, the area of the power tube must be increased to reduce the on-resistance of the power tube, which undoubtedly greatly increases the manufacturing cost of the chip.

[0004] In addition, the inductor of the conventional buck-boost converter is in the large current side in the boost mode or the buck mode, in other words, the inductor current is large. In order to ensure system efficiency, a small DCR (direct current resistance) inductor needs to be selected, and for the inductor, the smaller the DCR, the larger the size, which not only increases the size of the chip, but also increases the cost. SUMMARY

[0005] (I) Technical problems to be solved

[0006] Based on the above problems, the present disclosure provides a hybrid buck-boost DC-DC converter with a flying capacitor to alleviate the technical problems of large size, improved efficiency, and high cost of the conventional buck-boost converter.

[0007] (II) Technical solutions

[0008] The present disclosure provides a hybrid buck-boost DC-DC converter with a flying capacitor, comprising: an input node, a power inductor, a flying capacitor, a first switch, a second switch, a third switch, a fourth switch, and an output terminal. The input node is connected to an input voltage source for receiving an input voltage; one end of the power inductor is connected to the input node, and the other end is connected to a first switch node; one end of the flying capacitor is connected to the first switch node, and the other end is connected to a second switch node; one end of the first switch is connected to the second switch node, and the other end is grounded; one end of the second switch is connected to the input node, and the other end is connected to the second switch node; one end of the third switch is connected to the first switch node, and the other end is connected to the output terminal for outputting an output voltage; one end of the fourth switch is connected to the second switch node, and the other end is connected to the output terminal; and the output terminal is connected to the output terminal and comprises an output capacitor and a load resistor connected in parallel, and the output terminal generates a load current under the action of the output voltage.

[0009] According to the embodiment of the present disclosure, when the input voltage is higher than the output voltage, the converter operates in a buck mode, and when the input voltage is less than the output voltage, the converter operates in a boost mode.

[0010] According to the embodiment of the present disclosure, in the boost mode, the fourth switch is always turned off, and the boost mode is divided into a first state and a second state according to the linkage state of the first switch, the second switch, and the third switch.

[0011] According to the embodiment of the present disclosure, in the first state, the first switch is turned on, and the second switch and the third switch are turned off; the voltage of the first switch node is less than the input voltage, the voltage difference between the power inductor is greater than 0, the power inductor is magnetized, the current of the power inductor rises and charges the flying capacitor.

[0012] According to the embodiment of the present disclosure, in the second state, the first switch is turned off, and the second switch and the third switch are turned on; the voltage of the first switch node is the same as the voltage of the output terminal, the voltage of the second switch node is equal to the input voltage, the voltage of the first switch node is greater than the input voltage, the voltage difference between the power inductor is less than 0, the power inductor is demagnetized, the current of the power inductor decreases, and the flying capacitor discharges to transfer charges to the output capacitor.

[0013] According to the embodiment of the present disclosure, in the buck mode, the second switch is always turned off, and the buck mode is divided into a third state and a fourth state according to the linkage state of the first switch and the third switch, and the fourth switch.

[0014] According to an embodiment of the present disclosure, in the third state, the first switch tube and the third switch tube are turned on, the fourth switch tube is turned off, the voltage of the first switch node is equal to the output voltage, the voltage of the second switch node is 0, the voltage of the first switch node is less than the input voltage, the voltage difference between the power inductor is greater than 0, the power inductor is magnetized, the power inductor current rises, the flying capacitor discharges, and the charge flows to the output capacitor.

[0015] According to an embodiment of the present disclosure, in the fourth state, the first switch tube and the third switch tube are turned off, the fourth switch tube is turned on, the voltage of the first switch node is twice the output voltage, the voltage of the second switch node is equal to the output voltage, the voltage of the first switch node is greater than the input voltage, the voltage difference between the power inductor is less than 0, the power inductor is demagnetized, the power inductor current decreases, and the flying capacitor is charged.

[0016] According to an embodiment of the present disclosure, in the boost mode, the power inductor current is equal to the load current; the first switch tube, the second switch tube, and the third switch tube are selected from switch tubes with a maximum withstand voltage value equal to the input voltage, and the fourth switch tube is selected from switch tubes with a maximum withstand voltage value equal to the output voltage.

[0017] According to an embodiment of the present disclosure, in the boost mode, the power inductor current is less than the load current; the first switch tube, the third switch tube, and the fourth switch tube are selected from switch tubes with a maximum withstand voltage value equal to the output voltage, and the second switch tube is selected from switch tubes with a maximum withstand voltage value equal to the input voltage.

[0018] (Three) beneficial effects

[0019] From the above technical solutions, the present disclosure has at least one or part of the following beneficial effects:

[0020] (1) The current on the inductor can be reduced in both the step-down mode and the step-up mode, thereby ensuring high efficiency;

[0021] (2) On the premise of ensuring high efficiency, a large DCR inductor can be selected, and the size of the inductor can be reduced;

[0022] (3) While reducing the inductor current, the current on each switch tube is also reduced, and the conduction loss of the switch tube is greatly reduced;

[0023] (4) The maximum withstand voltage of the switch tube in the system is V IN (5V) or switch tubes with similar withstand voltages, without the need for high-voltage tubes, on the premise of ensuring high efficiency of the system, the size of the switch tube can be reduced, the chip area can be saved, and the chip manufacturing cost can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1a FIG. 1 is a schematic diagram of a traditional step-down-step-up converter.

[0025] Figure 1b Figure 1 shows a schematic diagram of a conventional buck-boost converter in buck mode. Figure 1a

[0026] Figure 1c Figure 2 shows a schematic diagram of a conventional buck-boost converter in boost mode. Figure 1a

[0027] Figure 2a Figure 3 shows a schematic diagram of the main waveforms of a conventional buck-boost converter in buck mode. Figure 1a

[0028] Figure 2b Figure 4 shows a schematic diagram of the main waveforms of a conventional buck-boost converter in boost mode. Figure 1a

[0029] Figure 3a Figure 5 shows a schematic diagram of a prior art buck-boost converter with flying capacitor in buck mode.

[0030] Figure 3b Figure 3a Figure 6 shows a schematic diagram of a prior art buck-boost converter with flying capacitor in boost mode.

[0031] Figure 3c Figure 3a Figure 7 shows a schematic diagram of the main waveforms of a prior art buck-boost converter with flying capacitor in buck mode.

[0032] Figure 4a Figure 3a Figure 8 shows a schematic diagram of the main waveforms of a prior art buck-boost converter with flying capacitor in boost mode.

[0033] Figure 4b Figure 3a Figure 9 shows a schematic diagram of a hybrid buck-boost DC-DC converter with flying capacitor according to an embodiment of the present disclosure.

[0034] Figure 5

[0035] Figure 6a Figure 10 shows a schematic diagram of a hybrid buck-boost DC-DC converter with flying capacitor in boost mode in a first state. Figure 5

[0036] Figure 11 shows a schematic diagram of a hybrid buck-boost DC-DC converter with flying capacitor in boost mode in a second state. Figure 6b Figure 5

[0037] ​​​​​​​​​​​Figure 7 This is a schematic diagram of the main waveforms of the hybrid buck-boost DC-DC converter with flying capacitor in boost mode according to an embodiment of the present disclosure.

[0038] Figure 8a for Figure 5 The diagram shows the third state of a hybrid buck-boost DC-DC converter with a flying capacitor in buck mode.

[0039] Figure 8b for Figure 5 The diagram shows the fourth state of a hybrid buck-boost DC-DC converter with a flying capacitor in buck mode.

[0040] Figure 9 This is a schematic diagram of the main waveforms of the hybrid buck-boost DC-DC converter with flying capacitor in buck mode according to an embodiment of the present disclosure.

[0041] Figure 10 This is a schematic diagram illustrating the operation of a hybrid buck-boost DC-DC converter with a flying capacitor according to an embodiment of the present disclosure. Detailed Implementation

[0042] This disclosure provides a hybrid buck-boost DC-DC converter with a flying capacitor, a novel hybrid buck-boost DC-DC converter topology. Based on a traditional buck-boost converter, it introduces a flying capacitor to assist the inductor in charging the output in both boost and buck modes, thereby reducing inductor current. Furthermore, while reducing inductor current, it also reduces the current on each switching transistor, lowering their conduction losses, without introducing voltage withstand limitations.

[0043] Traditional buck-boost converters, such as Figure 1a As shown, the converter structure includes four switching transistors S1, S2, S3, and S4, one power inductor L, and one output capacitor C. OUT and load resistance R OUT This circuit has two operating modes:

[0044] When the input voltage is greater than the output voltage (V) IN >V OUT When, such as Figure 1b As shown, the circuit operates in buck mode, and its working principle is similar to that of a traditional buck converter. Switches S1 and S2 are alternately turned on, while S3 is always turned on. The switching node V sW1 In V IN Switches between 0 and 0. Its voltage conversion ratio M (M = V) OUT / V IN The relationship between the average current of the power inductor and the duty cycle D is as follows:

[0045] M = D (1)

[0046] I L =I OUT (2)

[0047] Where D∈(0,1), M∈(0,1), I L For the power inductor current, I OUT The output current, or load resistance R OUT The load current.

[0048] When the input voltage is less than the output voltage (V) IN <V OUT When, such as Figure 1c As shown, the circuit operates in boost mode, and its working principle is similar to that of a traditional boost converter. Switches S3 and S4 conduct alternately, while S1 is always on. The second switching node V... SW2 In V OUT Switches between 0 and 0. Its voltage conversion ratio M (M = V) OUT / V IN The relationship between the average inductor current and the duty cycle D is as follows:

[0049] M = 1 / (1-D) (3)

[0050]

[0051] Where D∈(0,1) and M∈(1,∞).

[0052] The key waveforms of this circuit are as follows: Figure 2a and Figure 2b As shown in the diagram. The above analysis reveals that in traditional buck-boost converters, one switch (S3, S1) is always on in both buck and boost modes. This significantly increases the system's conduction losses. To reduce these losses, the switch size must be increased to achieve lower on-resistance, which increases chip manufacturing costs. Furthermore, traditional buck-boost converters exhibit large inductor currents in both buck and boost modes. To reduce inductor losses, inductors with lower direct current recency (DCR) must be selected. However, a smaller DCR necessitates a larger inductor size, increasing both cost and chip size.

[0053] To reduce conduction losses, ISSCC2017 proposed a novel topology, such as... Figure 3a As shown, the structure includes four switches, one power inductor L, and one flying capacitor C. F An output capacitor C OUT and load resistance R OUT .

[0054] Similarly, when the input voltage is greater than the output voltage (V)IN >V OUT When ), the circuit operates in buck mode, such as Figure 3b As shown, in buck mode, just like a traditional buck converter, only two switches, S1 and S2, are alternately turned on, and the switching node is at V. IN Switching between 0 and 1, S3 and S4 remain open, and there is no charging or discharging process on the flying capacitor. Compared to a traditional buck-boost converter, there is one less constantly conducting switch in the power path, thus significantly reducing circuit conduction losses. In buck mode:

[0055] M = D (5)

[0056] I L =I OUT (6)

[0057] Where D∈(0,1), M∈(0,1). The key waveforms of the buck mode circuit are shown below. Figure 4a As shown.

[0058] When the input voltage is less than the output voltage (V) IN <V OUT When ), the circuit operates in boost mode, such as Figure 3c As shown, in the circuit, S1, S3, and S4 are active, while S2 remains open. During the DT-T time period, S1 and S4 conduct, charging the capacitor, and the switching node V... SW1 =V IN The voltage value V at the second switch node SW2 =V OUT V OUT <V IN The voltage difference V across the power inductor SW1 -V SW2 <0, the inductor is demagnetized, and the voltage across the flying capacitor is V. CF =V IN During the 0-DT time period, S1 and S4 are open, and S3 is on. Since the voltage across the flying capacitor cannot change abruptly, the voltage at the first switching node is V at this time. SW1 =V OUT +V CF =V IN +V OUT The voltage value V at the second switch node SW2 =V OUT V SW1 -V SW2 When the voltage difference across the inductor is greater than 0, the voltage difference is positive, and the inductor becomes magnetized. Unfortunately, at this time, the voltage stress across S1 is V. IN +V OUT Therefore, S1 requires a higher voltage-rated power transistor, which means increased chip area and manufacturing cost. In boost mode:

[0059] M = 1 / (1-D) (7)

[0060]

[0061] Where D∈(0,1), M∈(1,∞), and the average inductor current is greater than the load current. The key waveforms of the boost mode circuit are shown below. Figure 4b As shown.

[0062] As can be seen from the above, if Figure 1a The traditional buck-boost converter shown requires three switching transistors in both boost and buck modes, with one transistor always on. This results in significant conduction losses. To achieve high efficiency, larger transistors must be used, increasing chip area and manufacturing cost. Furthermore, both boost and buck modes draw large inductor currents. To achieve high efficiency, inductors with smaller current-return ratios (DCRs) must be used. Inductors with smaller DCRs are larger, increasing cost and overall chip size. Figure 3a The buck-boost converter shown has two switches operating in buck mode and three switches operating in boost mode. However, unlike traditional structures where one switch is always on, the conduction loss of the switches is reduced compared to traditional structures. However, S1 requires a high-voltage switch, which increases chip area and manufacturing cost and reduces system efficiency.

[0063] In addition, the inductor current of both structures is large in both boost and buck modes, so large inductors are required. At the same time, the large inductor current also means that the conduction loss of the switching transistor will be large.

[0064] To address the aforementioned issues, the purpose of this invention is to propose a novel buck-boost converter topology that reduces inductor current, switching transistor conduction losses, and inductor DCR losses in both boost and buck modes, while avoiding the introduction of switching transistor withstand voltage issues. This achieves high efficiency while significantly reducing chip cost and size.

[0065] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0066] In this disclosure, a hybrid buck-boost DC-DC converter with a flying capacitor is provided, such as... Figure 5 As shown, the hybrid buck-boost DC-DC converter with flying capacitors includes:

[0067] The input node is connected to the input voltage source to receive the input voltage V. IN ;

[0068] a power inductor L, one end of which is connected to the input node and the other end of which is connected to a first switch node V SW1 ;

[0069] a flying capacitor C F , one end of which is connected to the first switch node V SW1 , and the other end of which is connected to a second switch node V SW2 ;

[0070] a first switch S1, one end of which is connected to the second switch node V SW1 , and the other end of which is grounded

[0071] a second switch S2, one end of which is connected to the input node and the other end of which is connected to the second switch node V SW2 ;

[0072] a third switch S3, one end of which is connected to the first switch node V SW1 , and the other end of which is connected to an output node for outputting an output voltage V OUT ;

[0073] a fourth switch S4, one end of which is connected to the second switch node V SW2 , and the other end of which is connected to the output node

[0074] an output terminal connected to the output node, the output terminal comprising an output capacitor C OUT and a load resistor R OUT in parallel, the output terminal generating a load current under the action of the output voltage.

[0075] When the input voltage is higher than the output voltage, the converter operates in a buck mode; when the input voltage is lower than the output voltage, the converter operates in a boost mode. In the boost mode, the fourth switch is always turned off, and the boost mode is divided into a first state and a second state according to the linkage state of the first switch, the second switch and the third switch. In the buck mode, the second switch is always turned off, and the buck mode is divided into a third state and a fourth state according to the linkage state of the first switch, the third switch and the fourth switch.

[0076] In an embodiment of the present disclosure, when the input voltage is lower than the output voltage (V IN <V OUT ), the circuit operates in the boost mode. In the boost mode, the fourth switch S4 is always turned off, and S1, S2 and S3 are turned on alternately, and the voltage V CF =V OUT -V IN across the flying capacitor.

[0077] More specifically, in combination with Figure 6a ,Figure 7 and Figure 10 As shown, during the first state (0-DT) time period of boost mode, S1 is turned on, and S2 and S3 are turned off. At this time, the voltage value V of the first switching node is... SW1 =V OUT -V IN The voltage value V at the second switch node SW2 =0, V SW1 Less than the input voltage V IN When the voltage difference across the inductor is greater than 0, the inductor becomes magnetized, the inductor current increases, and it charges the flying capacitor +ΔQ=I. L During the DT period, no charge flows from the input to the output capacitor.

[0078] More specifically, in combination Figure 6b , Figure 7 and Figure 10 As shown, during the second state (DT-T) time period, S1 is open, and S2 and S3 are closed. At this time, the voltage value V at the first switch node is... SW1 =V OUT V SW2 =V IN V SW 1 is greater than the input voltage V IN When the voltage difference across the inductor is less than 0, the inductor demagnetizes, and the inductor current decreases. At this time, the flying capacitor discharges, flowing to the output capacitor C. OUT Charge transfer. By performing a volt-second balance on the inductor, we obtain:

[0079] D(Y IN -(V OUT -Y IN ))=(1-D)(V OUT -V IN (9)

[0080]

[0081] Where M is the voltage conversion ratio, D is the duty cycle, D∈(0,1), M∈(1,2), V IN V represents the input voltage value. OUT This is the output voltage value.

[0082] In boost mode, the key signal waveforms are as follows: Figure 7 As shown, the power inductor current I L =I OUT Lower than I in traditional structures L =MI OUT(M>1). In the boost mode, the power inductance current is equal to the load current; the first switch S1, the second switch S2, and the third switch S3 are selected to be switches with a maximum withstand voltage value equal to the input voltage, and the fourth switch S4 is selected to be a switch with a maximum withstand voltage value equal to the output voltage, for example, wherein the input voltage value ranges from 2.5V to 5V, and the output voltage value ranges from 3.3±0.1V.

[0083] In one embodiment of the present disclosure, when the input voltage is higher than the output voltage (V IN >V OUT ), the circuit works in the boost mode, in which S2 is always off, S1, S3 and S4 are alternately turned on, the voltage V CF =V OUT across the flying capacitor.

[0084] More specifically, as shown in Figure 8a , Figure 9 and Figure 10 , in the third state (0-DT) period of the boost mode, S1 and S3 are turned on, and S4 is off, at this time, the switch node V SW1 =V OUT , V SW2 =0, V SW1 is less than the input voltage V IN , the voltage difference across the inductor is greater than 0, the inductor is magnetized, and the inductor current rises, at this time, the flying capacitor is discharging, and the charge flows to the output capacitor Cout.

[0085] More specifically, as shown in Figure 8b , Figure 9 and Figure 10 , in the fourth state (DT-T) period, S1 and S3 are off, and S4 is turned on, at this time, the switch node V SW1 =2V OUT , V SW2 =V OUT , V SW1 is greater than the input voltage V IN , the voltage difference across the inductor is less than 0, the inductor is demagnetized, and the inductor current decreases, at this time, the flying capacitor is charging, and +ΔQ=I L DT. According to the volt-second balance of the inductor, the following equation can be obtained:

[0086] D(V IN -V OUT ) = (1-D)(2V OUT -V IN ) (11)

[0087]

[0088] Wherein, M is voltage conversion ratio, D is duty cycle, D∈(0, 1), M∈(0.5, 1), V IN is the voltage value of input voltage, V OUT is the voltage value of output voltage.

[0089] In the buck mode, the main signal waveforms of the circuit are as shown in the figure Figure 9 The inductor current I L = MI OUT (M < 1), which is lower than I L = I OUT In the buck mode, the power inductor current is less than the load current, the first switch S1, the third switch S3, and the fourth switch S4 are selected to be the switch with the maximum withstand voltage value of the output voltage, and the second switch S2 is selected to be the switch with the maximum withstand voltage value of the input voltage, for example, wherein the range of the input voltage value is 2.5V-5V, and the range of the output voltage value is 3.3±0.1V.

[0090] So far, the embodiments of the present disclosure have been described in detail in conjunction with the drawings. It should be noted that the implementation modes not shown or described in the drawings or the text of the specification are all forms known to those skilled in the art, and are not described in detail. In addition, the definitions of the elements and methods described above are not limited to the various specific structures, shapes or modes mentioned in the embodiments, and can be simply changed or replaced by those skilled in the art.

[0091] According to the above description, those skilled in the art should have a clear understanding of the present disclosure.

[0092] In summary, the present disclosure provides a hybrid buck-boost DC-DC converter with a flying capacitor, which introduces a flying capacitor on the basis of the traditional structure of 4 power tubes and 1 power tube, reduces the inductor current while greatly reducing the conduction loss of the power tube under all working conditions, greatly reduces the chip area and inductor size under the premise of ensuring high efficiency of the system, and reduces the chip cost and volume.

[0093] It should be noted that the above is different embodiments provided by the present disclosure. These embodiments are used to illustrate the technical content of the present disclosure, but not to limit the protection scope of the present disclosure. A feature of an embodiment can be modified, replaced, combined or separated to be applied to other embodiments.

[0094] It should be noted that, in this paper, except for the specific indication, the "one" element is not limited to having a single element, but can have one or more elements.

[0095] Furthermore, unless otherwise specified, the ordinal numbers such as "first," "second," etc., used herein are merely for distinguishing multiple elements with the same name and do not indicate any hierarchy, order of execution, or process sequence among them. A "first" element and a "second" element may appear together in the same component or separately in different components. The presence of an element with a higher ordinal number does not necessarily indicate the presence of another element with a lower ordinal number.

[0096] In this document, unless otherwise specified, the term "characteristic A" or "and / or" and "characteristic B" means that A exists alone, B exists alone, or A and B exist simultaneously; the term "characteristic A" and "and" or "and" and "and" and "characteristic B" means that A and B exist simultaneously; the terms "including", "containing", "having", and "containing" refer to, but are not limited to, these.

[0097] Furthermore, in this document, terms such as "up," "down," "left," "right," "front," "back," or "between" are used only to describe the relative positions of multiple elements and can be extended to include translation, rotation, or mirroring. Additionally, unless otherwise specified, the statement "one element is on another element" or similar statements do not necessarily indicate that the element is in contact with the other element.

[0098] Furthermore, unless specifically described or required to occur in a specific order, the order of the above steps is not limited to those listed above and can be varied or rearranged according to the desired design. Moreover, the above embodiments can be used in combination with each other or with other embodiments based on design and reliability considerations; that is, technical features from different embodiments can be freely combined to form more embodiments.

[0099] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A hybrid buck-boost DC-DC converter with a flying capacitor, comprising: The input node is connected to the input voltage source to receive the input voltage. A power inductor, with one end connected to the input node and the other end connected to the first switching node; A flying capacitor, one end of which is connected to the first switching node, and the other end of which is connected to the second switching node; The first switching transistor is connected at one end to the second switching node and the other end is grounded. The second switch is connected at one end to the input node and at the other end to the second switch node; The third switch is connected at one end to the first switch node and at the other end to the output node, which is used to output voltage. The fourth switch is connected at one end to the second switch node and at the other end to the output node; The output terminal is connected to the output node. The output terminal includes an output capacitor and a load resistor connected in parallel. The output terminal generates a load current under the action of the output voltage.

2. The hybrid buck-boost DC-DC converter with flying capacitor according to claim 1, wherein the converter operates in buck mode when the input voltage is higher than the output voltage, and operates in boost mode when the input voltage is lower than the output voltage.

3. In the hybrid buck-boost DC-DC converter with flying capacitor according to claim 2, the fourth switch is always off in boost mode, and the boost mode is divided into a first state and a second state according to the linkage state of the first switch, the second switch and the third switch.

4. In the hybrid buck-boost DC-DC converter with flying capacitor according to claim 3, in the first state, the first switch is turned on, and the second and third switches are turned off; the voltage of the first switching node is less than the input voltage, the voltage difference across the power inductor is greater than 0, the power inductor is magnetized, and the current of the power inductor rises and charges the flying capacitor.

5. In the hybrid buck-boost DC-DC converter with flying capacitor according to claim 3, in the second state, the first switch is off, the second and third switches are on, the voltage of the first switching node is the same as the voltage of the output node, the voltage of the second switching node is equal to the input voltage, the voltage of the first switching node is greater than the input voltage, the voltage difference across the power inductor is less than 0, the power inductor is demagnetized, the current of the power inductor decreases, and the flying capacitor discharges to transfer charge to the output capacitor.

6. The hybrid buck-boost DC-DC converter with a flying capacitor according to claim 2, wherein, In buck mode, the second switch is always off. The buck mode is divided into a third state and a fourth state based on the linkage state of the first, third and fourth switches.

7. In the hybrid buck-boost DC-DC converter with flying capacitor according to claim 6, in the third state, the first and third switches are turned on, the fourth switch is turned off, the voltage of the first switching node is equal to the output voltage, the voltage of the second switching node is 0, the voltage of the first switching node is less than the input voltage, the voltage difference across the power inductor is greater than 0, the power inductor is magnetized, the power inductor current rises, the flying capacitor discharges, and the charge flows to the output capacitor.

8. In the hybrid buck-boost DC-DC converter with flying capacitor according to claim 6, in the fourth state, the first and third switches are off, the fourth switch is on, the voltage of the first switching node is twice the output voltage, the voltage of the second switching node is equal to the output voltage, the voltage of the first switching node is greater than the input voltage, the voltage difference across the power inductor is less than 0, the power inductor is demagnetized, the power inductor current decreases, and the flying capacitor is charged.

9. The hybrid buck-boost DC-DC converter with flying capacitor according to any one of claims 2-8, wherein in boost mode, the power inductor current is equal to the load current; the first switch, the second switch, and the third switch are selected with a maximum withstand voltage of the input voltage, and the fourth switch is selected with a maximum withstand voltage of the output voltage.

10. The hybrid buck-boost DC-DC converter with flying capacitor according to any one of claims 2-8, wherein in buck mode, the power inductor current is less than the load current, the first switch, the third switch, and the fourth switch are selected as switches with a maximum withstand voltage of the output voltage, and the second switch is selected as a switch with a maximum withstand voltage of the input voltage.

Citation Information

Patent Citations

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