Buck circuit and energy storage terminal

Abstract

This invention discloses a BUCK circuit and an energy storage terminal. The BUCK circuit includes a first voltage source, a half-bridge switching unit, and an inductor unit. The half-bridge switching unit includes a first switching unit and a second switching unit. One end of the first switching unit is connected to the first voltage source, and the other end is connected to the first end of the inductor unit. One end of the second switching unit is grounded, and the other end is connected to the first end of the inductor unit. The second end of the inductor unit is connected to the load. The BUCK circuit is configured such that: in a first stage, the first switching unit is off, and the second switching unit is on, resulting in a voltage of 0 at the first end; in a second stage, the first switching unit is on, and the second switching unit is off, allowing the first voltage source to supply power to the load sequentially through the first switching unit and the inductor unit. The inductor unit is used to reduce and stabilize the voltage supplied by the first voltage source to the load. This invention can reduce circuit manufacturing costs while facilitating changes in the load duty cycle.

Description

Technical Field

[0001] This invention relates to the field of drive circuit technology, and in particular to a BUCK circuit and an energy storage terminal. Background Technology

[0002] To improve the safe service life of a load and even maximize its efficiency, the common approach is to "change the load's duty cycle to limit its average output power".

[0003] Currently, the methods for changing the load duty cycle are either to directly output a variable voltage by setting an additional pre-drive chip, or, as disclosed in Chinese invention patent CN114730658A, to set an additional PWM generator and cooperate with multiple inductors.

[0004] However, whether it is setting up a pre-driver chip or setting up a PWM generator and using multiple inductors, the manufacturing cost of this method for changing the load duty cycle is relatively high. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a BUCK circuit and an energy storage terminal, which can reduce circuit manufacturing costs while allowing for easy changes in load duty cycle.

[0006] To address the aforementioned problems, in a first aspect, embodiments of the present invention provide a BUCK circuit, comprising: a first voltage source, a half-bridge switching unit, and an inductor unit, wherein the half-bridge switching unit includes a first switching unit and a second switching unit;

[0007] One end of the first switching unit is connected to the first voltage source, and the other end is connected to the first end of the inductor unit; one end of the second switching unit is grounded, and the other end is connected to the first end of the inductor unit; the second end of the inductor unit is connected to the load.

[0008] The BUCK circuit is configured such that: in a first stage, the first switching unit is off and the second switching unit is on, resulting in a voltage of 0 at the first terminal; in a second stage, the first switching unit is on and the second switching unit is off, and the first voltage source supplies power to the load sequentially through the first switching unit and the inductor unit, wherein the inductor unit is used to reduce and stabilize the voltage supplied by the first voltage source to the load.

[0009] Furthermore, in the BUCK circuit, the first switching unit includes a first MOSFET (Q1), the second switching unit includes a second MOSFET (Q2); the half-bridge switching unit also includes a bootstrap unit and a third switching unit;

[0010] The gate of the first MOSFET (Q1) is configured to be controlled by the MCU of the energy storage terminal, the source is connected to the first terminal of the inductor unit, and the drain is connected to the first voltage source; the gate of the second MOSFET (Q2) is configured to be controlled by the MCU, the source is grounded, and the drain is connected to the first terminal of the inductor unit.

[0011] The third switching unit is connected to the gate of the first MOS transistor (Q1) and is used to connect to the MCU, while also being connected to the second voltage source; one end of the bootstrap unit is connected to the first end of the inductor unit, and the other end is connected to the third switching unit and connected to the second voltage source; the bootstrap unit is used to turn on the first MOS transistor (Q1) after the third switching unit is turned on.

[0012] Furthermore, in the BUCK circuit, the bootstrap unit includes a bootstrap capacitor (C2);

[0013] One end of the bootstrap capacitor (C2) is connected to the first end of the inductor unit, and the other end is connected to the third switching unit and connected to the second voltage source.

[0014] Furthermore, in the BUCK circuit, the third switching unit includes a first transistor (Q8) and a second transistor (Q3);

[0015] The base of the first transistor (Q8) is connected to the MCU, the collector is connected to the base of the second transistor (Q3) and connected to the second voltage source, and the emitter is grounded; the base and collector of the second transistor (Q3) are connected to the bootstrap unit and connected to the second voltage source, and the emitter is connected to the gate of the first MOS transistor (Q1).

[0016] Furthermore, in the BUCK circuit, the half-bridge switching unit further includes a first turn-off discharge unit and a fourth switching unit.

[0017] The first turn-off discharge unit is connected to the collector of the first transistor (Q8), the emitter of the second transistor (Q3), and the gate of the first MOSFET (Q1), and is connected to the second voltage source. The first turn-off discharge unit is used to turn off and discharge the first MOSFET (Q1) during the turn-off process. The fourth switch unit is connected to the MCU and the second switch unit respectively, and is connected to the third voltage source to realize the switching of the second switch unit.

[0018] Furthermore, in the BUCK circuit, the first shutdown discharge unit includes a first resistor (R3), a second resistor (R4), a third transistor (Q4), and a fourth transistor (Q5); the fourth switching unit includes a fifth transistor (Q6) and a second shutdown discharge unit.

[0019] In this configuration, the base of the third transistor (Q4) is connected to the second voltage source, the emitter is connected to the gate of the first MOSFET (Q1) through the first resistor (R3), and the collector is connected to the source of the first MOSFET (Q1); the base of the fourth transistor (Q5) is connected to the gate of the first MOSFET (Q1), the emitter is connected to the gate of the first MOSFET (Q1) through the second resistor (R4), and the collector is connected to the source of the first MOSFET (Q1).

[0020] The base of the fifth transistor (Q6) is connected to the second shutdown discharge unit and connected to the third voltage source; the collector of the fifth transistor (Q6) is connected to the second shutdown discharge unit and the gate of the second MOS transistor (Q2) respectively; the emitter of the fifth transistor (Q6) is connected to the third voltage source; the second shutdown discharge unit is connected to the MCU and the gate of the second MOS transistor (Q2) respectively, and is grounded; the second shutdown discharge unit is used to shut down and discharge the second MOS transistor (Q2) during the process of turning off the second MOS transistor (Q2).

[0021] Furthermore, in the BUCK circuit, the second shutdown discharge unit includes a third resistor (R8), a fourth resistor (R9), a sixth transistor (Q7), and a seventh transistor (Q9);

[0022] The base of the sixth transistor (Q7) is connected to the gate of the second MOSFET (Q2) and to the collector of the fifth transistor (Q6) through the third resistor (R8); the emitter of the sixth transistor (Q7) is connected to the gate of the second MOSFET (Q2) through the fourth resistor (R9); the collector of the sixth transistor (Q7) is grounded; the base of the seventh transistor (Q9) is connected to the MCU; the collector of the seventh transistor (Q9) is connected to the base of the fifth transistor (Q6) and connected to the third voltage source; the emitter of the seventh transistor (Q9) is grounded.

[0023] Furthermore, in the BUCK circuit, the circuit also includes a sampling unit, which is connected to the MCU of the energy storage terminal, the inductor unit and the load respectively. The sampling unit is used to sample the current signal and / or voltage signal of the load.

[0024] Furthermore, in the BUCK circuit, the sampling unit includes a voltage sampling unit; the voltage sampling unit is connected to the MCU, the inductor unit, and the load. The voltage sampling unit inputs the voltage signal between the inductor unit and the load to the MCU, and the MCU outputs a drive signal to control the on / off state of the first switching unit and the second switching unit to ensure that the voltage at the load is in a stable state.

[0025] And / or,

[0026] The sampling unit further includes a current sampling unit, which is connected to the MCU of the energy storage terminal and the load respectively. The current sampling unit inputs the current signal at the load to the MCU and outputs a drive signal through the MCU to control the on / off state of the first switching unit and the second switching unit.

[0027] Furthermore, in the BUCK circuit, when the sampling unit is equipped with the voltage sampling unit, the voltage sampling unit includes a fifth resistor (R12) and a sixth resistor (R13); wherein, one end of the fifth resistor (R12) is connected to the inductor unit and the load respectively; the other end of the fifth resistor (R12) is connected to the MCU and grounded through the sixth resistor (R13);

[0028] When the sampling unit is equipped with a current sampling unit, the current sampling unit includes a seventh resistor (R1) and a comparator (U1); wherein, one end of the seventh resistor (R1) is connected to the load and the positive input terminal of the comparator (U1) respectively, and the other end is grounded; the inverting input terminal of the comparator (U1) is grounded, and the output terminal is connected to the MCU.

[0029] Secondly, embodiments of the present invention also provide an energy storage terminal, the energy storage terminal including an MCU, an LDO circuit and the BUCK circuit described in the first aspect; wherein, the LDO circuit includes an input terminal and an output terminal; the input terminal is used to connect to the first voltage source, and the output terminal is used to form the second voltage source; or, the input terminal is used to connect to a power supply, and the output terminal is two, and is respectively used to form the first voltage source and the second voltage source.

[0030] The BUCK circuit and energy storage terminal provided in this invention allow the load to be configured to gradually decrease the applied voltage in the first stage and then be configured to be connected to the rated voltage in the second stage, thereby facilitating control of the load's duty cycle. Furthermore, the load's duty cycle can be adjusted by controlling the ratio between the time of the first stage and the time of the second stage. This ratio can be achieved by adjusting the ratio between the time of "first switch unit 201 off, second switch unit 202 on" and the time of "first switch unit 201 on, second switch unit 202 off". In this way, unlike existing technologies that require pre-driver chips or PWM generators with multiple inductors, the load's duty cycle can be changed using only a single inductor unit and a simple switching unit provided in this application. This facilitates easy adjustment of the load's duty cycle while reducing circuit manufacturing costs. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 A simplified schematic diagram of an embodiment of the BUCK circuit provided in this invention;

[0033] Figure 2 A schematic diagram of an embodiment of the BUCK circuit provided in this invention;

[0034] Figure 3 This is a current flow diagram of the second switching unit in the BUCK circuit provided in an embodiment of the present invention after it is turned on;

[0035] Figure 4 This is a current flow diagram of the first switching unit in the BUCK circuit provided in an embodiment of the present invention after it is turned on;

[0036] Figure 5 A schematic diagram of an embodiment of the MCU of the energy storage terminal provided in this invention;

[0037] Figure 6 This is a schematic diagram of an embodiment of the LDO circuit of the energy storage terminal provided in this invention. Detailed Implementation

[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0040] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0041] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0042] Please see Figure 1 , Figure 1 This is a simplified schematic diagram of an embodiment of the BUCK circuit provided by the present invention. Figure 1 As shown, a BUCK circuit includes:

[0043] The system includes a first voltage source 10, a half-bridge switching unit 20, and an inductor unit, wherein the half-bridge switching unit 20 includes a first switching unit 201 and a second switching unit 202.

[0044] One end of the first switching unit 201 is connected to the first voltage source 10, and the other end is connected to the first end of the inductor unit 30; one end of the second switching unit 202 is grounded, and the other end is connected to the first end of the inductor unit 30; the second end of the inductor unit 30 is connected to the load 40.

[0045] The BUCK circuit is configured such that: in the first stage, the first switching unit 201 is turned off and the second switching unit 202 is turned on, so that the voltage at the first terminal is 0; in the second stage, the first switching unit 201 is turned on and the second switching unit 202 is turned off, and the first voltage source 10 supplies power to the load 40 through the first switching unit 201 and the inductor unit 30 in sequence, wherein the inductor unit 30 is used to reduce and stabilize the voltage supplied by the first voltage source 10 to the load 40.

[0046] In this embodiment, the half-bridge switching unit 20, composed of the first switching unit 201 and the second switching unit 202, is electrically connected to one or more pins of the MCU of the energy storage terminal. The drive signal output by the MCU can be high or low level to control the switching on and off of the first switching unit 201 and the second switching unit 202. The drive signals output by the MCU to the first switching unit 201 and the second switching unit 202 may be the same or different.

[0047] Meanwhile, since the first voltage source 10 is used to supply power to the load 40, the voltage of the first voltage source 10 is usually higher than the rated voltage of the load 40. After the first switching unit 201 is turned on, the first voltage source 10 reduces the voltage through the inductor unit 30 and stabilizes the reduced voltage at the rated voltage of the load 40, so as to provide stable power to the load 40.

[0048] Specifically, the first switching unit 201 is used to stabilize the output of the first voltage source 10, and the second switching unit 202 can be used for freewheeling to prevent the current at the load 40 from changing suddenly after the second switching unit 202 is disconnected. The MCU of the energy storage terminal outputs drive signals to the first switching unit 201 and the second switching unit 202 respectively to control the on and off of the first switching unit 201 and the second switching unit 202, so as to control the circuit.

[0049] In some embodiments, the first stage is the initial stage of circuit implementation. The second switching unit 202 needs to be turned on first. This can be achieved by the MCU of the energy storage terminal outputting high-level drive signals to both the first switching unit 201 and the second switching unit 202, thereby turning off the first switching unit 201 and turning on the second switching unit 202. At this time, since one end of the second switching unit 202 is grounded and the other end is connected to the first end of the inductor unit 30, the voltage at the first end of the inductor unit 30 is 0V, which means the voltage at the common connection point of the first switching unit 201, the second switching unit 202, and the inductor unit 30 is 0V. Then, the drive signals output by the MCU to both the first switching unit 201 and the second switching unit 202 can be low-level, thereby turning on the first switching unit 201 and turning off the second switching unit 202. The inductor unit 30 converts the first voltage source 10 into the rated voltage of the load 40, thereby enabling the load 40 to operate in a normal state.

[0050] In this way, the load can be configured to gradually decrease the applied voltage in the first stage and be configured to be connected to the rated voltage in the second stage, thereby facilitating control of the load's duty cycle. Furthermore, the load's duty cycle can be adjusted by controlling the ratio between the times of the first and second stages. This ratio can be achieved by adjusting the ratio between the time of "first switch unit 201 off, second switch unit 202 on" and the time of "first switch unit 201 on, second switch unit 202 off". This eliminates the need for pre-driver chips or PWM generators with multiple inductors, as in existing technologies. Instead, the load's duty cycle can be changed using only a single inductor unit and a simple switching unit provided in this application, thereby facilitating easy adjustment of the load's duty cycle while reducing circuit manufacturing costs.

[0051] In some embodiments, the first stage can be the closed-loop control stage of the circuit. When the voltage or current at the load 40 is higher than the rated voltage or rated current of the load 40, the drive signals output by the MCU of the energy storage terminal to the first switch unit 201 and the second switch unit 202 can both be at a high level, causing the first switch unit 201 to turn off and the second switch unit 202 to turn on. At the same time, the inductor unit 30 provides freewheeling current to the load 40. When the voltage or current at the load 40 is lower than the rated voltage or rated current of the load 40, the drive signals output by the MCU to the first switch unit 201 and the second switch unit 202 can both be at a low level, causing the first switch unit 201 to turn on and the second switch unit 202 to turn off. At the same time, the inductor unit 30 stores energy, and the voltage at the second terminal of the inductor unit 30 will rise again until it rises to the rated voltage of the load 40. Then, the MCU can be used again to control the on and off of the first switch unit 201 and the second switch unit 202 to achieve stable control of the average output power of the load, thereby maximizing the benefits of the load.

[0052] It is understood that controlling the on / off state of the first switching unit 201 and the second switching unit 202 is not limited to the MCU of the energy storage terminal. Other processing devices can also be set in the BUCK circuit, and additional control circuits can also be set in the circuit. The specific choice can be made according to the actual application. This embodiment does not make specific limitations.

[0053] It is also understood that, in order to achieve miniaturization of the energy storage terminal where the BUCK circuit is located, this application preferably uses the MCU already provided in the energy storage terminal to control the on / off state of the first switching unit 201 and the second switching unit 202.

[0054] In some embodiments, the load 40 can be a motor M, and the inductor unit 30 can be an inductor L1. It should be noted that the motor M can be of different types, and the inductor L1 can be of different types. The specific selection can be made according to the actual application, and this embodiment does not impose any specific limitations.

[0055] In some embodiments, the rated voltage of the load 40 can be 15V, in which case the first voltage source 10 can be a 21V voltage source. It should be noted that the first voltage source 10 is not limited to a 21V voltage source, and the rated voltage of the load 40 is not limited to 15V. The specific voltage source can be selected according to the actual application, and this embodiment does not impose any specific limitations.

[0056] In some specific embodiments, such as Figure 2 As shown, the first switching unit 201 includes a first MOSFET Q1, and the second switching unit 202 includes a second MOSFET Q2. The gate of the first MOSFET Q1 can be configured to be controlled by the MCU of the energy storage terminal, the source is connected to the first terminal of the inductor unit 30, and the drain is connected to the first voltage source 10. The gate of the second MOSFET Q2 can be configured to be controlled by the MCU, the source is grounded, and the drain is connected to the first terminal of the inductor unit 30. Thus, when the first MOSFET Q1 is turned on, it can stably output the first voltage source 10; when the second MOSFET Q2 is turned off, it can be used as a freewheeling diode to prevent sudden changes in current at the load 40.

[0057] In one example, the first MOSFET Q1 can be a power switch, and the second MOSFET Q2 can be a freewheeling diode.

[0058] It is understood that the first MOSFET Q1 and the second MOSFET Q2 can be either N-channel or P-channel MOSFETs. The types of MOSFETs Q1 and Q2 can be selected according to the actual application, and no specific limitation is made in this embodiment.

[0059] In some embodiments, the half-bridge switching unit 20 may further include a third switching unit and a bootstrap unit, wherein the third switching unit is connected to the gate of the first MOS transistor Q1 and is used to connect to the MCU and connected to the second voltage source; one end of the bootstrap unit is connected to the first end of the inductor unit 30, and the other end is connected to the third switching unit and connected to the second voltage source; the bootstrap unit is used to enable the first MOS transistor Q1 to conduct after the third switching unit is turned on.

[0060] Specifically, when the third switching unit is off, one end of the bootstrap unit is connected to the source of the first MOSFET Q1 and is also grounded. The other end is connected to the second voltage source, thus forming a circuit for charging. When the third switching unit changes from off to on, the voltages across the bootstrap unit are the same. One end of the bootstrap unit is connected to the source of the first MOSFET Q1 but is not grounded. The gate of the first MOSFET Q1 is connected to the other end of the bootstrap unit through the third switching unit and connected to the second voltage source. At this time, one end of the bootstrap unit is not grounded, and the other end is connected to the second power supply, so a circuit cannot be formed. Since the voltage across the bootstrap unit cannot change abruptly, the voltage at one end of the bootstrap unit is superimposed on the gate of the first MOSFET Q1. This facilitates the voltage difference between the gate and source of the first MOSFET Q1, which meets the voltage difference required for the first MOSFET Q1 to conduct, thus facilitating the conduction of the first MOSFET Q1. The voltage value of the second voltage source can be set according to the required conduction voltage of the first MOSFET Q1; in one example, the second voltage source can be 12V.

[0061] It is understood that the main function of the bootstrap unit is to raise the voltage at the gate of the first MOS transistor Q1 so as to enable the first MOS transistor Q1 to conduct. Therefore, the bootstrap unit can be a bootstrap capacitor, bootstrap diode or other components, which can be selected according to the actual application. This embodiment does not make specific limitations.

[0062] In some specific embodiments, such as Figure 2 As shown, the bootstrap unit may include a bootstrap capacitor C2. One end of the bootstrap capacitor C2 is connected to the first terminal of the inductor L, and the other end is connected to the third switching unit and connected to the second voltage source. Specifically, when the third switching unit is off, one end of the bootstrap capacitor C2 is connected to the source of the first MOSFET Q1 and is also grounded. The other end is connected to the second voltage source, thus forming a loop. At this time, the bootstrap capacitor C2 can be charged. When the third switching unit changes from off to on, the voltage across the bootstrap capacitor C2 is the same. One end of the bootstrap capacitor C2 is connected to the source of the first MOSFET Q1 but is not grounded. The gate of the first MOSFET Q1 is connected to the other end of the bootstrap capacitor C2 through the third switching unit and connected to the second voltage source. At this time, the bootstrap capacitor C2 is not grounded and cannot form a loop. Since the voltage across the bootstrap unit cannot change abruptly, the bootstrap capacitor C2 can pull up the voltage at the gate of the first MOSFET Q1, thus turning on the first MOSFET Q1.

[0063] In some embodiments, the third switching unit includes a first transistor Q8 and a second transistor Q3; wherein, the base of the first transistor Q8 is connected to the MCU of the energy storage terminal, the collector is connected to the base of the second transistor Q3 and connected to the second voltage source, and the emitter is grounded; the base and collector of the second transistor Q3 are connected to the bootstrap unit and connected to the second voltage source, and the emitter is connected to the gate of the first MOS transistor Q1.

[0064] For example, when the MCU of the energy storage terminal outputs a high-level signal to the base of the first transistor Q8 through a pin, the first transistor Q8 is turned on because its emitter is grounded, the second transistor Q3 is not turned on, the gate of the first MOSFET Q1 is at a low level, and the first MOSFET Q1 is in the off state. The second voltage source can charge the bootstrap unit through the diode D1. When the MCU outputs a low-level signal to the base of the first transistor Q8 through a pin, the first transistor Q8 is not turned on. The voltage between the collector of the first transistor Q8 and the base of the second transistor Q3 is the voltage of the second voltage source plus the voltage at one end of the bootstrap unit, so that the second transistor Q3 is turned on. This allows the voltage difference between the gate and source of the first MOSFET Q1 to make the first MOSFET Q1 turn on, thereby enabling the first voltage source 10 to supply power to the load 40 through the inductor unit 30.

[0065] In some embodiments, the half-bridge switching unit 20 further includes a first turn-off discharge unit, which is connected to the collector of the first transistor Q8, the emitter of the second transistor Q3, and the gate of the first MOSFET Q1, and is connected to a second voltage source. Typically, the first switching unit 201 contains parasitic capacitance, causing a slow voltage drop at the first switching unit after it is turned off. If the first switching unit is turned on again before the parasitic capacitance is fully discharged, the losses in the first switching unit 201 will be significant. To reduce the losses in the first switching unit 201, a first turn-off discharge unit is provided in the half-bridge switching unit 20, thereby forming a circuit between the parasitic capacitance and the first turn-off discharge unit. This allows for rapid discharge of the parasitic capacitance of the first switching unit 201 during the turn-off process.

[0066] In one example, the first shutdown discharge unit can be connected to the collector of the first transistor Q8, the bootstrap unit, the first switching unit 201, the second switching unit 202, and the inductor unit 30.

[0067] In the specific implementation process, such as Figure 2As shown, the first turn-off discharge unit may include a first resistor R3, a second resistor R4, a third transistor Q4, and a fourth transistor Q5; wherein, the base of the third transistor Q4 is connected to the collector of the first transistor Q8 and the base of the second transistor Q3, and is connected to a second voltage source; the emitter of the third transistor Q4 is connected to one end of the bootstrap capacitor C2 through a resistor R2, and is connected to the base of the fourth transistor Q5 and the positive terminal of the diode D2 through the first resistor R3; the collector of the third transistor Q4 is connected to the other end of the bootstrap capacitor C2, the collector of the fourth transistor Q5, the source of the first MOSFET Q1, the drain of the second MOSFET Q2, and the inductor unit 30; the emitter of the fourth transistor Q5 is connected to the gate of the first MOSFET Q1 through the second resistor R4; the collector of the fourth transistor Q5 is connected to the source of the first MOSFET Q1, the drain of the second MOSFET Q2, and the inductor unit 30.

[0068] For example, taking "the first transistor Q8 and the second transistor Q3 as NPN transistors, and the third transistor Q4 and the fourth transistor Q5 as PNP transistors" as an example, when the MCU outputs a high-level signal to the base of the first transistor Q8 through a pin, the first transistor Q8 and the third transistor Q4 are turned on, the second transistor Q3 is not turned on, the gate of the first MOSFET Q1 is at a low level, and the first MOSFET Q1 is in the off state. The second voltage source can supply voltage to the bootstrap capacitor C2 through diode D1. Charging is performed; when the MCU outputs a low-level signal to the base of the first transistor Q8 through a pin, the first transistor Q8 is not turned on. The voltage between the collector of the first transistor Q8 and the base of the second transistor Q3 is the voltage of the second voltage source plus the voltage on the bootstrap capacitor C2, so that the first transistor Q3 is turned on and the third transistor Q4 is not turned on. The gate of the first MOSFET Q1 is at a high level, and the first MOSFET Q1 is in the on state, so that the first voltage source 10 provides stable power supply to the load 40 through the inductor unit 30. When it is necessary to reduce the voltage at inductor unit 20, the first MOSFET Q1 is turned off, the second MOSFET Q2 is turned on, the first transistor Q8 and the third transistor Q4 are turned on, the second transistor Q3 is not turned on, and the voltage at the positive terminal of diode D2 is grounded through the third transistor Q4 and the second MOSFET. At the same time, the base of the fourth transistor Q5 is at a low level, and the fourth transistor Q5 is turned on. Since there is a parasitic capacitance connected at the gate and source of the first MOSFET Q1, the voltage at the gate of the first MOSFET Q1, which is the negative terminal of diode D2, is grounded through the fourth transistor Q5 and the second MOSFET. The voltage at the gate of the first MOSFET Q1 can be quickly reduced to 0, ensuring rapid discharge of the upper transistor circuit.

[0069] In some embodiments, the half-bridge switching unit 20 may further include a fourth switching unit. The fourth switching unit is connected to the MCU of the energy storage terminal, the second switching unit 202, and a third voltage source to enable the second switching unit 202 to be turned on and off. Specifically, the drive signal output by the MCU controls the on / off state of the fourth switching unit. Since the fourth switching unit is connected to the gate of the second MOSFET Q2, the on / off state of the fourth switching unit determines whether the gate of the second MOSFET Q2 is connected to the third voltage source, and thus determines whether the second MOSFET Q2 is turned on. For example, when the MCU controls the fourth switching unit to be off through the drive signal, the third voltage source cannot be connected to the gate of the second MOSFET Q2, and the second MOSFET Q2 is not turned on. When the MCU controls the fourth switching unit to be on through the drive signal, the second voltage source can be connected to the gate of the second MOSFET Q2 through the fourth switching unit. Since the drain of the second MOSFET Q2 is grounded, a voltage difference is formed between the gate and source of the second MOSFET Q2, and the second MOSFET Q2 can be turned on.

[0070] It should be noted that the first voltage source 10, the second voltage source, and the third voltage source can be provided by the energy storage terminal, and both the second and third voltage sources can be 12V voltage sources. The second and third voltage sources can be selected according to actual applications. This embodiment does not impose specific limitations, as long as the second voltage source can enable the first switch unit 201 to conduct after the third switch unit is turned off, and the third voltage source can enable the second switch unit 202 to conduct after the fourth switch unit is turned on.

[0071] In some embodiments, the fourth switching unit may include a fifth transistor Q6 and a second turn-off discharge unit; wherein, the base of the fifth transistor Q6 is connected to the second turn-off discharge unit and connected to a third voltage source; the collector of the fifth transistor Q6 is connected to both the second turn-off discharge unit and the second switching unit 202; the emitter of the fifth transistor Q6 is connected to the third voltage source; the second turn-off discharge unit is connected to both the MCU and the second switching unit 202. Typically, the second switching unit 202 contains parasitic capacitance. To reduce losses during the turn-off process of the second switching unit 202, a second turn-off discharge unit is provided in the half-bridge switching unit 20 to achieve turn-off discharge of the second switching unit 202 during its turn-off process. The purpose of the second turn-off discharge unit is the same as that of the first turn-off discharge unit, and will not be elaborated upon further here.

[0072] For example, when the MCU outputs a drive signal through one or more pins to turn on the fifth transistor Q6, the gate of the second MOSFET Q2 is at a high level, and the second MOSFET Q2 is in the on state; when the MCU outputs a drive signal through one or more pins to turn off the fifth transistor Q6, the gate of the second MOSFET Q2 is at a low level, and the second MOSFET Q2 is in the off state. At this time, the parasitic capacitance in the second MOSFET Q2 can be quickly discharged through the second turn-off discharge unit to reduce the loss of the second MOSFET Q2.

[0073] In some specific embodiments, such as Figure 2 As shown, the second shutdown / discharge unit includes a third resistor R8, a fourth resistor R9, a sixth transistor Q7, and a seventh transistor Q9. The base of the sixth transistor Q7 is connected to the second switching unit 202 and is connected to the collector of the fifth transistor Q6 via the third resistor R8. The emitter of the sixth transistor Q7 is connected to the second switching unit 202 via the fourth resistor R9. The collector of the sixth transistor Q7 is grounded. The base of the seventh transistor Q9 is connected to the MCU. The collector of the seventh transistor Q9 is connected to the base of the fifth transistor Q6 and is connected to a third voltage source. The emitter of the seventh transistor Q9 is grounded.

[0074] For example, taking "the fifth transistor Q6 is a PNP transistor and the second MOSFET Q2 is an N-channel MOSFET" as an example, when the MCU outputs a high level to the base of the seventh transistor Q9 through one or more pins, both the fifth transistor Q6 and the seventh transistor Q9 are turned on, the gate of the second MOSFET Q2 is high, and the second MOSFET Q2 is in the turned-on state; when the MCU outputs a low level to the base of the seventh transistor Q9 through one or more pins, neither the fifth transistor Q6 nor the seventh transistor Q9 are turned on, and the sixth transistor Q7 is turned on. At this time, the gate of the second MOSFET Q2 is grounded through the sixth transistor Q7, which allows the voltage at the gate of the second MOSFET Q2 to drop rapidly to 0, ensuring rapid discharge of the lower transistor circuit.

[0075] In some embodiments, the BUCK circuit further includes a sampling unit, which is connected to the MCU, the inductor unit 30 and the load 40 respectively. The sampling unit is used to sample the current signal and / or voltage signal of the load 40.

[0076] Specifically, in the closed-loop control stage of the circuit, after the sampling unit inputs the current signal and / or voltage signal into the MCU through one or more pins of the MCU, it compares it with the internal reference voltage of the MCU to generate drive signals for turning on the first switch unit 201 and turning off the second switch unit 202. The voltage is then stepped down through the inductor unit 30 to ensure that the voltage at the load 40 is stable. If the voltage at the connection point between the inductor unit 30 and the load 40 exceeds the rated voltage of the load 40, the voltage signal collected by the sampling unit from the load 40 is input into the MCU through one or more pins of the MCU, and is again compared with the internal reference voltage of the MCU to generate drive signals for turning off the first switch unit 201. At this time, the inductor unit 30 releases electrical energy until the voltage at the load 40 is equal to the rated voltage of the load 40.

[0077] In some embodiments, the sampling unit includes a voltage sampling unit; the voltage sampling unit is connected to the MCU, the inductor unit 30 and the load 40. The voltage sampling unit inputs the voltage signal between the inductor unit 30 and the load 40 into the MCU and compares it with the reference voltage inside the MCU. The MCU outputs drive signals to control the on / off state of the first switching unit 201 and the second switching unit 202 to ensure that the voltage at the load 40 is in a stable state and that the load 40 is in a normal working state.

[0078] In such Figure 2 In the illustrated embodiment, the voltage sampling unit includes a fifth resistor R12 and a sixth resistor R13. One end of the fifth resistor R12 is connected to the inductor L1 and the motor M, and grounded through the capacitor C1 and the resistor R11. The other end is grounded through the sixth resistor R13. The fifth resistor R12 and the sixth resistor R13 are connected to one or more pins of the MCU. The fifth resistor R12 and the sixth resistor R13 form a voltage divider circuit. The voltage between the fifth resistor R12 and the sixth resistor R13 is input to the MCU and compared with a reference voltage inside the MCU. The MCU outputs a drive signal to control the switching on and off of the first switching unit 201 and the second switching unit 202, ensuring that the voltage at the load 40 is stable and that the load 40 is in normal operating condition.

[0079] In some embodiments, the sampling unit further includes a current sampling unit, which is connected to the MCU and the load 40 respectively. The current sampling unit inputs the current signal at the load 40 to the MCU and outputs a drive signal through the MCU to control the switching on and off of the first switching unit 201 and the second switching unit 202, so as to ensure that the current at the load 40 is in a stable state and that the load 40 is in a normal working state.

[0080] In some specific embodiments, such as Figure 2 As shown, the current sampling unit includes a seventh resistor R1 and a comparator U1. One end of the seventh resistor R1 is connected to the load 40 and the positive input terminal of the comparator U1, while the other end is grounded. The inverting input terminal of the comparator U1 is grounded, and its output terminal is connected to the MCU. The seventh resistor R1 is the current sampling resistor at the load 40. The current across the seventh resistor R1 is input as voltage to the positive and inverting input terminals of the comparator U1 via resistors R15 and R16, respectively. The differential current signal is then input to the MCU via the output terminal of the comparator U1. The MCU outputs drive signals to control the switching on and off of the first switching unit 201 and the second switching unit 202, ensuring that the current at the load 40 is stable and that the load 40 is in normal operating condition.

[0081] exist Figure 2 In the illustrated embodiment, one end of the seventh resistor R1 is connected to the positive input terminal of comparator U1 through resistor R15, and the other end is grounded; the positive input terminal of comparator U1 is grounded through resistor R17, and the inverting input terminal is grounded through resistor R16. At the same time, a resistor R18 and a capacitor C4 are connected in parallel between the inverting input terminal and the output terminal. The VSS terminal is grounded, the VCC terminal is connected to a fourth voltage source (such as a 5V voltage source) and grounded through capacitor C5, the inverting terminal is connected to one or more pins of the MCU through resistor R19 and grounded through capacitor C6, and a capacitor C3 is connected between the positive input terminal and the inverting input terminal.

[0082] It is understood that the sampling unit can have both current sampling unit and voltage sampling unit at the same time, or it can have only one of the sampling units. The specific selection can be made according to the actual application, and this embodiment does not make specific limitations.

[0083] In this embodiment, the load 40 can be a motor M. In order to ensure that the electrodes work in a normal state, improve the working performance of the motor M, and reduce the noise of the motor M, it is preferable that a current sampling unit and a voltage sampling unit exist simultaneously in the circuit.

[0084] In a more specific embodiment, to ensure that the BUCK circuit can achieve closed-loop control of voltage and current, the second MOSFET Q1 needs to be turned on first in the initial stage of achieving closed-loop control, i.e., the first stage. For example... Figure 2 and Figure 3As shown, in the first stage, the MCU outputs a high level at the base of the first transistor Q8 and the seventh transistor Q9, turning on both transistors Q8 and Q9. After the base of the fifth transistor Q6 is pulled low to ground, Q6 turns on, and the gate of the second MOSFET Q2 is high, putting Q2 in a normal conducting state. Since the emitter of the first transistor Q8 is grounded, the second transistor Q3 is off, and the third transistor Q4 turns on. The first MOSFET Q1 does not turn on. Because the first MOSFET Q1 does not turn on, the potential between the source of the first MOSFET Q1 and the drain of the second MOSFET Q2 is 0V. At this time, the second voltage source charges the bootstrap capacitor C2. Then, the MCU outputs a low level at the base of the seventh transistor Q9, turning off both transistors Q6 and Q9. MOSFET Q2 is in a turned-off state. Since one end of the bootstrap capacitor C2 is connected to the second voltage source... The first MOSFET Q1 is connected to the source of the first MOSFET Q1 and the drain of the second MOSFET Q2. Therefore, the potential between the source of the first MOSFET Q1 and the drain of the second MOSFET Q2 gradually increases, ending when the bootstrap capacitor C2 is fully charged. Then, a level shift is needed at the base of the first MOSFET Q8. The MCU outputs a low level at the base of the first MOSFET Q8, turning off the third MOSFET Q4. The voltage between the bases of the second MOSFET Q3 and the third MOSFET Q4 is the voltage from the second voltage source plus the voltage across the bootstrap capacitor C2, turning on the second MOSFET Q3. The voltage at the gate of the first MOSFET Q1 is the voltage from the second voltage source plus the voltage across the bootstrap capacitor C2, thus making the voltage at the gate of the first MOSFET Q1 higher than the voltage at its source, allowing the first MOSFET Q1 to conduct smoothly. At this time, the first MOSFET Q1 acts as a power switch, and the second MOSFET Q2 acts as a freewheeling diode. Figure 4 As shown, the first voltage source 10 charges the inductor L through the first MOSFET Q1. At the same time, the inductor L1 acts as a step-down inductor to form a BUCK power circuit. At this time, the current at the motor M is fed back to the MCU through the comparator U1, and the output voltage at the motor M is also fed back to the MCU. By comparing it with the reference voltage inside the MCU, the MCU outputs corresponding high and low levels at the bases of the first transistor Q8 and the seventh transistor Q9 respectively to control the on and off of the first MOSFET Q1 and the second MOSFET Q2, thereby adjusting the idle ratio of the first MOSFET Q1 and the second MOSFET Q2, so that the motor M outputs a precise rated voltage, realizing dual closed-loop control of voltage and current.

[0085] The BUCK circuit provided in this embodiment of the invention, after setting a half-bridge switching unit 20 in the BUCK circuit, in the first stage of the circuit, the first switching unit 201 is turned off and the second switching unit 202 is turned on, so that the voltage at the first terminal is 0; in the second stage of the circuit, the first switching unit 201 is turned on and the second switching unit 202 is turned off, and the first voltage source can supply power to the load 40 through the first switching unit 201 and the inductor unit 30 in sequence, thereby realizing stable control of the power of the load 40.

[0086] In some embodiments, the present invention also provides an energy storage terminal, which includes an MCU, an LDO circuit, and the BUCK circuit described in the above embodiments.

[0087] The LDO circuit includes an input terminal and an output terminal. The input terminal of the LDO circuit is used to connect to a first voltage source 10, and the output terminal is used to form a second voltage source; or, the input terminal of the LDO circuit is used to connect to a power supply, and the output terminal has two terminals, which are used to form a first voltage source and a second voltage source respectively.

[0088] The MCU is located in the energy storage terminal. The MCU can be a microcontroller, such as... Figure 5 As shown, the MCU's VDD pin is connected to a 5V voltage, the GND pin is grounded, the POO / ANNO pin outputs the DSDA signal, the PO1 / AN1 pin outputs the DSCL signal, the RESRBT / P32 pin outputs the REST signal, the P12 / AN9 pin receives the V-Motor signal output from the voltage sampling unit, the P13 / AN10 pin receives the I-Motor signal output from the current sampling unit, the P11 / AN8 pin outputs the PWM2 signal to the base of the seventh transistor Q9, and the P10 / AN7 pin outputs the PWM1 signal to the base of the first transistor Q8.

[0089] exist Figure 6 In the illustrated embodiment, the LDO circuit can also provide a third voltage source and a fourth voltage source, the fourth voltage source being a 5V voltage source to power the MCU. The LDO circuit includes a voltage regulator U2 and a three-terminal voltage regulator integrated circuit U3. The voltage regulator U2 can be an HT75CO, and the three-terminal voltage regulator integrated circuit U3 can be an LM7805.

[0090] Specifically, the Vin pin of voltage regulator U2 inputs a 21V voltage source and is grounded through capacitor C7, while the Vout pin outputs a 12V voltage source and is connected to the Vin pin of the three-terminal voltage regulator IC U3, which is also grounded through capacitor C8. The GND pin of voltage regulator U2 is grounded. The Vout pin of the three-terminal voltage regulator IC U3 outputs a 5V voltage source and is grounded through capacitor C9. The GND pin of the three-terminal voltage regulator IC U3 is grounded.

[0091] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A BUCK circuit, characterized in that, include: The system comprises a first voltage source, a half-bridge switching unit, and an inductor unit, wherein the half-bridge switching unit includes a first switching unit, a second switching unit, a third switching unit, and a bootstrap unit. The first switching unit includes a first MOSFET (Q1), the gate of the first MOSFET (Q1) is configured to be controlled by the MCU of the energy storage terminal, the source is connected to the first terminal of the inductor unit, and the drain is connected to the first voltage source; The second switching unit includes a second MOSFET (Q2), the gate of which is configured to be controlled by the MCU, the source of which is grounded, and the drain of which is connected to the first terminal of the inductor unit; the second terminal of the inductor unit is used to connect to the load. The third switching unit includes a first transistor (Q8) and a second transistor (Q3); the base of the first transistor (Q8) is connected to the MCU, the collector is connected to the base of the second transistor (Q3) and connected to a second voltage source, and the emitter is grounded; the base and collector of the second transistor (Q3) are connected to the bootstrap unit and connected to the second voltage source, and the emitter is connected to the gate of the first MOS transistor (Q1); One end of the bootstrap unit is connected to the first end of the inductor unit, and the other end is connected to the third switch unit and connected to the second voltage source; the bootstrap unit is used to turn on the first MOS transistor (Q1) after the third switch unit is turned on. The BUCK circuit is configured such that: in a first stage, the first switching unit is off and the second switching unit is on, resulting in a voltage of 0 at the first terminal; in a second stage, the first switching unit is on and the second switching unit is off, and the first voltage source supplies power to the load sequentially through the first switching unit and the inductor unit, wherein the inductor unit is used to reduce and stabilize the voltage supplied by the first voltage source to the load.

2. The BUCK circuit according to claim 1, characterized in that, The bootstrap unit includes a bootstrap capacitor (C2); One end of the bootstrap capacitor (C2) is connected to the first end of the inductor unit, and the other end is connected to the third switching unit and connected to the second voltage source.

3. The BUCK circuit according to claim 1, characterized in that, The half-bridge switching unit also includes a first turn-off discharge unit and a fourth switching unit; The first turn-off discharge unit is connected to the collector of the first transistor (Q8), the emitter of the second transistor (Q3), and the gate of the first MOSFET (Q1), and is connected to the second voltage source. The first turn-off discharge unit is used to turn off and discharge the first MOSFET (Q1) during the turn-off process. The fourth switch unit is connected to the MCU and the second switch unit respectively, and is connected to the third voltage source to realize the switching of the second switch unit.

4. The BUCK circuit according to claim 3, characterized in that, The first shutdown discharge unit includes a first resistor (R3), a second resistor (R4), a third transistor (Q4), and a fourth transistor (Q5); the fourth switching unit includes a fifth transistor (Q6) and a second shutdown discharge unit; The base of the third transistor (Q4) is connected to the collector of the first transistor (Q8) and the base of the second transistor (Q3), and is connected to the second voltage source; the emitter of the third transistor (Q4) is connected to one end of the bootstrap capacitor (C2), and is connected to the base of the fourth transistor (Q5) and the positive terminal of the diode (D2) through the first resistor (R3); the collector of the third transistor (Q4) is connected to the other end of the bootstrap capacitor (C2), the collector of the fourth transistor (Q5), the source of the first MOSFET (Q1), the drain of the second MOSFET (Q2), and the inductor unit (30); the emitter of the fourth transistor (Q5) is connected to the gate of the first MOSFET (Q1) through the second resistor (R4); the collector of the fourth transistor (Q5) is connected to the source of the first MOSFET (Q1), the drain of the second MOSFET (Q2), and the inductor unit (30). The base of the fifth transistor (Q6) is connected to the second shutdown discharge unit and connected to the third voltage source; the collector of the fifth transistor (Q6) is connected to the second shutdown discharge unit and the gate of the second MOS transistor (Q2) respectively; the emitter of the fifth transistor (Q6) is connected to the third voltage source; the second shutdown discharge unit is connected to the MCU and the gate of the second MOS transistor (Q2) respectively, and is grounded; the second shutdown discharge unit is used to shut down and discharge the second MOS transistor (Q2) during the process of turning off the second MOS transistor (Q2).

5. The BUCK circuit according to claim 4, characterized in that, The second shutdown discharge unit includes a third resistor (R8), a fourth resistor (R9), a sixth transistor (Q7), and a seventh transistor (Q9); The base of the sixth transistor (Q7) is connected to the gate of the second MOSFET (Q2) and to the collector of the fifth transistor (Q6) through the third resistor (R8); the emitter of the sixth transistor (Q7) is connected to the gate of the second MOSFET (Q2) through the fourth resistor (R9); the collector of the sixth transistor (Q7) is grounded; the base of the seventh transistor (Q9) is connected to the MCU; the collector of the seventh transistor (Q9) is connected to the base of the fifth transistor (Q6) and connected to the third voltage source; the emitter of the seventh transistor (Q9) is grounded.

6. The BUCK circuit according to claim 1, characterized in that, The circuit also includes a sampling unit, which is connected to the MCU of the energy storage terminal, the inductor unit and the load respectively. The sampling unit is used to sample the current signal and / or voltage signal of the load.

7. The BUCK circuit according to claim 6, characterized in that, The sampling unit includes a voltage sampling unit; the voltage sampling unit is connected to the MCU, the inductor unit and the load, the voltage sampling unit inputs the voltage signal between the inductor unit and the load to the MCU, and the MCU outputs a drive signal to control the on and off of the first switch unit and the second switch unit to ensure that the voltage at the load is in a stable state; And / or, The sampling unit further includes a current sampling unit, which is connected to the MCU of the energy storage terminal and the load respectively. The current sampling unit inputs the current signal at the load to the MCU and outputs a drive signal through the MCU to control the on / off state of the first switching unit and the second switching unit.

8. The BUCK circuit according to claim 7, characterized in that, When the sampling unit is equipped with the voltage sampling unit, the voltage sampling unit includes a fifth resistor (R12) and a sixth resistor (R13); wherein, one end of the fifth resistor (R12) is connected to the inductor unit and the load respectively; the other end of the fifth resistor (R12) is connected to the MCU and grounded through the sixth resistor (R13); When the sampling unit is equipped with a current sampling unit, the current sampling unit includes a seventh resistor (R1) and a comparator (U1); wherein, one end of the seventh resistor (R1) is connected to the load and the positive input terminal of the comparator (U1) respectively, and the other end is grounded; the inverting input terminal of the comparator (U1) is grounded, and the output terminal is connected to the MCU.

9. An energy storage terminal, characterized in that, The energy storage terminal includes an MCU, an LDO circuit, and a BUCK circuit as described in any one of claims 1 to 2; The LDO circuit includes an input terminal and an output terminal; The input terminal is used to connect to the first voltage source, and the output terminal is used to form the second voltage source; or, the input terminal is used to connect to a power supply, and the output terminal is two, which are respectively used to form the first voltage source and the second voltage source.

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