A method for setting the synchronous system constant value of an idling grid-connected phase regulator

Abstract

The present invention relates to a method for setting a synchronous system constant value of an idling grid-connected phase regulator, comprising the following steps: Step S1: obtaining a phase regulator frequency variation curve under an idling condition; Step S2: selecting the phase regulator rated frequency ±Δ f Partial linearization is performed to measure the frequency change rate of the phase regulator; step S3: considering that the phase regulator voltage rotates at least 360 degrees relative to the grid voltage after the frequency difference constant is satisfied, a calculation model for the minimum frequency difference setting value is obtained in combination with the measured frequency change rate; step S4: using the measured synchronous closing lead time, considering the synchronous grid connection condition under the maximum frequency difference, a calculation model for the phase angle difference setting value of the synchronous check relay is obtained in combination with the measured frequency change rate; step S5: based on the minimum frequency difference obtained by the minimum frequency difference setting value calculation model and the relay phase angle difference obtained by the synchronous check relay phase angle difference setting value calculation model, the synchronous parallel connection of the phase regulator and the grid is achieved. The present invention effectively reduces the impact of grid connection and meets the requirement of 100% grid connection probability.

Description

Technical Field

[0001] The invention belongs to the field of automatic control of electric power systems, and in particular relates to a method for setting a synchronous system constant value of an idling grid-connected phase regulator. Background Art

[0002] Phase regulators typically achieve differential frequency grid connection by using a synchronization system to capture an appropriate synchronization point during the idling process. Specifically, the phase regulator is first dragged to a speed slightly higher than the rated speed (e.g., 3150 rpm) using the SFC before idling begins. The excitation system is then switched to the main excitation mode, and self-shunt excitation is used to start the phase regulator to establish the rated voltage. Finally, the synchronization system achieves grid connection by capturing a synchronization point near the rated frequency. During idling, the phase regulator speed cannot be controlled and decreases at a constant rate, so the phase regulator can only be connected to the grid using differential frequency. Setting the frequency differential constant too high can significantly impact grid connection, while a smaller frequency differential setting may prevent the phase regulator from achieving a synchronous grid connection point. Therefore, it is necessary to develop appropriate synchronization system parameter tuning methods that balance minimizing grid connection impact and meeting the requirement of 100% grid connection probability. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a method for adjusting the constant values of the synchronous system of an idling grid-connected phase regulator, so as to solve the problem that the parameters of the synchronous system of the phase regulator are difficult to adjust.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] A method for setting a synchronous system constant value of an idling grid-connected phase regulator comprises the following steps:

[0006] Step S1: obtaining a phase-shifting frequency variation curve under the starting and idling conditions;

[0007] Step S2: Select the ±Δf portion of the phase regulator rated frequency for linearization processing to measure the frequency change rate of the phase regulator;

[0008] Step S3: Considering that the frequency difference setting value satisfies the angle that the voltage of the rear-stage phase regulator rotates at least 360 degrees relative to the grid voltage, a calculation model for the minimum frequency difference setting value is obtained in combination with the measured frequency change rate;

[0009] Step S4: using the measured synchronous closing lead time, considering the synchronous grid-connected working condition under the maximum frequency difference, and combining the measured frequency change rate to obtain the synchronous check relay phase angle difference setting value calculation model;

[0010] Step S5: Based on the minimum frequency difference obtained by the minimum frequency difference setting value calculation model and the relay phase angle difference obtained by the synchronization check relay phase angle difference setting value calculation model, the synchronous paralleling of the phase regulator and the power grid is achieved.

[0011] Furthermore, the step S1 is specifically as follows: during the idling process of the phase modulator, the main excitation is started and the rated voltage is established, the phase modulator frequency is obtained by collecting the voltage, and the phase modulator frequency change curve is recorded by using an oscilloscope.

[0012] Furthermore, the Δf is the frequency change interval setting value, and the set Δf should be greater than the frequency difference setting value, then the frequency change rate α is

[0013]

[0014] Furthermore, the step S3 is specifically as follows:

[0015] Assume the grid voltage is Frequency is f n ; The voltage after phase shifter compensation is Frequency is f g ,by is the reference phasor, will be relatively Rotate; when Frequency greater than Frequency, Counterclockwise rotation; when Frequency is less than Frequency, Clockwise rotation; During the idling process of the phase regulator, and There are multiple moments with the same phase; let the moment when the frequency difference meets the condition The initial phase is Taking this moment as the starting point, after time t The frequency is expressed as

[0016] f g =f n +Δf set -αt (2)

[0018] Where α is the frequency change rate of the phase modulator;

[0019] then, Relative to The counterclockwise rotation angle is expressed as

[0020]

[0021] make get Maximum The time of appearance t m ,Right now

[0022] Δf set -αt m =0 (4)

[0023] t m Always adjust the camera frequency to be equal to the system frequency, then Will rotate clockwise, The angle will decrease; Substituting (4) into (3) we get

[0024]

[0025] like A full rotation, regardless of How big, Both exist and At the same phase moment, there are

[0026]

[0027] Combining equations (5) and (6), we can get the small frequency difference setting value Δf set The calculation formula is:

[0028]

[0029] Furthermore, the step S4 is specifically as follows:

[0030] The closing command is issued when the remaining lead time from the synchronization point is and When the time corresponding to the phase angle difference is less than the leading time, the quasi-synchronous device will not be able to issue a closing command. The leading time is expressed as

[0031] t pre =t op +t c (8)

[0032] Among them, t op It is the automatic quasi-synchronization device or the synchronization check TJJ relay action time, t c It is the time from the closing of the synchronous system closing contact to the closing of the circuit breaker main contact;

[0033] From formula (3), it is easy to see that In tt pre The value at the moment is

[0034]

[0035] From (3) and (9), the leading phase angle is:

[0036]

[0037] Set t=2t m Substituting into (10) and solving (4) we get

[0038]

[0039] Phase angle difference setting of TJJ relay Set to

[0040]

[0041] Wherein, Δt0 is the advance closing time of the TJJ relay relative to the automatic quasi-synchronization device.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] 1. The present invention adopts a method of analyzing voltage to obtain the phase shifter idling frequency change rate, which is simple to operate and the measurement data is accurate and reliable;

[0044] 2. The present invention can minimize the impact of frequency difference grid connection while meeting the requirement of 100% grid connection probability. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is the relative relationship diagram of the voltage phasor between the power grid and the phase regulator;

[0046] Figure 2 This is the waveform diagram of the idling operation of the phase regulator under the excitation starting condition;

[0047] Figure 3 This is the frequency change curve of the phase modulator;

[0048] Figure 4 This is the grid-connected waveform diagram of the phase regulator. DETAILED DESCRIPTION

[0049] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0050] Please refer to Figure 1 The present invention provides a method for setting the synchronous system constant value of an idling grid-connected phase regulator, comprising the following steps:

[0051] Step S1: during the phase modulator idling process, the main excitation is started and the rated voltage is established, the phase modulator frequency is obtained by collecting the voltage, and the phase modulator frequency change curve is recorded using an oscilloscope;

[0052] Step S2: Select the rated frequency ±Δf portion of the phase shifter frequency variation curve for linearization processing, measure the time Δt it takes for the frequency to drop from a +Δf deviation to a -Δf deviation, and then calculate the frequency change rate of the phase shifter;

[0053] Step S3: Considering that the frequency difference setting value satisfies the angle that the voltage of the rear-stage phase regulator rotates at least 360 degrees relative to the grid voltage, a calculation model for the minimum frequency difference setting value is obtained in combination with the measured frequency change rate;

[0054] Step S4: using the measured synchronous closing lead time, considering the synchronous grid-connected working condition under the maximum frequency difference, and combining the measured frequency change rate to obtain the synchronous check relay phase angle difference setting value calculation model;

[0055] Step S5: Based on the minimum frequency difference obtained by the minimum frequency difference setting value calculation model and the relay phase angle difference obtained by the synchronization check relay phase angle difference setting value calculation model, the synchronous paralleling of the phase regulator and the power grid is achieved.

[0056] In this embodiment, Δf is the frequency change interval setting value. The set Δf should be greater than the frequency difference setting value. Then the frequency change rate α is

[0057]

[0058] In this embodiment, step S3 is specifically as follows:

[0059] Assume the grid voltage is Frequency is f n ; The voltage after phase shifter compensation is Frequency is f g .like Figure 1 As shown, is the reference phasor (phase angle is 0), will be relatively Rotate. Frequency greater than Frequency, Counterclockwise rotation; when Frequency is less than Frequency, Rotate clockwise. During the idling process of the condenser, and There are multiple same-phase moments. In order to reduce the grid connection impact caused by frequency difference, [Δf set , -Δf set ] The number of grid connection points that appear within the frequency difference range cannot exceed 2. Assume that the moment the frequency difference meets the condition The initial phase is Taking this moment as the starting point, after time t The frequency can be expressed as

[0060] f g =f n +Δf set -αt (2)

[0062] Where α is the frequency change rate of the phase modulator;

[0063] then, Relative to The counterclockwise rotation angle is expressed as

[0064]

[0065] make get Maximum The time of appearance t m ,Right now

[0066] Δf set -αt m =0 (4)

[0067] t m Always adjust the camera frequency to be equal to the system frequency, then Will rotate clockwise, The angle will decrease; Substituting (4) into (3) we get

[0068]

[0069] like A full rotation, regardless of How big, Both exist and At the same phase moment, there are

[0070]

[0071] Combining equations (5) and (6), we can get the small frequency difference setting value Δf set The calculation formula is:

[0072]

[0073] In this embodiment, step S4 is specifically as follows:

[0074] The closing command is issued when the remaining lead time from the synchronization point is and When the time corresponding to the phase angle difference is less than the leading time, the quasi-synchronous device will not be able to issue a closing command. The leading time is expressed as

[0075] t pre =t op +t c (8)

[0076] Among them, t op It is the automatic quasi-synchronization device or the synchronization check TJJ relay action time, t c It is the time from the closing of the synchronous system closing contact to the closing of the circuit breaker main contact;

[0077] From formula (3), it is easy to see that In tt pre The value at the moment is

[0078]

[0079] From (3) and (9), the leading phase angle is:

[0080]

[0081] Set t=2t m Substituting into (10) and solving (4) we get

[0082]

[0083] In the same lead time, the greater the frequency difference The larger the lead angle, the greater the will appear at a frequency difference of Δf set or -Δf set If is 0, then at t=0, the frequency difference is Δf set However, due to the lack of lead time, the synchronization point cannot be connected to the grid. From (4), we can see that at t m The power frequency synchronization point will appear at the moment; from (2), we can see that at 2t m The frequency difference will be -Δf at the moment set The same period point. Set t = 2t m Substituting into (10) and solving (4) we can get

[0084] Phase angle difference setting of TJJ relay Set to

[0085]

[0086] Wherein, Δt0 is the advance closing time of the TJJ relay relative to the automatic quasi-synchronization device.

[0087] In fact, if the frequency difference is Δf set When the closing pulse condition is met, the set lead time t pre Substituting (3) into (11) also yields the result, except that the frequency of the synchronous closing point is slightly less than Δf set .

[0088] Therefore, when When and The phase angle difference is When the closing command is issued, the frequency difference of the synchronization point is equal to or greater than 0. When, such as Figure 1 As shown in (b), The increase, and The closing command cannot be issued when the phases are aligned for the first time; When it is equal to 360°, Phase angle returns After the decrease The phase angle is reduced to A closing command is issued when the frequency difference at the synchronization point is less than 0.

[0089] In order to prevent the automatic quasi-synchronous device from mistakenly issuing a closing command, a synchronization check TJJ relay should be configured according to the countermeasure requirements to reconfirm the closing conditions. Usually, the automatic quasi-synchronous device can predict the time when the closing command is issued based on the set lead time, so that the phase angle difference at the closing time is close to 0. Therefore, the phase angle difference of the automatic quasi-synchronous device is The setting value does not affect the synchronization point capture in the idle running grid connection mode. In fact, the phase angle difference of the automatic quasi-synchronization device The set value is usually only used for power angle judgment in the same frequency mode.

[0090] The TJJ relay needs to determine the phase angle difference before closing the closing output contact. Considering the measurement and calculation error, the TJJ relay should usually operate slightly earlier than the automatic quasi-synchronization device. Therefore, the phase angle difference setting value of the TJJ relay is Can be set to

[0091]

[0092] Wherein, Δt0 is the advance closing time of the TJJ relay relative to the automatic quasi-synchronization device.

[0093] Preferably, the specific examples of this embodiment are as follows:

[0094] The condenser was dragged to 105% of the rated speed by SFC and then spun. The waveform recorded by the oscilloscope at a certain project site is as follows: Figure 2 As shown in the figure, the condenser frequency is obtained by collecting the terminal voltage. At t1 (2.57s), the condenser reaches 105% of the rated speed, the SFC is deactivated, and the start-up excitation begins inverter de-excitation. At t2 (5.30s), the excitation system switches from the start-up excitation mode to the main excitation mode, and excitation and voltage buildup begin. At t3 (13.96s), the terminal voltage of the condenser rises to the rated value. At t4 (28.60s), the condenser frequency drops to the rated frequency.

[0095] like Figure 3 As shown, Figure 2 Center camera frequency f gThe curve is linearized to obtain the frequency change rate. Selecting ±1% of the rated frequency as the change range (i.e., the frequency changes from 50.5Hz to 49.5Hz), Δf is 0.5Hz. The time difference Δt measured in this frequency range is 9.48s. Substituting the values of Δf and Δt into equation (1), the frequency change rate α is

[0096]

[0097] Substituting the measured frequency change rate α into equation (7) yields

[0098]

[0099] In order to reduce the impact of closing and connecting to the grid, the frequency difference constant Δf is taken set is 0.46Hz.

[0100] The measured synchronous closing lead time t pre =70ms, considering the closing time margin of 0.05s, the frequency difference is set to Δf set Substituting the frequency change rate α into formula (12), we can get the phase angle difference constant of the TJJ relay

[0101]

[0102] The waveform of a synchronous system connected to the grid using the above setting values is as follows: Figure 4 As shown, the voltage difference is the secondary side measurement value, the closing order and the switch position are the loop voltage signals, and the grid current is the primary side current. At t5 (0.69s), the synchronous system issues a closing order, and the frequency difference is -0.41Hz at this time; at t6 (0.76s), the grid switch is closed, and the frequency difference is -0.38Hz at this time; at t7 (0.83s), the grid current reaches a peak value of 1330A (the per-unit value is 0.48pu). It can be seen that the present invention can still reliably capture the synchronous closing point under the condition of a large frequency difference, and realize the synchronous paralleling of the phase regulator and the power grid with a smaller grid current.

[0103] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A method for setting the synchronous system constant value of an idling grid-connected phase regulator, characterized in that: The following steps are involved: Step S1: obtaining a phase-shifting frequency variation curve under the starting and idling conditions; Step S2: Select the ±Δf portion of the phase regulator rated frequency for linearization processing to measure the frequency change rate of the phase regulator; Step S3: Considering that the frequency difference setting value satisfies the angle that the voltage of the rear-stage phase regulator rotates at least 360 degrees relative to the grid voltage, a calculation model for the minimum frequency difference setting value is obtained in combination with the measured frequency change rate; Step S4: using the measured synchronous closing lead time, considering the synchronous grid-connected working condition under the maximum frequency difference, and combining the measured frequency change rate to obtain the synchronous check relay phase angle difference setting value calculation model; Step S5: Based on the minimum frequency difference obtained by the minimum frequency difference setting value calculation model and the relay phase angle difference obtained by the synchronization check relay phase angle difference setting value calculation model, the phase regulator is synchronized with the power grid; The Δf is the frequency change interval setting value. The set Δf should be greater than the frequency difference setting value. Then the frequency change rate α of the phase regulator is The step S3 is specifically as follows: Assume the grid voltage is Frequency is f n ; The voltage after phase shifter compensation is Frequency is f g ;by is the reference phasor, will be relatively Rotate; when Frequency greater than Frequency, Counterclockwise rotation; when Frequency is less than Frequency, Clockwise rotation; During the idling process of the phase regulator, and There are multiple moments with the same phase; let the moment when the frequency difference meets the condition The initial phase is Taking this moment as the starting point, after time t The frequency is expressed as f g =f n +Δf set -αt(2) then, Relative to The counterclockwise rotation angle is expressed as make get Maximum The time of appearance t m ,Right now Δf set -αt m =0(4) t m Always adjust the camera frequency to be equal to the system frequency, then Will rotate clockwise, The angle will decrease; Substituting (4) into (3) we get like A full rotation, regardless of How big, Both exist and At the same phase moment, there are Combining equations (5) and (6), we can get the small frequency difference setting value Δf set The calculation formula is: The step S4 is specifically as follows: Considering that the closing command is issued at the moment of the remaining lead time from the synchronization point, when and When the time corresponding to the phase angle difference is less than the leading time, the quasi-synchronous device will not be able to issue a closing command. The leading time is expressed as t pre =t op +t c (8) Among them, t op It is the automatic quasi-synchronization device or the synchronization check TJJ relay action time, t c It is the time from the closing of the synchronous system closing contact to the closing of the circuit breaker main contact; It is easy to see from formula (3) that In tt pre The value at the moment is From (3) and (9), the leading phase angle is: Set t=2t m Substituting into (10) and solving (4) we get Phase angle difference setting of TJJ relay Set to Wherein, Δt0 is the advance closing time of the TJJ relay relative to the automatic quasi-synchronization device.

2. The method for setting the synchronous system constant value of an idling grid-connected phase regulator according to claim 1 is characterized in that: The step S1 specifically includes: starting the main excitation and establishing the rated voltage during the phase modulator idling process, obtaining the phase modulator frequency by collecting the voltage, and recording the phase modulator frequency change curve by using an oscilloscope.

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