A method for realizing duty cycle adjustable half-bridge or full-bridge output zeroing overcoming the influence of parasitic capacitance

Abstract

This invention discloses a method for achieving zero-output operation of a duty cycle adjustable half-bridge or full-bridge circuit by overcoming the influence of parasitic capacitance. The method includes designing an input signal logic control circuit and an AC output short-circuit control circuit, and combining push-pull signals to control the parasitic parameter influence on output zero-output. The input signal logic control circuit is a half-bridge circuit topology. The AC output short-circuit control circuit includes an OR logic circuit, an isolation circuit, a pull-up resistor R6, and a bidirectional electronic switch circuit. The isolation circuit consists of an isolation resistor (R7) and an optocoupler U2. The bidirectional electronic switch circuit includes a third field-effect transistor Q3, a fourth field-effect transistor Q4, a first voltage divider resistor R1, and a second voltage divider resistor R2. This invention can overcome the influence of junction capacitance and load, achieving a controllable duty cycle output.

Description

Technical Field

[0001] This invention belongs to the field of electronic amplifier technology, specifically relating to a method for achieving zero output of a duty cycle adjustable half-bridge or full-bridge to overcome the influence of parasitic capacitance. Background Technology

[0002] Common transmitter topologies include transformer push-pull, half-bridge, or full-bridge. In some applications requiring variable amplitude output, the output amplitude cannot keep up with changes in the input duty cycle due to factors such as the parasitic capacitance between the power transistors and the load. This is especially true in high-frequency applications where the drive signal lacks carrier frequency modulation; when the transducer impedance is high, the output waveform cannot follow changes in the input signal's duty cycle. Summary of the Invention

[0003] The technical problem to be solved by this invention is to provide a method for achieving adjustable duty cycle RTZ of half-bridge or full-bridge outputs by overcoming the influence of parasitic capacitance. This invention achieves adjustable output duty cycle, with near-linear variation, by designing an output return-to-zero method.

[0004] The technical solution of this invention is to provide a method for achieving adjustable duty cycle half-bridge or full-bridge output RTZ to overcome the influence of parasitic capacitance. This method includes designing an input signal logic control circuit and an AC output short-circuit control circuit. Based on the design of these circuits, a push-pull signal is used to control the parasitic parameter influence on output zeroing.

[0005] The input signal logic control circuit is a half-bridge circuit topology, and the AC output short-circuit control circuit includes an OR logic circuit, an isolation circuit, a pull-up resistor R6, and a bidirectional electronic switch circuit; among which,

[0006] The isolation circuit consists of an isolation resistor (R7) and an optocoupler U2; the bidirectional electronic switch circuit includes a third field-effect transistor Q3, a fourth field-effect transistor Q4, a first voltage divider resistor R1, and a second voltage divider resistor R2. The first voltage divider resistor R1 is used to adjust the switching speed of the bidirectional electronic switch circuit, and the second voltage divider resistor R2 is used to control the input impedance of the third field-effect transistor Q3 and the fourth field-effect transistor Q4.

[0007] When a push-pull signal pair with an adjustable duty cycle is input, the push-pull signal pair is sent to the field-effect transistor driver U1 of the half-bridge circuit topology, and simultaneously to the OR logic circuit. The output signal of the OR logic circuit is sent to the isolation circuit, and the bidirectional electronic switch circuit is driven by the optocoupler U2 under the action of the pull-up resistor R6 (the pull-up resistor R6 constitutes the output pull-up).

[0008] Preferably, when the push-pull signal pair is low at the same time, or the logic circuit output signal is low, after passing through the isolation circuit, the isolation circuit output is pulled up to a high level. This level is then divided by the first voltage divider resistor R1 and the second voltage divider resistor R2, driving the bidirectional switch composed of the third field-effect transistor Q3 and the fourth field-effect transistor Q4, so that the bidirectional switch is in a bidirectional conduction state, thereby realizing the output short circuit and completing the discharge of charge.

[0009] As a preferred option, the optocoupler is the high-speed optocoupler 6N137.

[0010] Preferably, the half-bridge circuit topology of the input signal logic control circuit can be replaced with a full-bridge circuit topology. That is, this method is not limited to the application of half-bridge circuits; the input signal logic control circuit can be replaced with a full-bridge topology, using the same signal for diagonal driving, and the function can still be achieved through a designed AC output short-circuit control circuit.

[0011] Preferably, the pull-up resistor R6 and the optocoupler can be replaced with the positive logic device designed as optocoupler TLP250, and the output of the corresponding OR logic circuit is inverted.

[0012] Furthermore, the field-effect transistors in the half-bridge circuit topology include a first field-effect transistor Q1 and a second field-effect transistor Q2.

[0013] Compared with the prior art, the present invention has the following advantages after adopting the above solution:

[0014] This invention, through the design of an input signal logic control circuit and an AC output short-circuit control circuit, combined with push-pull signals, can achieve control over parasitic parameters that allow the output to return to zero, thereby overcoming the influence of junction capacitance and load, and achieving controllable duty cycle output. Attached Figure Description

[0015] Figure 1 This is a schematic diagram illustrating the implementation principle of an embodiment of the present invention;

[0016] Figure 2 This is a schematic diagram of the test load configuration according to an embodiment of the present invention;

[0017] Figure 3 This is a comparison chart of the test results of an embodiment of the present invention. Detailed Implementation

[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments:

[0019] This invention discloses a method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance, such as... Figure 1As shown, the design includes an input signal logic control circuit 1 and an AC output short-circuit control circuit 2. Based on the design of the input signal logic control circuit 1 and the AC output short-circuit control circuit 2, and combined with a push-pull signal, the parasitic parameter influence control of the output returning to zero is achieved. The input signal logic control circuit 1 is a half-bridge circuit topology. The field-effect transistor driver U1 is an integrated high-side and low-side driver. When using the field-effect transistor driver U1, the corresponding device can be selected according to the frequency characteristics. In this example, device 2EDL23N06PJ is selected. The first field-effect transistor Q1, the second field-effect transistor Q2, and capacitors C3 and C4 form a half-bridge, constituting a common half-bridge circuit structure. The AC output short-circuit control circuit 2 is a control part added to the input signal logic control circuit 1 to achieve the aforementioned function. This control part mainly consists of an OR logic circuit, an isolation circuit, and a bidirectional electronic switch circuit.

[0020] Specifically, the AC output short-circuit control circuit 2 includes an OR logic circuit, an isolation circuit, a pull-up resistor R6, and a bidirectional electronic switch circuit; among which,

[0021] The isolation circuit consists of an isolation resistor R7 and an optocoupler U2; the bidirectional electronic switch circuit includes a third field-effect transistor Q3, a fourth field-effect transistor Q4, a first voltage divider resistor R1, and a second voltage divider resistor R2. The first voltage divider resistor R1 is used to adjust the switching speed of the bidirectional electronic switch circuit, and the second voltage divider resistor R2 is used to control the input impedance of the third field-effect transistor Q3 and the fourth field-effect transistor Q4.

[0022] In this embodiment, optocoupler U2 uses a high-speed optocoupler 6N137.

[0023] When a push-pull signal pair with an adjustable duty cycle is input, the push-pull signal pair is sent to the field-effect transistor driver U1 of the half-bridge circuit topology, and simultaneously to the OR logic circuit. The output signal of the OR logic circuit is sent to the isolation circuit, and the bidirectional electronic switch circuit is driven by the optocoupler U2 under the action of the pull-up resistor R6 (the pull-up resistor R6 constitutes the output pull-up).

[0024] PWM_H and PWM_L are push-pull signal pairs with adjustable input duty cycles. When PWM_H and PWM_L are both low, or the logic circuit output is low, the isolation circuit outputs a pull-up high level VDD after passing through the isolation circuit. This level is then divided by the first voltage divider resistor R1 and the second voltage divider resistor R2, driving a bidirectional switch composed of the third field-effect transistor Q3 and the fourth field-effect transistor Q4. This causes the bidirectional switch to be in a bidirectional conduction state, thereby achieving an output short circuit and completing the discharge of charge.

[0025] The isolation circuit of the present invention is not limited to the above-mentioned devices. In applications requiring high driving capability, pull-up resistor R6 is not used. When using positive logic devices such as optocoupler TLP250 (input "ON" corresponds to output "ON"), or when the output of the logic circuit is inverted (through a non-logic circuit), the output of the logic circuit can be either inverted or not.

[0026] Furthermore, the present invention is not limited to the application of half-bridge circuits. That is, the input signal logic control circuit 1 can be replaced with a full-bridge topology, using the same signal for diagonal driving, and the above functions can still be achieved through the AC output short-circuit control circuit 2.

[0027] To verify its effectiveness, such as Figure 2 As shown, the load consists of an LC filter network and resistors, with RL=100kΩ, Ls=20mH, c=120pF, and the operating frequency is set to 100kHz. The MOSFET is an IRFP460, and the bus voltage is 400V.

[0028] like Figure 3 As shown in Figure 2, the output waveform of a push-pull signal pair with a 10% duty cycle without RTZ functionality is as shown in Figure 1. Figure 1 shows the output waveform after adding RTZ functionality. It can be seen that after adding RTZ functionality, the output duty cycle can be kept close to the input even under high impedance conditions. Table 1 shows the quantitative test results under this configuration.

[0029] Table 1:

[0030]

[0031] Conclusion: This method can achieve controllable duty cycle under high impedance conditions.

[0032] The above description only illustrates preferred embodiments of the present invention and should not be construed as limiting the scope of the claims. Any equivalent structural or procedural modifications made using this specification are included within the patent protection scope of the present invention.

Claims

1. A method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance, characterized in that: This includes designing an input signal logic control circuit and an AC output short-circuit control circuit. Based on the design of the input signal logic control circuit and the AC output short-circuit control circuit, the parasitic parameter influence control of output zeroing is achieved using push-pull signals. The input signal logic control circuit is a half-bridge circuit topology, and the AC output short-circuit control circuit includes an OR logic circuit, an isolation circuit, a pull-up resistor (R6), and a bidirectional electronic switch circuit; among which, The isolation circuit consists of an isolation resistor (R7) and an optocoupler (U2); the bidirectional electronic switch circuit includes a third field-effect transistor (Q3), a fourth field-effect transistor (Q4), a first voltage divider resistor (R1), and a second voltage divider resistor (R2). The first voltage divider resistor (R1) is used to adjust the switching speed of the bidirectional electronic switch circuit, and the second voltage divider resistor (R2) is used to control the input impedance of the third field-effect transistor (Q3) and the fourth field-effect transistor (Q4). When a push-pull signal pair with an adjustable duty cycle is input, the push-pull signal pair is sent to the field-effect transistor driver (U1) of the half-bridge circuit topology, and simultaneously sent to the OR logic circuit. The output signal of the OR logic circuit is sent to the isolation circuit, and the bidirectional electronic switch circuit is driven by the optocoupler (U2) under the action of the pull-up resistor (R6). When the push-pull signal pair is low at the same time, or the logic circuit output signal is low, after passing through the isolation circuit, the isolation circuit outputs to a high level. This high level is then divided by the first voltage divider resistor (R1) and the second voltage divider resistor (R2) to drive the bidirectional switch composed of the third field-effect transistor (Q3) and the fourth field-effect transistor (Q4), so that the bidirectional switch is in a bidirectional conduction state, thereby realizing the output short circuit and completing the discharge of charge.

2. The method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance according to claim 1, characterized in that: The optocoupler is a high-speed optocoupler 6N137.

3. The method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance according to claim 1, characterized in that: The half-bridge circuit topology of the input signal logic control circuit can be replaced with a full-bridge circuit topology.

4. The method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance according to claim 1, characterized in that: Pull-up resistors (R6) and optocouplers can replace positive logic devices designed as optocoupler TLP250, corresponding to the inverted output of the OR logic circuit.

5. The method for achieving zero output of an adjustable duty cycle half-bridge or full-bridge to overcome the influence of parasitic capacitance according to claim 1, characterized in that: The field-effect transistors in the half-bridge circuit topology include a first field-effect transistor (Q1) and a second field-effect transistor (Q2).

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