Display substrate and display device

Abstract

A display substrate and display device, the display substrate comprising: a driving structure layer and a light-emitting structure layer sequentially disposed on a substrate, the light-emitting structure layer comprising a plurality of light-emitting structure sublayers sequentially disposed on the driving structure layer, a connecting layer disposed between adjacent light-emitting structure sublayers, the light-emitting structure sublayers comprising a light-emitting layer disposed in a pixel opening region, at least one connecting layer comprising a first region and a second region, the orthographic projection of the first region on the substrate being outside the orthographic projection of the pixel opening region on the substrate, the orthographic projection of the second region on the substrate being at least partially within the orthographic projection of the pixel opening region on the substrate, and the metal doping concentration of the first region being less than the metal doping concentration of the second region. The solution provided in this embodiment can reduce electron mobility in the inter-pixel region and reduce crosstalk between pixels.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to, but are not limited to, display technology, and in particular to a display substrate and a display device. Background Art

[0002] Tandem organic light emitting diode (OLED) devices have two or more light-emitting layers, so they require less current to achieve the same brightness compared to traditional single-layer OLED devices. The smaller current can effectively reduce the power consumption of tandem OLED devices and extend the service life of tandem OLED devices. Summary of the Invention

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] Embodiments of the present disclosure provide a display substrate and a display device, which can reduce crosstalk.

[0005] An embodiment of the present disclosure provides a display substrate, comprising: a driving structure layer and a light-emitting structure layer sequentially arranged on a substrate, the light-emitting structure layer may include a plurality of light-emitting structure sublayers sequentially arranged on the driving structure layer, and a connecting layer arranged between adjacent light-emitting structure sublayers, the light-emitting structure sublayer includes a light-emitting layer arranged in a pixel opening area, at least one connecting layer includes a first area and a second area, the orthographic projection of the first area on the substrate is located outside the orthographic projection of the pixel opening area on the substrate, the orthographic projection of the second area on the substrate is at least partially located within the orthographic projection of the pixel opening area on the substrate, and the metal doping concentration of the first area is less than the metal doping concentration of the second area.

[0006] In an exemplary embodiment, the connection layer includes a metal-repelling inhibition layer disposed in the first region and an N-type charge generation layer disposed on a side of the inhibition layer away from the substrate, and the N-type charge generation layer is disposed in the first region and the second region.

[0007] In one exemplary embodiment, the metal doping concentration of the N-type charge generation layer in the first region is greater than or equal to 1%.

[0008] In an exemplary embodiment, the connecting layer includes a first electron injection layer arranged in the second region and an N-type charge generation layer arranged on a side of the first electron injection layer away from the substrate, and the N-type charge generation layer adjacent to the first electron injection layer is not metal-doped, or the concentration of the doped metal is less than or equal to 1%.

[0009] In one exemplary embodiment, a thickness of the first electron injection layer along a direction perpendicular to the substrate is 0.5 nanometers to 2 nanometers.

[0010] In an exemplary embodiment, the connection layer further includes a metal-repelling inhibition layer disposed on a side of the N-type charge generation layer close to the substrate, and the inhibition layer is disposed in the first region.

[0011] In an exemplary embodiment, the light emitting structure sublayer further includes a pixel definition layer provided with a plurality of the pixel opening regions, and the suppression layer is provided on the pixel definition layer between at least some adjacent pixel opening regions.

[0012] In one exemplary embodiment, a thickness of the suppression layer along a direction perpendicular to the substrate is 10 nanometers to 30 nanometers.

[0013] In an exemplary embodiment, the light emitting structure sublayer further includes at least one of the following: a hole transport layer disposed on a side of the light emitting layer close to the substrate and an electron transport layer disposed on a side of the light emitting layer away from the substrate.

[0014] An embodiment of the present disclosure provides a display device, comprising the display substrate described in any of the above embodiments.

[0015] The disclosed embodiments include a display substrate and a display device, the display substrate including: a driving structure layer and a light-emitting structure layer sequentially arranged on a substrate, the light-emitting structure layer including a plurality of light-emitting structure sublayers sequentially arranged on the driving structure layer, a connection layer arranged between adjacent light-emitting structure sublayers, the light-emitting structure sublayer including a light-emitting layer arranged in a pixel opening area, at least one connection layer including a first region and a second region, the orthographic projection of the first region on the substrate being outside the orthographic projection of the pixel opening area, the orthographic projection of the second region on the substrate being at least partially within the orthographic projection of the pixel opening area, and the metal doping concentration of the first region being less than the metal doping concentration of the second region. In the solution provided by this embodiment, the metal doping concentration of the first region is less than the metal doping concentration of the second region, and the first region is located outside the pixel opening area. Therefore, the metal doping concentration of at least a portion of the inter-pixel region is less than the metal doping concentration of the pixel opening region, which can reduce the electron mobility in the inter-pixel region, thereby reducing the lateral current between pixels and reducing crosstalk.

[0016] Other features and advantages of the present disclosure will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present disclosure. The purposes and advantages of the present disclosure can be realized and obtained through the structures particularly pointed out in the description and the drawings.

[0017] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution.

[0019] Figure 1 A schematic diagram of a display substrate provided by an exemplary embodiment;

[0020] Figure 2 A schematic diagram of a light-emitting structure layer provided by an exemplary embodiment;

[0021] Figure 3 A schematic diagram of voltage and current density curves at different doping concentrations provided for an exemplary embodiment;

[0022] Figure 4 A schematic diagram of a light-emitting structure layer provided for another exemplary embodiment;

[0023] Figure 5 A schematic diagram of a light-emitting structure layer is provided for yet another exemplary embodiment. DETAILED DESCRIPTION

[0024] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Unless there is a conflict, the embodiments of the present disclosure and the features therein may be combined with each other in any manner.

[0025] The steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions. Also, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be performed in an order different from that shown here.

[0026] Unless otherwise defined, technical or scientific terms used in the present disclosure should have the same meaning as commonly understood by a person having ordinary skills in the field to which the present disclosure belongs.

[0027] In the drawings, the sizes of various components, layer thicknesses, or regions are sometimes exaggerated for clarity. Therefore, the embodiments of the present disclosure are not necessarily limited to these dimensions, and the shapes and sizes of the components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate idealized examples, and the embodiments of the present disclosure are not limited to the shapes or values shown in the drawings.

[0028] In the present disclosure, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements and do not indicate any order, quantity or importance.

[0029] In this disclosure, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is merely for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it should not be understood as a limitation of this disclosure. The positional relationships of constituent elements may be appropriately changed according to the direction in which each constituent element is described. Therefore, the words and phrases described in this disclosure are not limited and may be appropriately replaced according to the circumstances.

[0030] In this disclosure, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be interpreted broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections, indirect connections through intermediaries, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure based on the specific circumstances.

[0031] In this disclosure, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus also includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus also includes a state where the angle is greater than 85° and less than 95°.

[0032] In this disclosure, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film." Similarly, "insulating film" may be replaced with "insulating layer."

[0033] The phrase "the orthographic projection of B is within the range of the orthographic projection of A" in the present disclosure means that the boundary of the orthographic projection of B falls within the boundary of the orthographic projection of A, or that the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0034] Although Tandem OLED devices can effectively reduce device power consumption and extend device life, the crosstalk problem between pixels in Tandem OLED devices is more serious than that in single-light-emitting-layer OLED devices. This is because electrons and holes in Tandem OLED devices are generated at the interface between the N-type charge generation layer (NCGL) and the P-type charge generation layer (PCGL), and in order to assist electron injection, the NCGL is generally doped with metals such as ytterbium (Yb) or lithium (Li). While reducing the device voltage, it also greatly improves the electron mobility in the NCGL, making it easier for lateral currents to be generated between pixels, causing crosstalk between pixels and adversely affecting the display effect of the panel.

[0035] In the embodiment of the present disclosure, the metal doping concentration in the inter-pixel region can be reduced to reduce the electron mobility in the region, thereby reducing the lateral current between pixels, reducing crosstalk, and enhancing the display effect.

[0036] Figure 1 FIG. 1 is a schematic diagram of a display substrate provided by an exemplary embodiment. Figure 1 As shown, the display substrate provided by this embodiment may include: a driving structure layer 2 and a light-emitting structure layer sequentially arranged on a substrate 1, the light-emitting structure layer may include a plurality of light-emitting structure sublayers sequentially arranged on the driving structure layer 2, and a connecting layer 4 arranged between adjacent light-emitting structure sublayers. For example, the plurality of light-emitting structure sublayers may include a first light-emitting structure sublayer 3_1 and a second light-emitting structure sublayer 3_2. The light-emitting structure sublayer may include a light-emitting layer arranged in a pixel opening area p0. For example, the first light-emitting structure sublayer 3_1 includes a first light-emitting layer 13, and the second light-emitting structure sublayer 3_2 includes a second light-emitting layer 16. At least one connecting layer 4 includes a first area p1 and a second area p2. The orthographic projection of the first area p1 on the substrate 1 is located outside the orthographic projection of the pixel opening area p0 on the substrate 1, and the orthographic projection of the second area p2 on the substrate 1 is at least partially located within the orthographic projection of the pixel opening area p0 on the substrate 1, and the metal doping concentration of the first area p1 is less than the metal doping concentration of the second area p2.

[0037] In the solution provided by this embodiment, the metal doping concentration in the first region is lower than the metal doping concentration in the second region, and the first region is located outside the pixel opening region. Therefore, the metal doping concentration in at least part of the inter-pixel region is lower than the metal doping concentration in the pixel opening region, which can reduce the electron mobility in the region between pixels, thereby reducing the lateral current between pixels and reducing crosstalk.

[0038] In an exemplary embodiment, the first region p1 and the second region p2 have no overlap (except for the boundary).

[0039] In an exemplary embodiment, the metal includes but is not limited to ytterbium (Yb) or lithium (Li).

[0040] Figure 1 In the figure, the orthographic projection of the second area p2 on the substrate 1 may include the orthographic projections of multiple pixel opening areas on the substrate 1, but the embodiments of the present disclosure are not limited to this. The orthographic projection of the second area p2 on the substrate 1 may include the orthographic projections of multiple pixel opening areas on the substrate 1 and the orthographic projections of some non-pixel opening areas on the substrate 1.

[0041] Figure 1Only two light-emitting structure sublayers are shown in the figure, but the embodiments of the present disclosure are not limited to this. In an exemplary embodiment, the display substrate may include more than two light-emitting structure sublayers, and a connecting layer is provided between adjacent light-emitting structure sublayers, that is, there may be multiple connecting layers at this time, and the metal doping concentrations in different regions of a part of the connecting layers may be different (that is, the connecting layer may include two regions, a first region and a second region, and the metal doping concentrations in the first region and the second region are different), and the metal doping concentrations in a part of the connecting layers may be the same; or, the metal doping concentrations in different regions of all the connecting layers may be different (that is, the connecting layer may include two regions, a first region and a second region, and the metal doping concentrations in the first region and the second region are different).

[0042] In an exemplary embodiment, the driving structure layer 2 may include a plurality of thin film transistors, each of which may include an active layer, a gate electrode, a source electrode, and a drain electrode. The driving structure layer 2 drives the light emitting structure layer to emit light.

[0043] The display substrate of the embodiment of the present disclosure may be an OLED, a quantum dot display (QLED) display substrate, etc., which is not limited in the present disclosure.

[0044] Figure 2 FIG. 1 is a partial schematic diagram of a light emitting structure layer of a display substrate provided by an exemplary embodiment. Figure 2 As shown, the light-emitting structure layer provided in this embodiment may include: a first light-emitting structure sublayer 3_1, a connecting layer 4 arranged on the side of the first light-emitting structure sublayer 3_1 away from the substrate 1, a P-type charge generation layer 22 arranged on the side of the connecting layer 4 away from the substrate 1, and a second light-emitting structure sublayer 3_2 arranged on the side of the P-type charge generation layer 22 away from the substrate 1. The first light-emitting structure sublayer 3_1 may include a hole injection layer (HIL) 11, a first hole transport layer (HTL) 12, a first light-emitting layer (EML) 13 and a first electron transport layer (ETL) 14 arranged in sequence; the connecting layer 4 may include a metal-repelling inhibition layer 30 arranged in the first region p1, and an N-type charge generation layer 21 arranged on the side of the inhibition layer 30 away from the substrate 1. The N-type charge generation layer 21 may be arranged in the first region p1 and the second region p2. The second light emitting structure sublayer 3_2 may include a second hole transport layer 15 , a second light emitting layer 16 , a second electron transport layer 17 and a second electron injection layer 18 , which are arranged in sequence.

[0045] The solution provided in this embodiment is to set an inhibition layer 30 in the first area p1. Since the inhibition layer 30 repels metal, the metal doping concentration in the area where the N-type charge generation layer 21 contacts the inhibition layer 30 (that is, the N-type charge generation layer 21 located in the first area p1) is lower than the metal doping concentration in the area where the N-type charge generation layer 21 does not contact the inhibition layer 30 (the N-type charge generation layer 21 located in the second area p2). The inhibition layer 30 is not metal-doped. Therefore, the metal doping concentration in the first area p1 of the connecting layer 4 is lower than the metal doping concentration in the second area p2.

[0046] In an exemplary embodiment, the metal doping concentration of the N-type charge generation layer 21 in the first region p1 may be greater than or equal to 1% and less than or equal to 5%.

[0047] In an exemplary embodiment, the metal doping concentration of the N-type charge generation layer 21 in the second region p2 may be greater than or equal to 1% and less than or equal to 5%.

[0048] In an exemplary embodiment, the thickness of the suppression layer 30 in a direction perpendicular to the substrate 1 may be 10 to 30 nanometers, which can effectively suppress metal without affecting device performance.

[0049] In an exemplary embodiment, the light-emitting structure sublayer may further include a pixel definition layer having a plurality of pixel opening regions, and the suppression layer 30 may be provided on the pixel definition layer between at least some adjacent pixel opening regions. That is, the suppression layer 30 may be provided on the pixel definition layer between some adjacent pixel opening regions, or may be provided on the pixel definition layer between all adjacent pixel opening regions. For example, the light-emitting structure sublayer may include a first color light-emitting layer arranged in the first pixel opening area, a second color light-emitting layer arranged in the second pixel opening area, and a third color light-emitting layer arranged in the third pixel opening area. When the first color light-emitting layer is lit, light-emitting layers of other colors will emit light (the second color light-emitting layer and the third color light-emitting layer will emit light). When the second color light-emitting layer is lit, the third color light-emitting layer will not emit light. At this time, the inhibition layer may be set on the pixel definition layer between the adjacent first pixel opening area and the second pixel opening area, and the inhibition layer may be set on the pixel definition layer between the adjacent first pixel opening area and the third pixel opening area, and the inhibition layer may not be set on the pixel definition layer between the adjacent second pixel opening area and the third pixel opening area, thereby avoiding crosstalk between the first color sub-pixel (including the sub-pixel of the first color light-emitting layer) and the second color sub-pixel (including the sub-pixel of the second color light-emitting layer), and avoiding crosstalk between the first color sub-pixel (including the sub-pixel of the first color light-emitting layer) and the third color sub-pixel (including the sub-pixel of the third color light-emitting layer). In actual design, the suppression layer 30 can be set according to the arrangement of the first pixel opening area, the second pixel opening area, and the third pixel opening area. For example, the first pixel opening area, the second pixel opening area, and the third pixel opening area are arranged in sequence, and the suppression layer 30 is set on the pixel definition layer between the adjacent first pixel opening area and the second pixel opening area, and the suppression layer 30 is not set on the pixel definition layer between the adjacent second pixel opening area and the third pixel opening area.

[0050] In an exemplary embodiment, the first color is blue, the second color is red, and the third color is green, and a point of blue light will be accompanied by red and green light, while a point of green light will not be accompanied by red light. The metal film formation inhibition material can be evaporated on the pixel definition layer between the first pixel opening area where the blue sub-pixel is located and the second pixel opening area where the red sub-pixel is located, and between the first pixel opening area where the blue sub-pixel is located and the third pixel opening area where the green sub-pixel is located to form the inhibition layer 30, while the metal film formation inhibition material may not be evaporated on the pixel definition layer between the second pixel opening area where the red sub-pixel is located and the third pixel opening area where the green sub-pixel is located.

[0051] In an exemplary embodiment, the inhibition layer 30 may be an organic material that repels metal, ie, a metal film formation inhibition material.

[0052] In an exemplary embodiment, the light emitting structure layer may further include a first electrode disposed on the side of the first light emitting structure sublayer 3_1 close to the substrate 1 and a second electrode disposed on the side of the second light emitting structure sublayer 3_2 away from the substrate 1. The first electrode is, for example, an anode, and the second electrode is, for example, a cathode.

[0053] In an exemplary embodiment, compared to conventional Tandem OLED devices, in the disclosed embodiments, due to reduced crosstalk, the metal doping concentration in the N-type charge generation layer can be increased, thereby reducing device voltage and power consumption.

[0054] Figure 2 The structure of the light emitting structure sublayer shown in FIG is only an example, and the embodiments of the present disclosure are not limited thereto and may include more or fewer film layers.

[0055] At present, the NCGL in tandem devices is generally composed of organic materials that transmit electrons and metal materials such as Yb or Li co-evaporated, mainly to assist electron injection and reduce the device voltage. For example, the NCGL layer doped with Yb Figure 3 As shown, it can be seen from the JV curve of the NCGL single-carrier device that as the Yb content in the NCGL increases, the current density increases at the same voltage, that is, as the Yb content in the NCGL increases, the electron mobility of the NCGL is significantly improved. Correspondingly, as the Yb content in the NCGL decreases, the electron mobility of the NCGL decreases accordingly. In the above embodiment, the metal doping concentration of the first region is lower than the metal doping concentration of the second region. Therefore, the electron mobility of the N-type charge generation layer in the first region is lower than the electron mobility of the N-type charge generation layer in the second region, thereby deteriorating the lateral electron transport. The first region is located in the region between pixels, thereby reducing the lateral current between pixels and thus reducing crosstalk.

[0056] Figure 4 FIG1 is a partial schematic diagram of a light emitting structure layer of a display substrate provided by another exemplary embodiment. Figure 4As shown, the light-emitting structure layer provided in this embodiment may include: a first light-emitting structure sublayer 3_1; a connection layer 4 disposed on a side of the first light-emitting structure sublayer 3_1 away from the substrate 1; a P-type charge generation layer 22 disposed on a side of the connection layer 4 away from the substrate 1; and a second light-emitting structure sublayer 3_2 disposed on a side of the P-type charge generation layer 22 away from the substrate 1. The first light-emitting structure sublayer 3_1 may include a hole injection layer 11, a first hole transport layer 12, a first light-emitting layer 13, and a first electron transport layer 14, arranged in sequence. The connection layer 4 may include a first electron injection layer 31 disposed in the second region p2, and an N-type charge generation layer 21 disposed on a side of the first electron injection layer 31 away from the substrate 1. The N-type charge generation layer 21 may be disposed in both the first region p1 and the second region p2. The second light-emitting structure sublayer 3_2 may include a second hole transport layer 15, a second light-emitting layer 16, a second electron transport layer 17, and a second electron injection layer 18, arranged in sequence. The N-type charge generation layer 21 is undoped with metal, or the concentration of the doped metal is less than or equal to 1%.

[0057] In this embodiment, the first region p1 includes an N-type charge generation layer 21, and the second region p2 includes a first electron injection layer 31 and an N-type charge generation layer 21, and the N-type charge generation layer 21 is not metal-doped, or the metal doping concentration is low (less than or equal to 1%). Therefore, the metal doping concentration of the first region p1 is less than the metal doping concentration of the second region p2, thereby reducing the electron mobility in the region between pixels, thereby reducing the lateral current between pixels and reducing crosstalk.

[0058] In conventional Tandem OLED devices, the NCGL layer not only generates electrons but also assists in injecting electrons into the first electron transport layer 14. In this embodiment, by providing a first electron injection layer 31, the functions of the conventional NCGL layer are split and implemented by the first electron injection layer 31 and the N-type charge generation layer 21 respectively. Among them, the N-type charge generation layer 21 only plays the role of electron generation. Therefore, the N-type charge generation layer 21 does not need to be doped with metal to improve electron mobility to assist in injecting into the first electron transport layer 14, thereby greatly reducing the doping concentration of metal in the N-type charge generation layer 21, or even not doping, which can effectively reduce the lateral transmission of electrons in the N-type charge generation layer 21, thereby improving the crosstalk of the Tandem device.

[0059] In one exemplary embodiment, the thickness of the N-type charge generation layer 21 can be reduced compared to the NCGL layer in a conventional tandem OLED. A thinner NCGL layer can reduce the lateral electron transport in the NCGL layer, thereby improving the crosstalk of the tandem device.

[0060] In an exemplary embodiment, the first electron injection layer 31 includes but is not limited to metals such as Yb and Li.

[0061] In an exemplary embodiment, the thickness of the first electron injection layer 31 along a direction perpendicular to the substrate 1 includes, but is not limited to, 0.5 nanometers to 2 nanometers.

[0062] Figure 5 FIG1 is a partial schematic diagram of a light emitting structure layer of a display substrate provided by another exemplary embodiment. Figure 5 As shown, the light-emitting structure layer provided in this embodiment may include: a first light-emitting structure sublayer 3_1; a connection layer 4 disposed on the side of the first light-emitting structure sublayer 3_1 away from the substrate 1; a P-type charge generation layer 22 disposed on the side of the connection layer 4 away from the substrate 1; and a second light-emitting structure sublayer 3_2 disposed on the side of the P-type charge generation layer 22 away from the substrate 1. The structures of the first light-emitting structure sublayer 3_1 and the second light-emitting structure sublayer 3_2 can refer to the previous embodiment and are not further described. The connection layer 4 may include a first electron injection layer 31 disposed in the second region p2; an N-type charge generation layer 21 disposed on the side of the first electron injection layer 31 away from the substrate 1; the N-type charge generation layer 21 is disposed in both the first region p1 and the second region p2; and a metal-repelling suppression layer 30 disposed on the side of the N-type charge generation layer 21 closer to the substrate 1, with the suppression layer 30 disposed in the first region p1. The N-type charge generation layer 21 is either undoped with metal or has a doped metal concentration of less than or equal to 1%.

[0063] In this embodiment, the provision of an inhibition layer allows for the fabrication process to be simplified by first fabricating the inhibition layer and then fabricating the first electron injection layer using an open mask. Furthermore, the provision of the first electron injection layer can reduce the metal doping concentration in the first region relative to the metal doping concentration in the second region, thereby lowering electron mobility in the inter-pixel region and thereby reducing lateral current flow between pixels and crosstalk.

[0064] In an exemplary embodiment, the light-emitting structure sublayer further includes a pixel definition layer having a plurality of pixel opening regions, and the suppression layer 30 is disposed on the pixel definition layer between at least some adjacent pixel opening regions. That is, the suppression layer 30 may be disposed on the pixel definition layer between some adjacent pixel opening regions, or on the pixel definition layer between all adjacent pixel opening regions. For example, the light-emitting structure sublayer may include a first color light-emitting layer arranged in the first pixel opening area, a second color light-emitting layer arranged in the second pixel opening area, and a third color light-emitting layer arranged in the third pixel opening area. When the first color light-emitting layer is lit, light-emitting layers of other colors will emit light (the second color light-emitting layer and the third color light-emitting layer will emit light). When the second color light-emitting layer is lit, the third color light-emitting layer will not emit light. At this time, the inhibition layer may be set on the pixel definition layer between the adjacent first pixel opening area and the second pixel opening area, and the inhibition layer may be set on the pixel definition layer between the adjacent first pixel opening area and the third pixel opening area, and the inhibition layer may not be set on the pixel definition layer between the adjacent second pixel opening area and the third pixel opening area, thereby avoiding crosstalk between the first color sub-pixel (including the sub-pixel of the first color light-emitting layer) and the second color sub-pixel (including the sub-pixel of the second color light-emitting layer), and avoiding crosstalk between the first color sub-pixel (including the sub-pixel of the first color light-emitting layer) and the third color sub-pixel (including the sub-pixel of the third color light-emitting layer). In actual design, the settings can be made according to the arrangement of the first pixel opening area, the second pixel opening area, and the third pixel opening area. For example, the first pixel opening area, the second pixel opening area, and the third pixel opening area are arranged in sequence, and the inhibition layer is set on the pixel definition layer between the adjacent first pixel opening area and the second pixel opening area, and the inhibition layer is not set on the pixel definition layer between the adjacent second pixel opening area and the third pixel opening area.

[0065] In an exemplary embodiment, the thickness of the first electron injection layer 31 along a direction perpendicular to the substrate 1 includes, but is not limited to, 0.5 nanometers to 2 nanometers.

[0066] In this embodiment, when metal doping exists in the N-type charge generation layer 21, due to the presence of the inhibition layer 30, the metal doping concentration in the N-type charge generation layer 21 located in the first region p1 is lower than the metal doping concentration in the N-type charge generation layer 21 located in the first region p1.

[0067] In another exemplary embodiment, the concentration of the metal doped in the N-type charge generation layer 21 may be greater than 1%. At this time, due to the presence of the first electron injection layer 31, the metal doping concentration in the second region p2 is higher, which can reduce the device voltage and power consumption.

[0068] The following example illustrates the substrate preparation process to further illustrate the technical solution of this embodiment. The "patterning process" referred to in this embodiment includes film deposition, photoresist coating, mask exposure, development, etching, and photoresist stripping, and is a well-established process in the relevant art. The "photolithography process" referred to in this embodiment includes film coating, mask exposure, and development, and is a well-established process in the relevant art. Deposition can be achieved using known processes such as sputtering, evaporation, and chemical vapor deposition; coating can be achieved using known coating processes; and etching can be achieved using known methods, without specific limitations. In the description of this embodiment, it should be understood that a "thin film" refers to a thin layer of a material deposited on a substrate using a deposition or coating process. If the "thin film" does not require patterning or photolithography during the entire fabrication process, it can also be referred to as a "layer." If the "thin film" also requires patterning or photolithography during the entire fabrication process, the "thin film" before patterning is referred to as a "thin film," and the "layer" after patterning is referred to as a "layer." A "layer" after patterning or photolithography contains at least one "pattern."

[0069] In an exemplary embodiment, the preparation process of the display substrate may include:

[0070] 11) A driving structure layer 2 is formed on a substrate 1, a first electrode is formed on the driving structure layer 2, a pixel definition layer is formed on a side of the first electrode away from the substrate 1, a pixel opening area is opened on the pixel definition layer, and a hole injection layer 11, a first hole transport layer 12, a first light-emitting layer 13 and a first electron transport layer 14 are sequentially evaporated in the pixel opening area on the side of the pixel definition layer away from the substrate 1.

[0071] 12) forming an inhibition layer 30;

[0072] The formation of the inhibition layer 30 may include: using one or more FMMs with openings at different positions from those used in forming the first light-emitting layer 13 to vapor-deposit a layer of an organic material that repels metal, i.e., a metal film formation inhibiting material, on the pixel definition layer to form the inhibition layer 30 pattern; the size of the vapor-deposited area of the metal film formation inhibiting material on the pixel definition layer can be adjusted by the size of the opening of the metal mask, so that the larger the vapor-deposited area, the better the metal repelling effect, and thus the vapor-deposited area can be maximized;

[0073] 13) forming an N-type charge generation layer 21, which may include: evaporating an NCGL material and a Yb or Li material on the substrate 1 having the aforementioned pattern formed thereon to form the N-type charge generation layer 21;

[0074] The N-type charge generation layer can be formed by doping NCGL material with metals such as Yb / Li. Due to the presence of an inhibition layer that repels the metal, the Yb / Li doping concentration in the N-type charge generation layer in the area where the inhibition layer is located is significantly lower than the Yb / Li doping concentration in the N-type charge generation layer in the area where the inhibition layer is not present.

[0075] In one exemplary embodiment, the N-type charge generation layer 21 may be formed by evaporation using an open mask.

[0076] 14) On the substrate 1 formed with the aforementioned pattern, a P-type charge generation layer 22, a second hole transport layer 15, a second light-emitting layer 16, a second electron transport layer 17, a second electron injection layer 18, and a second electrode are sequentially formed by vapor deposition, as shown in FIG. Figure 2 As shown, Figure 2 The substrate 1, the driving structure layer 2, the pixel definition layer, the first electrode and the second electrode are not shown.

[0077] 15) On the substrate with the aforementioned pattern, an encapsulation layer is formed. The encapsulation layer can adopt a laminated structure of inorganic material / organic material / inorganic material.

[0078] It can be seen from the above preparation process that the display substrate provided by the embodiment of the present disclosure reduces the metal doping concentration in the first region by setting an inhibition layer in the first region outside the pixel opening region, thereby reducing the electron mobility of the N-type charge generation layer in the first region, reducing the lateral current in the first region, and reducing crosstalk.

[0079] The preparation process of the embodiment of the present disclosure can be implemented using existing mature preparation equipment, with minor improvements to the existing process and good compatibility with the existing preparation process. Therefore, the process is simple to implement, easy to implement, and has high production efficiency. It has the advantages of easy process implementation, low production cost and high yield.

[0080] The structure and preparation process shown in this embodiment are merely exemplary. In actual implementation, the corresponding structure can be changed and the patterning process can be increased or decreased according to actual needs. The embodiments disclosed herein are not specifically limited here.

[0081] In an exemplary embodiment, the preparation process of the display substrate may include:

[0082] 21) forming a driving structure layer 2 on a substrate 1, forming a first electrode on the driving structure layer 2, forming a pixel definition layer on a side of the first electrode away from the substrate 1, the pixel definition layer having a pixel opening area, and sequentially forming a hole injection layer 11, a first hole transport layer 12, a first light-emitting layer 13, and a first electron transport layer 14 by vapor deposition in the pixel opening area on a side of the pixel definition layer away from the substrate 1;

[0083] 22) forming a first electron injection layer 31, comprising: on the substrate formed with the aforementioned pattern, using the FMM forming the first color light-emitting layer to evaporate a layer of metal thin film to form a pattern of the first electron injection layer 31 located in the first pixel opening region; using the FMM forming the second color light-emitting layer to evaporate a layer of metal thin film to form a pattern of the first electron injection layer 31 located in the second pixel opening region; and using the FMM forming the third color light-emitting layer to evaporate a layer of metal thin film to form a pattern of the first electron injection layer 31 located in the third pixel opening region;

[0084] In this embodiment, different FMMs are used to form the pattern of the first electron injection layer 31. Therefore, the thickness of the first electron injection layer 31 in different pixel opening regions can vary. Different thicknesses of the first electron injection layer 31 can be deposited in different pixel opening regions as needed. Furthermore, the first electron injection layer 31 can be formed by evaporation using the same FMM used to deposit the light-emitting layer, eliminating the need for a new FMM and reducing costs.

[0085] In an exemplary embodiment, the metal thin film includes but is not limited to at least one of Yb and Li.

[0086] In an exemplary embodiment, the thickness of the first electron injection layer 31 along a direction perpendicular to the substrate may be 0.5 nm to 2 nm.

[0087] 23) Forming the N-type charge generation layer 21 may include: evaporating an NCGL material on the substrate 1 having the aforementioned pattern to form the N-type charge generation layer 21; or evaporating an NCGL material and a small amount of Yb or Li material on the substrate 1 having the aforementioned pattern to form the N-type charge generation layer 21;

[0088] In an exemplary embodiment, the N-type charge generation layer 21 may be formed by open mask evaporation.

[0089] 24) On the substrate 1 formed with the aforementioned pattern, a P-type charge generation layer 22, a second hole transport layer 15, a second light-emitting layer 16, a second electron transport layer 17, a second electron injection layer 18, and a second electrode are sequentially formed by vapor deposition, as shown in FIG. Figure 4 As shown, Figure 4 The substrate 1, the driving structure layer 2, the pixel definition layer, the first electrode and the second electrode are not shown.

[0090] 25) On the substrate with the aforementioned pattern, an encapsulation layer is formed. The encapsulation layer can adopt a laminated structure of inorganic material / organic material / inorganic material.

[0091] In an exemplary embodiment, the preparation process of the display substrate may include:

[0092] 31) forming a driving structure layer 2 on a substrate 1, forming a first electrode on the driving structure layer 2, forming a pixel definition layer on a side of the first electrode away from the substrate 1, the pixel definition layer having a pixel opening area, and sequentially forming a hole injection layer 11, a first hole transport layer 12, a first light-emitting layer 13, and a first electron transport layer 14 by vapor deposition in the pixel opening area on a side of the pixel definition layer away from the substrate 1;

[0093] 32) forming an inhibition layer 30;

[0094] The forming of the inhibition layer 30 may include: using one or more FMMs with openings at different positions from the FMM used when preparing the first light-emitting layer 13 to evaporate a layer of metal-repelling organic material, i.e., metal film formation inhibition material, on the pixel definition layer to form the inhibition layer 30 pattern;

[0095] 33) forming a first electron injection layer 31, comprising: on the substrate 1 formed with the aforementioned pattern, using an open mask to evaporate a metal thin film to form a pattern of the first electron injection layer 31;

[0096] Due to the existence of the suppression layer 30 , the metal thin film cannot be formed in the region where the suppression layer 30 is located. Therefore, the first electron injection layer 31 is formed in the region where the suppression layer 30 is not located.

[0097] In an exemplary embodiment, the metal thin film includes but is not limited to at least one of Yb and Li.

[0098] In an exemplary embodiment, the thickness of the first electron injection layer 31 along a direction perpendicular to the substrate may be 0.5 nm to 2 nm.

[0099] In this embodiment, an open mask is used to form the first electron injection layer 31 , which has a simple process and low cost.

[0100] 34) Forming the N-type charge generation layer 21 may include: evaporating an NCGL material on the substrate 1 having the aforementioned pattern to form the N-type charge generation layer 21; or evaporating an NCGL material and a small amount of Yb or Li material on the substrate 1 having the aforementioned pattern to form the N-type charge generation layer 21;

[0101] In one exemplary embodiment, the N-type charge generation layer 21 may be formed by evaporation using an open mask.

[0102] 35) On the substrate 1 formed with the aforementioned pattern, a P-type charge generation layer 22, a second hole transport layer 15, a second light-emitting layer 16, a second electron transport layer 17, a second electron injection layer 18, and a second electrode are sequentially formed by vapor deposition, as shown in FIG. Figure 5As shown, Figure 5 The substrate 1, the driving structure layer 2, the pixel definition layer, the first electrode and the second electrode are not shown.

[0103] 36) Forming an encapsulation layer on the patterned substrate 1. The encapsulation layer may be a laminated structure of inorganic material / organic material / inorganic material.

[0104] The present disclosure also provides a display device comprising the display substrate of the aforementioned embodiment. The display device can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system.

[0105] Although the embodiments disclosed in this disclosure are as described above, the contents described are merely embodiments adopted to facilitate understanding of the disclosure and are not intended to limit the disclosure. Any person skilled in the art to which the disclosure belongs may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope of the disclosure. However, the scope of patent protection of the disclosure shall still be based on the scope defined by the attached claims.

Claims

1. A display substrate, characterized in that: include: A driving structure layer and a light-emitting structure layer are sequentially disposed on a substrate, wherein the light-emitting structure layer may include a plurality of light-emitting structure sublayers sequentially disposed on the driving structure layer, and a connecting layer disposed between adjacent light-emitting structure sublayers, wherein the light-emitting structure sublayer includes a light-emitting layer disposed in a pixel opening region, and at least one connecting layer includes a first region and a second region, wherein an orthographic projection of the first region on the substrate is located outside an orthographic projection of the pixel opening region on the substrate, and an orthographic projection of the second region on the substrate is at least partially located within an orthographic projection of the pixel opening region on the substrate, and a metal doping concentration of the first region is lower than a metal doping concentration of the second region; The connecting layer includes a first electron injection layer arranged in the second region and an N-type charge generation layer arranged on a side of the first electron injection layer away from the substrate, and the N-type charge generation layer adjacent to the first electron injection layer is not metal-doped, or the concentration of the doped metal is less than or equal to 1%.

2. The display substrate according to claim 1, wherein: The thickness of the first electron injection layer along a direction perpendicular to the substrate is 0.5 nanometers to 2 nanometers.

3. The display substrate according to claim 1, wherein The connection layer further includes a metal-repelling inhibition layer disposed on a side of the N-type charge generation layer close to the substrate, and the inhibition layer is disposed in the first region.

4. The display substrate according to claim 3, wherein: The light emitting structure sublayer further includes a pixel definition layer provided with a plurality of the pixel opening regions, and the suppression layer is provided on the pixel definition layer between at least some adjacent pixel opening regions.

5. The display substrate according to claim 3, wherein: The thickness of the inhibition layer along a direction perpendicular to the substrate is 10 nanometers to 30 nanometers.

6. The display substrate according to any one of claims 1 to 3, characterized in that: The light-emitting structure sublayer further includes at least one of the following: a hole transport layer disposed on a side of the light-emitting layer close to the substrate and an electron transport layer disposed on a side of the light-emitting layer away from the substrate.

7. A display device, characterized in that: The display substrate comprises the display substrate according to any one of claims 1 to 6.

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