A solution to breakdown caused by overvoltage between channels of a device under test

Synchronized multi-channel testing with phase adjustment addresses inefficiencies and damage in PCB and semiconductor testing by ensuring consistent phase across channels, enhancing efficiency and safety.

CN115932501BActive Publication Date: 2025-07-15QINGDAO RUIJIE INTELLIGENT INSTR
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Patent Information

Application Number
CN202211558588.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-06
Publication Date
2025-07-15
Estimated Expiration
2042-12-06

AI Technical Summary

Technical Problem

The prior art has problems of low testing efficiency and breakdown between channels in multi-channel voltage tests, especially during synchronous testing, breakdown and series electric ignition problems caused by excessive potential difference affect the accuracy of the test results and product damage.

Method used

By setting the same trigger start signal, multiple channels under test are controlled to start synchronously, and the AC signal phase is adjusted in real time, so that the output phases of each channel are consistent, avoiding the potential difference exceeding the designed withstand voltage strength, and the slave equipment is corrected by the host unified phase signal to ensure that the potential difference between channels is within the safe range during the test.

Benefits of technology

It realizes high efficiency of multi-channel synchronous testing, while avoiding breakdown damage between channels, ensuring the accuracy of test results and the safety of the test items, and improving the production capacity of the automated production line.

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Abstract

The present invention discloses a solution method for breakdown caused by overvoltage between channels of a product under test, which relates to the field of withstand voltage testing. The solution method for breakdown caused by overvoltage between channels of the product under test includes the following steps: Step 1: Conduct a withstand voltage test connection on the channels under test of the device under test; Step 2: Set the test conditions, and multiple channels under test are controlled by the same trigger start signal to perform synchronous start testing; Step 3: Detect whether the AC signal phases of each channel under test are consistent during the test. If they are inconsistent, adjust them in real time; Step 4: If the withstand voltage test passes, the test ends; if the withstand voltage test fails, an alarm is given and the test ends. Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention not only retains the high efficiency feature of multi-channel synchronous testing, but also controls the potential difference between channels for the problem of breakdown damage of the product under test caused by the potential difference between channels, completely avoiding the problem of breakdown damage to the product under test and the test equipment between channels.
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Description

Technical Field

[0001] The present invention relates to the field of withstand voltage testing, and specifically to a solution for breakdown caused by overvoltage between channels of a product under test. Background Art

[0002] During the production and manufacturing process of PCBs, semiconductor devices, etc., there is a need to detect the withstand voltage strength of multiple groups of points to be tested, such as Figure 1 As shown, the test requirement is to perform a 5KV withstand voltage test for 5s between A-a, B-b, C-c, and D-d of the product under test.

[0003] There are two existing test schemes: Scheme one uses a withstand voltage tester to perform sequential round-robin tests. The test voltage for all 4 groups is 5KV, and the time is 20s; Scheme two uses multiple withstand voltage testers to start the test simultaneously. The test voltage for all 4 groups is 5KV, and the time is 5S.

[0004] For the existing Scheme one, the test results are reliable and there is no abnormal damage to the product under test. However, the test efficiency is extremely low, seriously restricting the production capacity requirements of the existing automated production line; for the existing Scheme two, the test efficiency is high, but for products with a small design margin for the withstand voltage characteristics of the product, there will be a problem of "electricity leakage and sparking between channels" (due to too high a potential difference between channels of the product under test, exceeding the designed withstand voltage strength of the product under test). On the one hand, this problem will affect the accuracy of the test results. On the other hand, the abnormal discharge between channels will cause breakdown and burning damage to the product under test, thus causing product damage.

[0005] For the above reasons, a method is needed that can ensure multi-channel synchronous testing, achieve high test efficiency, and at the same time solve the problems of "abnormal breakdown and electricity leakage and sparking between channels". Summary of the Invention

[0006] The purpose of the present invention is to provide a solution for breakdown caused by overvoltage between channels of a product under test, so as to solve the problems raised in the above background art.

[0007] To achieve the above purpose, the present invention provides the following technical solution:

[0008] A solution for breakdown caused by overvoltage between channels of a product under test, including the following steps:

[0009] Step 1: Perform a withstand voltage test connection on the channels to be tested of the device under test;

[0010] Step 2: Set the test conditions, and multiple channels to be tested are controlled by the same trigger start signal to perform synchronous start testing;

[0011] Step 3: Detect whether the AC signal phases of each channel to be tested during the test are consistent. If they are inconsistent, adjust them in real time;

[0012] Step 4: If the withstand voltage test passes, the test ends; if the withstand voltage test fails, an alarm is given and the test ends.

[0013] As a further solution of the present invention: In step 1: The high-voltage ends of the four channels of the AC withstand voltage tester are sequentially connected to the test points A, B, C, and D of the device under test, and the low-voltage ends are sequentially connected to the test points a, b, c, and d.

[0014] As a further solution of the present invention: In step 2: Set the test conditions. Each AC withstand voltage test channel is controlled by the same trigger start signal for synchronous start output, and the output of each channel starts from the 0° phase angle for sinusoidal output.

[0015] As a further solution of the present invention: The test conditions include test voltage, current, and time.

[0016] As a further solution of the present invention: In step 3: Other AC withstand voltage test channels sample and monitor the phase of the sinusoidal AC voltage signal output by the first channel, and adjust their own phases to be the same as the phase of the first channel; when the phase difference between other channels and the first channel appears, the output phase of itself is adjusted in real time by controlling the given signal input to itself.

[0017] As a further solution of the present invention: In step 4: When the set withstand voltage test time is reached, the host obtains the test end signal, and the host controls each slave to stop outputting AC voltage to each channel, and the AC output terminates, and the test ends.

[0018] As a further solution of the present invention: In step 4: If the withstand voltage of the channel under test does not meet the requirements, the test current alarm limit value is triggered, the host obtains the overcurrent alarm signal, and the host controls each slave to stop outputting AC voltage to each channel, and the AC output terminates, and the test ends.

[0019] Compared with the prior art, the beneficial effects of the present invention are: The present invention not only retains the high efficiency characteristics of multi-channel synchronous testing, but also controls the potential difference between channels for the problem of breakdown damage of the device under test caused by the potential difference between channels, completely avoiding the problem of breakdown damage of the device under test and the test equipment between channels. Description of the Drawings

[0020] Figure 1 It is a schematic diagram of the device under test.

[0021] Figure 2 It is a schematic diagram of the test AC signals of different channels.

[0022] Figure 3 It is a schematic diagram of the maximum pressure difference of the test AC signals of different channels.

[0023] Figure 4Schematic diagram for synchronizing test AC signals of different channels. Detailed implementation manner

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0025] Please refer to Figure 1 , a solution to the breakdown caused by overvoltage between channels of a product under test, including the following steps:

[0026] Step 1: Perform a withstand voltage test connection on the channels under test of the device under test;

[0027] Step 2: Set the test conditions, and multiple channels under test are controlled by the same trigger start signal for synchronous start testing;

[0028] Step 3: Detect whether the AC signal phases of each channel under test during the test are consistent. If they are inconsistent, adjust them in real time;

[0029] Step 4: If the withstand voltage test passes, the test ends; if the withstand voltage test fails, an alarm is given and the test ends.

[0030] In a specific embodiment: The designed maximum withstand voltages of the four channels A-a, B-b, C-c, and D-d of the product under test are all 8 kV. It is required to apply an AC withstand voltage of 5 kV and 50 Hz for testing to detect the withstand voltage strength between two points in each group;

[0031] The designed maximum withstand voltages between the two channels of A-B, B-C, C-D, a-b, b-c, and c-d are also 8 kV;

[0032] When applying an AC withstand voltage of 5 kV and 50 Hz for testing between A-a, B-b, C-c, and D-d, since there is no phase detection and control for the AC high voltage output between multiple withstand voltage testers, when there is a phase difference in the 50 Hz sine waves output by multiple withstand voltage testers, as Figure 2 shown, there will be a potential difference between A-B, B-C, C-D, a-b, b-c, and c-d;

[0033] When the phase difference between adjacent two test groups is 180°, that is, when the two test high voltages are ahead or behind by 10 ms (alternating current 50 Hz), as Figure 3 shown, the voltage UA-B reaches the maximum potential difference, that is, UA-B = 1.414 * 5 kV * 2 = 14.14 kV; The potential difference between A-B far exceeds the designed withstand voltage strength of 8 kV, so there will be a breakdown discharge problem between multiple channels between A-B;

[0034] First, unify the starting angle of the high-voltage output phase of the withstand voltage tester, and all start output from the same starting angle (such as 0°).

[0035] In view of the phase drift caused by the clock difference between different withstand voltage testers, multiple withstand voltage testers output the phase state signal of one host to other slave withstand voltage testers, and the slave withstand voltage testers correct the phase difference with the host according to the phase signal output by the host, so as to achieve Figure 4 the test purpose that the schematic test process is always in the same phase and there is no potential difference between the test channel points, that is, it can ensure that during the test process, the pressure difference between the channels is UA-B = 1.414 * 5KV = 7.12KV, which is less than the withstand voltage strength of 8KV, and avoid overvoltage breakdown between the channels during the channel test.

[0036] In this embodiment: Please refer to Figure 1 , in step 1: Connect the high-voltage ends of the four channels of the AC withstand voltage tester to the A, B, C, and D test points of the device under test in sequence, and connect the low-voltage ends to the a, b, c, and d test points in sequence.

[0037] Connect A-a, B-b, C-c, D-d. After starting, output 5KV alternating current through four AC withstand voltage testers to conduct a withstand voltage test on the four channels.

[0038] In this embodiment: Please refer to Figure 1 , in step 2: Set the test conditions. Each AC withstand voltage test channel is controlled by the same trigger start signal and starts output synchronously. The output of each channel starts to output sinusoidally from the 0° phase angle.

[0039] Among the four withstand voltage testers, output the phase state signal of one host withstand voltage tester to the other three slave withstand voltage testers to ensure that the output alternating current phases of the four withstand voltage testers are the same.

[0040] In this embodiment: Please refer to Figure 1 , the test conditions include test voltage, current, and time.

[0041] Set data such as the required 5KV, 50HZ, etc.

[0042] In this embodiment: Please refer to Figure 1 , in step 3: Other AC withstand voltage test channels sample and monitor the phase of the sinusoidal AC voltage signal output by the first channel, and adjust their own phases to be consistent with the phase of the first channel; when the phase of other channels is inconsistent with the phase of the first channel, adjust their own output phases in real time by controlling the given signal input to themselves.

[0043] Three slave withstand voltage testers adjust their own phases by sampling and detecting the output AC signals of the corresponding A-a channels of the master withstand voltage tester, so as to keep the phases of the four channels of A-a, B-b, C-c, and D-d the same, making the voltage differences between the two channels stable.

[0044] In this embodiment: Please refer to Figure 1 , in step 4: When the set withstand voltage test time is reached, the master obtains the test end signal, and the master controls each slave to stop outputting AC voltage to supply each channel, the AC output terminates, and the test ends.

[0045] When the set 5S withstand voltage time is reached, the current passing through the four channels of A-a, B-b, C-c, and D-d at 5KV and 50HZ is less than the trigger alarm limit value, the test ends, and the tested channels of the device under test are qualified.

[0046] In this embodiment: Please refer to Figure 1 , in step 4: If the withstand voltage of the tested channel does not meet the requirements and the trigger test current alarm limit value is triggered, the master obtains the overcurrent alarm signal, and the master controls each slave to stop outputting AC voltage to supply each channel, the AC output terminates, and the test ends.

[0047] If the current passing through any one of the four channels of A-a, B-b, C-c, and D-d at 5KV and 50HZ is greater than the trigger alarm limit value, the tested channel of the device under test is unqualified, an alarm is triggered, and the test ends.

[0048] When the present invention provides multi-channel withstand voltage testing, the phases of the slave machines are uniformly adjusted according to the phase of the master machine, and the voltage phases between the channels are unified, avoiding breakdown due to excessive potential differences caused by phase differences between the channels, improving the test efficiency, and also avoiding the problem of breakdown between the channels.

[0049] In another embodiment: The method for realizing the control of the same phase of multi-channel withstand voltage output also includes using the same CPU to control multiple withstand voltage output units, or collecting each output phase in real time and adjusting it in real time to ensure that the controlled phases are consistent.

[0050] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention. Any reference signs in the claims should not be regarded as limiting the claimed rights.

[0051] In addition, it should be understood that although this specification is described in terms of embodiments, not every embodiment contains only an independent technical solution. This narrative style of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A solution to the breakdown caused by overvoltage between channels of a device under test, characterized in that: The solution to the breakdown caused by overvoltage between channels of the device under test includes the following steps: Step 1: Conduct a withstand voltage test connection on the channels under test of the device under test; Step 2: Set the test conditions, and multiple channels under test are controlled by the same trigger start signal to perform a synchronous start test; Step 3: Detect whether the phases of the AC signals output to each channel under test during the test are consistent. If they are not consistent, adjust them in real time; Step 4: If the withstand voltage test passes, the test ends; if the withstand voltage test fails, an alarm is given and the test ends.

2. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 1, wherein, In Step 1: Connect the high-voltage ends of the four channels of the AC withstand voltage tester to the test points A, B, C, and D of the device under test in sequence, and connect the low-voltage ends to the test points a, b, c, and d in sequence.

3. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 1, characterized in that, In Step 2: Set the test conditions, and each AC withstand voltage test channel is controlled by the same trigger start signal to perform a synchronous start output. The output of each channel starts from the 0° phase angle and outputs sinusoidally.

4. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 3, characterized in that, The test conditions include test voltage, current, and time.

5. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 1, characterized in that, In Step 3: Other AC withstand voltage test channels sample and monitor the phase of the sinusoidal AC voltage signal output by the first channel, and adjust their own phases to be the same as that of the first channel; when the phase difference between other channels and the first channel occurs, adjust their own output phases in real time by controlling the given signal input to themselves.

6. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 1, wherein In Step 4: When the set withstand voltage test time is reached, the host obtains the test end signal, and the host controls each slave to stop outputting AC voltage to each channel, and the AC output terminates, and the test ends.

7. The solution method for breakdown caused by overvoltage between channels of the product under test according to claim 1, characterized in that, In Step 4: If the withstand voltage of the channel under test does not meet the requirements, the alarm limit of the test current is triggered, the host obtains the overcurrent alarm signal, and the host controls each slave to stop outputting AC voltage to each channel, and the AC output terminates, and the test ends.

Citation Information

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