Read / write device for hard disk storage system and corresponding manufacturing process

Abstract

Various embodiments of the present disclosure provide a read / write device for a hard disk storage system and a corresponding manufacturing process. The read / write device includes a fixed structure; a membrane region including a first membrane and a second membrane constrained to the fixed structure and a central portion between the first membrane and the second membrane; a first piezoelectric actuator and a second piezoelectric actuator mechanically coupled to the first membrane and the second membrane, respectively; and a read / write head fixed to the central portion of the membrane region. The first and second piezoelectric actuators can be controlled to cause corresponding deformations of the first and second membranes, and the deformations of the first and second membranes cause corresponding movement of the read / write head relative to the fixed structure.

Description

[0001] This application is a divisional application of the invention patent application with the application date of November 27, 2020, application number 202011360102.6, and invention name "Read / write device for hard disk storage system and corresponding manufacturing process". Technical Field

[0002] The present disclosure relates to a read / write device for a hard disk storage system; moreover, the present disclosure relates to a corresponding manufacturing process. Background Art

[0003] As is known, there are nowadays a multitude of so-called hard disk type memory systems available, each of which comprises a respective magnetic disk, which functions as a memory medium and from which data can be read and written, and a respective read / write system.

[0004] Figure 1 1 shows a memory system 1 comprising a magnetic disk 2 of magnetic material in which data tracks are present (one of which is represented and indicated by 4). Figure 2 and Figure 3 As shown in , each magnetic track 4 includes a plurality of magnetic portions 6; moreover, the magnetization state (orientation) of each magnetic portion 6, and more precisely the magnetization state (orientation) of the corresponding number of magnetic chips (Weissdomains), can be associated with a corresponding logical value and, therefore, with the value of a corresponding bit.

[0005] The reading / writing of the magnetic portion 6 of the track 4 is performed by a read / write head 8, the position of which relative to the disk 2 is varied via an actuation system 10, which generally comprises an arm 12 ( Figure 1 ) and slider 14( Figure 2 ).

[0006] In particular, assuming an orthogonal reference frame XYZ fixed relative to the memory system 1, the arm 12 can be rotated by a corresponding motor (not shown) around a first axis H1 parallel to the axis Z, which is transversely staggered relative to the disk 2 and passes through the first end of the arm 12. Figure 1 The arm 12 is constrained to its second end so as to be rotatable about a second axis H2 parallel to the axis Z and passing through the second end of the arm 12 under the action of a corresponding electric actuator (not shown).

[0007] like Figure 2 As shown in FIG, the read / write head 8 is fixed to the slider 14 and is positioned above the magnetic disk 2 at a certain distance. Figure 3 As shown in , where it can be observed that the disk 2 has a cylindrical shape, and if we refer to the surface S dataTo represent the cylindrical substrate facing the read / write head 8, the read / write head 8 and the surface S data The read / write head 8 is separated from the surface S by a distance d (typically 1 nm). data The gaps in between are occupied by air.

[0008] In use, the disk 2 is kept in rotation about a third axis H3 by a corresponding motor (not shown); the third axis H3 is parallel to the axis Z and coincides with the axis of the disk 2. Furthermore, the actuator system 10 moves the read / write head 8, in a first approximation, to contact the surface S data The read / write head 8 is moved in a parallel manner (ie parallel to the plane XY).

[0009] In particular, the execution system 10 moves the read / write head 8 so that it is placed on the desired track 4 each time. Furthermore, given a common position in which the read / write head 8 is placed on the track 4, and considering a small size of the read / write head 8, such as Figure 2 and Figure 3 As shown in FIG, the rotation of the lower disk 2 causes the portion of the track 4 arranged below the read / write head 8 to slide relative to the read / write head 8 substantially along the direction D at a speed of 130 km / h. Figure 3 As shown in FIG, the width L of the magnetic portion 6 of the magnetic track 4 (measured in a direction perpendicular to the direction D) is typically less than 50 nm. Referring again to FIG. Figure 2 and Figure 3 , in which an orthogonal reference frame X′Y′Z′ is represented, which is fixed to the slider 14 and is oriented so that the axis Z′ is parallel to the axis Z and further so that the above-mentioned direction D in which the magnetic track 4 slides relative to the read / write head 8 is parallel to the axis X′.

[0010] Figure 4A and Figure 4B , another example of coupling between the arm 12, slider 14 and read / write head 8 is shown, highlighting respectively: the movement of the arm 12 in rotation around the first axis H1 (indicated by R1); and the movement of the slider 14 in rotation around the second axis H2 (indicated by R2).

[0011] like Figure 4C As shown in FIG, a solution is known in which the actuator system 10, in addition to the above-mentioned rotation, also enables a translation of the read / write head 8 relative to the slider 14 (in FIG. Figure 4C In particular, refer to Figure 2 and Figure 3 , it is necessary to translate the read / write head 8 in a direction parallel to the axis Y′ relative to the slider 14. In this way, the positioning of the read / write head 8 relative to the magnetic track 4 is possible particularly accurately, thereby making it possible to increase the density of the magnetic tracks 4 of the magnetic disk 2 and, therefore, to increase the data storage capacity.

[0012] The paper "Thermal actuator for accurate positioning read / write element in hard disk drive" by J. Liu et al. in Springer-Verlag's Microsystem Technologies (published online on June 28, 2012) describes Figure 4C An example of a solution of the type shown in ; in that document a thermal actuator is described which enables a translation of the read / write head relative to the slider. Unfortunately, the extent of possible translation along the Y′ axis that can be obtained using the thermal actuator described above is somewhat limited (less than 10 nm). Summary of the Invention

[0013] The present disclosure provides an actuator apparatus that enables translation of a read / write head relative to a slider and at least partially overcomes the shortcomings of the prior art.

[0014] According to the present disclosure, a read / write head device and a corresponding manufacturing method are provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] For a better understanding of the present disclosure, various embodiments will now be described, by way of non-limiting examples only, with reference to the accompanying drawings, in which:

[0016] Figure 1 Schematically shows a perspective view of a hard disk storage system;

[0017] Figure 2 Schematically shows Figure 1 An enlarged perspective view of a portion of the memory system is shown in FIG.

[0018] Figure 3 Schematically shows Figure 1 an enlarged perspective view of a portion of a memory system with portions removed, shown in FIG;

[0019] Figures 4A to 4C A perspective view schematically shows an execution system of a hard disk storage system;

[0020] Figure 5 、 Figure 6 and Figure 9 The schematic diagram shows the actuator devices along Figure 7 Cross-sectional views along section lines VV, VI-VI, and IX-IX shown in FIG.

[0021] Figure 7 Schematically shows Figure 5 、 Figure 6 and Figure 9A top view of an actuator device with some parts removed is shown in FIG;

[0022] Figure 8 Schematically shows Figure 5 、 Figure 6 、 Figure 7 and Figure 9 a perspective view of a portion of an actuator device shown in FIG, with parts removed;

[0023] Figures 10 to 15 Schematically shows cross-sectional views of a semiconductor wafer during successive steps of a manufacturing process ( Figures 11 to 14 refer to the same first section plane, and Figure 10 and Figure 15 reference to a different second section plane);

[0024] Figure 16 Schematically shows Figure 15 A perspective view of a wafer with some parts removed is shown in FIG;

[0025] Figure 17 Schematically shows Figure 15 A cross-sectional view of the wafer shown in FIG. 1 after a subsequent step of the manufacturing process and in a third sectional plane different from the first and second sectional planes;

[0026] Figure 18 Schematically shows Figure 17 A perspective view of a wafer with some parts removed is shown in FIG;

[0027] Figure 19 Schematically shows Figure 17 and Figure 18 A top view of a wafer with some portions removed is shown in FIG;

[0028] Figure 20 Schematically shows Figure 17 , a cross-sectional view of the wafer after a subsequent step in the manufacturing process, the cross section being taken in a third cutting plane;

[0029] Figure 21 Schematically shows Figure 20 a perspective view of a portion of a wafer with portions removed, shown in FIG;

[0030] Figure 22 Schematically shows Figure 21 , a perspective view of a portion of a wafer with portions removed after subsequent steps in the manufacturing process;

[0031] Figure 23 Schematically shows Figure 22A top view of a wafer with some portions removed is shown in FIG;

[0032] Figure 24 Schematically shows Figure 23 The wafer shown along Figure 23 A cross-sectional view taken along section line XXIV-XXIV is shown;

[0033] Figure 25 schematically shows a perspective view of a portion of another wafer;

[0034] Figure 26 schematically shows a cross-sectional view of an assembly formed with two wafers;

[0035] Figure 27 and Figure 28 is schematically shown in Figure 26 Two different cross-sectional views of the wafer assembly after performing another step of the manufacturing process are shown in FIG;

[0036] Figure 29 Schematically shows the Figure 28 The same cross section of the wafer assembly shown in FIG after performing another step of the manufacturing process;

[0037] Figure 30 and Figure 31 schematically illustrates a cross-sectional view of another wafer assembly during execution of successive steps of a manufacturing process;

[0038] Figure 32 Schematically shows Figure 31 A top view of the assembly shown in FIG. 1 with some parts removed;

[0039] Figures 33 to 38 Schematically shows Figure 32 a perspective view of a section of the assembly shown in FIG;

[0040] Figure 39 schematically shows a perspective view of a read / write head in use;

[0041] Figure 40 and Figure 41 schematically shows a top view of a variation of a read / write head device;

[0042] Figure 42 schematically shows a perspective view of a wafer with some parts;

[0043] Figure 43 and Figure 44 Schematically shows the process during the successive steps of the manufacturing process including Figure 42 a cross-sectional view of an assembly of a wafer;

[0044] Figure 45 Schematic diagram showing the separation Figure 43 and Figure 44 A perspective view of the device obtained by the components shown in FIG.

[0045] Figure 46 Shown in Figure 45 , a side view of the device after a subsequent step in the manufacturing process;

[0046] Figure 47 Schematically shows Figure 46 a perspective view of a portion of the device shown in FIG, with parts removed;

[0047] Figure 48 A perspective view of a read / write head in use is schematically shown. DETAILED DESCRIPTION

[0048] Figure 5 An actuator device 20 of the MEMS type is shown, comprising a (for example silicon) semiconductor body 201 having approximately the shape of a parallelepiped and delimited at the top and bottom by a first surface S1 and a second surface S2 . Figure 5 An orthogonal reference system ABC is shown such that the first surface S1 and the second surface S2 are parallel to the plane AB.

[0049] The thickness of the semiconductor body 201 is, for example, between 50 μm and 500 μm. Furthermore, a first cavity 22 and a second cavity 24 are present in the semiconductor body 201 , which cavities have, for example, the shape of parallelepipeds that are substantially identical and have sides that are parallel or perpendicular to the plane AB.

[0050] In more detail, the first cavity 22 and the second cavity 24 extend to the same depth. In particular, if we denote the top walls of the first cavity 22 and the second cavity 24 by P1 and P2, respectively, these cavities are parallel to the plane AB and are spaced a distance W from the first surface S1. f (For example, about 3 μm). The distance W f represents the thickness of the front portion of the semiconductor body 201 between the first surface S1 and the first and second cavities 22 and 24 and is hereinafter referred to as the membrane region M. Thus, the membrane region M includes the first and second membranes M′, M″ (e.g. Figure 5 ), which are formed by portions of the semiconductor body 201 extending over the first cavity 22 and the second cavity 24, respectively.

[0051] In more detail, in the top view ( Figure 7), the first cavity 22 and the second cavity 24 have an elongated shape along the axis A and are aligned along the axis A. Extending between the first cavity 22 and the second cavity 24 is a portion of the semiconductor body 201, hereinafter referred to as the intermediate semiconductor region 23. Furthermore, the intermediate semiconductor region 23 is covered by the membrane region M.

[0052] Beneath the semiconductor body 201 there is a rear layer 206 of dielectric material.

[0053] like Figure 6 As shown, a circular trench TH is also provided in the semiconductor body 201, extending from the first surface S1 and at a distance from the second surface S2. Specifically, the circular trench TH is laterally staggered relative to the first cavity 22 and the second cavity 24. Furthermore, the circular trench TH laterally delimits the cylindrical portion VH of the semiconductor body 201. The depth of the circular trench TH is approximately 80% of the distance between the first surface S1 and the second surface S2.

[0054] The actuator device 20 also includes a first inner coating region 25A and a second inner coating region 25B, which are made of thermal oxide and coat the walls of the first cavity 22 and the second cavity 24, respectively. Furthermore, the actuator device 20 includes a first outer coating region 25C, which is a thermal oxide and extends on the first surface S1 and within the circular groove TH. The thickness of the first inner coating region 25A, the second inner coating region 25B, and the first outer coating region 25C is, for example, between 0.2 μm and 3 μm.

[0055] If we denote the bottom walls of the first cavity 22 and the second cavity 24 by P1′ and P2′, respectively, the portions of the first inner coating region 25A that coat the top wall P1 and the bottom wall P1′ of the first cavity 22, respectively, will be referred to as the first portion 25A′ and the second portion ′25A″ of the first inner coating region 25A ( Figure 5 Likewise, the portions of the second inner coating region 25B that coat the top wall P2 and the bottom wall P2′ of the second cavity 24, respectively, will be referred to below as the first portion 25B′ and the second portion ′25B″ of the second inner coating region 25B. Figure 5 ).

[0056] The actuator device 20 further comprises a second outer coating region 27 which is TEOS oxide and extends over the first outer coating region 25C. The thickness of the second outer coating region 27 is, for example, between 0.1 μm and 1 μm.

[0057] In addition to this, a first outer coating region 25C and a second outer coating region 27 are provided on the membrane region M.

[0058] The actuator device 20 further includes a drive system 35 including a conductive region 19 (e.g., metallic, such as platinum) extending over portions of the first outer coating region 25C and the second outer coating region 27 disposed above the membrane region M. Furthermore, the conductive region 19 is partially disposed at a distance above the first and second cavities 22, 24 and the intermediate semiconductor region 23.

[0059] The actuating system 35 further comprises a first piezoelectric region 32 and a second piezoelectric region 34 , which are piezoelectric materials (eg PZT) and which, in a first approximation, have a planar shape arranged parallel to the plane AB.

[0060] In more detail, the first piezoelectric region 32 and the second piezoelectric region 34 are substantially identical, have a rectangular shape, are elongated along the axis A, and are arranged on the conductive region 19 in direct contact therewith.

[0061] More specifically, first piezoelectric region 32 and second piezoelectric region 34 are symmetrically arranged with respect to a symmetry plane SH parallel to plane BC. Furthermore, first cavity 22 and second cavity 24 are symmetrically arranged with respect to symmetry plane SH. Furthermore, first piezoelectric region 32 and second piezoelectric region 34 are disposed above first cavity 22 and second cavity 24, respectively, at a predetermined distance.

[0062] In practice, the conductive region 19 functions as a bottom electrode region, shared by the first piezoelectric region 32 and the second piezoelectric region 34 .

[0063] The actuator system 35 further includes a first top electrode region 36 and a second top electrode region 38, which are made of a metal material (e.g., platinum, TiW, or Ru) or iridium oxide, are identical to each other, and are disposed in direct contact on the first piezoelectric region 32 and the second piezoelectric region 34, respectively.

[0064] The actuator device 20 also includes a third outer coating region 28, which is a dielectric material (for example, an oxide used in chemical vapor deposition, such as TEOS or USG) and is arranged on the portion of the remaining second outer coating region 27 exposed by the conductive region 19, and on the portion of the remaining conductive region 19 exposed by the first piezoelectric region 32 and the second piezoelectric region 34.

[0065] The actuator device 20 further comprises a conductive path CP and a fourth outer coating region 29 .

[0066] The conductive path CP is alternately interposed between the third outer coating region 28 and the fourth outer coating region 29 and contacts the first top electrode region 36 or the second top electrode region 38. Figure 5 and Figure 6It can be seen that the path CP′( Figure 7 ), the path CP′ contacts a portion of the second top electrode region 38 and further extends partially through the first outer coating region 25C, the second outer coating region 27 and the third outer coating region 28 to contact the cylindrical portion VH of the semiconductor body 201, which will function as a TSV.

[0067] Fourth overcoat region 29 is a dielectric material (eg, silicon nitride) and extends over exposed portions of third overcoat region 28 , paths CP, CP′, and exposed portions of first and second top electrode regions 36 and 38 .

[0068] like Figure 7 and Figure 8 As shown in FIG, there are also first grooves T1 and second grooves T2 in the actuator device 20. In this regard, in order to simplify the representation, Figure 8 The conductive region 19, the conductive path CP, the first top electrode region 36 and the second top electrode region 38, the third outer coating region 28 and the fourth outer coating region 29, the back layer 206 and the circular trench TH are not shown; Figure 8 In FIG. 2 , the first inner coating region 25A and the second inner coating region 25B are assumed to have infinitesimal thicknesses and are therefore not shown.

[0069] The first trench T1 and the second trench T2 have the same shape, which is (substantially) a parallelepiped, extending in a direction parallel to the axis A and symmetrical with respect to the first piezoelectric region 32 and the second piezoelectric region 34. Therefore, the first piezoelectric region 32 and the second piezoelectric region 34 are interposed between the first trench T1 and the second trench T2.

[0070] In more detail, each of the first and second trenches T1 and T2 is disposed above the first and second cavities 22 and 24 and extends through the first, second, third, and fourth outer coating regions 25C, 27, 28, and 29, as well as through the membrane region M and the first portions 25A′ and 25B′ of the first and second inner coating regions 25A and 25B. Thus, each of the first and second trenches T1 and T2 is in communication or fluidic coupling with the first and second cavities 22 and 24 below and is open at both the top and bottom.

[0071] In more detail, each of the first trench T1 and the second trench T2 is defined by a corresponding inner sidewall and a corresponding outer sidewall, the inner sidewall being parallel to the plane AC and facing the first piezoelectric region 32 and the second piezoelectric region 34, and the outer sidewall being parallel to the plane AC and facing outwards; in particular, Figure 7 and Figure 8 PLT1 and PL T2 ∠ ... a and the corresponding second side wall PL b Defined by the first side wall PL a The second side wall PL is parallel to the plane AC and is arranged on one side of the assembly formed by the first piezoelectric region 32 and the second piezoelectric region 34 in the top view. b is parallel to the plane AC and is arranged in top view on the other side of the assembly formed by the first piezoelectric region 32 and the second piezoelectric region 34. As described above, Figure 7 As shown in FIG, and without loss of generality, the outer sidewall PL of the first trench T1 T1 The first sidewall PL of the first cavity 22 and the second cavity 24 a In addition, the outer sidewall PL of the second trench T2 T2 The second sidewalls PL of the first cavity 22 and the second cavity 24 are b Roughly coplanar.

[0072] like Figures 7 to 9 As shown in FIG, the actuator device 20 further comprises a deformable region 240 of silicone polymer.

[0073] In detail, the deformable region 240 has a substantially parallelepiped shape and is formed on the outer sidewall PL of the first trench T1. T1 In particular, the outer sidewall PL of the first trench T1 T1 A portion of is formed by the deformable region 240 .

[0074] In more detail, if we use P ext The side surface of the semiconductor body 201 is defined, the side surface is parallel to the plane AC, and the first trench T1 is between the side surface P ext Between the first piezoelectric region 32 and the second piezoelectric region 34, the deformable region 240 faces the side surface P ext In other words, the deformable region 240 is between the side surface P of the semiconductor body 201 that is laterally delimited. ext and the outer sidewall PL of the first trench T1 T1 Thus, the deformable region 240 is laterally staggered relative to the first trench T1 and, therefore, also relative to the membrane region M.

[0075] like Figure 9As shown in the figure (wherein, to facilitate understanding, the volumes of the first cavity 22 and the second cavity 24 are represented by dotted lines and are actually not visible in this cross-section), the deformable region 240 extends vertically through the first outer coating region 25C, the second outer coating region 27, the third outer coating region 28 and the fourth outer coating region 29, as well as through a portion of the semiconductor body 201.

[0076] In more detail, the deformable region 240 has a symmetrical shape with respect to the symmetry plane SH. Furthermore, the height of the deformable region 240 is such that it penetrates the semiconductor body 201 to a depth at least equal to the surface extension depth (denoted by S xx ), which defines at the top the second portions 25A″, 25B″ ( Figure 9 These parts are also shown in the figure even though they are not actually visible in this view, for the sole purpose of facilitating understanding). Without implying loss of generality, Figure 8 and Figure 9 , the depth of the deformable region 240 penetrating into the semiconductor body 201 is equal to the extension depth of the bottom walls P1′ and P2′ of the first cavity 22 and the second cavity 24. Furthermore, in a direction parallel to the axis C, the height of the portion of the deformable region 240 extending through the semiconductor body 201 is, for example, approximately 5 μm.

[0077] As described above, the actuator device 20 and a plurality of other actuator devices (not shown) identical thereto are formed together, starting from the first wafer 200 ( Figure 10 ) and follow the manufacturing process described below with reference only to the actuator device 20 unless otherwise specified.

[0078] like Figure 10 As shown, initially provided is a first wafer 200 comprising a semiconductor body 201, the first wafer 200 being formed by a top surface S and a bottom surface S, respectively. top and bottom surface S bot Specifically, the first wafer 200 is designed to form a first surface S1 and a second surface S2 .

[0079] Furthermore, present within the semiconductor body 201 are a first cavity 22 and a second cavity 24, which are of the buried type, can be formed in a manner known per se, and are covered by the front semiconductor region 202, which has the aforementioned thickness W. f And it is designed to form a membrane region M.

[0080] For example, the formation of the first cavity 22 and the second cavity 24 can be obtained as described in European patent EP1577656. In this case, although not shown, for each of the first cavity 22 and the second cavity 24, a deep trench is initially formed, separated by a column of semiconductor material; then, epitaxial growth is performed in a deoxidizing environment to grow an epitaxial layer on the column of semiconductor material, which epitaxial layer closes the trench at the top and traps the gas present therein. Then, a thermal annealing process is performed, which causes the atoms of the semiconductor material to migrate and form an empty buried cavity (except for any residual gas), which cavity delimits at the bottom a corresponding suspended region, i.e., a corresponding membrane, forming part of the front semiconductor region 202.

[0081] Then, if Figure 11 As shown in FIG, a dry chemical etch is performed to selectively remove portions of the semiconductor body 201 and form a etched portion of the semiconductor body 201 from the top surface S top Extended circular groove TH.

[0082] Then, if Figure 12 As shown in FIG, further etching is performed to form a first hole 30 and a second hole 31, which are respectively formed on the top surface S top It extends between the first cavity 22 and the second cavity 24 and has a cylindrical shape with a diameter of approximately 2 μm.

[0083] Then, if Figure 13 As shown in FIG, a thermal oxidation process is performed, which results in the formation of a first dielectric layer 205 having a thickness of, for example, approximately 1 μm and coating the walls of the first cavity 22 and the second cavity 24 without filling them. In addition, the first dielectric layer 205 coats the sidewalls of the first hole 30 and the second hole 31 without completely blocking them; in particular, the portion of the first dielectric layer 205 coating the sidewalls of the first hole 30 and the second hole 31 laterally defines a first opening A1 and a second opening A2, respectively, which communicate with the first cavity 22 and the second cavity 24, respectively. In addition, the first dielectric layer 205 completely fills the circular trench TH and extends to coat the top surface S top .

[0084] The first dielectric layer 205 is designed to form a first inner coating region 25A and a second inner coating region 25B and a first outer coating region 25C.

[0085] Reference again Figure 13 For simplicity of representation, the thickness reduction of the front semiconductor region 202 caused by the thermal oxidation is neglected. In addition, the thermal oxidation also results in the formation of a back layer 206, which is arranged on the bottom surface S of the semiconductor body 201. bot superior.

[0086] Then, if Figure 14 As shown in , the deposition of oxidized TEOS is performed to form a second dielectric layer 207 on the first dielectric layer 205. In particular, if we use S 205 represents the top surface of the first dielectric layer 205, then the second dielectric layer 207 is at the surface S 205 Furthermore, the second dielectric layer 207 closes the first opening A1 and the second opening A2 at the top without penetrating them approximately.

[0087] In more detail, although not shown, the formation of the second dielectric layer 207 can be envisioned as the deposition of an initial layer (not shown) of TEOS with a thickness of, for example, 1 μm, a subsequent densification process and a subsequent chemical mechanical polishing (CMP) to reduce the thickness of the initial layer to 0.5 μm; the remaining portion of the initial layer thus forming the second dielectric layer 207.

[0088] The second dielectric layer 207 is designed to form a second overcoat region 27 .

[0089] Then, if Figure 15 and Figure 16 As shown in FIG, an actuation system 35 is formed on the second dielectric layer 207 in a manner known per se.

[0090] In particular, a conductive region 19 of platinum is formed, which is arranged (at a certain distance) above the first and second cavities 22, 24 and the intermediate semiconductor region 23, which is interposed between the first and second cavities 22, 24 and extends below the front semiconductor region 202. Furthermore, formed on the conductive region 19 are first and second piezoelectric regions 32, 34, as well as first and second top electrode regions 36, 38. Furthermore, a first coating layer 208 and a second coating layer 209 are formed, which are made of, for example, USG and silicon nitride, respectively, and are designed to form a third outer coating layer 28 and a fourth outer coating layer 29, respectively. Again in a manner known per se, conductive paths CP, CP′ are formed between the first and second coating layers 208, 209.

[0091] To simplify the representation, Figure 16 (and subsequent Figure 18 ) shows only the semiconductor body 201, the first dielectric layer 205 and the second dielectric layer 207, the first piezoelectric region 32 and the second piezoelectric region 34, and two dotted lines I 22 , I 24 , two dotted lines I 22 , I 24 Respectively (roughly) represent the projections of the first cavity 22 and the second cavity 24 in the plane where the substrates of the first piezoelectric region 32 and the second piezoelectric region 34 are assumed to be located; in addition, Figure 16 Another contour line I is shown30 , I 31 , which respectively represent the projections of the first hole 30 and the second hole 31 on the above plane.

[0092] Then, if Figure 17 (To facilitate understanding, the outlines of the first cavity 22 and the second cavity 24 are indicated by dotted lines, which themselves are not visible in the cross section) and Figure 18 (It was compared with Figure 16 As shown in the same simplified example, a series of (eg dry) chemical etchings are performed to form the recesses 215. Referring again to Figure 17 , the outline of which is represented by the dotted lines (actually, not visible) of the portions of the first dielectric layer 205 (represented by 205A′ and 205A″, respectively), which respectively coat the top wall P1 and the bottom wall P1′ of the first cavity 22 and are designed to form the first portion 25A′ and the second portion 25A″ of the first inner coating region 25A, respectively. Furthermore, the outline is represented by the dotted lines (actually, not visible) of the portions of the first dielectric layer 205 (represented by 205B′ and 205B″, respectively), which respectively coat the top wall P2 and the bottom wall P2′ of the second cavity 22 and are designed to form the first portion 25B′ and the second portion 25B″ of the second inner coating region 25B, respectively.

[0093] In practice, except for a portion of the semiconductor body 201 adjacent to the front semiconductor region 202, the vertically aligned portions of the first dielectric layer 205 and the second dielectric layer 207 and the vertically aligned portions of the first coating layer 208 and the second coating layer 209 are selectively removed to form the above-mentioned groove 215. The groove 215 is formed at the top surface S top The lower portion extends to a depth of approximately 5 μm, for example, and is designed to accommodate the deformable region 240 .

[0094] In detail, groove 215 has a substantially parallelepiped shape and extends through first and second dielectric layers 205 and 207 and first and second coating layers 208 and 209, as well as through a portion of semiconductor body 201. Furthermore, groove 215 is arranged symmetrically with respect to symmetry plane SH.

[0095] In more detail, if we denote by P3 the bottom wall of the groove 215, then this extends to a depth at least equal to the depth to which the surface extends (denoted by S kk Indicates, and is designed to form the above surface S xx ), these surfaces delimit at the top portions 205A" and 205B" of the first dielectric layer 205. Without loss of generality, Figure 17 The middle wall P3 is coplanar with the bottom walls P1 ′ and P2 ′ of the first and second cavities 22 , 24 .

[0096] like Figure 19 As shown in FIG (for simplicity of representation, only the semiconductor body 201, the first and second piezoelectric regions 32 and 34, the first and second cavities 22 and 24, and the grooves 215 are shown), the grooves 215 are laterally staggered relative to the first and second piezoelectric regions 32 and 34 in a first direction along the axis B. Without loss of generality, the first and second holes 30 and 31 are also laterally staggered relative to the first and second piezoelectric regions 32 and 34 along the axis B, but in a direction opposite to the first direction described above.

[0097] In more detail, if we denote by P4 the side wall of the recess 215 parallel to the plane AC and close to the first and second cavities 22, 24, then in a first approximation, the wall P4 is parallel to the first side wall PL of the first and second cavities 22, 24. a Coplanar.

[0098] Then, if Figure 20 and Figure 21 As shown in FIG, formed within the groove 215 is an initial deformable region 240′, which is a silicone polymer designed to form the deformable region 240 and fill the groove 215. For example, the formation of the initial deformable region 240′ can be obtained via a process of rotation and subsequent alignment so that the initial deformable region 240′ will face toward the surface S209 defining the second coating layer 209 on top.

[0099] Then, if Figure 22 (Imposed with Figure 8 Same simplification), Figure 23 and Figure 24 As shown in , a new series of (e.g. dry) etches are performed to form the first trench T1 and the second trench T2 and thus make the first cavity 22 and the second cavity 24 accessible because, as previously described, the first trench T1 and the second trench T2 act as conduits when opened downwards.

[0100] In particular, the formation of the first trench T1 and the second trench T2 requires the removal of the peripheral portion of the front semiconductor region 202 so that the remaining central portion of the front semiconductor region 202 forms the membrane region M. The formation of the first trench T1 and the second trench T2 also requires the removal of the first dielectric layer 205 and the second dielectric layer 207 and the removal of portions of the first coating layer 208 and the second coating layer 209.

[0101] After the first trench T1 and the second trench T2 are formed, the first dielectric layer 205 is divided into the first and second inner coating regions 25A and 25B and the first outer coating region 25C.

[0102] Then, if Figure 26As shown in FIG, the first wafer 200 is mechanically coupled to the second wafer 299 ( Figure 25 ), the wafer 299 is made of, for example, an AlTiC alloy and includes a support body 300 in which a housing cavity 302 is formed (one of which is in Figure 25 (see in the ).

[0103] The support body 300 of the second wafer 299 is delimited by a base surface 304 onto which are facing housing cavities 302, each of which corresponds to a respective actuator device 20 of the first wafer 200. Therefore, in the following, reference is made to a single actuator device 20 and a corresponding housing cavity 302, unless otherwise specified.

[0104] In detail, the first wafer 200 is flipped over and fixed to the second wafer 299. More specifically, the actuator device 20 is flipped over and fixed to the support body 300 so that the membrane region M and therefore the first and second cavities 22 and 24 and the first and second piezoelectric regions 32 and 34 are disposed above the housing cavity 302.

[0105] Without implying a loss of generality, such as Figure 32 As shown in FIG, the coupling makes the outer sidewalls PL of the first trench T1 and the second trench T2 T1 PL T2 are substantially coplanar with the lower sidewall of the housing cavity 302. Furthermore, the housing cavity 302 has an elongated shape parallel to the axis A, such that the first and second cavities 22, 24, and therefore the first and second piezoelectric regions 32, 34, are completely suspended above the housing cavity 302. In contrast, in the top view, the initial deformable region 240' is laterally staggered relative to the housing cavity 302.

[0106] Coupling is achieved via a glue region 305 (e.g. of benzocyclobutene based resin) between the second coating 209 and the substrate surface 304. The initial deformable region 240' enters the platform immediately below the glue region 305 as it is laterally staggered relative to the housing cavity 302.

[0107] Then, if Figure 27 As shown in , grinding and chemical mechanical polishing operations are performed to remove the back layer 206 and reduce the thickness of the semiconductor body 201. In particular, as Figure 28 As shown in FIG, grinding and polishing result in two successive reductions in the thickness of the semiconductor body 201 (e.g., to 30 μm and then to 25 μm) to expose the circular trench TH and a portion of the first outer coating region 25C contained therein. After the above operations, the semiconductor body 201 is formed on top by a new bottom surface S bot 'Define.

[0108] Then, if Figure 29 As shown in , a contact area is formed. For example, Figure 29 The contact area CP″ is shown, which is arranged on the bottom surface S bot ', in direct contact with the cylindrical portion VH.

[0109] In addition, layer 211 is formed on the new bottom surface S bot The coupling layer 211 is formed on the ', hereinafter referred to as the coupling layer 211. The coupling layer 211 is USG or TEOS oxide deposited by chemical vapor deposition and has a thickness of, for example, 1 μm. The contact region CP″ extends through the coupling layer 211.

[0110] Then, if Figure 30 As shown in FIG, a top structure 400 is formed on the first wafer 200 , particularly on the coupling layer 211 .

[0111] In particular, the top structure 400 is obtained by chemical vapor deposition of alumina (aluminum oxide). Furthermore, the top structure 400 comprises a plurality of read / write heads (R / W) 404 of a type known per se, i.e., at least partially alumina, each of which comprises a respective conductive coil electronically controllable by an external drive circuit so as to be traversed by an electrical signal (in particular an electric current) capable of writing to the magnetic track 4 or indicating data stored therein. Figure 30 and Figure 43 A coil indicated by 405 is schematically shown in FIG.

[0112] Furthermore, the top structure 400 comprises a corresponding body 402 to which a read / write head 404 is fixed. The body 402 is devoid of a read / write coil.

[0113] The main body 402 of the top structure 400 is formed on the coupling layer 211; in addition, each read / write head 404 extends over the corresponding housing cavity 302 and, therefore, over the corresponding actuator device 20. In the following, the description will be limited to a single read / write head 404. In addition, in the following, the main surface of the top structure 400 facing the opposite side of the second wafer 200 is referred to as the surface to be etched S. etch .

[0114] Although not shown, corresponding contacts are formed on the top structure 400 , which are electrically connected to the coil 405 of the read / write head 404 and enable the coil 405 of the read / write head 404 to be electrically coupled to the outside world, in particular to a corresponding driving circuit.

[0115] Then, if Figure 31 and 32 As shown in FIG, from the surface S to be etched etchA further continuous (e.g., dry-type) etching is then performed to selectively remove the portion of the body 402 that laterally surrounds the read / write head 404, as well as the lower portion of the coupling layer 211 and the lower portion of the semiconductor body 201, until the portions of the first inner coating region 25A and the second inner coating region 25B that coat the bottom walls P1v and P2′ of the first and second cavities 22 and 24, respectively (i.e., the aforementioned second portions 25A″, 25B″ of the first and second inner coating regions 25A and 25B), are etched. However, the etching does not involve the portions of the first inner coating region 25A and the second inner coating region 25B that coat the top walls P1 and P2 of the first and second cavities 22 and 24, respectively (i.e., the aforementioned first portions 25A′, 25B′ of the first and second inner coating regions 25A and 25B), respectively. In a first approximation, it can be assumed that the etching operation stops at a depth equal to the extent of the second portions 25A″, 25B″ of the first and second inner coating regions 25A and 25B.

[0116] In more detail, Figure 31 and Figure 32 The etching operation shown in FIG results in the formation of a first additional trench T1′ and a second additional trench T2′, which are arranged symmetrically with respect to the symmetry plane SH and extend on opposite sides of the read / write head 404. Furthermore, in a first approximation, the first and second additional trenches T1′ and T2′ have a uniform depth, as previously described, such that the first and second additional trenches T1′ and T2′ traverse the second portions 25A″, 25B″ of the first and second inner coating regions 25A, 25B and thus communicate with the first and second cavities 22, 24, respectively, but do not traverse the first and second portions 25A′, 25B′ of the first and second coating regions 25A, 25B.

[0117] With respect to the vertical extension of the first additional trench T1′ and the second additional trench T2′, there are oxidized regions formed by the first portions 25A′, 25B′ and the second portions 25A″, 25B″ of the first inner coating region 25A and the second inner coating region 25B, making it possible to precisely control the extension of the etching depth, for example using the second portions 25A″, 25B″ of the first inner coating region 25A and the second inner coating region 25B as etching stop points.

[0118] Considering symmetry, the first additional trench T1′ is described below unless otherwise specified. The portion of the second additional trench T2′ that is identical to the portion of the first additional trench T1′ is indicated by the same reference numeral, but “1” is replaced by “2”. In addition, the subsequent description refers to Figures 32 to 38 .about Figures 33 to 38For simplicity of representation, it is assumed that the first inner coating region 25A and the second inner coating region 25B, the conductive region 19, the coupling layer 211, the glue region 305, and the first top electrode region 36 and the second top electrode region 38 do not exist. In addition, it is assumed that the first additional trench T1′ and the second additional trench T2′ extend to the bottom walls P1′ and P2′ of the first cavity 22 and the second cavity 24. In addition, it is assumed that the first outer coating region 25C and the second dielectric layer 207 form a region R ox , hereinafter referred to as the thin region R ox Likewise, it is assumed that the first coating layer 208 and the second coating layer 209 are negligible and that there is no conductive path CP. Therefore, the initial deformable region 240' extends to the thin region R ox .

[0119] Reference again Figures 33 to 38 , the above-mentioned contour line I shown in the figure 22 , I 24 is projected onto the top surface of the top structure 400. In addition, the 32 Other contour lines indicated by I34 and respectively representing (approximately) the contours of the first piezoelectric region 32 and the second piezoelectric region 34. Similarly, the lines indicated by I* and I** respectively represent the projections of the inner side walls of the first trench T1 and the second trench T2, while the lines indicated by I 302 Indicates the outline of the housing cavity 302. In addition, W cavity 、W membrane and W ox The projections of the heights of the first cavity 22 and the second cavity 24, the projections of the heights of the membrane region M, and the thin region R are shown. ox The projection of the height of . bot_302 Shown is a side projection of the bottom base height of the housing cavity 302 .

[0120] As mentioned above, the first additional trench T1′ comprises a first transverse portion TT1′ and a second transverse portion TT1″ and a longitudinal portion TL1′ which, as previously mentioned, extend, in a first approximation, to the same depth and have the shape of a parallelepiped. Furthermore, the first and second transverse portions TT1′, TT1″ extend parallel to the axis B and are connected by a longitudinal portion TL1′ which is interposed between the first and second transverse portions TT1′, TT1″ and extends parallel to the axis A. For the sake of simplicity of representation, the portion of the first additional trench T1′ is shown in FIG. Figure 32 、 Figure 34 and Figure 35 The second additional trench T2 'part is shown in Figure 32 and Figure 34 Shown in.

[0121] In more detail, the first lateral portion TT1′ extends in a portion of the body 402 and in a lower portion of the semiconductor body 201 (as well as through a corresponding portion of the coupling layer 211, which will generally not be mentioned again hereinafter unless otherwise specified), which is laterally staggered relative to the housing cavity 302. In addition, the first lateral portion TT1′ extends in a portion of the body 402 and in a lower portion of the semiconductor body 201 disposed above the second trench T2, such that the first lateral portion TT1′ of the first additional trench TT1 is connected to the lower second trench T2. In addition, the first lateral portion TT1′ extends through a portion of the body 402, and extends in a lower portion of the semiconductor body 201 disposed above the first cavity 22 and a portion of the intermediate semiconductor region 23 adjacent to the first cavity 22, as well as through a lower portion (not shown) of the second portion 25A″ of the first inner coating region 25A and through the adjacent portion of the intermediate semiconductor region 23. In particular, as Figure 32 As shown in , without meaning to lose generality, the shape of the first transverse portion TT1′ is (substantially) symmetrical with respect to a plane (not shown) parallel to the plane BC and is coplanar with the side walls of the first cavity 22, which are parallel to the plane BC and close to the symmetry plane SH. In this respect, although not shown, variants are possible in which the first and second transverse portions TT1′, TT2′ approach the symmetry plane SH to a point that is not in communication with the first and second cavities 22, 24.

[0122] The axis of the longitudinal portion TL1′ of the first additional trench T1′ is parallel to the plane CA and extends through a portion of the body 402 and a lower portion of the semiconductor body 201 arranged above the first cavity 22, as well as in a lower portion of the second portion 25A″ of the first inner coating region 25A. Without meaning any loss of generality, the longitudinal portion TL1′ extends parallel to the axis A such that a portion of the longitudinal portion TL1′ is arranged at a distance above a portion of the first piezoelectric region 32.

[0123] In fact, the longitudinal portion TL1 ′ extends into the first cavity 22 .

[0124] The first portion of the second lateral portion TT1″ is connected to the longitudinal portion TL1′ and extends in a portion of the body 402 and in a lower portion of the semiconductor body 201 arranged above the first cavity 22, and passes through a lower portion of the second portion 25A″ of the first inner coating region 25A to face the first cavity 22.

[0125] The second portion of the second lateral portion TT1 ″ extends in a portion of the body 402 and in a lower portion of the semiconductor body 201 disposed above the first trench T1 , such that the second portion of the second lateral portion TT1 ″ communicates with the lower first trench T1 .

[0126] Finally, a third portion of the second lateral portion TT1″ extends in a portion of the body 402 and in a lower portion of the semiconductor body 201, which third portion is laterally staggered relative to the housing cavity 302 and is arranged above the preliminary deformable area 240′. In this way, the third portion of the second lateral portion TT1″ exposes a corresponding portion of the initial deformable area 240′.

[0127] In other words, both the first and second portions of the second lateral portion TT1″ of the first additional trench T1′ are oriented toward the first cavity 22. Furthermore, the first portion of the second lateral portion TT1″ is laterally staggered relative to the first trench T1, whereas the second portion of the second lateral portion TT1″ is arranged above the first trench T1. A third portion of the second lateral portion TT1″ is delimited below by the initial deformable area 240′.

[0128] In practice, the second transverse portion TT1 ″ and the longitudinal portion TL1 ′ of the first additional trench T1 ′ extend through a portion of the body 402 so as to laterally delimit the read / write head 404 .

[0129] As mentioned above, for the second additional groove T2′, in particular for the arrangement of the second additional groove T2′ relative to the second cavity 24, the shell cavity 302, the second piezoelectric region 34 and the initial deformable region 240′, the description of the first additional groove T1′ is applied, in particular for the arrangement of the first additional groove T1′ relative to the first cavity 22, the shell cavity 302, the first piezoelectric region 32 and the initial deformable region 240′.

[0130] like Figure 31 and Figure 36 As shown in the figure, the second lateral portions TT1″, TT2″ of the first additional trench T1′ and the second additional trench T2′ laterally define a portion of the semiconductor body 201 (indicated by 1023), which is arranged above the intermediate semiconductor region 23 and below the read / write head 404; hereinafter, the portion of the semiconductor body is referred to as the moving region 1023.

[0131] Furthermore, the first lateral portions TT1′, TT2′ of the first additional trench T1′ and the second additional trench T2′ laterally delimit a bridge structure 999, which is formed by a portion of the body 402 adjacent to the read / write head 404 and by a lower portion of the semiconductor body 201 adjacent to the movement region 1023. A first end of the bridge structure 999 is constrained to a fixed body formed by the semiconductor body 201 and the body 402 and fixed relative to the support body 300 of the second wafer 299. A second end of the bridge structure 999 is fixed relative to a first end of the read / write head 404 and a first end of the lower movement region 1023, which is arranged above the intermediate semiconductor region 23 and, therefore, in the central portion M of the membrane region M. c Above, the central part M c The read / write head 404 is thus fixed to the central portion M of the membrane area M. c , the central part M c Between the first membrane M′ and the second membrane M″, that is, between the two peripheral portions of the membrane region M, the first piezoelectric region 32 and the second piezoelectric region 34 are coupled to the two peripheral portions, respectively.

[0132] After the cutting operation described below, the second end of the read / write head 404, which is laterally staggered relative to the first end, is disposed above the second end of the movement area 1023, which is disposed above the first trench T1 and extends laterally until it faces the side surface P. ext The first and second ends of the read / write head 404 are laterally staggered in a direction parallel to the axis B. Each of the first membrane M′ and the second membrane M″ in turn has a first end fixed to the semiconductor body 201 and a central portion M laterally staggered in a direction parallel to the axis A relative to the first end and fixed to the membrane region M. c the second end.

[0133] Referring again to the manufacturing process, the assembly formed by the first wafer 200 and the second wafer 299 and by the top structure 400 is subjected to a separation process, envisaging the execution of cutting operations to form subassemblies, each subassembly comprising a corresponding actuator device 20 and a corresponding read / write head 404. These cutting operations consist in cutting along a cutting line CL parallel to the axis A and passing through the initial deformable zone 240′ (e.g. Figure 32 The remaining portion of the initial deformable region 240 ′ forms the deformable region 240 .

[0134] Although not further shown, after the cutting operation, the remaining portions of the second dielectric layer 207 and the first and second coating layers 208 and 209 form the second outer coating region 27, the third outer coating region 28, and the fourth outer coating region 29, respectively. top and bottom surface S bot The remaining parts form the first surface S1 and the second surface S2 respectively.

[0135] In use, the Applicant has noted how the first piezoelectric region 32 and the second piezoelectric region 34 can be controlled in voltage to deform the membrane region M and, in a first approximation, to cause a subsequent translation of the mobile region 1023 parallel to the axis A and, therefore, also a translation of the read / write head 404 fixed relative to the mobile region 1023. An example of said movement is Figure 39 Shown in.

[0136] In detail, Figure 39 In the figure, indicated by 1100 is a moving body formed by the read / write head 404 and the moving area 1023 (and part of the coupling layer 211 interposed therebetween), which has the shape of a parallelepiped with dimensions along axes C, B and A of 50 μm, 150 μm and 200 μm respectively. After a voltage of approximately 30 V is applied to one of the first piezoelectric regions 32 and the second piezoelectric region 34, and subsequently a portion of the membrane region M (i.e., the first membrane M′ or the second membrane M″) disposed above the piezoelectric region to which the voltage is applied is deformed, the moving body 1100 undergoes a rotational translation, in a first approximation. The rotational translation includes a translation (indicated by DT) parallel to the axis A within a region of approximately 30 nanometers. In a first approximation, the translation of the moving body 1100 parallel to the axis C is negligible because it is within a region of several tens of nanometers. By changing the piezoelectric region to which the voltage is applied, the direction of the displacement DT is reversed. In particular, the moving body 1100 translates, i.e., deforms, in the direction of the piezoelectric region to which the voltage is applied.

[0137] The rotational translation of the mobile body 1100 results in deformation of the deformable region 240 , and in a first approximation, the compliance of the deformable region 240 does not limit the extent of the rotational translation.

[0138] In practice, after performing the separation operation, each actuator device 20 and the corresponding read / write head 404 together form a MEMS (micro-electromechanical system) read / write device 1500, which is formed by the side surface P ext Furthermore, even if a variant in which the deformable region 240 is absent is possible (in other words, a variant in which the groove 215 is not filled by the initial deformable region 240 ′), the presence of the deformable region 240 limits the deformation of the groove 215 towards the side surface P extThe number of openings of the MEMS read / write device 1500 above is limited to the portion of the first and second additional grooves T1′, T2′ provided above the deformable region 240, which has a reduced width (e.g., between 0.5 μm and 2 μm) along the axis A. In this way, during the relative movement with respect to the magnetic disk 2, the intensity of the turbulent aerodynamic forces to which the mobile body 1100 is subjected is reduced, and thus the spurious movements of the mobile body 1100 caused by said aerodynamic forces are reduced. In this respect, in use, it is precisely the side surface P facing the magnetic disk 2 that is the opening. ext .

[0139] like Figure 40 In addition, there are possible variations in which the number and shape of the bridge structures 999 differ from those described. For example, in Figure 40 In the embodiment shown in FIG, the first end of the read / write head 404 is fixed to two bridge structures 999 that are identical to each other and staggered transversely along the axis A.

[0140] like Figure 41 As shown in FIG, the restraint system for the first end of the read / write head 404 may differ from that described and, for example, include a pair of springs 1001 made of aluminum oxide, disposed within the first additional groove T1′ and the second additional groove T2′, respectively. Specifically, each spring 1001 is secured between a corresponding portion of the read / write head 404 and a corresponding portion of the main body 402 of the top structure 400. The springs 1001 are capable of reducing the depth of the notch parallel to the axis B.

[0141] refer to Figure 42 1 and subsequent figures describe variants of the manufacturing process. Also in this case, the description is limited to a single actuator device 20 and its coupled parts.

[0142] In detail, Figure 42 As shown in FIG, a second wafer is initially provided, here indicated by 599. The base surface of the second wafer 599 is indicated here by 604 and is planar and does not have the housing cavity 302; furthermore, the support body of the second wafer 599 is indicated by 600. Furthermore, the second wafer 599 can be made of AlTiC or a material different from AlTiC; for example, the second wafer 599 can be made of a semiconductor (e.g., silicon).

[0143] Formed on the substrate surface 604 is an intermediate dielectric region R' ox , formed thereon are a first piezoelectric region 32 and a second piezoelectric region 34, and (even though not shown) a conductive region 19 and a first top electrode region 36 and a second top electrode region 38. In addition, as Figure 43 As shown in the top dielectric region R top In the middle dielectric region R′ox and the exposed portion of the first piezoelectric region 32 and the second piezoelectric region 34 (more precisely, on the first top electrode region 36 and the second top electrode region 38, Figure 43 Although not shown, the top dielectric region R top It can be formed in sequence from a USG oxide layer and a covering silicon nitride layer.

[0144] Then, again as Figure 43 As shown in FIG, a second wafer 599 is formed, particularly in the top dielectric region R top Formed thereon is a top structure 400 comprising a body 402 and a read / write head 404 (including corresponding coils 405), and again formed by the surface to be etched S etch Defined at the top.

[0145] Then, if Figure 44 As shown in FIG, the process of etching the top structure 400 is performed so as to etch The first and second cavities 32 and 34 of the main body 402 are selectively removed. In this way, a first groove 622 and a second groove 624 are formed. The grooves have a substantially conical shape, and the secondary base is respectively disposed above the first piezoelectric region 32 and the second piezoelectric region 34 at a certain distance. This etching operation is a time-based type. Therefore, the bottoms of the first groove 622 and the second groove 624 are respectively formed by the first remaining portion 642 and the second remaining portion 644 of the main body 402. If the top dielectric region R top There is a first remaining portion 642 and a second remaining portion 644 coating the corresponding portion, and the first remaining portion 642 and the second remaining portion 644 are respectively provided on the first piezoelectric region 32 and the second piezoelectric region 34. Although not shown, a variant is possible in any case, in which etching is performed so that the top dielectric region R top In this case, the bottoms of the first groove 622 and the second groove 624 are respectively formed by the top dielectric region R top The first and second parts are formed, which are respectively arranged on the first piezoelectric region 32 and the second piezoelectric region 34.

[0146] The first groove 622 and the second groove 624 are laterally closed and laterally delimit the read / write head 404 so that the read / write head 404 is interposed therebetween.

[0147] Next, in a manner known per se, a separation operation of the assembly formed by the second wafer 599 and the top structure 400 is performed, following which operation the MEMS read / write device 2500 is formed. Figure 45 For simplicity, the top dielectric region R is not shown. top , conductive region 19 , and first and second top electrode regions 36 and 38 .

[0148] In detail, the cutting is performed so that the side surface P ext The defined plane traverses the first groove 622 and the second groove 624, and thus becomes open not only at the top but also at one side. In addition, without meaning to lose generality, the first remaining portion 642 and the second remaining portion 644 of the body 402 are cut. In addition, the first piezoelectric region 32 and the second piezoelectric region 34 are aligned with the side surface P ext There is a certain distance between the first groove 622 and the second groove 624, for example, between 5 μm and 10 μm. In practice, after the cutting operation, the first groove 622 and the second groove 624 face the side surface P. ext Above.

[0149] Then, if Figure 46 and Figure 47 As shown in FIG, from the side surface P ext Etching is started to selectively remove the support body 600 of the second wafer 599 in the intermediate dielectric region R′. ox The portion extending downwardly forms a pair of trenches, which are hereinafter referred to as a first side trench LT1 and a second side trench LT2 , respectively.

[0150] The first side trench LT1 and the second side trench LT2 are identical to each other and are symmetrical with respect to the symmetry plane SH. In view of symmetry, only the first side trench LT1 will be described below unless otherwise specified. Portions of the second side trench LT2 are identical to those of the first side trench LT2 and are designated by the same reference numerals, with "1" replaced by "2."

[0151] In detail, the first side trench LT1 comprises a longitudinal portion LTL1 and a vertical portion LTV1 which, in a first approximation, have the shape of a parallelepiped and have the same extension in a direction parallel to the axis B.

[0152] The first piezoelectric region 32 extends completely over the longitudinal portion LTL1 and further extends to the intermediate dielectric region R′. ox In other words, if Figure 46 As shown in FIG, the longitudinal portion LTL1 is formed by the intermediate dielectric regions R′ at the top and bottom, respectively. ox The corresponding portion of the second wafer 599 and the corresponding portion of the support body 600 are defined. However, a possible embodiment is where the longitudinal portion LTL1 and the intermediate dielectric region R′ ox There is a remainder of the support body 600 in between.

[0153] The vertical portion TLV1 is connected to the longitudinal portion LTL1 . Furthermore, along axis C, the vertical portion TLV1 is longer than the longitudinal portion LTL1 ; for example, along axis C, the vertical portion TLV1 is for example between 100 μm and 500 μm long, while the longitudinal portion LTL1 is between 1 μm and 3 μm long.

[0154] In a side view, the vertical portion TLV1 and the longitudinal portion LTL1 are arranged at 90°, ie forming an L, and the vertical portion TLV1 faces the symmetry plane SH.

[0155] In more detail, the vertical portion TLV1 is laterally staggered relative to the first piezoelectric region 32 and is arranged below the read / write head 404 .

[0156] In practice, the vertical portions LTV1, LTV2 of the first and second side trenches LT1, LT2 laterally delimit a portion of the support body 600 forming a support structure 1999 having the shape of a parallelepiped. This parallelepiped shape is free on three side surfaces, while on the fourth side surface and the bottom base it is fixed to the remainder of the support body 600. The read / write head 404 is fixed to the top base of the parallelepiped shape, as will be described in more detail below.

[0157] The support structure 1999 has a symmetrical shape with respect to the symmetry plane SH. The first and second piezoelectric regions 32 and 34 and the first and second grooves 622 and 624 extend on opposite sides of the support structure 1999 , while the read / write head 404 is vertically aligned with respect to the support structure 1999 .

[0158] For practical purposes, the first remaining portion 642 and the second remaining portion 644 are connected to the intermediate dielectric region R′. ox The lower part and the top dielectric region R top The lower part of the membrane together forms the first membrane and the second membrane, which are indicated here by M* and M** ( Figure 46 ), which face the side surface P ext Furthermore, the first side trench LT1 and the second side trench LT2 form corresponding laterally open cavities, between which the support structure 1999 extends. These cavities are topped by the intermediate dielectric region R′ ox The intermediate dielectric region forms a membrane region together with the first remaining portion 642 and the second remaining portion 644. Figure 46 The dielectric region R′ is again indicated by M in the middle and has a first piezoelectric region 32 and a second piezoelectric region 34 so that they are coupled to the corresponding peripheral portion of the membrane region M. ox The portion also carries a read / write head 404 .

[0159] In more detail, the read / write head 404 is positioned relative to the center portion of the film area M (at Figure 46 Again by M c Indicates) fixed, the central part is in the middle dielectric region R' ox The side of the read / write head 404 is formed between the peripheral portions of the membrane area M and is further fixed to the lower support structure 1999. In addition, the first end of the read / write head 404 faces the side surface P ext Above and therefore free, the second end of the read / write head 404 is opposite the first end and aligned with the first end in a direction parallel to the axis B, and is fixed to the body 402 of the top structure 400 .

[0160] like Figure 48 As shown in FIG, it can be seen that by applying a voltage sequentially to the first piezoelectric region 32 and the second piezoelectric region 34, and thereby causing the piezoelectric region to deform, a translation of the read / write head 404 (and the support structure 1999) is induced, in a first approximation, in a direction parallel to the axis A towards the deformed piezoelectric region. The characteristics of the above-mentioned movement, in particular the extent, are, in a first approximation, similar to those of the reference Figure 39 The features described are similar.

[0161] In addition Figure 46 In the embodiment shown in FIG, each of the first membrane M* and the second membrane M** has a first end fixed to the body 402 and the support body 600 and a central portion M transversely staggered relative to the first end in a direction parallel to the axis A and fixed to the membrane area M. c the second end.

[0162] In practice, the actuator device and the read / write head form a read / write device that offers the advantages evident from the above description. In particular, the read / write head can be translated relative to a support body derived from the second wafer, which supports the device and acts as a slider. Furthermore, the degree of translation is significantly greater than that achievable with prior art solutions.

[0163] Finally, it is clear that modifications and variations may be made to what has been described and illustrated herein without departing from the scope of the present invention.

[0164] For example, to account for possible tolerances in the manufacturing process, the alignment may vary from that described. In particular, the alignment between the first and second cavities 22 and 24 and the first and second trenches T1 and T2 may be varied, as well as the alignment relative to the housing cavity. Similarly, the shape and arrangement of the first and second additional trenches T1 and T2′ may be varied.

[0165] Furthermore, the first and second cavities 22 and 24 may have walls without an oxide coating, however, in this case, depth control of the first and second additional trenches T1 and T2 ′ may be more problematic.

[0166] The number and shape of the piezoelectric regions may vary from that described.

[0167] As previously mentioned, the materials may differ from those described and / or regions may exist outside of those described. For example, metal traces may extend within the body 402 of the top structure 400 .

[0168] The first additional groove T1′ and the second additional groove T2′ may terminate on corresponding portions of the second portions 25A″, 25B″ of the first and second inner coating regions 25A, 25B, respectively, without passing through them. In this case, in fact, the portion of the second portions 25A″, 25B″ that will define the bottoms of the first and second additional grooves T1′, T2′ will be so thin that it will fail during the first execution.

[0169] The various embodiments described above can be combined to provide further embodiments.

[0170] These and other changes can be made to the embodiments in light of the above detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and claims, but should be construed to encompass all possible embodiments and the full scope of equivalents to which such claims are entitled. Therefore, the claims are not limited by this disclosure.

Claims

1. An electronic device comprising: substrate; a first cavity in the substrate; a first film covering the first cavity; a first actuator covering the first film; a second cavity, wherein the first cavity and the second cavity are separated from each other by a portion of the substrate; a second film covering the second cavity, the first film and the second film being formed of portions of the semiconductor body extending over the first cavity and the second cavity; a second actuator covering the second membrane; a first trench extending into the substrate; as well as a second groove extending into the substrate, the first groove and the second groove communicating with the first cavity and the second cavity, the first actuator and the second actuator being positioned between the first groove and the second groove, wherein the read / write head is fixed to a central portion of the membrane area, the central portion of the membrane area being interposed between the first membrane and the second membrane, and The first actuator and the second actuator deform the first membrane and the second membrane through voltage control, so as to translate the read / write head relative to the substrate.

2. The electronic device according to claim 1, wherein: The read / write head is coupled to the substrate, the first actuator and the second actuator are positioned on a first side of the substrate, and the read / write head is positioned on a second side of the substrate opposite the first side.

3. The electronic device according to claim 2, wherein: The semiconductor body is located on the second side of the substrate, and the read / write head is coupled to the semiconductor body.

4. The electronic device according to claim 3, further comprising: A bridge structure connects the read / write head to the semiconductor body.

5. The electronic device according to claim 4, further comprising: A plurality of springs connect the read / write head to the semiconductor body. 6 . The electronic device of claim 1 , wherein the first actuator and the second actuator are piezoelectric actuators.

7. The electronic device according to claim 1, further comprising: A deformable region is provided, wherein the deformable region is a portion of a sidewall of the second trench.

8. The electronic device of claim 7, wherein the deformable region comprises a silicone polymer.

9. The electronic device according to claim 1, further comprising: A circular trench extends into the substrate, the circular trench laterally bounding a cylindrical portion of the semiconductor body.

10. The electronic device according to claim 1, further comprising: A dielectric layer is located on the walls of the first cavity and the second cavity.

11. The electronic device according to claim 1 , further comprising: a first electrode located on the substrate, the first actuator and the second actuator located on the first electrode; a second electrode on the first actuator; as well as A third electrode is provided on the second actuator.

12. The electronic device according to claim 1, further comprising: A dielectric layer is formed on the substrate, wherein the first cavity and the second cavity are separated from the first actuator and the second actuator by the dielectric layer.

13. A method for forming an electronic device, comprising: forming a first cavity in a substrate; forming a first film covering the first cavity; forming a first actuator covering the first membrane; forming a second cavity in the substrate, the first cavity and the second cavity being spaced apart from each other by a portion of the substrate; forming a second film covering the second cavity, the first film and the second film being formed of portions of the semiconductor body extending over the first cavity and the second cavity; forming a second actuator covering the second membrane; forming a first trench extending into the substrate; as well as forming a second groove extending into the substrate, the first groove and the second groove communicating with the first cavity and the second cavity, the first actuator and the second actuator being positioned between the first groove and the second groove, wherein the read / write head is fixed to a central portion of the membrane area, the central portion of the membrane area being interposed between the first membrane and the second membrane, and The first actuator and the second actuator deform the first membrane and the second membrane through voltage control, so as to translate the read / write head relative to the substrate.

14. The method according to claim 13, further comprising: A deformable region is formed, the deformable region forming a portion of a sidewall of the second trench.

15. The method according to claim 13, further comprising: A circular trench is formed extending into the substrate, the circular trench laterally bounding a cylindrical portion of the semiconductor body.

16. The method according to claim 13, further comprising: A dielectric layer is formed on walls of the first cavity and the second cavity.

17. The method of claim 13, further comprising: a first electrode formed on the substrate, the first actuator and the second actuator being located on the first electrode; a second electrode formed on the first actuator; as well as A third electrode is formed on the second actuator.

18. An electronic device comprising: a substrate having a first side and a second side opposite the first side; a fixing structure located on the first side of the substrate; a read / write head located on the first side of the substrate and coupled to the fixed structure; a plurality of actuators located on the second side of the substrate; a plurality of cavities located in the substrate; a plurality of membranes located between the plurality of actuators and the plurality of cavities, the plurality of membranes being formed from portions of the semiconductor body extending over the plurality of cavities; as well as a first groove and a second groove extending into the substrate and communicating with the plurality of cavities, the plurality of actuators being positioned between the first groove and the second groove, wherein the read / write head is fixed to a central portion of a membrane area, the central portion of the membrane area being interposed between the plurality of membranes, and The plurality of actuators deform the plurality of membranes through voltage control, thereby translating the read / write head relative to the substrate.

19. The electronic device according to claim 18, further comprising: A deformable region is a portion of a sidewall of one of the first trench and the second trench.

20. The electronic device of claim 18, wherein the read / write head is coupled to the fixed structure via a bridge structure, a spring, or a combination thereof.

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