Power splitters and communication equipment

Abstract

The present application relates to a power splitter and communication equipment. The power splitter may include: an input microstrip line, an output microstrip line, and a first branch microstrip line and a second branch microstrip line, respectively disposed between the input microstrip line and the output microstrip line. By disposing at least two isolation networks comprising capacitors and resistors between the first branch microstrip line and the second branch microstrip line, the physical distance between the first branch microstrip line and the second branch microstrip line can be increased without increasing the size of the power splitter. Furthermore, more distributed parameters can be introduced, which is conducive to effectively expanding the operating bandwidth of the power splitter, thereby significantly improving the isolation characteristics of the power splitter.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a power splitter and communication equipment. Background Art

[0002] A power divider, also known as a power splitter, is a device that can divide the power of an input signal equally or unequally among multiple outputs. It is widely used in microwave radio frequency systems and fifth-generation mobile communication technology (5G) mobile communication systems. It should be noted that a power splitter can also function as a power combiner, combining multiple input signals into a single signal.

[0003] With the development of 5G mobile communications, communication systems have evolved into multi-mode and / or multi-band systems, requiring RF power splitters to have not only good reflection and transmission characteristics, but also high isolation to combat channel interference and mutual influence between devices.

[0004] In conventional technology, a multi-stage cascaded power divider is generally used to improve the isolation characteristics of the power divider. However, the size of the multi-stage cascaded power divider in conventional technology will increase proportionally. Summary of the Invention

[0005] Based on this, it is necessary to provide a power splitter and communication equipment to address the above technical problems.

[0006] In a first aspect, an embodiment of the present application provides a power divider, comprising: an input microstrip line, a first branch microstrip line, a second branch microstrip line, and an output microstrip line;

[0007] In which, the first branch microstrip line and the second branch microstrip line are both arranged between the input microstrip line and the output microstrip line; at least two groups of isolation networks are arranged between the first branch microstrip line and the second branch microstrip line, wherein the isolation network includes capacitors and resistors, and the isolation network is used to increase the physical distance between the first branch microstrip line and the second branch microstrip line.

[0008] In one embodiment, the isolation network includes: a first capacitor array, a second capacitor array, and a resistor array arranged between the first capacitor array and the second capacitor array, wherein the first capacitor array includes at least one first capacitor, the resistor array includes at least one resistor, and the second capacitor array includes at least one second capacitor.

[0009] In one embodiment, the power divider further includes a first connecting microstrip line and a second connecting microstrip line arranged between the first branch microstrip line and the second branch microstrip line; the first connecting microstrip line and the second connecting microstrip line are symmetrically arranged about the horizontal central axis of the power divider;

[0010] The two ends of each first capacitor are respectively connected to the first shunt microstrip line and the first connecting microstrip line, the two ends of each resistor are respectively connected to the first connecting microstrip line and the second connecting microstrip line, and the two ends of each second capacitor are respectively connected to the second connecting microstrip line and the second shunt microstrip line.

[0011] In one embodiment, the output microstrip line includes a first output microstrip line and a second output microstrip line; the first shunt microstrip line includes at least two first semi-annular microstrip lines, and the second shunt microstrip line includes at least two second semi-annular microstrip lines, wherein a first semi-annular microstrip line is connected to the first output microstrip line through a first cascade microstrip line, and wherein a second semi-annular microstrip line is connected to the second output microstrip line through a second cascade microstrip line, and an isolation network is provided between the first cascade microstrip line and the corresponding second cascade microstrip line.

[0012] In one embodiment, a third cascade microstrip line is provided between two adjacent first semi-annular microstrip lines; a fourth cascade microstrip line is provided between two adjacent second semi-annular microstrip lines; and the isolation network is provided between the third cascade microstrip line and the corresponding fourth cascade microstrip line.

[0013] In one embodiment, the first semi-annular microstrip line and the second semi-annular microstrip line are gradient microstrip lines.

[0014] In one embodiment, the first output microstrip line and the second output microstrip line are both L-shaped microstrip lines, and the first output microstrip line and the second output microstrip line form a U-shaped structure.

[0015] In one embodiment, a first cut-angle structure is provided at an outer bend of the first output microstrip line, and a second cut-angle structure is provided at an outer bend of the second output microstrip line.

[0016] In one embodiment, the first branch microstrip line and the second branch microstrip line are symmetrically arranged about a horizontal central axis of the power divider.

[0017] In one embodiment, the output end of the input microstrip line is provided with a third cut-angle structure symmetrically arranged about the horizontal center axis of the power divider.

[0018] In a second aspect, an embodiment of the present application provides a communication device, which includes a power splitter as described in the first aspect above, and a radio frequency unit connected to the power splitter.

[0019] In the above-mentioned power divider and communication equipment, the first branch microstrip line and the second branch microstrip line in the power divider are arranged between the input microstrip line and the output microstrip line. At least two groups of isolation networks including capacitors and resistors are arranged between the first branch microstrip line and the second branch microstrip line. On the one hand, the physical distance between the first branch microstrip line and the second branch microstrip line can be increased without increasing the size of the power divider. On the other hand, more distributed parameters can be introduced, which is conducive to effectively expanding the working bandwidth of the power divider, thereby significantly improving the isolation characteristics of the power divider. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For different technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 This is a schematic structural diagram of a power divider in an embodiment of the present application;

[0022] Figure 2 This is a structural diagram of a power divider in another embodiment of the present application;

[0023] Figure 3 This is a structural diagram of a power divider in another embodiment of the present application;

[0024] Figure 4 This is a structural diagram of a power divider in another embodiment of the present application;

[0025] Figure 5 This is a structural diagram of a power divider in another embodiment of the present application;

[0026] Figure 6 Schematic diagram of the isolation curve of the power splitter according to the embodiment of the present application relative to the traditional power splitter;

[0027] Figure 7 This is a structural diagram of the communication device in an embodiment of the present application. DETAILED DESCRIPTION

[0028] To make the above-mentioned objects, features, and advantages of the present application more clearly understood, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings. The following description sets forth many specific details to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar improvements without violating the scope of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0029] The serial numbers assigned to components herein, such as "first," "second," and the like, are used solely to distinguish the objects being described and do not convey any sequential or technical meaning. It should be understood that the terms "external," "internal," "horizontal," and "vertical" and the like, indicating positions or relationships, are based on the positions or relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on this application.

[0030] A power divider, also known as a power splitter, is a device that can divide the power of an input signal equally or unequally into multiple outputs. It is widely used in microwave RF systems and 5G mobile communication systems. It should be noted that a power splitter can also be used as a power combiner, combining multiple input signals into one.

[0031] Common power dividers include T-type power dividers and Wilkinson power dividers. Among them, Wilkinson power dividers are widely used in wireless communications due to their good matching and isolation characteristics.

[0032] With the development of 5G mobile communications, communication systems have evolved into multi-mode and / or multi-band systems, requiring RF power splitters to have not only good reflection and transmission characteristics, but also high isolation to combat channel interference and mutual influence between devices.

[0033] In conventional technology, a multi-stage cascaded power divider is generally used to improve the isolation characteristics of the power divider. However, the size of the multi-stage cascaded power divider in conventional technology will increase proportionally.

[0034] The power splitter provided in the embodiments of the present application may include: an input microstrip line, an output microstrip line, and a first branch microstrip line and a second branch microstrip line, respectively disposed between the input microstrip line and the output microstrip line. By disposing at least two isolation networks comprising capacitors and resistors between the first branch microstrip line and the second branch microstrip line, the physical distance between the first branch microstrip line and the second branch microstrip line can be increased without increasing the size of the power splitter. Furthermore, more distributed parameters can be introduced, effectively expanding the operating bandwidth of the power splitter and significantly improving the isolation characteristics of the power splitter.

[0035] The power divider involved in the embodiments of the present application may include but is not limited to an improved Wilkinson power divider. Compared with the Wilkinson power divider in traditional technology, the power divider in the embodiments of the present application has higher isolation characteristics and a wider isolation bandwidth.

[0036] The communication equipment involved in the embodiments of the present application may include but is not limited to: a power amplifier, a base station, a repeater or an indoor distributed system.

[0037] Figure 1 Schematic diagram of the structure of the power divider in the embodiment of the present application. Figure 1 As shown, the power divider of the embodiment of the present application may include: an input microstrip line 10, a first branch microstrip line 11, a second branch microstrip line 12, and an output microstrip line 13. It should be understood that the microstrip lines involved in the embodiment of the present application can be arranged on a dielectric layer of a printed circuit board (PCB).

[0038] The first branch microstrip line 11 and the second branch microstrip line 12 are both arranged between the input microstrip line 10 and the output microstrip line 13. Exemplarily, the input end of the input microstrip line 10 corresponds to the input port of the power divider, the output end of the input microstrip line 10 is respectively connected to the input end of the first branch microstrip line 11 and the input end of the second branch microstrip line 12, the output end of the first branch microstrip line 11 and the output end of the second branch microstrip line 12 are respectively connected to the input end of the output microstrip line 13, and the output end of the output microstrip line 13 corresponds to the output port of the power divider.

[0039] It should be understood that the output microstrip line 13 in the embodiment of the present application may include at least two output microstrip lines. For example, if the output microstrip line 13 includes a first output microstrip line and a second output microstrip line, the output end of the first branch microstrip line 11 can be connected to the input end of the first output microstrip line, the output end of the second branch microstrip line 12 can be connected to the input end of the second output microstrip line, the output end of the first output microstrip line can correspond to the first output port of the power divider, and the output end of the second output microstrip line can correspond to the second output port of the power divider.

[0040] In the embodiment of the present application, at least two groups of isolation networks 14 including capacitors and resistors may be provided between the first shunt microstrip line 11 and the second shunt microstrip line 12. For example, the first shunt microstrip line 11 in the embodiment of the present application may include a plurality of first sub-shunt microstrip lines connected in sequence, and the second shunt microstrip line 12 may include a plurality of second sub-shunt microstrip lines connected in sequence, and the plurality of first sub-shunt microstrip lines and the plurality of second sub-shunt microstrip lines are provided in a one-to-one correspondence, wherein each first sub-shunt microstrip line and each second sub-shunt microstrip line respectively include a corresponding signal input terminal and a signal output terminal, and a group of isolation networks 14 is provided between the signal output terminal of each first sub-shunt microstrip line and the signal output terminal of the corresponding second sub-shunt microstrip line.

[0041] It should be understood that each first sub-branch microstrip line has a signal input end and a signal output end. The signal input end of the first sub-branch microstrip line close to the input microstrip line 10 among the multiple first sub-branch microstrip lines is connected to the input microstrip line 10, the signal output end of the first sub-branch microstrip line close to the output microstrip line 13 is connected to the output microstrip line 13, the signal input end of other first sub-branch microstrip lines is connected to the signal output end of the previous first sub-branch microstrip line, and the signal output end of other first sub-branch microstrip lines is connected to the signal input end of the next first sub-branch microstrip line.

[0042] Correspondingly, each second sub-branch microstrip line has a signal input end and a signal output end. The signal input end of the second sub-branch microstrip line close to the input microstrip line 10 among the multiple second sub-branch microstrip lines is connected to the input microstrip line 10, the signal output end of the second sub-branch microstrip line close to the output microstrip line 13 is connected to the output microstrip line 13, the signal input end of the other second sub-branch microstrip lines is connected to the signal output end of the previous second sub-branch microstrip line, and the signal output end of the other second sub-branch microstrip lines is connected to the signal input end of the next second sub-branch microstrip line.

[0043] For example, if the first branch microstrip line 11 includes a first sub-branch microstrip line a1 (not shown) and a first sub-branch microstrip line b1, the second branch microstrip line 12 includes a second sub-branch microstrip line a2 and a second sub-branch microstrip line b2. The signal input end of the first sub-branch microstrip line a1 is connected to the input microstrip line 10, the signal output end of the first sub-branch microstrip line a1 is connected to the signal input end of the first sub-branch microstrip line b1, and the signal output end of the first sub-branch microstrip line b1 is connected to the output microstrip line 13. The signal input end of the second sub-branch microstrip line a2 is connected to the input microstrip line 10, the signal output end of the second sub-branch microstrip line a2 is connected to the signal input end of the second sub-branch microstrip line b2, and the signal output end of the second sub-branch microstrip line b2 is connected to the output microstrip line 13. An isolation network 1 may be provided between the signal output end of the first sub-branch microstrip line a1 and the signal output end of the second sub-branch microstrip line a2, and an isolation network 2 may be provided between the signal output end of the first sub-branch microstrip line b1 and the signal output end of the second sub-branch microstrip line b2.

[0044] The isolation network 14 in the embodiment of the present application can be a combination circuit of capacitors and resistors. The isolation network 14 is used to increase the physical distance between the first branch microstrip line 11 and the second branch microstrip line 12, thereby facilitating improving the isolation of the output port of the power divider.

[0045] In addition, in the embodiment of the present application, the isolation network 14 can introduce more distributed parameters by adopting a combination of capacitors and resistors, which is conducive to effectively expanding the working bandwidth of the power divider (or the isolation bandwidth), thereby significantly improving the isolation characteristics of the power divider.

[0046] Of course, the isolation network 14 may also include other components, which is not limited in the embodiments of the present application.

[0047] The first branch microstrip line and the second branch microstrip line in the above-mentioned power divider are arranged between the input microstrip line and the output microstrip line. By arranging at least two groups of isolation networks including capacitors and resistors between the first branch microstrip line and the second branch microstrip line, the physical distance between the first branch microstrip line and the second branch microstrip line can be increased without increasing the size of the power divider. On the other hand, more distributed parameters can be introduced, which is conducive to effectively expanding the working bandwidth of the power divider, thereby significantly improving the isolation characteristics of the power divider.

[0048] In one embodiment, Figure 2 This is a structural diagram of a power splitter in another embodiment of the present application. Based on the above embodiment, this embodiment of the present application introduces the relevant contents of the above isolation network. Figure 2 As shown, the isolation network 14 may include: a first capacitor array 140, a second capacitor array 141, and a resistor array 142 arranged between the first capacitor array 140 and the second capacitor array 141, wherein the first capacitor array 140 may include at least one first capacitor, the resistor array 142 may include at least one resistor, and the second capacitor array 142 may include at least one second capacitor.

[0049] For example, the first capacitor array 140 may include a first capacitor, the resistor array 142 may include a resistor, and the second capacitor array 142 may include a second capacitor.

[0050] For another example, the first capacitor array 140 may include three first capacitors, the resistor array 142 may include three resistors, and the second capacitor array 142 may include three second capacitors.

[0051] For example, if the first capacitor array 140 includes multiple first capacitors, the multiple first capacitors can be connected in parallel; if the resistor array 142 includes multiple resistors, the multiple resistors can be connected in parallel; if the second capacitor array 142 includes multiple second capacitors, the multiple second capacitors can be connected in parallel.

[0052] In one possible implementation, multiple first capacitors, multiple resistors, or multiple second capacitors in the embodiment of the present application can be connected in parallel by providing connecting microstrip lines.

[0053] In another possible implementation, multiple first capacitors, multiple resistors, or multiple second capacitors in the embodiment of the present application can be connected in parallel by means of wires.

[0054] Of course, the multiple first capacitors, the multiple resistors, or the multiple second capacitors in the embodiment of the present application can also be connected in parallel through other methods, which is not limited in the embodiment of the present application.

[0055] It should be understood that any capacitor in the embodiment of the present application (such as the first capacitor or the second capacitor) may include but is not limited to a radio frequency capacitor, which has the function of a path capacitor; any resistor in the embodiment of the present application may include but is not limited to an isolation resistor.

[0056] In the embodiments of the present application, the capacitance values ​​of the first and second capacitors can be related to the operating frequency of the power divider, wherein the self-resonant frequency of the first and second capacitors is twice or more the operating frequency of the power divider. For example, if the operating frequency of the power divider is the SUB 6G band, the capacitance values ​​of the first and second capacitors can be any capacitance value within the capacitance value range of [5pF, 10pF].

[0057] The resistance value of any resistor in the embodiment of the present application may be related to the position of the resistor in the power divider and the connection relationship between the resistor and the other resistors in the resistor array to which it belongs. For example, if the resistor is located in the first section of the microstrip line in the power divider, and the resistor is connected in parallel with the other resistors in the resistor array to which it belongs, the resistance value of the resistor can be determined based on the normalized impedance value of the first section isolation resistor preset in the power divider (for example, 1.9602) and the principle of parallel combination of resistors. As another example, if the resistor is located in the second section of the microstrip line in the power divider, and the resistor is connected in parallel with the other resistors in the resistor array to which it belongs, the resistance value of the resistor can be determined based on the normalized impedance value of the second section isolation resistor preset in the power divider (for example, 4.8204) and the principle of parallel combination of resistors.

[0058] The isolation network in the embodiment of the present application can further introduce more distributed parameters by including a first capacitor array, a second capacitor array, and a resistor array arranged between the first capacitor array and the second capacitor array, which is further conducive to effectively expanding the operating bandwidth (or isolation bandwidth) of the power divider, thereby further improving the isolation characteristics of the power divider.

[0059] In one embodiment, Figure 3 This is a structural diagram of a power divider in another embodiment of the present application. Based on the above embodiment, this embodiment of the present application introduces the connection relationship between the capacitor array and the resistor array in the above isolation network. Figure 3As shown, the power divider of the embodiment of the present application may further include a first connecting microstrip line 15 and a second connecting microstrip line 16 disposed between the first branch microstrip line 11 and the second branch microstrip line 12. The first connecting microstrip line 15 and the second connecting microstrip line 16 may be symmetrically disposed about the horizontal center axis of the power divider. It should be understood that the first connecting microstrip line 15 and the second connecting microstrip line 16 do not need to be completely symmetrical about the horizontal center axis of the power divider, and a certain preset deviation may be allowed.

[0060] For example, the two ends of each first capacitor 140C in the first capacitor array 140 can be connected to the first shunt microstrip line 11 and the first connecting microstrip line 15, respectively; the two ends of each resistor 142R in the resistor array 142 can be connected to the first connecting microstrip line 15 and the second connecting microstrip line 16, respectively; and the two ends of each second capacitor 141C in the second capacitor array 141 can be connected to the second connecting microstrip line 16 and the second shunt microstrip line 12, respectively. It should be understood that the two ends of any capacitor or resistor in the embodiments of the present application can be fixedly connected to the corresponding microstrip line by welding or other means.

[0061] In the embodiment of the present application, a connecting microstrip line is provided to facilitate the connection of each first capacitor in the first capacitor array, each resistor in the resistor array, and each second capacitor in the second capacitor array, without the need for additional connection through multiple wires. It can be seen that the connection method in the embodiment of the present application is relatively simple.

[0062] In one embodiment, Figure 4 This is a structural diagram of a power divider in another embodiment of the present application. Based on the above embodiment, this embodiment of the present application introduces the relevant contents of the above output microstrip line and the above branch microstrip line. Figure 4 As shown, the output microstrip line 13 in the embodiment of the present application may include a first output microstrip line 130 and a second output microstrip line 131; the first branch microstrip line 11 may include at least two first semi-ring microstrip lines 11H, and the second branch microstrip line 12 may include at least two second semi-ring microstrip lines 12H. It should be noted that, for the convenience of drawing, Figure 4 In the figure, it is shown as an example that the first branch microstrip line 11 includes two first semi-ring microstrip lines 11H and the second branch microstrip line 12 includes two second semi-ring microstrip lines 12H.

[0063] In the embodiment of the present application, one of the first semi-annular microstrip lines 11H (i.e., the first semi-annular microstrip line 11H close to the first output microstrip line 130 among the at least two first semi-annular microstrip lines 11H) can be connected to the first output microstrip line 130 through the first cascade microstrip line 17; and one of the second semi-annular microstrip lines 12H (i.e., the second semi-annular microstrip line 12H close to the second output microstrip line 131 among the at least two second semi-annular microstrip lines 12H) can be connected to the second output microstrip line 131 through the second cascade microstrip line 18. It should be understood that, as Figure 4 As shown, the first semi-annular microstrip line 11H and the first cascade microstrip line 17 close to the first output microstrip line 130 can correspond to the portion of the first sub-branch microstrip line close to the output microstrip line in the above-mentioned power divider, wherein the first cascade microstrip line 17 can correspond to the signal output end of the first sub-branch microstrip line; the second semi-annular microstrip line 12H and the second cascade microstrip line 18 close to the second output microstrip line 131 can correspond to the portion of the second sub-branch microstrip line close to the output microstrip line in the above-mentioned power divider, wherein the second cascade microstrip line 18 can correspond to the signal output end of the second sub-branch microstrip line.

[0064] An isolation network 14A may be provided between the first cascade microstrip line 17 and the corresponding second cascade microstrip line 18 . Specific implementations of the isolation network 14A may refer to the above-mentioned contents regarding the isolation network 14 , which will not be elaborated here.

[0065] For example, in the embodiments of the present application, the first branch microstrip line 11 and the second branch microstrip line 12 are symmetrically arranged about the horizontal center axis of the power divider. This can increase the physical distance between the first branch microstrip line 11 and the second branch microstrip line 12, thereby facilitating improved isolation of the output port of the power divider. It should be understood that the first branch microstrip line 11 and the second branch microstrip line 12 do not need to be completely symmetrical about the horizontal center axis of the power divider, and a certain predetermined deviation is permitted.

[0066] It should be noted that, considering that the widths of the two microstrip lines connected to the front and rear of the first semi-annular microstrip line 11H in the embodiment of the present application may be different, the first semi-annular microstrip line 11H in the embodiment of the present application can be a gradient microstrip line, which is used to achieve impedance transition between the smaller microstrip line and the wider microstrip line, which is beneficial to improving the isolation characteristics of the power divider.

[0067] Accordingly, considering that the widths of the two microstrip lines connected to the front and rear of the second semi-annular microstrip line 12H in the embodiment of the present application may be different, the second semi-annular microstrip line 12H in the embodiment of the present application can be a gradient microstrip line, which is used to achieve impedance transition between the smaller microstrip line and the wider microstrip line, which is beneficial to improving the isolation characteristics of the power divider.

[0068] Furthermore, a third cascade microstrip line 19 may be provided between two adjacent first semi-annular microstrip lines 11H, and a fourth cascade microstrip line 20 may be provided between two adjacent second semi-annular microstrip lines 12H. An isolation network 14B may be provided between the third cascade microstrip line 19 and the corresponding fourth cascade microstrip line 20. For details on how the isolation network 14B can be implemented, please refer to the above-mentioned content regarding the isolation network 14, and will not be further elaborated here.

[0069] It should be understood that Figure 4 As shown, the first semi-annular microstrip line 11H and the third cascade microstrip line 19 close to the input microstrip line 10 can correspond to the portion of the first sub-branch microstrip line close to the input microstrip line 10 in the above-mentioned power divider, wherein the third cascade microstrip line 19 can correspond to the signal output end of the first sub-branch microstrip line; the second semi-annular microstrip line 12H and the fourth cascade microstrip line 20 close to the input microstrip line 10 can correspond to the portion of the second sub-branch microstrip line close to the input microstrip line in the above-mentioned power divider, wherein the fourth cascade microstrip line 20 can correspond to the signal output end of the second sub-branch microstrip line.

[0070] It should be noted that the isolation networks set between the signal output ends of different first sub-branch microstrip lines and the signal output ends of the corresponding second sub-branch microstrip lines can be the same or different, that is, the above-mentioned isolation network 14A and isolation network 14B can be the same or different.

[0071] In an embodiment of the present application, the first branch microstrip line may include at least two first semi-annular microstrip lines, and the second branch microstrip line may include at least two second semi-annular microstrip lines. A third cascade microstrip line may be provided between two adjacent first semi-annular microstrip lines, and a fourth cascade microstrip line may be provided between two adjacent second semi-annular microstrip lines, wherein a first semi-annular microstrip line may be connected to the first output microstrip line via the first cascade microstrip line, and wherein a second semi-annular microstrip line may be connected to the second output microstrip line via the second cascade microstrip line. An isolation network may be provided between the first cascade microstrip line and the corresponding second cascade microstrip line, and an isolation network may be provided between the third cascade microstrip line and the corresponding fourth cascade microstrip line. It can be seen that in an embodiment of the present application, by providing an isolation network between the cascade microstrip line in the first branch microstrip line and the corresponding cascade microstrip line in the second branch microstrip line, the operating bandwidth of the power divider can be effectively expanded without increasing the size of the power divider, thereby significantly improving the isolation characteristics of the power divider.

[0072] In one embodiment, Figure 5This is a structural diagram of a power divider in another embodiment of the present application. On the basis of the above embodiment, the overall structure of the power divider is introduced in the embodiment of the present application by taking the power divider including two sections of microstrip lines as an example. The microstrip lines in the embodiment of the present application can be set on the PCB dielectric layer by copper cladding, and of course can also be set on the PCB dielectric layer by cladding other conductive materials. For example, the PCB dielectric layer in the embodiment of the present application can be Rogers 4350B sheet material with a dielectric constant of 3.66, a thickness of 1.6 mm, and a copper cladding thickness of 0.5 ounces. It should be understood that the PCB dielectric layer can also be other materials, and the thickness of the PCB dielectric layer and / or the copper cladding thickness can also be other thicknesses, which are not limited in the embodiment of the present application.

[0073] like Figure 5 As shown, the output end of the input microstrip line 10 can be provided with a third angled structure 101 symmetrically arranged at a preset angle (for example, 45 degrees) with respect to the horizontal central axis of the power divider, so as to improve the reflection characteristics of the T-type connection between the input microstrip line 10 and the connected first semi-annular microstrip line 11H and the second semi-annular microstrip line 12H.

[0074] For example, the input microstrip line 10 in the embodiment of the present application may be 50 Ω Microstrip line. For example, the length of the input microstrip line 10 can be 11.33 mm, and the width can be 3.3 mm. It should be understood that for a microstrip line extending in the horizontal direction, its length is the length in the horizontal direction, and its width is the width in the vertical direction; for a microstrip line extending in the vertical direction, its length is the length in the vertical direction, and its width is the width in the horizontal direction.

[0075] It should be noted that the length and / or width values ​​of any microstrip line involved in the embodiments of the present application are exemplary values. Of course, they can also be other values, which are not limited in the embodiments of the present application.

[0076] In an embodiment of the present application, a third cascade microstrip line 19 can be arranged between the two first semi-ring microstrip lines 11H in the first branch microstrip line 11, and the first semi-ring microstrip line 11H in the first branch microstrip line 11 close to the first output microstrip line 130 can be connected to the first output microstrip line 130 through the first cascade microstrip line 17.

[0077] For example, the length of the first semi-ring microstrip line 11H in the embodiment of the present application may be a length within a preset error range of one quarter of the wavelength of the transmission signal frequency.

[0078] In the embodiment of the present application, the width of the first semi-annular microstrip line 11H near the input microstrip line 10 can be determined by an impedance value calculation method based on the normalized impedance value of the first microstrip line section preset by the power divider (e.g., 1.2197) and a preset coefficient (e.g., 50). In the embodiment of the present application, the width of the first semi-annular microstrip line 11H near the first output microstrip line 130 can be determined by an impedance value calculation method based on the normalized impedance value of the second microstrip line section preset by the power divider (e.g., 1.6398) and a preset coefficient (e.g., 50).

[0079] For example, the first semi-annular microstrip line 11H near the input microstrip line 10 can be an arc with a radius of 5.5 mm, an arc length of 15.45 mm, and a width of 1.22 mm. The first semi-annular microstrip line 11H near the first output microstrip line 130 can be an arc-shaped gradient line with an arc length of 13.79 mm, a narrow side width of 1.7 mm, and a wide side width of 2.18 mm, to achieve impedance transition between the thinner third cascade microstrip line 19 and the wider first cascade microstrip line 17. The third cascade microstrip line 19 can have a length of 3.64 mm and a width of 1.3 mm, while the first cascade microstrip line 17 can have a length of 4 mm and a width of 3 mm.

[0080] In an embodiment of the present application, a fourth cascade microstrip line 20 can be arranged between the two second semi-ring microstrip lines 12H in the second branch microstrip line 12, and the second semi-ring microstrip line 12H in the second branch microstrip line 12 close to the second output microstrip line 131 can be connected to the second output microstrip line 131 through the second cascade microstrip line 18.

[0081] For example, the length of the second semi-ring microstrip line 12H in the embodiment of the present application may be a length within a preset error range of one quarter of the wavelength of the transmission signal frequency.

[0082] In the embodiment of the present application, the width of the second semi-annular microstrip line 12H near the input microstrip line 10 can be determined by an impedance value calculation method based on the normalized impedance value of the first microstrip line preset by the power divider (e.g., 1.2197) and a preset coefficient (e.g., 50). In the embodiment of the present application, the width of the second semi-annular microstrip line 12H near the second output microstrip line 131 can be determined by an impedance value calculation method based on the normalized impedance value of the second microstrip line preset by the power divider (e.g., 1.6398) and a preset coefficient (e.g., 50).

[0083] For example, the second semi-annular microstrip line 12H near the input microstrip line 10 can be an arc with a radius of 5.5 mm, an arc length of 15.45 mm, and a width of 1.22 mm. The second semi-annular microstrip line 12H near the second output microstrip line 131 can be an arc-shaped gradient line with an arc length of 13.79 mm, a narrow side width of 1.7 mm, and a wide side width of 2.18 mm, to achieve impedance transition between the thinner fourth cascade microstrip line 20 and the wider second cascade microstrip line 18. The fourth cascade microstrip line 20 can have a length of 3.64 mm and a width of 1.3 mm, while the second cascade microstrip line 18 can have a length of 4 mm and a width of 3 mm.

[0084] In the embodiment of the present application, an isolation network 14B may be provided between the third cascaded microstrip line 19 and the fourth cascaded microstrip line 20. The isolation network 14B may include: a first capacitor array, a second capacitor array, and a resistor array provided between the first capacitor array and the second capacitor array. The first capacitor array may include three first capacitors 140C2, the resistor array may include three resistors 142R2, and the second capacitor array may include three second capacitors 141C2.

[0085] For example, the resistor array can be arranged on the horizontal center axis of the power divider, and the first capacitor array and the second capacitor array can be symmetrically arranged on both sides of the resistor array, that is, the first capacitor array and the second capacitor array are symmetrically arranged about the horizontal center axis of the power divider. In the embodiment of the present application, the symmetrical arrangement can increase the physical distance between the first branch microstrip line 11 and the second branch microstrip line 12, thereby facilitating improved isolation between the two output ports of the power divider.

[0086] For example, the resistance values ​​of the three resistors 142R2 can be determined based on the normalized impedance value of the first isolation resistor (e.g., 1.9602) and the principle of parallel resistor combination. For example, the resistance values ​​of the three resistors 142R2 from left to right can be 200Ω, 470Ω, and 510Ω, respectively.

[0087] It should be noted that the capacitance value of any capacitor or the resistance value of any resistor involved in the embodiments of the present application are exemplary values. Of course, they can also be other values, which are not limited to this in the embodiments of the present application.

[0088] In the embodiment of the present application, the two ends of each first capacitor 140C2 are respectively connected to the third cascade microstrip line 19 and the first connecting microstrip line 152, the two ends of each resistor 142R2 are respectively connected to the first connecting microstrip line 152 and the second connecting microstrip line 162, and the two ends of each second capacitor 141C2 are respectively connected to the second connecting microstrip line 162 and the fourth cascade microstrip line 20. The first connecting microstrip line 152 and the second connecting microstrip line 162 are both used to accommodate components such as capacitors and resistors. For example, the length of the first connecting microstrip line 152 and the width of the second connecting microstrip line 162 can be 3.76 mm and the width can be 1.6 mm.

[0089] In the embodiment of the present application, an isolation network 14A may be provided between the first cascaded microstrip line 17 and the second cascaded microstrip line 18. The isolation network 14A may include a first capacitor array, a second capacitor array, and a resistor array provided between the first and second capacitor arrays. The first capacitor array may include a first capacitor 140C1, the resistor array may include a resistor 142R1, and the second capacitor array may include a second capacitor 141C1.

[0090] For example, the resistance of the resistor 142R1 can be determined based on a preset normalized impedance value of the second isolation resistor (eg, 4.8204) and the principle of resistor parallel combination. For example, the resistance of the resistor 142R1 can be 270Ω.

[0091] In the embodiment of the present application, the two ends of first capacitor 140C1 are respectively connected to first cascade microstrip line 17 and first connecting microstrip line 151, the two ends of resistor 142R1 are respectively connected to first connecting microstrip line 151 and second connecting microstrip line 161, and the two ends of second capacitor 141C1 are respectively connected to second connecting microstrip line 161 and second cascade microstrip line 18. The first connecting microstrip line 151 and the second connecting microstrip line 161 are both used to accommodate components such as capacitors and resistors. For example, the length of the first connecting microstrip line 151 and the width of the second connecting microstrip line 161 can be 1.35 mm, and the width can be 1.6 mm.

[0092] Alternatively, as Figure 5 As shown, the first output microstrip line 130 and the second output microstrip line 131 in the embodiment of the present application can both be L-shaped microstrip lines, and the first output microstrip line 130 and the second output microstrip line 131 form a U-shaped structure.

[0093] For example, the first output microstrip line 130 and the second output microstrip line 131 in the embodiment of the present application may both be 50 ΩMicrostrip line. For example, the vertical portion of the first output microstrip line 130 may have a length of 5.06 mm and a width of 3.3 mm, and the horizontal portion may have a length of 11.04 mm and a width of 3.3 mm. The vertical portion of the second output microstrip line 131 may have a length of 5.06 mm and a width of 3.3 mm, and the horizontal portion may have a length of 11.04 mm and a width of 3.3 mm.

[0094] To reduce reflected waves during signal transmission, the outer bend of the first output microstrip line 130 in the embodiment of the present application can be provided with a first angled bevel structure 1301 at a preset angle, and / or the outer bend of the second output microstrip line 131 can be provided with a second angled bevel structure 1311 at a preset angle, thereby facilitating better reflection characteristics. For example, the length of the first angled bevel structure 1301 can be 4.24 mm, and the length of the second angled bevel structure 1311 can be 4.24 mm.

[0095] It should be understood that in order to reduce the reflected waves during signal transmission, the outer bend where the first cascade 5 microstrip line 17 is connected to the first output microstrip line 130 in the embodiment of the present application can also be provided with a fourth cut-angle structure 171 with a preset angle, and / or, the outer bend where the second cascade microstrip line 18 is connected to the second output microstrip line 131 can also be provided with a fifth cut-angle structure 181 with a preset angle, which is conducive to having better reflection characteristics.

[0096] It should be noted that, for ease of understanding, the above embodiment of the present application uses two sections of microstrip lines as an example to introduce the overall structure of the power divider. The structure of the power divider in the embodiment of the present application can also be applied to power dividers of other orders.

[0097] It should be understood that the first shunt microstrip line 11 and the second shunt microstrip line 12 in the embodiment of the present application can be appropriately bent according to the size of the PCB dielectric layer to reduce the size, thereby facilitating PCB circuit design.

[0098] In summary, the power splitter of the embodiment of the present application, by introducing a combination of capacitors and resistors in the isolation network, increases the physical distance between the first branch microstrip line and the second branch microstrip line on the one hand, and introduces more distributed parameters on the other hand, thereby effectively expanding the working bandwidth of the power splitter.

[0099] Thereby, the isolation characteristics of the power divider can be significantly improved.

[0100] The operating frequency of the power divider in the embodiment of the present application can cover 1.5GHz-3.8GHz, and the isolation degree is greater than 20dB in the entire frequency band. It can be used in Long Term Evolution (LTE) systems and / or 5G indoor distributed systems, etc. It is not only simple and practical, low-cost, but also has excellent isolation performance.

[0101] 0 Figure 6 FIG. 1 is a schematic diagram of an isolation curve of the power divider of the embodiment of the present application relative to the traditional power divider.

[0102] Figure 6 As shown, compared with the isolation of traditional power splitters, the isolation performance of the power splitter in the embodiment of the present application is more superior.

[0103] In one embodiment, Figure 7 This is a schematic diagram of the structure of the communication device in the embodiment of the present application. Figure 7 As shown,

[0104] The communication device of the embodiment of the present application may include the power splitter 701 provided in the above embodiment of the present application, and a radio frequency unit 702 connected to the power splitter 701. The structure of the power splitter 701 may refer to the structure of the power splitter provided in the above embodiment of the present application, and its implementation principle and technical effect are similar, which will not be repeated here.

[0105] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0106] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A power divider, characterized in that: include: An input microstrip line, a first branch microstrip line, a second branch microstrip line, and an output microstrip line; The first shunt microstrip line and the second shunt microstrip line are both arranged between the input microstrip line and the output microstrip line; at least two isolation networks are arranged between the first shunt microstrip line and the second shunt microstrip line, wherein the isolation network includes a capacitor and a resistor, and the isolation network is used to increase the physical distance between the first shunt microstrip line and the second shunt microstrip line; The isolation network includes: a first capacitor array, a second capacitor array, and a resistor array arranged between the first capacitor array and the second capacitor array, wherein the first capacitor array includes a plurality of the first capacitors, the resistor array includes a plurality of the resistors, and the second capacitor array includes a plurality of the second capacitors; the plurality of the first capacitors are connected in parallel, the plurality of the resistors are connected in parallel, and the plurality of the second capacitors are connected in parallel; The power divider further includes a first connecting microstrip line and a second connecting microstrip line arranged between the first branch microstrip line and the second branch microstrip line; the first connecting microstrip line and the second connecting microstrip line are symmetrically arranged about the horizontal central axis of the power divider; The two ends of each first capacitor are respectively connected to the first shunt microstrip line and the first connecting microstrip line, the two ends of each resistor are respectively connected to the first connecting microstrip line and the second connecting microstrip line, and the two ends of each second capacitor are respectively connected to the second connecting microstrip line and the second shunt microstrip line.

2. The power divider according to claim 1, characterized in that The output microstrip line includes a first output microstrip line and a second output microstrip line; the first shunt microstrip line includes at least two first semi-ring microstrip lines, and the second shunt microstrip line includes at least two second semi-ring microstrip lines, wherein one of the first semi-ring microstrip lines is connected to the first output microstrip line through a first cascade microstrip line, and wherein one of the second semi-ring microstrip lines is connected to the second output microstrip line through a second cascade microstrip line, and the isolation network is arranged between the first cascade microstrip line and the corresponding second cascade microstrip line.

3. The power divider according to claim 2, wherein: A third cascade microstrip line is provided between two adjacent first semi-annular microstrip lines; a fourth cascade microstrip line is provided between two adjacent second semi-annular microstrip lines; and the isolation network is provided between the third cascade microstrip line and the corresponding fourth cascade microstrip line.

4. The power divider according to claim 2, characterized in that: The first semi-annular microstrip line and the second semi-annular microstrip line are gradient microstrip lines.

5. The power divider according to claim 2, wherein: The first output microstrip line and the second output microstrip line are both L-shaped microstrip lines, and the first output microstrip line and the second output microstrip line form a U-shaped structure.

6. The power divider according to claim 5, characterized in that: A first cut-angle structure is provided at an outer bend of the first output microstrip line, and a second cut-angle structure is provided at an outer bend of the second output microstrip line.

7. The power divider according to claim 1, wherein: The first branch microstrip line and the second branch microstrip line are symmetrically arranged about a horizontal central axis of the power divider.

8. The power divider according to claim 1, wherein: The output end of the input microstrip line is provided with a third cut-angle structure symmetrically arranged with respect to the horizontal central axis of the power divider.

9. A communication device, characterized in that: The communication device includes the power splitter according to any one of claims 1 to 8, and a radio frequency unit connected to the power splitter.

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