Display panel and manufacturing method thereof

Abstract

The present application provides a display panel and a manufacturing method thereof, relating to the field of display technology, and is used to address the technical problem of uneven luminance in display panels. The display panel includes a stacked array substrate, a first electrode layer, an organic functional layer, and a second electrode layer; the first electrode layer includes at least one electrode block; the second electrode layer is connected to at least one auxiliary electrode; the auxiliary electrode is disposed on or within the array substrate; the auxiliary electrode includes a first material layer, the first material layer including a bottom surface facing the array substrate and a side surface intersecting with the bottom surface of the first material layer; the angle between the bottom surface of the first material layer and the side surface of the first material layer is greater than or equal to 60° and less than or equal to 160°. The display panel of the embodiments of the present application can alleviate or eliminate the problem of uneven luminance in the display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof. Background Art

[0002] OLED (Organic Light-Emitting Diode) display panels have attracted widespread attention due to their advantages, such as thinness, fast response time, and low driving voltage. As demand for larger displays increases, the size of display panels is also gradually increasing. However, large display panels are prone to uneven brightness. Summary of the Invention

[0003] In view of the above problems, embodiments of the present application provide a display panel and a method for manufacturing the same to solve the technical problem of uneven luminous brightness of large-sized display panels and ensure the display effect of the display panel.

[0004] In order to achieve the above objectives, the embodiments of the present application provide the following technical solutions:

[0005] A first aspect of an embodiment of the present application provides a display panel, comprising an array substrate, a first electrode layer, an organic functional layer and a second electrode layer arranged in a stacked manner, wherein the organic functional layer is located between the first electrode layer and the second electrode layer; the first electrode layer comprises at least one electrode block; the second electrode layer is connected to at least one auxiliary electrode; the auxiliary electrode is arranged on the array substrate or in the array substrate; the auxiliary electrode comprises a first material layer, the first material layer comprises a bottom surface facing the array substrate, and a side surface intersecting with the bottom surface of the first material layer, and the angle between the bottom surface of the first material layer and the side surface of the first material layer is greater than or equal to 60° and less than or equal to 160°.

[0006] In the display panel of the embodiment of the present application, when the second electrode layer is energized, a voltage signal can be input to the second electrode layer through the auxiliary electrode to increase the voltage value in a preset area of the second electrode layer, reduce the voltage drop of the second electrode layer, and alleviate or eliminate the problem of uneven luminous brightness of the display panel.

[0007] In addition, when the angle between the bottom surface of the first material layer and the side surface of the first material layer is between 60° and 160°, there can be sufficient connection area between the second electrode layer and the first material layer of the auxiliary electrode, avoiding the problem of disconnection between the second electrode layer and the first material layer, thereby ensuring the function of powering the second electrode layer through the auxiliary electrode.

[0008] In an implementation that may include the above embodiment, the auxiliary electrode further includes a second material layer, and the second material layer covers a top surface of the first material layer.

[0009] In an implementation that may include the above embodiments, the second material layer includes a bottom surface facing the array substrate, the bottom surface of the second material layer and the side surface of the first material layer form a recessed portion; the second electrode layer overlaps the auxiliary electrode in the recessed portion.

[0010] In an implementation that may include the above embodiment, the organic functional layer covers a top surface of the second material layer, and the organic functional layer overlaps the auxiliary electrode in the recessed portion.

[0011] In an implementation that may include the above-described embodiments, an etching rate of the material of the first material layer is greater than an etching rate of the material of the second material layer.

[0012] In an implementation that may include the above embodiments, the first material layer is a first metal layer, and the second material layer is a second metal layer.

[0013] In an implementation that may include the above embodiments, the material of the first metal layer is aluminum, and the material of the second metal layer is titanium or molybdenum.

[0014] In an implementation that may include the above embodiment, along a normal direction of a plane where the array substrate is located, a thickness of the second material layer is less than a thickness of the first material layer.

[0015] In an implementation that may include the above embodiment, a distance between an edge of a top surface of the first material layer and a side surface of the second material layer is less than or equal to 2 μm.

[0016] In an embodiment that may include the above-mentioned embodiments, the orthographic projections of the first material layer and the second material layer on the array substrate are both circles, or regular polygons with side lengths greater than four; the orthographic projection of the second material layer on the first material layer covers the top surface of the first material layer, and the area of the orthographic projection of the second material layer on the first material layer is greater than the top surface area of the first material layer.

[0017] In an embodiment that may include the above embodiments, the angle between the bottom surface of the first material layer and the side surface of the first material layer is equal to 90°; or, the angle between the bottom surface of the first material layer and the side surface of the first material layer is greater than 90°; or, the angle β between the bottom surface of the first material layer and the side surface of the first material layer satisfies the following relationship:

[0018] β=π-arcsinL1 / [(L1tanE0-L3)2 +L1 2 ] 1 / 2 ;

[0019] Among them, L1 is the thickness of the first material layer along the normal direction of the plane where the array substrate is located, L3 is the distance between the top edge of the first material layer and the side of the second material layer, and E0 is the evaporation angle when evaporating the organic functional layer.

[0020] In an embodiment that may include the above embodiment, along the normal direction of the plane where the array substrate is located, the thickness of the auxiliary electrode is to

[0021] In an embodiment that may include the above embodiment, the auxiliary electrode includes an auxiliary electrode block, and the auxiliary electrode block is insulated from the at least one electrode block.

[0022] In an implementation that may include the above embodiments, the auxiliary electrode includes at least one auxiliary electrode wire, the at least one electrode block is a plurality of electrode blocks, and the at least one auxiliary motor wire is located between the plurality of electrode blocks and insulated from the plurality of electrode blocks.

[0023] In an implementation that may include the above-mentioned embodiment, the at least one auxiliary electrode line is a plurality of auxiliary electrode lines, and the plurality of auxiliary electrode lines form a cross-grid structure.

[0024] In an implementation manner that may include the above embodiment, the auxiliary electrode is provided on the array substrate, and the auxiliary electrode is insulated from the at least one electrode block.

[0025] In an implementation that may include the above-mentioned embodiments, the auxiliary electrode also includes a second material layer and a third material layer, and the third material layer, the first material layer and the second material layer are stacked in sequence along the normal direction of the plane where the array substrate is located, and the bottom surface of the second material layer and the side surface of the first material layer are surrounded by a recessed portion.

[0026] In an implementation that may include the above embodiments, the side surface of the third material layer is flush with the bottom edge of the first material layer, or the side surface of the third material layer exceeds the bottom edge of the first material layer.

[0027] In an implementation that may include the above embodiments, the first material layer is a first metal layer, the second material layer is a second metal layer, and the third material layer is a third metal layer or an inorganic layer.

[0028] In an implementation that may include the above-described embodiments, an etching rate of the material of the third metal layer is less than an etching rate of the material of the first metal layer.

[0029] In an implementation that may include the above embodiments, the material of the third metal layer is titanium or molybdenum, the material of the first metal layer is aluminum, and the material of the second metal layer is titanium or molybdenum.

[0030] In an embodiment that may include the above-mentioned embodiment, a material of the inorganic layer includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0031] In an embodiment that may include the above-mentioned embodiments, the display panel also includes at least one first etching auxiliary block, the first etching auxiliary block is located between the auxiliary electrode and the array substrate, and the orthographic projection of the first etching auxiliary block on the array substrate covers the orthographic projection of the auxiliary electrode on the array substrate.

[0032] In an implementation that may include the above-mentioned embodiment, the material of the first etch auxiliary block is an inorganic material.

[0033] In an embodiment that may include the above-described embodiments, the inorganic material includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0034] In an embodiment that may include the above-mentioned embodiments, the display panel further includes at least one second etching auxiliary block, wherein the second etching auxiliary block is located between the auxiliary electrode and the organic functional layer, and the orthographic projection of the second etching auxiliary block on the array substrate covers the orthographic projection of the auxiliary electrode on the array substrate.

[0035] In an implementation that may include the above-mentioned embodiment, a material of the second etch auxiliary block includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0036] In an implementation that may include the above-mentioned embodiments, the auxiliary electrode is arranged in the same layer as the electrode block, and the auxiliary electrode also includes a second material layer and a third material layer, and the third material layer, the first material layer and the second material layer are stacked in sequence along the normal direction of the plane where the array substrate is located; the material of the first material layer includes at least one of silver, aluminum and neodymium, the material of the second material layer includes at least one of indium tin oxide and indium zinc oxide, and the material of the third material layer includes at least one of silver, aluminum, neodymium, indium tin oxide and indium zinc oxide.

[0037] In an implementation that may include the above-mentioned embodiments, the display panel further includes a pixel definition layer; the pixel definition layer has a plurality of pixel openings, each of which exposes a top surface of the electrode block; a first overlapping opening is further provided on the pixel definition layer, the first overlapping opening exposing the auxiliary electrode and the array substrate.

[0038] In an implementation that may include the above embodiments, the organic functional layer covers the pixel definition layer and covers the top surface of the electrode block in the pixel opening; the organic functional layer also covers the top surface of the array substrate in the first overlapping opening and the top surface of the auxiliary electrode.

[0039] In an implementation that may include the above embodiment, the first overlapping opening includes a side facing the auxiliary electrode, and a bottom surface intersecting with the side surface of the first overlapping opening, and the angle between the side surface of the first overlapping opening and the bottom surface of the first overlapping opening is an obtuse angle.

[0040] In an embodiment that may include the above embodiment, an angle between a side surface of the first overlapping opening and a bottom surface of the first overlapping opening is greater than 140°.

[0041] In an implementation that may include the above embodiment, a distance between an edge of a bottom surface of the first overlapping opening and an edge of a bottom surface of the auxiliary electrode is greater than or equal to 3 μm.

[0042] In an implementation that may include the above embodiment, the auxiliary electrode is disposed in the array substrate, and the auxiliary electrode is insulated from the electrode block.

[0043] In an implementation that may include the above-mentioned embodiments, the array substrate includes a substrate, and a first insulating layer, a first conductive layer, and a second insulating layer located on the substrate and stacked; the auxiliary electrode and the first conductive layer are both arranged on the first insulating layer; the second insulating layer includes a second overlapping opening, and the second overlapping opening exposes the auxiliary electrode and the first insulating layer; the electrode block is located on the second insulating layer.

[0044] In an embodiment that may include the above embodiments, the first insulating layer is an inorganic insulating layer.

[0045] In an implementation that may include the above embodiments, the display panel further includes at least one first etching auxiliary block, the first etching auxiliary block being located between the auxiliary electrode and the first insulating layer, and the orthographic projection of the first etching auxiliary block on the substrate covering the orthographic projection of the auxiliary electrode on the substrate.

[0046] In an implementation that may include the above-mentioned embodiment, the material of the first etch auxiliary block is an inorganic material.

[0047] In an embodiment that may include the above-described embodiments, the inorganic material includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0048] In an implementation that may include the above embodiments, the display panel further includes at least one second etching auxiliary block, the second etching auxiliary block being located between the auxiliary electrode and the organic functional layer, and the orthographic projection of the second etching auxiliary block on the substrate covering the orthographic projection of the auxiliary electrode on the substrate.

[0049] In an implementation that may include the above-mentioned embodiment, a material of the second etch auxiliary block includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0050] In an implementation that may include the above-mentioned embodiments, the display panel further includes a pixel definition layer, wherein the pixel definition layer is arranged on the second insulating layer, and the pixel definition layer has a plurality of pixel openings, and the pixel openings correspond to exposing the top surface of one of the electrode blocks; the pixel definition layer further includes a third overlapping opening, and the third overlapping opening is connected to the second overlapping opening to expose the auxiliary electrode and the first insulating layer.

[0051] In an implementation that may include the above embodiments, the organic functional layer covers the pixel definition layer and covers the top surface of the electrode block in the pixel opening; the organic functional layer also covers the top surface of the fourth insulating layer located in the second overlap opening and the top surface of the auxiliary electrode.

[0052] In an implementation that may include the above embodiments, the second electrode layer is a whole-layer structure.

[0053] In an implementation that may include the above embodiment, the display panel further includes a first power line; the first power line is connected to the auxiliary electrode, and the first power line is configured to provide a power signal to the auxiliary electrode.

[0054] A second aspect of an embodiment of the present application provides a method for manufacturing a display panel, for forming the display panel as described in any one of the above items, comprising:

[0055] An array substrate is provided with an auxiliary electrode and an electrode block, wherein the auxiliary electrode is provided on or within the array substrate; the auxiliary electrode comprises a first material layer, the first material layer comprising a bottom surface facing the array substrate and a side surface intersecting with the bottom surface of the first material layer, the bottom surface of the first material layer and the side surface of the first material layer forming an angle greater than or equal to 60° and less than or equal to 160°;

[0056] An organic functional layer and a second electrode layer are formed on the array substrate, and the second electrode layer is connected to the auxiliary electrode.

[0057] The method for manufacturing a display panel according to an embodiment of the present application is used to form any of the above-mentioned display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0059] Figure 1 Schematic diagram of a top view of a display panel according to some implementations of the embodiments of the present application;

[0060] Figure 2 for Figure 1 Schematic diagram of the cross-sectional structure of some implementation methods of the middle BB direction;

[0061] Figure 3 for Figure 2 A partial enlarged schematic diagram of point C in the middle;

[0062] Figure 4 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0063] Figure 5 Schematic diagrams of top views of display panels according to some other implementations of the embodiments of the present application;

[0064] Figure 6 A top view of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0065] Figure 7 is a schematic diagram of a deposition chamber when an organic functional layer and a second electrode layer are evaporated onto a substrate;

[0066] Figure 8 Schematic diagram of the auxiliary electrode being located in the first quadrant when the substrate rotates;

[0067] Figure 9 Schematic diagram of the auxiliary electrode being located in the second quadrant when the substrate rotates;

[0068] Figure 10 Schematic diagram showing the auxiliary electrode being located on the negative X-axis when the substrate rotates;

[0069] Figure 11 Schematic diagram of the auxiliary electrode being located in the third quadrant when the substrate rotates;

[0070] Figure 12Schematic diagram of the auxiliary electrode being located in the fourth quadrant when the substrate rotates;

[0071] Figure 13 Schematic diagram showing that the auxiliary electrode is located on the positive X-axis when the substrate rotates;

[0072] Figure 14 for Figure 6 Cross-sectional view of the middle MM;

[0073] Figure 15 for Figure 6 Cross-sectional view of P1-P1;

[0074] Figure 16 for Figure 6 Cross-sectional view of P2-P2;

[0075] Figure 17 A top view of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0076] Figure 18 for Figure 17 Cross-sectional views of MM, P1-P1 and P2-P2;

[0077] Figure 19 A top view of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0078] Figure 20 A top view of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0079] Figure 21 Schematic diagrams of top views of display panels according to some other implementations of the embodiments of the present application;

[0080] Figure 22 is a cross section of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0081] Figure 23 is a cross section of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0082] Figure 24 is a cross section of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0083] Figure 25 is a cross section of an auxiliary electrode in some other implementations of the embodiments of the present application;

[0084] Figure 26 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0085] Figure 27 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0086] Figure 28 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0087] Figure 29 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0088] Figure 30 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0089] Figure 31 BB is a schematic cross-sectional structural diagram of some other implementations of the embodiments of the present application;

[0090] Figure 32 for Figure 31 A local enlarged schematic diagram of the T in the middle;

[0091] Figure 33 This is a partial enlarged schematic diagram of point T in some other implementations of the embodiments of the present application;

[0092] Figure 34 This is a partial enlarged schematic diagram of point T in some other implementations of the embodiments of the present application;

[0093] Figure 35 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0094] Figure 36 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0095] Figure 37 This is a partial enlarged schematic diagram of point C in some other implementations of the embodiments of the present application;

[0096] Figure 38 This is a flow chart of a method for manufacturing a display panel according to an embodiment of the present application;

[0097] Figure 39 A schematic diagram of providing an array substrate;

[0098] Figure 40 Schematic diagram of forming an anode layer on an array substrate in some implementations of the embodiments of the present application;

[0099] Figure 41 A schematic diagram of patterning the anode layer to form an auxiliary electrode and an anode;

[0100] Figure 42 Schematic diagram of forming an auxiliary electrode layer on an array substrate in some implementations of the embodiments of the present application;

[0101] Figure 43 A schematic diagram of patterning the auxiliary electrode layer to form an auxiliary electrode;

[0102] Figure 44 Schematic diagram of forming an auxiliary electrode layer on an array substrate in some other implementations of the embodiments of the present application;

[0103] Figure 45 A schematic diagram of patterning the auxiliary electrode layer to form an auxiliary electrode;

[0104] Figure 46 is a schematic diagram of forming an anode layer;

[0105] Figure 47 A schematic diagram of patterning the anode layer to form an anode;

[0106] Figure 48 is a schematic diagram of forming a third material film layer on the array substrate;

[0107] Figure 49 A schematic diagram of patterning a third material film layer to form a third material layer;

[0108] Figure 50 A schematic diagram of forming a first material film layer and a second material film layer;

[0109] Figure 51 A schematic diagram of patterning the first material film layer and the second material film layer to form the first material layer and the second material layer;

[0110] Figure 52 is a schematic diagram of forming an anode layer;

[0111] Figure 53 A schematic diagram of patterning the anode layer to form an anode;

[0112] Figure 54 is a schematic diagram of forming a second etching auxiliary layer on the auxiliary electrode layer;

[0113] Figure 55 A schematic diagram of patterning the second etch auxiliary layer to form a second etch auxiliary block;

[0114] Figure 56 is a schematic diagram of etching the exposed auxiliary electrode layer;

[0115] Figure 57 is a schematic diagram of forming a first etching auxiliary layer on an array substrate;

[0116] Figure 58 A schematic diagram of patterning the first etch auxiliary layer to form a first etch auxiliary block;

[0117] Figure 59is a schematic diagram of forming an auxiliary electrode layer;

[0118] Figure 60 A schematic diagram of patterning the auxiliary electrode layer to form an auxiliary electrode;

[0119] Figure 61 Schematic diagram of sequentially forming an active layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer and a first insulating layer on a substrate;

[0120] Figure 62 is a schematic diagram of forming a first conductive layer on a first insulating layer;

[0121] Figure 63 A schematic diagram of patterning the first conductive layer to form auxiliary electrodes and connecting lines;

[0122] Figure 64 is a schematic diagram of forming a second insulating layer on the first conductive layer;

[0123] Figure 65 is a schematic diagram of forming a second etching auxiliary layer on the first conductive layer;

[0124] Figure 66 A schematic diagram of patterning the second etch auxiliary layer to form a second etch auxiliary block;

[0125] Figure 67 A schematic diagram of etching the exposed first conductive layer;

[0126] Figure 68 is a schematic diagram of forming a first etching auxiliary layer on the first insulating layer;

[0127] Figure 69 A schematic diagram of patterning the first etch auxiliary layer to form a first etch auxiliary block;

[0128] Figure 70 is a schematic diagram of forming a first conductive layer on a first etch auxiliary block;

[0129] Figure 71 A schematic diagram of patterning the first conductive layer to form auxiliary electrodes and connecting lines;

[0130] Figure 72 is a schematic diagram of forming an anode layer on the second insulating layer;

[0131] Figure 73 A schematic diagram of patterning the anode layer to form an anode;

[0132] Figure 74 Schematic diagram of forming a pixel definition layer, an organic functional layer, a cathode layer, and an encapsulation layer on an anode in some implementations of the embodiments of the present application;

[0133] Figure 75 This is a schematic diagram of forming a pixel definition layer, an organic functional layer, a cathode layer, and an encapsulation layer on an anode in some other implementations of the embodiments of the present application.

[0134] Description of reference numerals:

[0135] 10-array substrate;

[0136] 101-substrate; 102-active layer;

[0137] 103 - a third insulating layer; 104 - a gate;

[0138] 105 - capacitor lower plate; 106 - fourth insulating layer;

[0139] 107-capacitor upper plate; 108-capacitor;

[0140] 109-fifth insulating layer; 110-source and drain;

[0141] 111 - first via hole; 112 - thin film transistor;

[0142] 113-first insulating layer; 115-connecting wire;

[0143] 116 - second insulating layer; 117 - third via hole;

[0144] 118 - second overlapping opening; 119 - fourth via hole;

[0145] 20- auxiliary electrode;

[0146] 210-first material layer; 211-recessed portion;

[0147] 2101-first material film layer; 220-second material layer;

[0148] 2201- second material film layer; 230- third material layer;

[0149] 2301 - third material film layer; 240 - first etching auxiliary block;

[0150] 2401-first etching auxiliary layer; 250-second etching auxiliary block;

[0151] 2501-second etching auxiliary layer;

[0152] 30- anode layer;

[0153] 310-anode;

[0154] 40-pixel definition layer;

[0155] 410 - pixel opening; 420 - first overlapping opening;

[0156] 430 - third lap opening;

[0157] 50-organic functional layer;

[0158] 60- cathode layer;

[0159] 610-lap joint;

[0160] 70- first power line;

[0161] 80- Second power line;

[0162] 90-encapsulation layer;

[0163] 100-substrate;

[0164] 200-mask;

[0165] 300-evaporation source;

[0166] 400-organic evaporation source;

[0167] 500-cathode evaporation source. DETAILED DESCRIPTION

[0168] As described in the background art, large-sized display panels are prone to the technical problem of uneven luminous brightness. The inventors have discovered that the cause of this technical problem is that a display panel typically includes an array substrate, a first electrode layer, an organic functional layer, and a second electrode layer stacked in sequence. The second electrode layer is typically provided as a single layer, and voltage is supplied to the second electrode layer from both sides of the second electrode layer, thereby causing the organic functional layer to emit light. However, due to the large area of the second electrode layer of the display panel, the resistance of the second electrode layer is relatively large. A large voltage drop occurs during the transmission of voltage from both sides of the second electrode layer to the middle region of the second electrode layer, resulting in inconsistent voltage across the second electrode layer, which in turn leads to uneven luminous brightness of the display panel.

[0169] In response to the above technical problems, an embodiment of the present application provides a display panel, in which an auxiliary electrode is arranged on or in an array substrate, and the auxiliary electrode is connected to the second electrode layer, so that the voltage can be input to the second electrode layer through the auxiliary electrode, thereby reducing the voltage drop of the second electrode layer and alleviating or eliminating the problem of uneven luminous brightness of the display panel.

[0170] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0171] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only intended to illustrate the contents of the embodiments of the present application. In addition, the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions.

[0172] The display panel of an embodiment of the present application includes an array substrate, a first electrode layer, an organic functional layer, and a second electrode layer, which are stacked in sequence. The first electrode layer and the second electrode layer are used to provide carriers of different polarities, namely holes and electrons, to the organic functional layer. The holes and electrons combine within the organic functional layer to emit light. The first electrode layer can be an anode layer that provides holes, and the second electrode layer can be a cathode layer that provides electrons; conversely, the first electrode layer can also be a cathode layer that provides electrons, and the second electrode layer can be an anode layer that provides holes. The following describes the solution of the embodiment of the present application using the first electrode layer as the anode layer and the second electrode layer as the cathode layer as an example.

[0173] refer to Figure 1 and Figure 2 The array substrate 10 is used to support the display panel film layers or devices disposed on the array substrate 10, and to control the current flowing into the organic functional layer. For example, the array substrate 10 may include a substrate 101, and a first insulating layer 113, a first conductive layer, and a second insulating layer 116 stacked on the substrate 101. The array substrate 10 may also include an active layer 102, a third insulating layer 103, a second conductive layer, a fourth insulating layer 106, a third conductive layer, a fifth insulating layer 109, and a fourth conductive layer stacked between the substrate 101 and the first insulating layer 113.

[0174] The material of the substrate 101 can be one of a glass substrate, a quartz substrate, a resin substrate, etc.; the material of the substrate 101 can also be a flexible substrate, such as polyimide, etc. When the substrate 101 is a flexible substrate, the substrate 101 can be a multilayer structure in which organic layers and inorganic layers are alternately stacked. Exemplarily, the multilayer structure may include an inorganic layer, an organic layer, and an inorganic layer stacked in sequence, such as silicon oxide, polyimide, and silicon oxide stacked in sequence; the multilayer structure may also include an organic layer, an inorganic layer, an organic layer, and an inorganic layer stacked in sequence, such as polyimide, silicon oxide, polyimide, and silicon oxide stacked in sequence. The multilayer structure in which the organic layer and the inorganic layer are alternately stacked can take into account the flexibility and strength of the substrate 101, so that the display panel has a bendable function and can resist breakage and deformation.

[0175] An active layer 102, a third insulating layer 103, a second conductive layer, a fourth insulating layer 106, a third conductive layer, a fifth insulating layer 109, a fourth conductive layer, a first insulating layer 113, and a first conductive layer are stacked on the substrate 101. The active layer 102, the second conductive layer, the third conductive layer, the fourth conductive layer, and the first conductive layer can all be patterned to form a pixel driving circuit having a thin film transistor 112 and a capacitor 108. For example, there can be multiple thin film transistors 112 and capacitors 108, and the pixel driving circuit formed by the thin film transistors 112 and capacitors 108 can be arranged in an array on the substrate 101.

[0176] refer to Figure 2 Active layer 102 is disposed on substrate 101 and patterned to form an active region of thin film transistor 112. For example, the material of active layer 102 may be polysilicon; an oxide semiconductor, such as indium gallium zinc oxide (IGZO) or indium tin zinc oxide (IZTO); or a compound semiconductor, such as a Group II-VI compound semiconductor or a Group III-V compound semiconductor.

[0177] The third insulating layer 103 covers the active layer 102 and the surface of the substrate 101 not covered by the active layer 102 to insulate the active layer 102. For example, the material of the third insulating layer 103 may be an inorganic insulating material, for example, silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide (Al2O3) and silicon oxynitride (SiNx). X O Y ) at least one of.

[0178] A second conductive layer is provided on the third insulating layer 103, and the second conductive layer is usually patterned to form structures such as the gate 104 of the thin film transistor 112 and the lower plate 105 of the capacitor 108. Exemplarily, the gate 104 can be arranged opposite to the active layer 102. The lower plate 105 of the capacitor is spaced apart from the gate 104. Exemplarily, the material of the second conductive layer may include at least one of molybdenum (Mo), titanium (Ti), aluminum (Al) and copper (Au). It is understandable that the material of the second conductive layer may also include other conductive materials, which will not be described in detail in the embodiments of the present application.

[0179] A fourth insulating layer 106 is provided on the second conductive layer. The fourth insulating layer 106 covers the second conductive layer and the surface of the third insulating layer 103 not covered by the second conductive layer, so as to insulate the second conductive layer. For example, the material of the fourth insulating layer 106 may include silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide (Al2O3) and silicon oxynitride (SiNx). X O Y ) at least one of.

[0180] A third conductive layer is disposed on the fourth insulating layer 106. The third conductive layer is typically patterned to form a structure such as a capacitor upper plate 107. The capacitor upper plate 107 is disposed opposite the capacitor lower plate 105, and the fourth insulating layer 106 is located between the capacitor upper plate 107 and the capacitor lower plate 105, thereby forming a capacitor 108. Exemplarily, the material of the third conductive layer may include at least one of molybdenum (Mo), titanium (Ti), aluminum (Al), and copper (Au).

[0181] A fifth insulating layer 109 is provided on the third conductive layer. The fifth insulating layer 109 covers the third conductive layer and covers the surface of the fourth insulating layer 106 not covered by the third conductive layer, so as to insulate the third conductive layer. For example, the fifth insulating layer 109 may be an inorganic insulating layer, such as silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide (Al2O3) and silicon oxynitride (SiNx). X O Y ) at least one of.

[0182] A fourth conductive layer is provided on the fifth insulating layer 109. The fourth conductive layer is typically patterned to form structures such as the source and drain electrodes 110 of the thin film transistor 112. The source and drain electrodes 110 may be arranged opposite the active layer 102. Exemplarily, a first via 111 may also be provided in the array substrate 10. The first via 111 sequentially penetrates the fifth insulating layer 109, the fourth insulating layer 106, and the third insulating layer 103. The source and drain electrodes 110 are connected to the active layer 102 through the first via 111. Exemplarily, the material of the fourth conductive layer may include at least one of molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Au), silver (Ag), indium tin oxide (ITO), and indium zinc oxide (IZO).

[0183] A first insulating layer 113 is provided on the fourth conductive layer. The first insulating layer 113 covers the fourth conductive layer and covers the surface of the fifth insulating layer 109 not covered by the fourth conductive layer to insulate the fourth conductive layer. Exemplarily, the material of the first insulating layer 113 can be an organic insulating layer, for example, it can include a photosensitive resin. The material of the first insulating layer 113 can also be an inorganic insulating layer, for example, it can include silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide (Al2O3) and silicon oxynitride (SiN X O Y The first insulating layer 113 may be provided with a second via hole 114 .

[0184] A first conductive layer is disposed on the first insulating layer 113. The first conductive layer is typically patterned to form structures such as a connecting line 115. Exemplarily, the connecting line 115 is connected to the source and drain electrodes 110 through a second via 114. Exemplarily, the material of the first conductive layer may include at least one of molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Au), silver (Ag), indium tin oxide (ITO), and indium zinc oxide (IZO).

[0185] The array substrate 10 also includes a second insulating layer 116, which covers the first conductive layer and the surface of the first insulating layer 113 not covered by the first conductive layer, thereby insulating the first conductive layer and improving the flatness of the array substrate 10. Exemplarily, the material of the second insulating layer 116 may include a resin material. It will be understood that the substrate 101 and the array circuit layer on the substrate 101 form the array substrate 10, and the pixel driving circuit is located in the array circuit layer. The light-emitting device layer includes an anode layer, an organic functional layer 50, and a cathode layer 60, and is located on the array substrate 10.

[0186] An anode layer may be provided on the array substrate 10 to provide holes for the organic functional layer 50. For example, the anode layer may be provided on the second insulating layer 116. Exemplarily, the anode layer includes at least one anode 310. The at least one anode 310 may be a plurality of anodes 310, which may be arranged in an array. The anodes 310 may be provided corresponding to the thin-film transistors 112 in the array substrate 10, i.e., each anode 310 may be connected to a corresponding thin-film transistor 112 via a connecting wire 115. For example, a third via 117 may be provided on the planarization layer 116, and each anode 310 may be electrically connected to a corresponding connecting wire 115 and thin-film transistor 112 via the third via 117, so that the switching of the thin-film transistor 112 can control whether power is supplied to the anode 310, thereby controlling whether the organic functional layer 50 emits light. Exemplarily, the material of the anode layer may be indium tin oxide / silver / indium tin oxide (ITO / Ag / ITO). It is understood that the anode layer may also be made of other materials.

[0187] A pixel definition layer 40 is also provided on the array substrate 10. Figure 2 The pixel definition layer 40 covers the anode 310 and the surface of the array substrate 10 not covered by the anode 310. A plurality of pixel openings 410 are formed on the pixel definition layer 40. Each pixel opening 410 corresponds to an anode 310. The pixel opening 410 exposes the top surface of the anode 310.

[0188] The organic functional layer 50 is covered on the pixel definition layer 40 and covers the top surface of the anode 310 exposed in the pixel opening 410 to be connected to the anode 310 so that the anode 310 can provide holes for the organic functional layer 50. It should be noted that the organic functional layer 50 is a multi-layer organic film layer stacked. For example, the multi-layer organic film layer may include a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer stacked in sequence along the normal direction of the plane where the array substrate 10 is located. The cathode layer 60 is covered on the organic functional layer 50. For example, the cathode layer 60 can be covered on the electron injection layer to provide electrons to the organic functional layer 50. The hole injection layer is in contact with the anode 310, and the electron injection layer is in contact with the cathode layer 60. The multi-layer organic film layer may also include a light-emitting material layer, which is located between the hole transport layer and the electron transport layer and is located in the pixel opening 410. The anode 310 provides holes, which enter the light-emitting material layer through the hole injection layer and the hole transport layer; the cathode layer 60 provides electrons, which enter the light-emitting material layer through the electron injection layer and the electron transport layer, and the holes and electrons recombine in the light-emitting material layer to emit light.

[0189] It is understandable that the organic functional layer 50 may also include other organic film layers, which will not be described in detail in the embodiment of the present application.

[0190] refer to Figure 1 The cathode layer 60 may include a predetermined region A. The predetermined region A may be a region where the voltage value within the cathode layer 60 is lower than the predetermined voltage value when power is supplied to the cathode layer 60. In the predetermined region A, since the voltage value within the cathode layer 60 is lower than the predetermined voltage value, the corresponding luminescent material layer within the organic functional layer 50 emits a lower luminance than the luminance of other regions, resulting in the display panel's luminance uniformity failing to meet requirements.

[0191] For example, the range of the preset area A can be determined by simulation or testing. Figure 1 Two second power lines 80 may be provided within the array substrate 10. The two second power lines 80 may be located on either side of the cathode layer 60, respectively. Each second power line 80 is electrically connected to the cathode layer 60 to supply power to the cathode layer 60 through both sides of the cathode layer 60. During the process of supplying power to the cathode layer 60 via the second power lines 80, a voltage value is present at each location within the cathode layer 60. If this voltage value is lower than a preset voltage value, and the difference between this voltage value and the voltage input to the second power lines 80 is too large, resulting in an excessively large voltage drop across the cathode layer 60, and thus failing to meet the required luminance uniformity of the display panel, the region of the cathode layer 60 corresponding to this voltage value is then referred to as the preset region A.

[0192] It is understandable that, when determining the preset area A, the second power line 80 may be located at other positions on the array substrate 10 as long as it can supply power to the cathode layer 60 .

[0193] refer to Figure 2 The display panel may further include an encapsulation layer 90 , which covers the cathode layer 60 and encapsulates the display panel to prevent impurities such as water and oxygen from entering the display panel and affecting the display effect of the display panel.

[0194] refer to Figure 1 and Figure 2 The display panel of the embodiment of the present application further includes at least one auxiliary electrode 20, which is connected to the cathode layer 60. For example, the auxiliary electrode 20 can be connected to a predetermined region A of the cathode layer 60. When a voltage signal is input to the cathode layer 60, the cathode layer 60 can be energized through the auxiliary electrode 20, thereby reducing the voltage drop in the cathode layer 60 and alleviating or eliminating the problem of uneven brightness of the display panel.

[0195] The auxiliary electrode 20 can be disposed on the array substrate 10 or within the array substrate 10. Figure 2 and Figure 3The auxiliary electrode 20 may be provided with a recessed portion 211 on its side surface, and the organic functional layer 50 covers the top surface of the auxiliary electrode 20. The organic functional layer 50 and the cathode layer 60 may form an overlapping portion 610 overlapping the auxiliary electrode 20 within the recessed portion 211. Since the auxiliary electrode 20 has the recessed portion 211 on its side surface, the edge of the top surface of the auxiliary electrode 20 protrudes from the side surface of the auxiliary electrode 20. When the organic functional layer 50 and the cathode layer 60 cover the auxiliary electrode 20, the organic functional layer 50 and the cathode layer 60 are broken at the edge of the top surface of the auxiliary electrode 20, thereby allowing the organic functional layer 50 and the cathode layer 60 to form an overlapping portion 610 overlapping the auxiliary electrode 20 within the recessed portion 211, thereby enabling the cathode layer 60 to be connected to the auxiliary electrode 20.

[0196] In some possible implementations of the present application, reference is made to Figure 2 The auxiliary electrode 20 can be disposed on the array substrate 10 , and the auxiliary electrode 20 is insulated from the anode 310 .

[0197] For example, the material of the auxiliary electrode 20 and the material of the anode 310 may be different.

[0198] The auxiliary electrode 20 may include a conductive metal layer, and the recessed portion 211 may be formed on a side surface of the conductive metal layer by lateral etching.

[0199] Optionally, refer to Figure 3 The auxiliary electrode 20 may also include a first material layer 210. The first material layer 210 may be disposed on the array substrate 10. For example, the first material layer 210 may be disposed on the second insulating layer 116. The auxiliary electrode 20 may also include a second material layer 220, which covers the top surface of the first material layer 210. Exemplarily, the second material layer 220 includes a bottom surface facing the array substrate 10, and the bottom surface of the second material layer 220 and the side surface of the first material layer 210 may enclose a recessed portion 211. The cathode layer 60 may overlap the auxiliary electrode 20 within the recessed portion 211.

[0200] For example, the etching rate of the material of the first material layer 210 is greater than the etching rate of the material of the second material layer 220. During the manufacturing process of the display panel, the first material layer 210 and the second material layer 220 can be etched simultaneously by wet etching. Because the etching rate of the material of the first material layer 210 is greater than the etching rate of the material of the second material layer 220, during the etching process, the etching amount of the side surface of the first material layer 210 is greater than the etching amount of the side surface of the second material layer 220, thereby forming a recessed portion 211 with the bottom surface of the second material layer 220 and the side surface of the first material layer 210.

[0201] For example, the first material layer 210 may be a first metal layer, and the second material layer 220 may be a second metal layer. For example, the first metal layer may be made of aluminum (Al), and the second metal layer may be made of titanium (Ti) or molybdenum (Mo).

[0202] For example, along the normal direction of the plane where the array substrate 10 is located, that is, Figure 3 In the vertically upward direction shown in , the thickness L2 of the second material layer 220 may be less than the thickness L1 of the first material layer 210 , so that the organic functional layer 50 and the cathode layer 60 can be broken at the top edge of the second material layer 220 .

[0203] For example, refer to Figure 3 The distance L3 between the top edge of the first material layer 210 and the side surface of the second material layer 220 can be less than or equal to 2μm. For example, the distance L3 can be 2μm, 1.5μm, or 1μm. The organic functional layer 50 and the cathode layer 60 can be formed by evaporation. When evaporating the organic functional layer 50 and the cathode layer 60, the distance L3 less than or equal to 2μm can prevent the second material layer 220 from blocking the material of the organic functional layer 50 and the cathode layer 60 during the evaporation process, allowing the organic functional layer 50 and the cathode layer 60 to enter the recessed portion 211 and overlap with the auxiliary electrode 20.

[0204] Alternatively, refer to Figure 4 The auxiliary electrode 20 may also include a third material layer 230, a first material layer 210, and a second material layer 220 stacked in sequence, wherein the third material layer 230 is disposed on the array substrate 10, and the first material layer 210 is disposed on the third material layer 230. The etching rate of the material of the first material layer 210 is greater than the etching rate of the material of the second material layer 220. The bottom surface of the second material layer 220 and the side surface of the first material layer 210 form a recessed portion 211.

[0205] During the manufacturing process of the display panel, for example, the first material layer 210 and the second material layer 220 can be etched simultaneously by wet etching. Since the etching rate of the material of the first material layer 210 is greater than the etching rate of the material of the second material layer 220, during the etching process, the etching amount of the side surface of the first material layer 210 is greater than the etching amount of the side surface of the second material layer 220, thereby enabling the bottom surface of the second material layer 220 and the side surface of the first material layer 210 to enclose a recessed portion 211. In addition, the third material layer 230 can also improve the bonding force between the first material layer 210 and the array substrate 10, thereby preventing the first material layer 210 from separating from the array substrate 10 and affecting the reliability of the display panel.

[0206] For example, refer to Figure 4The first material layer 210 includes a bottom surface that is in contact with the third material layer 230, and the side surface of the third material layer 230 is flush with the bottom edge of the first material layer 210, or the side surface of the third material layer 230 extends beyond the bottom edge of the first material layer 210. For example, the distance L4 between the bottom edge of the first material layer 210 and the side surface of the third material layer 230 can be greater than or equal to zero. If the side surface of the third material layer 230 is located below the bottom surface of the first material layer 210, the organic functional layer 50 and the cathode layer 60 will enter the space between the side surface of the third material layer 230 and the bottom surface of the first material layer 210, resulting in the cathode layer 60 being unable to overlap with the side surface of the first material layer 210. By setting the distance L4 to be greater than or equal to zero, the above problem can be avoided, ensuring that the organic functional layer 50 and the cathode layer 60 can enter the recessed portion 211 and overlap with the first material layer 210.

[0207] For example, the first material layer 210 may be a first metal layer, the second material layer 220 may be a second metal layer, and the third material layer 230 may be a third metal layer or an inorganic layer.

[0208] When the first material layer 210 is a first metal layer, the second material layer 220 is a second metal layer, and the third material layer 230 is a third metal layer, the etching rate of the materials of the third metal layer and the second metal layer can be lower than the etching rate of the material of the first metal layer. During the formation of the auxiliary electrode, the amount of etching of the second metal layer and the third metal layer can be reduced, thereby enabling the bottom surface of the second metal layer and the side surface of the first metal layer to enclose a recessed portion 211. At the same time, it can also prevent the side surface of the third metal layer from being located below the bottom surface of the first metal layer, thereby affecting the overlap of the organic functional layer 50 and the cathode layer 60 with the first metal layer. For example, the material of the first metal layer can be aluminum (Al), etc., and the materials of the second metal layer and the third metal layer can be titanium (Ti) or molybdenum (Mo), etc.

[0209] When the first material layer 210 is a first metal layer, the second material layer 220 is a second metal layer, and the third material layer 230 is an inorganic layer, since the etching rate of the inorganic layer material is lower than the etching rate of the metal, and the etching rate of the second metal layer material is lower than the etching rate of the first metal layer material, the amount of etching of the inorganic layer and the second metal layer can be reduced, thereby forming a recessed portion 211 on the side of the first metal layer. At the same time, it can also prevent the edge of the inorganic layer from being located at the bottom of the first metal layer and affecting the overlap of the organic functional layer 50 and the cathode layer 60 with the first metal layer. Exemplarily, the material of the inorganic layer may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0210] For example, refer to Figure 3 or Figure 4, along the normal direction of the plane where the array substrate 10 is located, the thickness D of the auxiliary electrode 20 can be to This is to avoid the problem that the organic functional layer 50 and the cathode layer 60 cannot be broken at the edge of the second material layer 220 due to the small thickness D of the auxiliary electrode 20, thereby ensuring that the organic functional layer 50 and the cathode layer 60 can overlap with the first material layer 210 in the recessed portion 211, thereby ensuring that the cathode layer 60 can be electrically connected to the auxiliary electrode 20. The orthographic projection of the auxiliary electrode 20 on the array substrate 10 can be a triangle or a rectangle. For example, referring to Figure 6 When the auxiliary electrode 20 includes at least a first material layer 210 and a second material layer 220 stacked in sequence along the normal direction of the plane where the array substrate 10 is located, the orthographic projections of the first material layer 210 and the second material layer 220 on the array substrate 10 can both be squares, the first material layer 210 includes a top surface that is bonded to the second material layer 220, the orthographic projection of the second material layer 220 on the array substrate 10 covers the orthographic projection of the first material layer 210 on the array substrate 10, and the area of the orthographic projection of the second material layer 220 on the array substrate 10 is greater than the top surface area of the first material layer 210.

[0211] The organic functional layer 50 and the cathode layer 60 can be formed on the array substrate 10 having the auxiliary electrode 20 by evaporation. Figure 7 The figure shows a schematic diagram of the structure of the evaporation chamber. The substrate 100, which includes the array substrate 10 and the auxiliary electrode 20 located on the array substrate 10, is installed upside down on the top of the evaporation chamber. That is to say, the auxiliary electrode 20 on the array substrate 10 faces the bottom surface of the evaporation chamber. A mask 200 is provided on the side of the substrate 100 facing the bottom surface of the evaporation chamber. The normal line P0 of the evaporation source 300 and the vertical center line S of the substrate 100 can be arranged in parallel. Alternatively, there can also be an angle between the normal line P0 of the evaporation source 300 and the vertical center line S of the substrate 100. During the evaporation process, the evaporation source 300 emits an evaporation beam, and the evaporation beam travels along Figure 7 The direction indicated by the dashed arrow passes through the mask 200 and is evaporated onto the substrate 100. Simultaneously, the substrate 100 and the mask 200 rotate about the vertical centerline S, thereby forming an organic functional layer 50 or a cathode layer 60 on the surface of the substrate 100. The organic functional layer 50 or the cathode layer 60 covers the top surface of the auxiliary electrode 20 and forms an overlapping portion with the auxiliary electrode 20. It should be noted that the above description of the structure of the evaporation chamber is merely an example to facilitate the description of the technical solutions of the embodiments of the present application and should not be construed as limiting the technical solutions of the embodiments of the present application.

[0212] refer to Figure 8 、 Figure 9 、 Figure 10 、 Figure 11、 Figure 12 and Figure 13 , are schematic diagrams of the bottom view of the evaporation chamber. Among them, the coordinate system XOY is the rectangular coordinate system in the bottom view of the evaporation chamber, and the center point of the substrate 100 coincides with the center point O of the rectangular coordinate system XOY. The dot-dashed line MM is the center line of the auxiliary electrode 20 in the first direction, and the dot-dashed line NN is the center line of the auxiliary electrode 20 in the second direction, and the second direction is perpendicular to the first direction. For example, referring to Figures 8 to 13 During the evaporation process, the substrate 100 can rotate counterclockwise around the center point O, and the auxiliary electrode 20 passes through the first quadrant, the second quadrant, the negative X-axis, the third quadrant, the fourth quadrant and the positive X-axis in sequence.

[0213] The evaporation path of the evaporation source mentioned below refers to the exit path of the evaporated material. The evaporation path of all evaporation beams emitted by the evaporation source is taken as an example of the evaporation path of the evaporation beam emitted from the center point of the evaporation source, so as to facilitate the explanation of the technical solution of the embodiment of the present application.

[0214] by Figure 8 and Figure 9 Taking the case where the auxiliary electrode 20 is located in the first quadrant and the case where the auxiliary electrode 20 is located in the second quadrant as an example, during the rotation of the substrate 100, the evaporation surface of the evaporation source 300 gradually changes. Figure 6 , P1P1 is the evaporation path of the evaporation source 300 when the auxiliary electrode 20 is located in the first quadrant, and P2P2 is the evaporation path of the evaporation source 300 when the auxiliary electrode 20 is located in the second quadrant. Figure 14 ,for Figure 6 The cross-sectional view of the auxiliary electrode 20 on the MM plane can represent the contact area between the evaporation beam of the evaporation source 300 and the auxiliary electrode 20 on the MM plane. Figure 15 and Figure 16 , are cross-sectional views of the auxiliary electrode 20 on the P1-P1 plane and the P2-P2 plane, respectively. Figure 14 、 Figure 15 and Figure 16 The cross-sectional views along the MM plane, the P1-P1 plane, and the P2-P2 plane are all different. In other words, as the substrate 100 rotates, the contact area between the evaporation beam of the evaporation source 300 and the auxiliary electrode 20 continuously changes, reducing the uniformity of the connection between the organic functional layer 50 and cathode layer 60 formed by evaporation and the auxiliary electrode 20.

[0215] refer to Figure 14 The thickness of the first material layer 210 is L1, the angle between the side and bottom of the first material layer 210 is β1, and the distance between the top edge and the bottom edge of the first material layer 210 is L 31 , we can get:

[0216]

[0217] refer to Figure 15 The angle between the side and bottom of the first material layer 210 is β2, and the distance between the top edge and the bottom edge of the first material layer 210 is L 32 , we can get:

[0218]

[0219] refer to Figure 6 , the angle between the evaporation path P1P1 and the dot-dashed line MM is θ, and we can get:

[0220]

[0221] From formulas (1), (2) and (3), we can obtain:

[0222] tanβ2=tanβ1cosθ (4);

[0223] It can be seen from formula (4) that when the substrate 100 rotates, the angle β between the side surface of the first material layer 210 in the auxiliary electrode 20 and its bottom surface is constantly changing, that is, the shape of the auxiliary electrode 20 on the cross section of the evaporation path is constantly changing, and the contact area between the evaporation beam of the evaporation source 300 and the auxiliary electrode 20 is constantly changing, which reduces the uniformity of the connection between the organic functional layer 50 and the cathode layer 60 formed by evaporation and the auxiliary electrode 20.

[0224] Optionally, the orthographic projection of the auxiliary electrode 20 on the array substrate 10 may also be a circle or a regular polygon with a side length greater than four. Figure 17 The orthographic projections of the first material layer 210 and the second material layer 220 on the array substrate 10 can both be circles or regular polygons with a side length greater than four. The orthographic projection of the second material layer 220 on the first material layer 210 covers the top surface of the first material layer 210, and the area of the orthographic projection of the second material layer 220 on the first material layer 210 is greater than the area of the top surface of the first material layer 210.

[0225] refer to Figure 18 , is the cross section of the auxiliary electrode 20 on the MM plane, the P1-P1 plane, and the P2-P2 plane. It can be seen that the cross section shapes on the MM plane, the P1-P1 plane, and the P2-P2 plane are all the same. That is, when the substrate 100 rotates, the contact area between the evaporation beam of the evaporation source 300 and the auxiliary electrode 20 does not change, thereby improving the uniformity of the connection between the formed organic functional layer 50 and the cathode layer 60 and the auxiliary electrode 20. For example, referring to Figure 19 , the orthographic projections of the first material layer 210 and the second material layer 220 on the array substrate 10 may both be regular octagons. Figure 20 The orthographic projections of the first material layer 210 and the second material layer 220 on the array substrate 10 may both be regular hexadecagons. It is understood that the orthographic projections of the first material layer 210 and the second material layer 220 on the array substrate 10 may also be other regular polygons that are approximate to a circle. The greater the number of sides of a regular polygon, the better the uniformity of the overlap between the auxiliary electrode 20 and the organic functional layer 50 and the cathode layer 60. This embodiment of the present application will not be further described.

[0226] The auxiliary electrode 20 may include an auxiliary electrode block, that is, the auxiliary electrode 20 is a block structure, and the auxiliary electrode block is insulated from the anode 310. For example, referring to Figure 1 The number of auxiliary electrode blocks can be one, and the orthographic projection of one auxiliary electrode block on the array substrate 10 can be located at the center of the orthographic projection of the predetermined area A on the array substrate 10, so that one auxiliary electrode block can be connected to the center of the predetermined area A of the cathode layer 60. The center of the predetermined area A is usually the lowest voltage point. By arranging the auxiliary electrode block at the center of the predetermined area A of the cathode layer 60, the cathode layer 60 can be energized through the center of the predetermined area A, effectively increasing the voltage value of the predetermined area A, thereby reducing the voltage drop of the cathode layer 60 and alleviating or eliminating the problem of uneven brightness of the display panel.

[0227] refer to Figure 5 The number of auxiliary electrode blocks can also be multiple, and the positive projections of multiple auxiliary electrodes 20 on the array substrate 10 can be evenly arranged on the positive projection of the preset area A on the array substrate 10 to improve the uniformity of the arrangement of the multiple auxiliary electrode blocks, thereby further improving the uniformity of the voltage value in the cathode layer 60, reducing the voltage drop in the cathode layer 60, and alleviating or eliminating the problem of uneven luminous brightness of the display panel.

[0228] For example, the auxiliary electrode 20 may also include at least one auxiliary electrode line, that is, the auxiliary electrode 20 is a strip structure, and at least one auxiliary electrode line is located between the multiple anodes 310 and is insulated from the multiple anodes 310. The auxiliary electrode line can increase the contact area with the cathode layer 60 to avoid poor contact with the cathode layer 60 and failure to conduct electricity. For example, refer to Figure 21 At least one auxiliary motor line can be a plurality of auxiliary electrode lines, and the plurality of auxiliary electrode lines form a cross-grid structure to further improve the uniformity of the auxiliary electrode line layout, thereby improving the consistency of the voltage in the cathode layer 60, thereby reducing or eliminating the problem of uneven brightness of the display panel and ensuring the display effect of the display panel.

[0229] It is understandable that the auxiliary electrode lines can be arranged in the preset area A of the cathode layer 60, or can be extended outside the preset area A. For example, referring to Figure 21A portion of the auxiliary electrode lines is located within the preset area A, and another portion of the auxiliary electrode lines extends outside the preset area A. The auxiliary electrode lines can be used to supply power to the cathode layer 60 to improve the consistency of the voltage within the cathode layer 60, thereby reducing the voltage drop in the cathode layer 60 and alleviating or eliminating the problem of uneven brightness of the display panel.

[0230] For example, refer to Figure 3 The first material layer 210 includes a bottom surface facing the array substrate 10 and a side surface intersecting the bottom surface of the first material layer 210. The angle β between the bottom surface of the first material layer 210 and the side surface of the first material layer 210 can be greater than or equal to 60° and less than or equal to 160°, and can be, for example, 60°, 70°, 80°, 90°, 100°, 110°, 120°, 130°, 140°, 150°, or 160°. An angle β within this angle range allows for a sufficient overlap length between the cathode layer 60 and the side surface of the first material layer 210, thereby preventing the cathode layer 60 from being disconnected from the first material layer 210, thereby ensuring that the auxiliary electrode 20 can energize the predetermined area A of the cathode layer 60.

[0231] Specifically, refer to Figure 22 When forming the organic functional layer 50 or cathode layer 60 by evaporation, the substrate 100 is typically mounted upside down on the top surface of the evaporation chamber, with the auxiliary electrode 20 facing the bottom surface of the evaporation chamber. The organic evaporation source 400 is used to evaporate the material of the organic functional layer 50 onto the substrate 100 to form the organic functional layer 50. The cathode evaporation source 500 is used to evaporate the material of the cathode layer 60 onto the substrate 100 to form the cathode layer 60. Both the organic evaporation source 400 and the cathode evaporation source 500 are located below the auxiliary electrode 20. The normal line E0 of the organic evaporation source 400 and the normal line F0 of the cathode evaporation source 500 are parallel to the centerline of the auxiliary electrode 20. In other words, the organic evaporation source 400 and the cathode evaporation source 500 are located obliquely below the auxiliary electrode 20. The distance between the normal line E0 of the organic evaporation source 400 and the auxiliary electrode 20 is greater than the distance between the normal line F0 of the cathode evaporation source 500 and the auxiliary electrode 20.

[0232] During the deposition of the organic functional layer 50 and the cathode layer 60, the second material layer 220 of the auxiliary electrode 20 blocks the materials deposited by the organic evaporation source 400 and the cathode evaporation source 500. The deposition path E0E1 of the organic evaporation source 400 and the deposition path F0F1 of the cathode evaporation source 500 intersect at the edge of the second material layer 220. Figure 22As shown, the deposition path E0E1 of the organic evaporation source 400 and the deposition path F0F1 of the cathode evaporation source 500 intersect at point J. After passing through point J, the deposition path E0E1 of the organic evaporation source 400 intersects the side surface of the first material layer 210 at point L. Point L is the highest point of the material deposited by the organic evaporation source 400 on the side surface of the first material layer 210. In other words, the organic functional layer 50 formed after evaporation covers the area on the side surface of the first material layer 210 from point L to the bottom surface of the auxiliary electrode 20. The overlap length between the organic functional layer 50 and the first material layer 210 is LR. Point R is the bottom edge of the first material layer 210. After passing through point J, the deposition path F0F1 of the cathode evaporation source 500 intersects the side surface of the first material layer 210 at point K. Point K is the highest point of the material deposited by the cathode evaporation source 500 on the side surface of the first material layer 210. That is, the cathode layer 60 formed after evaporation covers the area between points K and L on the side surface of the first material layer 210. The overlapping length between the cathode layer 60 and the first material layer 210 is KL.

[0233] refer to Figure 22 and Figure 23 When the minimum distance L3 between the edge of the second material layer 220 and the side of the first material layer 210 remains unchanged, as the angle β increases, the overlap length KL between the cathode layer 60 and the first material layer 210 becomes longer. Figure 24 and Figure 25 As the angle β increases further, the overlap length KL between the cathode layer 60 and the first material layer 210 gradually decreases. Therefore, the angle β can be set between 60° and 160°. An angle β within this range ensures sufficient overlap between the cathode layer 60 and the side surface of the first material layer 210, preventing the cathode layer 60 from being disconnected from the first material layer 210 and ensuring that the auxiliary electrode 20 can energize the predetermined area A of the cathode layer 60.

[0234] refer to Figure 24 When the evaporation path E0E1 of the organic evaporation source 400 intersects the bottom edge of the first material layer 210, that is, when point L and point R coincide, the overlap length KL of the cathode layer 60 and the first material layer 210 is maximum. At this time, the angle β satisfies the following formula:

[0235] β=π-arcsinL1 / [(L1tanE0-L3) 2 +L1 2 ] 1 / 2 (5);

[0236] The following is a detailed description of formula (5). Since the thickness of the second material layer 220 is relatively small, the thickness of the second material layer 220 is ignored here. Figure 24, L1 is the thickness of the first material layer 210, L3 is the distance between the top edge of the first material layer 210 and the side of the second material layer 220, L5 is the distance between the top edge of the first material layer 210 and the bottom edge thereof, and the angle E0 is the evaporation angle of the organic evaporation source 400, and thus:

[0237]

[0238] According to formula (6), we can get:

[0239]

[0240] Continue to refer Figure 24 , we can get:

[0241]

[0242] According to formula (8), we can get:

[0243]

[0244] From formula (7) and formula (9), we can get formula (5).

[0245] For example, refer to Figure 26 The angle β between the bottom surface of the first material layer and the side surface of the first material layer may be equal to 90°. In other words, the cross section of the first material layer 210 may be rectangular.

[0246] For example, refer to Figure 27 The angle β between the bottom surface of the first material layer and the side surface of the first material layer may be greater than 90°. In other words, the cross section of the first material layer 210 may be an inverted trapezoid.

[0247] refer to Figure 28The display panel may further include at least one first etching auxiliary block 240. The first etching auxiliary block 240 is located between the auxiliary electrode 20 and the array substrate 10, and the orthographic projection of the first etching auxiliary block 240 on the array substrate 10 overlaps the orthographic projection of the auxiliary electrode 20 on the array substrate 10. For example, during the manufacturing process of the display panel, dry etching is generally used to form the auxiliary electrode 20, that is, plasma is used to etch the auxiliary electrode layer. After the plasma etches the auxiliary electrode layer to form the auxiliary electrode 20, the first etching auxiliary block 240 can reflect the plasma so that the plasma contacts the portion of the auxiliary electrode 20 near the first etching auxiliary block 240, thereby further etching the portion of the auxiliary electrode 20 near the first etching auxiliary block 240. This ensures that the angle β of the auxiliary electrode 20 in subsequent process steps is between 60° and 160°. During the process of forming the auxiliary electrode 20 using dry etching, different etching parameters such as the plasma amount and etching time can be controlled to obtain different angles β. This embodiment of the present application will not be further described.

[0248] For example, the first etching auxiliary block 240 may be made of an inorganic material that has strong etching resistance during dry etching and can avoid being etched by plasma. The inorganic material may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0249] refer to Figure 29 The display panel may further include at least one second etching auxiliary block 250, the second etching auxiliary block 250 being located between the auxiliary electrode 20 and the organic functional layer 50, and the orthographic projection of the second etching auxiliary block 250 on the array substrate 10 covering the orthographic projection of the auxiliary electrode 20 on the array substrate 10. When the auxiliary electrode 20 is formed by dry etching, the second etching auxiliary block 250 has a strong resistance to plasma etching, which can reduce the amount of etching of the portion of the auxiliary electrode 20 close to the organic functional layer 50, thereby enabling the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps. Specifically, different angles β can be obtained by controlling etching parameters such as the amount of dry etching plasma and etching time, which will not be described in detail in the embodiments of the present application. For example, the material of the second etching auxiliary block 250 may include at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

[0250] For example, the auxiliary electrode 20 and the anode 310 may also be provided in the same layer, that is, the material of the auxiliary electrode 20 and the material of the anode 310 may also be the same. Figure 30The auxiliary electrode 20 may be made of a third material layer 230, a first material layer 210, and a second material layer 220, which are stacked in sequence along the normal direction of the plane of the array substrate 10. The first material layer 210 may include at least one of silver (Ag), aluminum (Al), and neodymium (Nd). The second material layer 220 may include at least one of indium tin oxide (ITO) and indium zinc oxide (IZO). The third material layer 230 may include at least one of silver (Ag), aluminum (Al), neodymium (Nd), indium tin oxide (ITO), and indium zinc oxide (IZO). Because the auxiliary electrode 20 is made of the same material as the anode 310, the auxiliary electrode 20 and the anode 310 can be formed simultaneously in a single patterning process step, thereby reducing the number of process steps and improving the production efficiency of the display panel.

[0251] refer to Figure 3 、 Figure 4 、 Figure 28 、 Figure 29 Or 30, the display panel further includes a pixel definition layer 40. A first overlapping opening 420 is further provided on the pixel definition layer 40, and the first overlapping opening 420 exposes the auxiliary electrode 20 and the top surface of the array substrate 10. That is, the auxiliary electrode 20 and the orthographic projection of the pixel definition layer 40 on the array substrate 10 do not overlap. The organic functional layer 50 covers the pixel definition layer 40 and covers the top surface of the anode 310 in the pixel opening 410. The organic functional layer 50 also covers the top surface of the array substrate 10 in the first overlapping opening 420 and the top surface of the auxiliary electrode 20. Exemplarily, the organic functional layer 50 and the cathode layer 60 located above the organic functional layer 50 can overlap the side of the auxiliary electrode 20 in the recessed portion 211.

[0252] For example, refer to Figure 3 The first overlapping opening 420 includes a side surface facing the auxiliary electrode 20, and a bottom surface intersecting the side surface of the first overlapping opening 420. The angle α between the side surface of the first overlapping opening 420 and the bottom surface of the first overlapping opening 420 can be an obtuse angle, which can increase the opening size of the first overlapping opening 420. When the organic functional layer 50 covers the pixel definition layer 40 and the auxiliary electrode 20, it can facilitate the organic functional layer 50 and the cathode layer 60 to enter between the auxiliary electrode 20 and the pixel definition layer 40 through the first overlapping opening 420, and be deposited on the array substrate 10 and overlap with the recessed portion 211. Exemplarily, the angle α between the side surface of the first overlapping opening 420 and the bottom surface of the first overlapping opening 420 can be greater than 140°, for example, the angle can be 145° or 150°.

[0253] For example, refer to Figure 3The distance L6 between the bottom edge of the first overlapping opening 420 and the bottom edge of the auxiliary electrode 20 can be greater than or equal to 3 μm, for example, 3 μm, 4 μm, or 5 μm. When forming the organic functional layer 50 and the cathode layer 60, a distance L6 within this range can prevent the pixel definition layer 40 from blocking the organic functional layer 50 and the cathode layer 60, facilitating the organic functional layer 50 and the cathode layer 60 to pass through the first overlapping opening 420 and enter between the auxiliary electrode 20 and the pixel definition layer 40, and be deposited on the array substrate 10, overlapping the recessed portion 211.

[0254] In some other possible implementations of the present invention, the auxiliary electrode 20 may be provided in the array substrate 10, and the auxiliary electrode 20 is insulated from the anode 310. For example, referring to Figure 31 and Figure 32 The auxiliary electrode 20 and the first conductive layer can both be disposed on the first insulating layer 113. A second overlapping opening 118 is disposed on the second insulating layer 116, exposing the auxiliary electrode 20 and the first insulating layer 113. The anode 310 is disposed on the second insulating layer 116.

[0255] The auxiliary electrode 20 and the first conductive layer can be provided in the same layer or in different layers. In other words, the material of the auxiliary electrode 20 and the material of the first conductive layer can be the same or different. When the material of the auxiliary electrode 20 and the material of the first conductive layer are the same, during the production of the display panel, the auxiliary electrode 20 and structures such as the connecting line 115 in the first conductive layer can be formed through the same patterning process, thereby reducing the number of process steps and improving the production efficiency of the display panel.

[0256] For example, the auxiliary electrode 20 and the first conductive layer may also include at least a first material layer 210 and a second material layer 220 stacked along the normal direction of the plane where the array substrate 10 is located, the etching rate of the material of the first material layer 210 is greater than the etching rate of the material of the second material layer 220, and the bottom surface of the second material layer 220 and the side surface of the first material layer 210 are surrounded by a recessed portion 211. For example, the auxiliary electrode 20 and the first conductive layer may both include a first material layer 210 and a second material layer 220 stacked in sequence along the normal direction of the plane where the array substrate 10 is located. Or, as Figure 32 As shown, the auxiliary electrode 20 and the first conductive layer may each include a third material layer 230, a first material layer 210, and a second material layer 220 stacked in sequence along the normal direction of the plane where the array substrate 10 is located. The first material layer 210, the second material layer 220, and the third material layer 230 may include at least one of molybdenum, titanium, aluminum, copper, silver, indium tin oxide, and silver zinc oxide.

[0257] For example, the first insulating layer 113 may also be an inorganic insulating layer. For example, the material of the inorganic insulating layer may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. When the auxiliary electrode 20 is formed by dry etching, the inorganic insulating layer can reflect plasma so that the plasma contacts the portion of the auxiliary electrode 20 near the inorganic insulating layer, thereby etching the portion of the auxiliary electrode 20 near the inorganic insulating layer. This allows the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps.

[0258] For example, refer to Figure 33 The display panel may further include at least one first etching auxiliary block 240, the first etching auxiliary block 240 being located between the auxiliary electrode 20 and the first insulating layer 113, and the orthographic projection of the first etching auxiliary block 240 on the substrate 101 covering the orthographic projection of the auxiliary electrode 20 on the substrate. When the auxiliary electrode 20 is formed by dry etching, the first etching auxiliary block 240 can reflect plasma so that the plasma contacts the portion of the auxiliary electrode 20 close to the first etching auxiliary block 240, thereby etching the portion of the auxiliary electrode 20 close to the first etching auxiliary block 240, thereby causing the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps. Exemplarily, the material of the first etching auxiliary block 240 can be an inorganic material. The inorganic material can include at least one of silicon oxide, silicon nitride, silicon oxynitride, and indium tin oxide.

[0259] For example, refer to Figure 34 The display panel further includes at least one second etching auxiliary block 250, which is located between the auxiliary electrode 20 and the organic functional layer 50. The orthographic projection of the second etching auxiliary block 250 on the array substrate 10 covers the orthographic projection of the auxiliary electrode 20 on the array substrate 10. When the auxiliary electrode 20 is formed by dry etching, the second etching auxiliary block 250 has a strong resistance to plasma etching, which can reduce the etching amount of the portion of the auxiliary electrode 20 close to the organic functional layer 50, so that the angle β of the auxiliary electrode 20 is between 60° and 160° in subsequent process steps. Exemplarily, the material of the second etching auxiliary block 250 may include at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

[0260] refer to Figures 31 to 34The display panel further includes a pixel definition layer 40, which is disposed on the second insulating layer 116. The pixel definition layer 40 covers the anode 310 and the surface of the second insulating layer 116 not covered by the anode 310. The pixel definition layer 40 is further provided with a third overlapping opening 430, which is connected to the second overlapping opening 118 to expose the auxiliary electrode 20 and the first insulating layer 113. The organic functional layer 50 covers the pixel definition layer 40 and covers the top surface of the anode 310 within the pixel opening 410. The organic functional layer 50 also covers the top surface of the first insulating layer 113 located within the second overlapping opening 118 and the top surface of the auxiliary electrode 20. The organic functional layer 50 and the cathode layer 60 can overlap the side of the auxiliary electrode 20.

[0261] The display panel may further include a first power line connected to the auxiliary electrode 20, and the first power line is configured to provide a power signal to the auxiliary electrode 20. For example, a voltage signal may be input to the auxiliary electrode 20 via the first power line, thereby reducing the voltage drop of the cathode layer 60. Figure 37 , the first power line 70 can also be provided in the array substrate 10. For example, the array substrate 10 may include a first conductive layer, and the first power line 70 and the first conductive layer can be provided in the same layer. The material of the first power line 70 can be the same as that of the first conductive layer. The first conductive layer can also include other connecting lines. For example, the first conductive layer may include a connecting line 115, and the connecting line 115 is used to connect the thin film transistor and the anode 310. By providing the first power line 70 in the same layer as the first conductive layer, the space of the anode layer can be increased, making the layout of the anode 310 more compact, thereby increasing the number of pixels in the display panel and improving the resolution of the display panel.

[0262] For example, in some other implementations of the embodiment of the present application, the first power line 70 and the auxiliary electrode 20 may also be disposed on the array substrate 10. For example, the first power line 70 and the auxiliary electrode 20 may both be disposed on the second insulating layer 116. Figure 35 , the first power line 70 and the anode 310 can be provided in different layers, that is, the material of the first power line 70 can also be different from the material of the anode 310. Figure 36 The first power line 70 and the anode 310 can be provided in the same layer, that is, the material of the first power line 70 can be the same as that of the anode 310. After the anode layer is formed, the first power line 70 and the anode 310 can be formed simultaneously through a patterning process. The first power line 70 can be made of the same material as that of the anode 310, thereby reducing the process steps of the display panel and improving the production efficiency of the display panel.

[0263] For example, refer to Figure 37, the first power line 70 may also be disposed within the array substrate 10. The second insulating layer 116 of the array substrate 10 is disposed on the first conductive layer. A fourth via 119 is disposed on the second insulating layer 116. The fourth via 119 is connected to the first power line 70. The auxiliary electrode 20 is electrically connected to the first power line 70 through the fourth via 119. When forming the auxiliary electrode 20, for example, when forming the third material layer 230, the third material layer 230 is filled in the fourth via 119 and connected to the first power line 70, thereby achieving electrical connection between the first power line 70 and the auxiliary electrode 20.

[0264] It is understandable that the first power line 70 can be electrically connected to the second power line 80 to be indirectly connected to the voltage signal; the first power line 70 can also be not connected to the second power line 80 to be directly connected to the voltage signal.

[0265] The present application also provides a method for manufacturing a display panel, which is used to form the above-mentioned display panel. Figure 38 , the method comprising:

[0266] S100. Provide an array substrate provided with an auxiliary electrode and an electrode block, wherein the auxiliary electrode is located on the array substrate or is arranged in the array substrate; the auxiliary electrode includes a first material layer, the first material layer includes a bottom surface facing the array substrate, and a side surface intersecting with the bottom surface of the first material layer, and an angle is formed between the bottom surface of the first material layer and the side surface of the first material layer, and the angle is greater than or equal to 60° and less than or equal to 160°.

[0267] The method of the embodiment of the present application is described below by taking the electrode block as the anode 310 as an example. In some possible implementations of the embodiment of the present application, the auxiliary electrode 20 and the electrode block can both be disposed on the array substrate 10 .

[0268] First, an array substrate may be provided;

[0269] For example, refer to Figure 39 First, a substrate 101 can be provided. The material of substrate 101 can be a glass substrate, a quartz substrate, a resin substrate, etc. The raw material of substrate 101 can also be a flexible substrate, such as polyimide. Substrate 101 can also be a multilayer structure with organic and inorganic layers alternately stacked, such as silicon oxide, polyimide, and silicon oxide, or polyimide, silicon oxide, polyimide, and silicon oxide stacked in sequence.

[0270] An active layer 102, a third insulating layer 103, a second conductive layer, a fourth insulating layer 106, a third conductive layer, a fifth insulating layer 109, a fourth conductive layer, a first insulating layer 113, a first conductive layer, and a second insulating layer 116 may be sequentially formed on a substrate 101. The active layer 102, the second conductive layer, the third conductive layer, the fourth conductive layer, and the first conductive layer may be patterned to form a pixel driving circuit having a plurality of thin film transistors 112 and capacitors 108. The array substrate 10 further includes a second insulating layer 116 covering the thin film transistors and the substrate 101 to improve the flatness of the array substrate 10.

[0271] For example, the first power line 70 may be disposed in the first conductive layer. A fourth via 119 connected to the first power line 70 may also be disposed on the second insulating layer 116 .

[0272] Then, an auxiliary electrode 20 and an anode 310 are formed on the array substrate 10, and the auxiliary electrode 20 is insulated from the anode 310. A recess 211 may also be formed on the side of the auxiliary electrode 20.

[0273] For example, the auxiliary electrode 20 and the anode 310 can be formed by the same patterning process step. Figure 40 First, an anode layer 30 can be formed on the array substrate 10. The anode layer 30 is formed on the second insulating layer 116. Exemplarily, the anode layer 30 includes a third material film layer 2301, a first material film layer 2101, and a second material film layer 2201, which are sequentially stacked along the normal direction of the plane where the array substrate 10 is located. The third material film layer 2301, the first material film layer 2101, and the second material film layer 2201 can be sequentially formed on the array substrate 10, and the etching rate of the material of the first material film layer 2101 is greater than the etching rate of the material of the second material film layer 2201. Exemplarily, the material of the first material layer 210 can be silver, and the materials of the second material layer 220 and the third material layer 230 can both be indium tin oxide.

[0274] refer to Figure 41 The anode layer 30 is patterned to form the mutually insulated auxiliary electrode 20 and a plurality of anodes 310. A recessed portion 211 may also be formed on the side of the auxiliary electrode 20. For example, the anode layer 30 may be patterned by wet etching.

[0275] During the wet etching process of the anode layer 30, when the material of the first material layer 210 includes at least one of silver, aluminum and neodymium, the material of the second material layer 220 includes at least one of indium tin oxide and indium zinc oxide, and the material of the third material layer 230 includes at least one of silver, aluminum, neodymium, indium tin oxide and indium zinc oxide, primary cell corrosion is formed between the first material layer 210 and the second material layer 220, and between the first material layer 210 and the third material layer 230 under the action of the etching solution, and the side of the first material layer 210 is etched, thereby forming a recessed portion 211 on the side of the first material layer 210.

[0276] Furthermore, during the wet etching process, the anode layer 30 is covered with photoresist. The photoresist acts as a barrier, slowing down the efficiency of the etching solution renewal in the region of the first material layer 210 near the second material layer 220. This results in a smaller etching amount in the portion of the first material layer 210 near the second material layer 220 than in the portion of the first material layer 210 away from the second material layer 220. This increases the angle between the bottom and side surfaces of the auxiliary electrode 20, ensuring that, in subsequent process steps, the angle β of the auxiliary electrode 20 is between 60° and 160°, thereby ensuring that the subsequently formed organic functional layer 50 and cathode layer 60 can form an overlapping portion within the recessed portion 211 that overlaps the side surface of the auxiliary electrode 20. Specifically, the angle β can be controlled by controlling etching parameters such as the concentration of the etching solution and the etching time, which will not be further described in detail in the present embodiment.

[0277] Optionally, the auxiliary electrode 20 and the anode 310 may also be formed through different patterning process steps: First, an auxiliary electrode layer may be formed on the array substrate 10 , and the auxiliary electrode layer may be patterned to form the auxiliary electrode 20 .

[0278] For example, the auxiliary electrode layer may be a conductive metal layer, which may be formed on the array substrate 10. The conductive metal layer is then patterned and laterally etched to form the auxiliary electrode 20 having a recessed portion 211 on its side.

[0279] Optionally, refer to Figure 42 The auxiliary electrode layer may also include a first material film layer 2101 and a second material film layer 2201. The first material film layer 2101 and the second material film layer 2201 may be sequentially formed on the array substrate 10. The etching rate of the material of the first material film layer 2101 is greater than the etching rate of the second material film layer 2201. The first material film layer 2101 may be a first metal layer, and the second material film layer 2201 may be a second metal layer.

[0280] Then, refer to Figure 43The stacked first material film layer 2101 and the second material film layer 2201 are patterned to form an auxiliary electrode 20. The auxiliary electrode 20 includes a first material layer 210 and a second material layer 220 stacked in sequence along the normal direction of the plane where the array substrate 10 is located.

[0281] Optionally, refer to Figure 44 The auxiliary electrode layer may also include a third material film layer 2301, a first material film layer 2101, and a second material film layer 2201. The third material film layer 2301, the first material film layer 2101, and the second material film layer 2201 may be formed sequentially on the array substrate 10. The etching rate of the material of the first material film layer 2101 may be greater than the etching rate of the second material film layer 2201. The first material film layer 2101 may be a first metal layer, the second material film layer 2201 may be a second metal layer, and the material of the third material film layer 2301 may be a third metal layer. For example, the material of the third metal layer may be titanium (Ti), the material of the first metal layer may be aluminum (Al), and the material of the second metal layer may be titanium (Ti) or molybdenum (Mo).

[0282] refer to Figure 45 The stacked third material film layer 2301, the first material film layer 2101 and the second material film layer 2201 are patterned to form an auxiliary electrode 20. The auxiliary electrode 20 includes a third material layer 230, a first material layer 210 and a second material layer 220 stacked in sequence along the normal direction of the plane where the array substrate 10 is located.

[0283] When the first power line 70 is located in the first conductive layer of the array substrate 10 , and the third material layer 230 is a third metal layer, the third metal layer may be filled in the fourth via hole 119 to connect the third metal layer to the first power line 70 .

[0284] Next, a first electrode layer is formed on the array substrate 10. The first electrode layer covers the auxiliary electrode 20 and the surface of the array substrate 10 not covered by the auxiliary electrode 20. The first electrode layer is patterned to form at least one electrode block insulated from the auxiliary electrode 20, and a recessed portion is formed on the side of the auxiliary electrode 20. The following description uses the anode layer 30 as an example of the first electrode layer.

[0285] refer to Figure 46 An anode layer 30 may be formed on the array substrate 10, and the anode layer 30 covers the array substrate 10 and the auxiliary electrode 20. For example, the material of the anode layer 30 may be indium tin oxide / silver / indium tin oxide (ITO / Ag / ITO).

[0286] refer to Figure 47After the anode layer 30 is formed, the anode layer 30 can be etched in a graphical manner to form at least one anode 310 insulated from the auxiliary electrode 20. Exemplarily, the at least one anode 310 can be a plurality of anodes 310. While etching the anode layer 30, the side of the auxiliary electrode 20 can also be etched at the same time to form a recessed portion 211, thereby saving process steps and improving the production efficiency of the display panel. Exemplarily, the anode layer 30 can be etched by wet etching. During the etching process, when etching the anode layer 30 covering the auxiliary electrode 20, since wet etching is isotropic, the side of the auxiliary electrode 20 can be etched. And because the etching rate of the material of the first material layer 210 in the auxiliary electrode layer is greater than the etching rate of the material of the second material layer 220, the etching amount on the side of the first material layer 210 is greater than the etching amount on the side of the second material layer 220, so that the bottom surface of the second material layer 220 and the side of the first material layer 210 can be surrounded by a recessed portion 211 to form an auxiliary electrode 20 with a recessed portion 211 on the side.

[0287] In some other implementations of the embodiments of the present application, the first power line 70 may also be disposed in the anode layer 30. For example, when etching the anode layer 30, a first power line 70 isolated from the anode 310 may be simultaneously formed through a patterning process, and the first power line 70 is connected to the auxiliary electrode 20. The material of the first power line 70 may be the same as that of the anode 310, thereby reducing the process steps of the display panel and improving the production efficiency of the display panel.

[0288] In some other implementations of the embodiments of this application, refer to Figure 48 Alternatively, a third material film layer 2301 may be formed on the array substrate 10 first. The third material film layer 2301 may be an inorganic layer.

[0289] refer to Figure 49 Then, the inorganic layer is patterned to form a third material layer 230 .

[0290] refer to Figure 50 , forming a first material film layer 2101 , the first material film layer 2101 covers the third material layer 230 and the surface of the array substrate 10 not covered by the third material layer 230 . A second material film layer 2201 is formed on the first material film layer 2101 .

[0291] refer to Figure 51 The first material film layer 2101 and the second material film layer 2201 are patterned to form a first material layer 210 and a second material layer 220 on the third material layer 230. The auxiliary electrode 20 includes the third material layer 230, the first material layer 210 and the second material layer 220 which are stacked.

[0292] For example, the first material film layer 2101 and the second material film layer 2201 can be patterned by dry etching, that is, the first material film layer 2101 and the second material film layer 2201 are etched by plasma. During the dry etching process of the first material film layer 2101 and the second material film layer 2201, after the plasma etches the first material film layer 2101 and the second material film layer 2201 to form the auxiliary electrode 20, the inorganic layer can reflect the plasma so that the plasma contacts the portion of the first material layer 210 near the inorganic layer, thereby etching the portion of the first material layer 210 near the inorganic layer, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, so that the angle β of the auxiliary electrode 20 can be between 60° and 160° in subsequent process steps. Specifically, different etching parameters such as the amount of plasma and etching time can be controlled to obtain different angles β, which will not be described in detail in this embodiment of the present application.

[0293] Then, refer to Figure 52 and Figure 53 , forming an anode layer 30, which covers the auxiliary electrode 20 and the surface of the array substrate 10 not covered by the auxiliary electrode 20. After forming the anode layer 30, the anode layer 30 can be patterned by wet etching to form at least one anode 310 insulated from the auxiliary electrode 20. While etching the anode layer 30, the side surfaces of the first material layer 210 can also be etched simultaneously to form a recessed portion 211.

[0294] For example, when patterning the auxiliary electrode layer, refer to Figure 54 First, a second etching auxiliary layer 2501 may be formed on the auxiliary electrode layer. The second etching auxiliary layer 2501 is formed on the second material film layer 2201. The material of the second etching auxiliary layer 2501 may include at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide. Then, referring to Figure 55 , the second etch auxiliary layer 2501 is patterned to form at least one second etch auxiliary block 250, and the auxiliary electrode layer is exposed. Figure 56 , the exposed auxiliary electrode layer is etched to form the auxiliary electrode 20 below the second etching auxiliary block 250 , and the angle between the bottom surface and the side surface of the auxiliary electrode 20 is increased.

[0295] When etching the exposed auxiliary electrode layer, the second etching auxiliary block 250 has strong etching resistance, and the second etching auxiliary block 250 will not be etched, thereby reducing the etching amount of the auxiliary electrode 20 close to the second etching auxiliary block 250, so that the etching amount of the auxiliary electrode 20 close to the second etching auxiliary block 250 is less than the etching amount of the auxiliary electrode 20 away from the second etching auxiliary block 250, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, so that in subsequent process steps, the angle β between the surface of the first material layer 210 in the auxiliary electrode 20 facing away from the second material layer 220 and the side surface of the first material layer 210 can be greater than or equal to 60° and less than or equal to 160°.

[0296] For example, before forming the auxiliary electrode 20 on the array substrate 10 , the manufacturing method of the embodiment of the present application may further include the following steps:

[0297] refer to Figure 57 and Figure 58 First, a first etch auxiliary layer 2401 may be formed on the array substrate 10 , and the first etch auxiliary layer 2401 may be patterned to form at least one first etch auxiliary block 240 .

[0298] Then, an auxiliary electrode layer is formed, which covers the first etch auxiliary block 240 and the surface of the array substrate 10 not covered by the first etch auxiliary block 240. For example, the auxiliary electrode layer may include a first material film layer 2101 and a second material film layer 2201 stacked in sequence. Figure 59 The auxiliary electrode layer may also include a third material film layer 2301, a first material film layer 2101, and a second material film layer 2201 stacked in sequence. Figure 60 , the auxiliary electrode layer is patterned to form an auxiliary electrode 20 located on the first etching auxiliary block 240, and the orthographic projection of the auxiliary electrode 20 on the array substrate 10 is located within the orthographic projection of the first etching auxiliary block 240 on the array substrate 10 to increase the angle between the bottom surface and the side surface of the auxiliary electrode 20.

[0299] For example, the auxiliary electrode layer can be patterned using dry etching, that is, the auxiliary electrode layer is etched using plasma. During the dry etching of the auxiliary electrode layer, since the orthographic projection of the auxiliary electrode 20 on the array substrate 10 is located within the orthographic projection of the first etch auxiliary block 240 on the array substrate 10, after the auxiliary electrode layer is etched by plasma to form the auxiliary electrode 20, the first etch auxiliary block 240 can reflect the plasma so that the plasma contacts the portion of the auxiliary electrode near the first etch auxiliary block 240, thereby increasing the etching amount of the portion of the auxiliary electrode 20 near the first etch auxiliary block 240, so that the etching amount of the portion of the auxiliary electrode 20 near the first etch auxiliary block 240 is greater than the etching amount of the portion of the auxiliary electrode 20 far from the first etch auxiliary block 240, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, thereby allowing the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps.

[0300] In some other possible implementations of the embodiment of the present application, the auxiliary electrode 20 may be disposed in the array substrate 10 .

[0301] First, the array substrate 10 provided with the auxiliary electrode 20 may be provided.

[0302] refer to Figure 61 First, a substrate 101 is provided. An active layer 102, a third insulating layer 103, a second conductive layer, a fourth insulating layer 106, a third conductive layer, a fifth insulating layer 109, and a fourth conductive layer are sequentially formed on the substrate 101. The active layer 102, the second conductive layer, the third conductive layer, and the fourth conductive layer are all patterned. A first insulating layer 113 is formed to cover the fourth conductive layer and the surface of the fifth insulating layer 109 not covered by the fourth conductive layer.

[0303] Then, a first conductive layer is formed on the first insulating layer 113. For example, the first conductive layer may include at least a first material film layer 2101 and a second material film layer 2201 stacked, and the first material film layer 2101 and the second material film layer 2201 may be sequentially formed on the first insulating layer 113. For example, referring to Figure 62 The first conductive layer may also include a third material film layer 2301, a first material film layer 2101 and a second material film layer 2201 stacked together, and the third material film layer 2301, the first material film layer 2101 and the second material film layer 2201 may be formed in sequence on the first insulating layer 113.

[0304] refer to Figure 63, the first conductive layer is patterned to form the auxiliary electrode 20. Exemplarily, the first conductive layer can be patterned by dry etching to form structures such as the connecting line 115, and the auxiliary electrode 20 can also be formed at the same time. Exemplarily, the third material film layer 2301, the first material film layer 2101, and the second material film layer 2201 are patterned to form the third material layer 230, the first material layer 210, and the second material layer 220, respectively. The auxiliary electrode 20 includes the third material layer 230, the first material layer 210, and the second material layer 220. The auxiliary electrode 20 and the connecting line 115 are formed through the same patterning process step, which reduces the number of process steps and improves the production efficiency of the display panel.

[0305] refer to Figure 64 Then, a second insulating layer 116 is formed. The second insulating layer 116 covers the auxiliary electrode 20 and the surface of the first insulating layer 113 not covered by the auxiliary electrode 20. A second overlapping opening 118 can be formed on the second insulating layer 116. The second overlapping opening 118 exposes the auxiliary electrode 20 and the first insulating layer 113, so that in subsequent process steps, the cathode layer 60 can enter the second overlapping opening 118 and connect to the auxiliary electrode 20. Exemplarily, a second via 114 is further provided on the second insulating layer 116. The second via 114 passes through the second insulating layer 116 and is connected to the source and drain electrodes 110.

[0306] Exemplarily, the first insulating layer 113 may be an inorganic insulating layer. The first conductive layer is patterned generally by dry etching, that is, the first conductive layer is etched by plasma. During the dry etching of the first conductive layer, after the plasma etches the first conductive layer to form the auxiliary electrode 20, the inorganic insulating layer can reflect the plasma so that the plasma contacts the portion of the auxiliary electrode 20 close to the inorganic insulating layer, thereby increasing the etching amount of the portion of the auxiliary electrode 20 close to the inorganic insulating layer, so that the etching amount of the portion of the auxiliary electrode 20 close to the inorganic insulating layer is greater than the etching amount of the portion of the auxiliary electrode 20 far from the inorganic insulating layer, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, thereby enabling the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps.

[0307] For example, when patterning the auxiliary electrode layer, first, refer to Figure 65 , a second etch assisting layer 2501 may be formed on the first conductive layer. The second etch assisting layer 2501 is formed on the second material film layer 2201. The material of the second etch assisting layer 2501 may include at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide. Then, referring to Figure 66 , the second etch auxiliary layer 2501 is patterned to form at least one second etch auxiliary block 250 and expose the first conductive layer. Figure 67 , the exposed first conductive layer is etched, and the auxiliary electrode 20 is formed below the second etching auxiliary block 250 to increase the angle between the bottom surface and the side surface of the auxiliary electrode 20.

[0308] When etching the exposed auxiliary electrode layer, the second etching auxiliary block 250 has strong etching resistance, and the second etching auxiliary block 250 will not be etched, thereby reducing the etching amount of the auxiliary electrode 20 close to the second etching auxiliary block 250, so that the etching amount of the auxiliary electrode 20 close to the second etching auxiliary block 250 is less than the etching amount of the auxiliary electrode 20 away from the second etching auxiliary block 250, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, so that in subsequent process steps, the angle β between the surface of the first material layer 210 in the auxiliary electrode 20 facing away from the second material layer 220 and the side surface of the first material layer 210 can be greater than or equal to 60° and less than or equal to 160°.

[0309] Illustratively, after forming the first insulating layer 113 and before forming the first conductive layer on the first insulating layer 113 , the manufacturing method of the embodiment of the present application may further include:

[0310] refer to Figure 68 and Figure 69 First, a first etch assisting layer 2401 is formed on the first insulating layer 113 , and the first etch assisting layer 2401 is patterned to form at least one first etch assisting block 240 .

[0311] Then, refer to Figure 70 , forming a first conductive layer on the first insulating layer 113, the first conductive layer covering the first etch auxiliary block 240 and the surface of the first insulating layer 113 not covered by the first etch auxiliary block 240. Exemplarily, the first conductive layer may include a third material film layer 2301, a first material film layer 2101, and a second material film layer 2201 stacked in sequence, and the third material film layer 2301, the first material film layer 2101, and the second material film layer 2201 may be formed in sequence on the first insulating layer 113. Figure 71 The first conductive layer is patterned to form an auxiliary electrode 20. The auxiliary electrode 20 is located on the first etching auxiliary block 240, and the orthographic projection of the auxiliary electrode 20 on the array substrate 10 is located within the orthographic projection of the first etching auxiliary block 240 on the array substrate 10, so as to increase the angle between the bottom surface and the side surface of the auxiliary electrode 20.

[0312] For example, the first conductive layer can be patterned using dry etching, that is, the first conductive layer is etched using plasma. During the dry etching process of the first conductive layer, since the orthographic projection of the auxiliary electrode 20 on the array substrate 10 is located within the orthographic projection of the first etch auxiliary block 240 on the array substrate 10, after the plasma etches the first conductive layer to form the auxiliary electrode 20, the first etch auxiliary block 240 can reflect the plasma so that the plasma contacts the portion of the auxiliary electrode 20 near the first etch auxiliary block 240, thereby increasing the etching amount of the portion of the auxiliary electrode 20 near the first etch auxiliary block 240, so that the etching amount of the portion of the auxiliary electrode 20 near the first etch auxiliary block 240 is greater than the etching amount of the portion of the auxiliary electrode 20 far from the first etch auxiliary block 240, thereby increasing the angle between the bottom surface and the side surface of the auxiliary electrode 20, and thereby allowing the angle β of the auxiliary electrode 20 to be between 60° and 160° in subsequent process steps.

[0313] Then, at least one electrode block is formed on the array substrate 10 , and a recess is formed on the side surface of the auxiliary electrode 20 .

[0314] After providing the array substrate 10 provided with the auxiliary electrode 20, a first electrode layer can be formed on the second insulating layer 116. The first electrode layer covers the second insulating layer 116 and the auxiliary electrode 20 located within the second overlapping opening 118. The first electrode layer is patterned to form at least one electrode block, and a recessed portion is formed on the side of the auxiliary electrode 20. The following description takes the anode layer 30 as an example in which the first electrode layer is used.

[0315] For example, refer to Figure 72 , forming an anode layer 30, the anode layer 30 covers the second insulating layer 116 and covers the auxiliary electrode 20 located in the second overlapping opening 118. Then, referring to Figure 73 , the anode layer 30 is patterned to form at least one anode 310, and a recessed portion 211 is formed on the side of the auxiliary electrode 20. Exemplarily, the anode layer 30 can be etched by wet etching. During the etching process, when the anode layer 30 covering the auxiliary electrode 20 is etched, since the wet etching is isotropic, the side of the auxiliary electrode 20 can be etched. And since the etching rate of the material of the first material layer 210 in the auxiliary electrode layer is greater than the etching rate of the material of the second material layer 220, the etching amount on the side of the first material layer 210 is greater than the etching amount on the side of the second material layer 220, so that the bottom surface of the first material and the side of the first material layer 210 can be surrounded by the recessed portion 211.

[0316] S200 , forming an organic functional layer and a second electrode layer on the array substrate, wherein the second electrode layer is connected to the auxiliary electrode.

[0317] For example, refer to Figure 74 Before forming the organic functional layer 50, a pixel definition layer 40 for separating pixel units can be formed on the array substrate 10. The pixel definition layer 40 is formed on the array substrate 10 and covers the anode 310 and the auxiliary electrode 20. A plurality of pixel openings 410 can be formed on the pixel definition layer 40 by patterning, each pixel opening 410 corresponding to an anode 310, and the pixel opening 410 exposes the top surface of the anode 310.

[0318] When the auxiliary electrode 20 is disposed on the array substrate 10, the pixel definition layer 40 covers the anode 310, the auxiliary electrode 20, and the surface of the array substrate 10 not covered by the anode 310 and the auxiliary electrode 20. Figure 74 A first overlapping opening 420 may be formed on the pixel definition layer 40 , where the first overlapping opening 420 exposes the auxiliary electrode 20 and the top surface of the array substrate 10 .

[0319] After forming the pixel definition layer 40, the organic functional layer 50 may be formed on the array substrate 10. For example, referring to Figure 12 The organic functional layer 50 is located above the pixel definition layer 40 and covers the pixel definition layer 40 and the top surface of the anode 310 exposed in the pixel opening 410 to be connected to the anode 310 so that the anode 310 can provide holes for the organic functional layer 50.

[0320] Because the side surface of the auxiliary electrode 20 has a recessed portion 211, when the organic functional layer 50 is formed, the organic functional layer 50 is broken at the edge of the top surface of the auxiliary electrode 20, allowing the organic functional layer 50 to enter the first overlapping opening 420 and cover the top surface of the array substrate 10 and the top surface of the auxiliary electrode within the first overlapping opening 420. The organic functional layer 50 can overlap the side surface of the auxiliary electrode 20 within the recessed portion 211.

[0321] Then, a second electrode layer is formed on the array substrate 10. The second electrode layer covers the organic functional layer and is connected to the auxiliary electrode 20. The following description will be made by taking the second electrode layer as the cathode layer 60 as an example. Figure 74 The cathode layer 60 can be a single-layer structure. The cathode layer 60 covers the organic functional layer 50. Because the side surface of the auxiliary electrode 20 has a recessed portion 211, during the formation of the cathode layer 60, the cathode layer 60 is broken at the edge of the top surface of the auxiliary electrode 20 and deposited within the first overlapping opening 420. The cathode layer 60 and the organic functional layer 50 form an overlapping portion 610 overlapping the auxiliary electrode 20 within the recessed portion 211 of the auxiliary electrode 20, thereby achieving connection with the auxiliary electrode 20.

[0322] When the auxiliary electrode 20 is disposed in the array substrate 10, refer to Figure 75The pixel definition layer 40 covers the anode 310 and the surface of the second insulating layer 116 not covered by the anode 310, covers the sidewalls and bottom surface of the second overlapping opening 118, and covers the auxiliary electrode 20. A third overlapping opening 430 is formed in the pixel definition layer 40, and the third overlapping opening 430 communicates with the second overlapping opening 118 to expose the auxiliary electrode 20 and the first insulating layer 113 within the second overlapping opening 118.

[0323] When the organic functional layer 50 is formed, the organic functional layer 50 covers the pixel definition layer 40, and covers the top surface of the anode 310 in the pixel opening 410, and also covers the top surface of the first insulating layer 113 in the second overlapping opening 118 and the top surface of the auxiliary electrode 20. The organic functional layer 50 can overlap with the side of the auxiliary electrode 20 in the recessed portion 211.

[0324] Then, a cathode layer 60 is formed on the array substrate 10. The cathode layer 60 covers the organic functional layer and is connected to the auxiliary electrode. Figure 75 , a cathode layer 60 can be formed on the array substrate 10. The cathode layer 60 can be a whole layer structure. The cathode layer 60 covers the organic functional layer 50. Because the side surface of the auxiliary electrode 20 has a recessed portion 211, during the process of forming the cathode layer 60, the cathode layer 60 is broken at the edge of the top surface of the auxiliary electrode 20 and is deposited in the third overlapping opening 430 and the second overlapping opening 118. The cathode layer 60 and the organic functional layer 50 form an overlapping portion 610 overlapping the auxiliary electrode 20 in the recessed portion 211 of the auxiliary electrode 20, thereby achieving connection with the auxiliary electrode 20.

[0325] Then, an encapsulation layer 90 is formed on the cathode layer 60 to encapsulate the display panel.

[0326] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: It comprises an array substrate, a first electrode layer, an organic functional layer and a second electrode layer which are stacked, wherein the organic functional layer is located between the first electrode layer and the second electrode layer; the first electrode layer comprises at least one electrode block; The second electrode layer is connected to at least one auxiliary electrode; the auxiliary electrode is arranged on the array substrate, or arranged in the array substrate; The auxiliary electrode includes a first material layer, the first material layer includes a bottom surface facing the array substrate, and a side surface intersecting the bottom surface of the first material layer, and an angle between the bottom surface of the first material layer and the side surface of the first material layer is greater than or equal to 60° and less than or equal to 160°; The auxiliary electrode is insulated from the at least one electrode block. When the auxiliary electrode is arranged on the array substrate, the display panel further includes at least one first etching auxiliary block, the first etching auxiliary block is located between the auxiliary electrode and the array substrate, and the orthographic projection of the first etching auxiliary block on the array substrate covers the orthographic projection of the auxiliary electrode on the array substrate; wherein the first etching auxiliary block is used to reflect plasma.

2. The display panel according to claim 1, wherein: The auxiliary electrode further includes a second material layer, and the second material layer covers the top surface of the first material layer.

3. The display panel according to claim 2, wherein: The second material layer includes a bottom surface facing the array substrate, and the bottom surface of the second material layer and the side surface of the first material layer are arranged to form a recessed portion; The second electrode layer overlaps the auxiliary electrode in the recessed portion; The organic functional layer covers the top surface of the second material layer, and the organic functional layer overlaps the auxiliary electrode in the recessed portion.

4. The display panel according to claim 3, wherein: The etching rate of the material of the first material layer is greater than the etching rate of the material of the second material layer; The first material layer is a first metal layer, and the second material layer is a second metal layer.

5. The display panel according to claim 4, wherein: The material of the first metal layer is aluminum, and the material of the second metal layer is titanium or molybdenum; Along a normal direction of a plane where the array substrate is located, a thickness of the second material layer is less than a thickness of the first material layer; A distance between an edge of a top surface of the first material layer and a side surface of the second material layer is less than or equal to 2 μm.

6. The display panel according to claim 2, wherein: The orthographic projections of the first material layer and the second material layer on the array substrate are both circles, or regular polygons with sides greater than four; The orthographic projection of the second material layer on the first material layer covers the top surface of the first material layer, and the area of the orthographic projection of the second material layer on the first material layer is larger than the area of the top surface of the first material layer.

7. The display panel according to claim 2, wherein: The angle between the bottom surface of the first material layer and the side surface of the first material layer is equal to 90°; Or, the angle between the bottom surface of the first material layer and the side surface of the first material layer is greater than 90°; Alternatively, the angle β between the bottom surface of the first material layer and the side surface of the first material layer satisfies the following relationship: ； in, is the thickness of the first material layer along the normal direction of the plane where the array substrate is located, is the distance between the top edge of the first material layer and the side surface of the second material layer, is the deposition angle when the organic functional layer is evaporated.

8. The display panel according to claim 1, wherein: Along the normal direction of the plane where the array substrate is located, the thickness of the auxiliary electrode is 2500Å to 10000Å.

9. The display panel according to claim 1, wherein: The auxiliary electrode includes an auxiliary electrode block insulated from the at least one electrode block.

10. The display panel according to claim 1, wherein The auxiliary electrode includes at least one auxiliary electrode line. The at least one electrode block is a plurality of electrode blocks. The at least one auxiliary electrode line is located between the plurality of electrode blocks and is insulated from the plurality of electrode blocks.

11. The display panel according to claim 10, wherein: The at least one auxiliary electrode line is a plurality of auxiliary electrode lines, and the plurality of auxiliary electrode lines form a cross-grid structure.

12. The display panel according to claim 11, wherein: The auxiliary electrode further includes a second material layer and a third material layer, wherein the third material layer, the first material layer, and the second material layer are stacked in sequence along a normal direction of a plane where the array substrate is located, and a bottom surface of the second material layer and a side surface of the first material layer form a recessed portion; The side surface of the third material layer is flush with the bottom edge of the first material layer, or the side surface of the third material layer exceeds the bottom edge of the first material layer; The first material layer is a first metal layer, the second material layer is a second metal layer, and the third material layer is a third metal layer or an inorganic layer; The etching rate of the material of the third metal layer is lower than the etching rate of the material of the first metal layer.

13. The display panel according to claim 12, wherein: The material of the third metal layer is titanium or molybdenum, the material of the first metal layer is aluminum, and the material of the second metal layer is titanium or molybdenum; The material of the inorganic layer includes at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

14. The display panel according to claim 1, wherein The material of the first etching auxiliary block is an inorganic material; The inorganic material includes at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

15. The display panel according to claim 11, wherein: The display panel further includes at least one second etching auxiliary block, the second etching auxiliary block being located between the auxiliary electrode and the organic functional layer, and the orthographic projection of the second etching auxiliary block on the array substrate covering the orthographic projection of the auxiliary electrode on the array substrate; The material of the second etch auxiliary block includes at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

16. The display panel according to claim 11, wherein: The auxiliary electrode is arranged in the same layer as the electrode block, and the auxiliary electrode also includes a second material layer and a third material layer. The third material layer, the first material layer and the second material layer are stacked in sequence along the normal direction of the plane where the array substrate is located; the material of the first material layer includes at least one of silver, aluminum and neodymium, the material of the second material layer includes at least one of indium tin oxide and indium zinc oxide, and the material of the third material layer includes at least one of silver, aluminum, neodymium, indium tin oxide and indium zinc oxide.

17. The display panel according to claim 9, wherein: The display panel further includes a pixel definition layer; the pixel definition layer has a plurality of pixel openings, each of which exposes a top surface of the electrode block; the pixel definition layer further includes a first overlapping opening, the first overlapping opening exposing the auxiliary electrode and the array substrate; The organic functional layer covers the pixel definition layer and the top surface of the electrode block in the pixel opening; the organic functional layer also covers the top surface of the array substrate and the top surface of the auxiliary electrode in the first overlapping opening.

18. The display panel according to claim 17, wherein: The first overlapping opening includes a side surface facing the auxiliary electrode and a bottom surface intersecting with the side surface of the first overlapping opening. An angle between the side surface of the first overlapping opening and the bottom surface of the first overlapping opening is an obtuse angle.

19. The display panel according to claim 18, wherein: The angle between the side surface of the first overlapping opening and the bottom surface of the first overlapping opening is greater than 140°; A distance between an edge of a bottom surface of the first overlapping opening and an edge of a bottom surface of the auxiliary electrode is greater than or equal to 3 μm.

20. The display panel according to any one of claims 1 to 11, characterized in that: The auxiliary electrode is disposed in the array substrate, and the auxiliary electrode is insulated from the electrode block.

21. The display panel according to claim 20, wherein: The array substrate includes a substrate, and a first insulating layer, a first conductive layer, and a second insulating layer stacked on the substrate; the auxiliary electrode and the first conductive layer are both disposed on the first insulating layer; The second insulating layer includes a second overlapping opening, wherein the second overlapping opening exposes the auxiliary electrode and the first insulating layer; the electrode block is located on the second insulating layer; The first insulating layer is an inorganic insulating layer.

22. The display panel according to claim 21, wherein: The display panel further includes at least one first etch auxiliary block, the first etch auxiliary block being located between the auxiliary electrode and the first insulating layer, and an orthographic projection of the first etch auxiliary block on the substrate covering an orthographic projection of the auxiliary electrode on the substrate; The material of the first etching auxiliary block is an inorganic material; The inorganic material includes at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

23. The display panel according to claim 21, wherein: The display panel further includes at least one second etching auxiliary block, the second etching auxiliary block is located between the auxiliary electrode and the organic functional layer, and the orthographic projection of the second etching auxiliary block on the substrate covers the orthographic projection of the auxiliary electrode on the substrate; The material of the second etch auxiliary block includes at least one of silicon oxide, silicon nitride, silicon oxynitride and indium tin oxide.

24. The display panel according to any one of claims 21-22, characterized in that: The display panel further includes a pixel definition layer, the pixel definition layer being disposed on the second insulating layer, the pixel definition layer having a plurality of pixel openings, each of the pixel openings corresponding to one of the top surfaces of the electrode blocks being exposed; the pixel definition layer further includes a third overlapping opening, the third overlapping opening being connected to the second overlapping opening to expose the auxiliary electrode and the first insulating layer; The organic functional layer covers the pixel definition layer and the top surface of the electrode block in the pixel opening; the organic functional layer also covers the top surface of the first insulating layer and the top surface of the auxiliary electrode in the second overlapping opening.

25. The display panel according to any one of claims 1 to 11, characterized in that: The second electrode layer is a whole-layer structure.

26. The display panel according to any one of claims 1 to 11, characterized in that: The display panel further includes a first power line; the first power line is connected to the auxiliary electrode, and the first power line is configured to provide a power signal to the auxiliary electrode.

27. A method for manufacturing a display panel, for forming the display panel according to any one of claims 1 to 26, characterized in that: include: Providing an array substrate provided with auxiliary electrodes and electrode blocks, wherein the auxiliary electrodes are provided on the array substrate or within the array substrate; The auxiliary electrode includes a first material layer, the first material layer includes a bottom surface facing the array substrate, and a side surface intersecting the bottom surface of the first material layer, an angle is formed between the bottom surface of the first material layer and the side surface of the first material layer, and the angle is greater than or equal to 60° and less than or equal to 160°; An organic functional layer and a second electrode layer are formed on the array substrate, and the second electrode layer is connected to the auxiliary electrode.

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