Voltage selection circuit
By combining an input comparator circuit and a hysteresis comparator, an indicator signal is generated to control the transistor to turn on, which solves the problem of unstable power supply during the dead time in the voltage selection circuit and achieves stable power supply.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SG MICRO CORP
- Filing Date
- 2023-01-17
- Publication Date
- 2026-05-12
AI Technical Summary
In voltage selection circuits, the length of the dead time is difficult to control, leading to unstable power supply, which affects the voltage drop across the storage capacitor and the system power consumption.
By employing a combination of input comparator circuit, hysteresis comparator and output control circuit, the transistor is controlled to turn on and off by comparing the input voltage and generating corresponding indication signals, ensuring continued power supply during the dead time.
This enables stable power supply to subsequent systems during the dead time, avoiding voltage drop issues and reducing system power consumption.
Smart Images

Figure CN115955103B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more specifically, to voltage selection circuits. Background Technology
[0002] The voltage selection circuit selects the circuit with the higher voltage to power the subsequent system. If the input voltage of the subsequent system is selected from voltages VIN1 and VIN2, VIN1 is selected to power the subsequent system when VIN1 is higher than VIN2, and VIN2 is selected when VIN2 is higher than VIN1. There is a certain hysteresis when switching between VIN1 and VIN2 to prevent back-and-forth switching when VIN1 and VIN2 are close, which would increase system power consumption. To prevent VIN1 and VIN2 from shooting through during switching, there is usually a dead time during the switching process. During the dead time, neither VIN1 nor VIN2 supplies power to the system. The dead time is set to avoid VIN1 and VIN2 shooting through, but since there is no power supply to replenish the output point during the dead time, it is desirable to keep the dead time as short as possible. Under various process angles and temperature deviations, the dead time is difficult to control. During the dead time, a large storage capacitor powers the system, and the length of the dead time affects the amount of charge consumed, thus affecting the voltage drop across the storage capacitor and leading to unstable power supply. Summary of the Invention
[0003] The embodiments described herein provide a voltage selection circuit, a chip, and an electronic device.
[0004] According to a first aspect of this disclosure, a voltage selection circuit is provided. The voltage selection circuit includes: an input comparison circuit, a first hysteresis comparator, a second hysteresis comparator, a first output control circuit, and a second output control circuit. The input comparison circuit is configured to: compare the magnitudes of a first input voltage from a first input terminal and a second input voltage from a second input terminal to generate a first indication signal and a second indication signal, and provide the first indication signal and the second hysteresis comparator to the first hysteresis comparator and the second hysteresis comparator, respectively. The first indication signal and the second indication signal are inverted signals. The first hysteresis comparator is configured to: generate a third indication signal and a fourth indication signal based on the first indication signal, output the third indication signal from the inverting output terminal of the first hysteresis comparator, and output the fourth indication signal from the non-inverting output terminal of the first hysteresis comparator. The power supply voltage of the first hysteresis comparator is equal to the first input voltage. The second hysteresis comparator is configured to: generate a fifth indication signal and a sixth indication signal based on the second indication signal, output the fifth indication signal from the inverting output terminal of the second hysteresis comparator, and output the sixth indication signal from the non-inverting output terminal of the second hysteresis comparator. The power supply voltage of the second hysteresis comparator is equal to the second input voltage. The first output control circuit is configured to generate an output voltage based on the first input voltage and output the output voltage from the first output terminal of the voltage selection circuit when the voltages of the third and sixth indicator signals are both less than the first input voltage. The second output control circuit is configured to generate an output voltage based on the second input voltage and output the output voltage from the first output terminal when the voltages of the fourth and fifth indicator signals are both less than the second input voltage.
[0005] In some embodiments of this disclosure, the first output control circuit includes a first transistor and a second transistor. The control electrode of the first transistor is coupled to the inverting output of a first hysteresis comparator. The first electrode of the first transistor is coupled to a first input terminal. The second electrode of the first transistor is coupled to the first electrode of a second transistor. The control electrode of the second transistor is coupled to the non-inverting output of a second hysteresis comparator. The second electrode of the second transistor is coupled to the first output terminal.
[0006] In some embodiments of this disclosure, the first output control circuit includes a first transistor and a second transistor. The control electrode of the first transistor is coupled to the non-inverting output of a second hysteresis comparator. The first electrode of the first transistor is coupled to a first input terminal. The second electrode of the first transistor is coupled to the first electrode of the second transistor. The control electrode of the second transistor is coupled to the inverting output of the first hysteresis comparator. The second electrode of the second transistor is coupled to the first output terminal.
[0007] In some embodiments of this disclosure, the first output control circuit further includes a third transistor and a fourth transistor. The control electrode of the third transistor is coupled to the control electrode of the first transistor. The first electrode of the third transistor is coupled to a first input terminal. The second electrode of the third transistor is coupled to the first electrode of the fourth transistor. The control electrode of the fourth transistor is coupled to the control electrode of the second transistor. The second electrode of the fourth transistor is coupled to the second output terminal of the voltage selection circuit.
[0008] In some embodiments of this disclosure, the second output control circuit includes a fifth transistor and a sixth transistor. The control electrode of the fifth transistor is coupled to the inverting output of the second hysteresis comparator. The first electrode of the fifth transistor is coupled to the second input terminal. The second electrode of the fifth transistor is coupled to the first electrode of the sixth transistor. The control electrode of the sixth transistor is coupled to the non-inverting output of the first hysteresis comparator. The second electrode of the sixth transistor is coupled to the first output terminal.
[0009] In some embodiments of this disclosure, the second output control circuit includes a fifth transistor and a sixth transistor. The control electrode of the fifth transistor is coupled to the non-inverting output of the first hysteresis comparator. The first electrode of the fifth transistor is coupled to the second input. The second electrode of the fifth transistor is coupled to the first electrode of the sixth transistor. The control electrode of the sixth transistor is coupled to the inverting output of the second hysteresis comparator. The second electrode of the sixth transistor is coupled to the first output.
[0010] In some embodiments of this disclosure, the second output control circuit further includes a seventh transistor and an eighth transistor. The control electrode of the seventh transistor is coupled to the control electrode of the fifth transistor. The first electrode of the seventh transistor is coupled to the second input terminal. The second electrode of the seventh transistor is coupled to the first electrode of the eighth transistor. The control electrode of the eighth transistor is coupled to the control electrode of the sixth transistor. The second electrode of the eighth transistor is coupled to the second output terminal of the voltage selection circuit.
[0011] According to a second aspect of this disclosure, a voltage selection circuit is provided. The voltage selection circuit includes: an input comparison circuit, a first hysteresis comparator, a second hysteresis comparator, a first transistor, a second transistor, a fifth transistor, and a sixth transistor. The input comparison circuit is configured to: compare the magnitudes of a first input voltage from a first input terminal and a second input voltage from a second input terminal to generate a first indication signal and a second indication signal, and provide the first indication signal and the second hysteresis comparator to the first hysteresis comparator and the second hysteresis comparator, respectively. The first indication signal and the second indication signal are inverted signals. The first hysteresis comparator is configured to: generate a third indication signal and a fourth indication signal based on the first indication signal, output the third indication signal from the inverting output terminal of the first hysteresis comparator, and output the fourth indication signal from the non-inverting output terminal of the first hysteresis comparator. The power supply voltage of the first hysteresis comparator is equal to the first input voltage. The second hysteresis comparator is configured to: generate a fifth indication signal and a sixth indication signal based on the second indication signal, output the fifth indication signal from the inverting output terminal of the second hysteresis comparator, and output the sixth indication signal from the non-inverting output terminal of the second hysteresis comparator. The power supply voltage of the second hysteresis comparator is equal to the second input voltage. The control electrode of the first transistor is coupled to the inverting output of the first hysteresis comparator. The first electrode of the first transistor is coupled to the first input. The second electrode of the first transistor is coupled to the first electrode of the second transistor. The control electrode of the second transistor is coupled to the non-inverting output of the second hysteresis comparator. The second electrode of the second transistor is coupled to the first output of the voltage selection circuit. The control electrode of the fifth transistor is coupled to the inverting output of the second hysteresis comparator. The first electrode of the fifth transistor is coupled to the second input. The second electrode of the fifth transistor is coupled to the first electrode of the sixth transistor. The control electrode of the sixth transistor is coupled to the non-inverting output of the first hysteresis comparator. The second electrode of the sixth transistor is coupled to the first output.
[0012] According to a third aspect of this disclosure, a chip is provided. The chip includes a voltage selection circuit as described in a first or second aspect of this disclosure.
[0013] According to a fourth aspect of this disclosure, an electronic device is provided. The electronic device includes the chip described in a third aspect of this disclosure. Attached Figure Description
[0014] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:
[0015] Figure 1 This is a schematic block diagram of a voltage selection circuit according to an embodiment of the present disclosure;
[0016] Figure 2This is an exemplary circuit diagram of a voltage selection circuit according to an embodiment of the present disclosure;
[0017] Figure 3 This is another exemplary circuit diagram of a voltage selection circuit according to an embodiment of the present disclosure;
[0018] Figure 4 This is yet another exemplary circuit diagram of a voltage selection circuit according to embodiments of the present disclosure; and
[0019] Figure 5 This is a timing diagram of some signals used in a voltage selection circuit according to an embodiment of the present disclosure.
[0020] In the accompanying diagram, markers with the same last two digits correspond to the same elements. It should be noted that the elements in the diagram are schematic and not drawn to scale. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.
[0022] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.
[0023] In all embodiments of this disclosure, since the source and drain of a metal-oxide-semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, the controlled middle terminal of the MOS transistor is referred to as the control terminal, and the remaining two terminals of the MOS transistor are referred to as the first terminal and the second terminal, respectively. Furthermore, terms such as "first" and "second" are used only to distinguish one component (or part of a component) from another component (or another part of a component).
[0024] As described above, if no power is supplied to the system during the dead time, the system's output voltage will drop when there is a continuous current load. To solve the power supply problem (voltage drop problem) during the dead time, embodiments of this disclosure propose a voltage selection circuit. Figure 1 A schematic block diagram of a voltage selection circuit 100 according to an embodiment of the present disclosure is shown. The voltage selection circuit 100 includes: an input comparator circuit 110, a first hysteresis comparator CMP1, a second hysteresis comparator CMP2, a first output control circuit 120, and a second output control circuit 130.
[0025] The first output terminal of the input comparator circuit 110 is coupled to the input terminal of the first hysteresis comparator CMP1 via a first node N1. The second output terminal of the input comparator circuit 110 is coupled to the input terminal of the second hysteresis comparator CMP2 via a second node N2. The input comparator circuit 110 is coupled to a first input terminal Vin1 and a second input terminal Vin2. The input comparator circuit 110 is configured to compare the magnitudes of a first input voltage Vin1 from the first input terminal Vin1 and a second input voltage Vin2 from the second input terminal Vin2 to generate a first indication signal and a second indication signal, and to provide the first indication signal and the second indication signal to the first hysteresis comparator CMP1 and the second hysteresis comparator CMP2, respectively. The first indication signal and the second indication signal are inverted signals.
[0026] In some embodiments of this disclosure, when the voltage values of the first input voltage Vin1 and the second input voltage Vin2 are both stable, if the first input voltage Vin1 is less than the second input voltage Vin2, the first indication signal is at a low level and the second indication signal is at a high level; if the first input voltage Vin1 is greater than the second input voltage Vin2, the first indication signal is at a high level and the second indication signal is at a low level. When the first input voltage Vin1 increases while the second input voltage Vin2 remains constant, the voltage of the first indication signal increases accordingly, and the voltage of the second indication signal decreases accordingly. When the first input voltage Vin1 decreases while the second input voltage Vin2 remains constant, the voltage of the first indication signal decreases accordingly, and the voltage of the second indication signal increases accordingly. (Reference) Figure 5 It is evident that there is a certain lag when switching between the first input voltage Vin1 and the second input voltage Vin2, in order to prevent back-and-forth switching when the first input voltage Vin1 and the second input voltage Vin2 are close, thereby increasing the power consumption of the system. Figure 5 The hysteresis range shown is only illustrative; its specific value can be set according to the actual application.
[0027] In some embodiments of this disclosure, the input comparison circuit 110 may include a comparator with positive feedback. The comparator with positive feedback can speed up the comparison result of the first input voltage Vin1 and the second input voltage Vin2 (i.e., speed up the rise and fall rate of the first indication signal and the second indication signal).
[0028] The input terminal of the first hysteresis comparator CMP1 is coupled to the first output terminal of the input comparator circuit 110 via a first node N1. The inverting output terminal of the first hysteresis comparator CMP1 is coupled to the first output control circuit 120 via a third node N3. The non-inverting output terminal of the first hysteresis comparator CMP1 is coupled to the second output control circuit 130 via a fourth node N4. The first hysteresis comparator CMP1 is configured to generate a third indication signal and a fourth indication signal based on a first indication signal, output the third indication signal from the inverting output terminal of the first hysteresis comparator CMP1, and output the fourth indication signal from the non-inverting output terminal of the first hysteresis comparator CMP1. The power supply voltage of the first hysteresis comparator CMP1 is equal to the first input voltage Vin1. The third and fourth indication signals are inverted signals.
[0029] The input terminal of the second hysteresis comparator CMP2 is coupled to the second output terminal of the input comparator circuit 110 via the second node N2. The inverting output terminal of the second hysteresis comparator CMP2 is coupled to the second output control circuit 130 via the fifth node N5. The non-inverting output terminal of the second hysteresis comparator CMP2 is coupled to the first output control circuit 120 via the sixth node N6. The second hysteresis comparator CMP2 is configured to generate a fifth indication signal and a sixth indication signal based on the second indication signal, output the fifth indication signal from the inverting output terminal of the second hysteresis comparator CMP2, and output the sixth indication signal from the non-inverting output terminal of the second hysteresis comparator CMP2. The power supply voltage of the second hysteresis comparator CMP2 is equal to the second input voltage Vin2. The fifth and sixth indication signals are inverted signals.
[0030] In some embodiments of this disclosure, the first hysteresis comparator CMP1 and the second hysteresis comparator CMP2 are low-threshold triggered Schmitt triggers, that is, both the rising and falling thresholds of the Schmitt trigger are low. (See reference...) Figure 5 When the first input voltage Vin1 increases while the second input voltage Vin2 remains constant, the voltage V at the first node... N1 When the first indicator signal rises to the rising threshold VH, the voltage V at the fourth node... N4 The voltage rises rapidly (because the power supply voltage of the first hysteresis comparator CMP1 is equal to the first input voltage Vin1, therefore V...). N4 (Rise to Vin1). When the voltage V at the second node... N2When the second indicator signal drops to the falling threshold VL, the voltage V at the sixth node... N6 It decreases rapidly. Therefore, the voltage V at the fourth node... N4 and the voltage V at the sixth node N6 The order of change is V N4 First become higher and then V N6 Then it becomes lower. When the first input voltage Vin1 decreases while the second input voltage Vin2 remains constant, the voltage V at the second node... N2 When the second indicator signal rises to the rising threshold VH, the voltage V at the sixth node... N6 The voltage rises rapidly (because the power supply voltage of the second hysteresis comparator CMP2 is equal to the second input voltage Vin2, therefore V...). N6 (Rise to Vin2). When the voltage V at the first node... N1 When the first indicator signal drops to the drop threshold VL, the voltage V at the fourth node... N4 It decreases rapidly. Therefore, the voltage V at the fourth node... N4 and the voltage V at the sixth node N6 The order of change is V N6 First become higher and then V N4 It then became lower.
[0031] The first output control circuit 120 is coupled to the inverting output of the first hysteresis comparator CMP1 via the third node N3. The first output control circuit 120 is coupled to the non-inverting output of the second hysteresis comparator CMP2 via the sixth node N6. The first output control circuit 120 is also coupled to the first input terminal Vin1. The first output control circuit 120 is configured to generate an output voltage based on the first input voltage Vin1 and output the output voltage from the first output terminal Vo1 of the voltage selection circuit 100 when the voltages of both the third and sixth indicator signals are less than the first input voltage Vin1. The first output control circuit 120 is further configured not to generate an output voltage (without affecting the voltage at the first output terminal Vo1) when the voltage of either the third or sixth indicator signal is greater than or equal to the first input voltage Vin1.
[0032] In some embodiments of this disclosure, when both the third and sixth indicator signals are at a low level, the output voltage is equal to the first input voltage Vin1. When both the third and sixth indicator signals are at a high level, the first output control circuit 120 does not generate an output voltage. When the third indicator signal is at a low level and the sixth indicator signal is at the second input voltage Vin2, if the second input voltage Vin2 is less than the first input voltage Vin1, the output voltage is less than the first input voltage Vin1 and greater than zero volts; if the second input voltage Vin2 is greater than the first input voltage Vin1, the first output control circuit 120 does not generate an output voltage.
[0033] The second output control circuit 130 is coupled to the non-inverting output of the first hysteresis comparator CMP1 via the fourth node N4. The second output control circuit 130 is coupled to the inverting output of the second hysteresis comparator CMP2 via the fifth node N5. The second output control circuit 130 is also coupled to the second input terminal Vin2. The second output control circuit 130 is configured to generate an output voltage based on the second input voltage Vin2 and output the output voltage from the first output terminal Vo1 when both the voltages of the fourth and fifth indicator signals are less than the second input voltage Vin2. The second output control circuit 130 is further configured not to generate an output voltage (without affecting the voltage at the first output terminal Vo1) when the voltage of either the fourth or fifth indicator signal is greater than or equal to the second input voltage Vin2.
[0034] In some embodiments of this disclosure, when both the fourth and fifth indicator signals are at a low level, the output voltage is equal to the second input voltage Vin2. When both the fourth and fifth indicator signals are at a high level, the second output control circuit 130 does not generate an output voltage. When the fifth indicator signal is at a low level and the fourth indicator signal is at the first input voltage Vin1, if the first input voltage Vin1 is less than the second input voltage Vin2, the output voltage is less than the second input voltage Vin2 and greater than zero volts; if the first input voltage Vin1 is greater than the second input voltage Vin2, the second output control circuit 130 does not generate an output voltage.
[0035] The following is combined Figure 5 The following example illustrates the operation of the voltage selection circuit 100 according to an embodiment of the present disclosure.
[0036] When the first input voltage Vin1 increases while the second input voltage Vin2 remains constant, the voltage V at the first node... N1 When the first indicator signal rises to the rising threshold VH (at time T1), the voltage V of the fourth node... N4(That is, the fourth indicator signal) quickly rises to Vin1. Since the third indicator signal is the inverted signal of the fourth indicator signal, it can be known that the third indicator signal is at a low level, although it is not shown. When the voltage V at the second node... N2 When the second indicator signal drops to the falling threshold VL (at time T2), the voltage V at the sixth node... N6 (That is, the sixth indicator signal) rapidly decreases (e.g., decreases to zero volts). The time period between time T1 and time T2 is called the dead time. During the dead time, the voltage V of the fourth node... N4 It equals the first input voltage Vin1 and the voltage V at the sixth node. N6 This is equal to the second input voltage Vin2. Since the fifth indicator signal is the inverted signal of the sixth indicator signal, it can be seen, although not shown, that the fifth indicator signal is at a low level during the dead time. As described above, in this case, the output voltage generated by the first output control circuit 120 is less than the first input voltage Vin1 and greater than zero volts, while the second output control circuit 130 does not generate an output voltage.
[0037] From time T2 to time T3, the voltage V at the fourth node N4 It equals the first input voltage Vin1, the third indicator signal, and the voltage V at the sixth node. N6 When at a low level, the fifth indicator signal is equal to the second input voltage Vin2. As described above, in this case, the output voltage generated by the first output control circuit 120 is equal to the first input voltage Vin1, while the second output control circuit 130 does not generate an output voltage.
[0038] When the first input voltage Vin1 decreases while the second input voltage Vin2 remains constant, the voltage V at the second node... N2 When the second indicator signal rises to the rising threshold VH (at time T3), the voltage V at the sixth node... N6 (That is, the sixth indicator signal) rapidly rises to Vin2. Since the fifth indicator signal is the inverted signal of the sixth indicator signal, it can be known that the fifth indicator signal is at a low level, although it is not shown. When the voltage V of the first node... N1 When the first indicator signal drops to the falling threshold VL (at time T4), the voltage V of the fourth node... N4 (That is, the fourth indicator signal) rapidly decreases (e.g., decreases to zero volts). The time period between time T3 and time T4 is also called the dead time. During the dead time, the voltage V of the fourth node... N4 It equals the first input voltage Vin1 and the voltage V at the sixth node. N6This is equal to the second input voltage Vin2. Since the third indicator signal is the inverted signal of the fourth indicator signal, it can be seen, although not shown, that the third indicator signal is at a low level during the dead time. As described above, in this case, the output voltage generated by the second output control circuit 130 is less than the second input voltage Vin2 and greater than zero volts, while the first output control circuit 120 does not generate an output voltage.
[0039] Therefore, the voltage selection circuit 100 according to the embodiments of this disclosure can not only provide the maximum power supply voltage to the subsequent system, but also supply power to the current load during the dead time, thereby solving the power supply problem during the dead time.
[0040] Figure 2 An exemplary circuit diagram of a voltage selection circuit 200 according to an embodiment of the present disclosure is shown. Figure 2 In the example, the first output control circuit 220 includes a first transistor M1 and a second transistor M2. The control electrode of the first transistor M1 is coupled to the inverting output of the first hysteresis comparator CMP1. The first electrode of the first transistor M1 is coupled to the first input terminal Vin1. The second electrode of the first transistor M1 is coupled to the first electrode of the second transistor M2. The control electrode of the second transistor M2 is coupled to the non-inverting output of the second hysteresis comparator CMP2. The second electrode of the second transistor M2 is coupled to the first output terminal Vo1.
[0041] The second output control circuit 230 includes a fifth transistor M5 and a sixth transistor M6. The control electrode of the fifth transistor M5 is coupled to the inverting output of the second hysteresis comparator CMP2. The first electrode of the fifth transistor M5 is coupled to the second input terminal Vin2. The second electrode of the fifth transistor M5 is coupled to the first electrode of the sixth transistor M6. The control electrode of the sixth transistor M6 is coupled to the non-inverting output of the first hysteresis comparator CMP1. The second electrode of the sixth transistor M6 is coupled to the first output terminal Vo1.
[0042] exist Figure 2 In the example, the first transistor M1, the second transistor M2, the fifth transistor M5, and the sixth transistor M6 are PMOS transistors. Those skilled in the art will understand that, based on the above inventive concept... Figure 2 Any modifications to the circuit shown should also fall within the scope of this disclosure. In such modifications, the transistor and voltage terminals may also have the same characteristics as described above. Figure 2 The examples shown have different settings.
[0043] The following is combined Figure 5 The following example illustrates the operation of the voltage selection circuit 200 according to an embodiment of the present disclosure.
[0044] When the first input voltage Vin1 increases while the second input voltage Vin2 remains constant, the voltage V at the first node... N1 When the first indicator signal rises to the rising threshold VH (at time T1), the voltage V of the fourth node... N4 (That is, the fourth indicator signal) quickly rises to Vin1. Since the third indicator signal is the inverted signal of the fourth indicator signal, it can be known that the third indicator signal is at a low level, although it is not shown. When the voltage V at the second node... N2 When the second indicator signal drops to the falling threshold VL (at time T2), the voltage V at the sixth node... N6 (That is, the sixth indicator signal) rapidly decreases (e.g., decreases to zero volts). The time period between time T1 and time T2 is called the dead time. During the dead time, the voltage V of the fourth node... N4 It equals the first input voltage Vin1 and the voltage V at the sixth node. N6 The fifth indicator signal is equal to the second input voltage Vin2. Since the fifth indicator signal is the inverted signal of the sixth indicator signal, it is known that the fifth indicator signal is at a low level during the dead time, although it is not shown. Since the third indicator signal is at a low level, the first transistor M1 is turned on. Since the sixth indicator signal is equal to the second input voltage Vin2, and the second input voltage Vin2 is less than the first input voltage Vin1, the second transistor M2 is not completely turned off and can still conduct slightly, supplying power to the first output terminal Vo1. Since the fifth indicator signal is at a low level, the fifth transistor M5 is turned on. Since the fourth indicator signal is equal to the first input voltage Vin1, and the second input voltage Vin2 is less than the first input voltage Vin1, the sixth transistor M6 is turned off, and the first input voltage Vin1 and the second input voltage Vin2 will not be shoot-through.
[0045] From time T2 to time T3, the voltage V at the fourth node N4 It equals the first input voltage Vin1, the third indicator signal, and the voltage V at the sixth node. N6 When the sixth indicator signal is low, the fifth indicator signal equals the second input voltage Vin2. Because the third indicator signal is low, the first transistor M1 is turned on. Because the sixth indicator signal is low, the second transistor M2 is turned on, and the first input voltage Vin1 supplies power to the first output terminal Vo1. Because the fifth indicator signal equals the second input voltage Vin2, the fifth transistor M5 is turned off. Because the fourth indicator signal equals the first input voltage Vin1, the sixth transistor M6 is turned off, and the second input voltage Vin2 does not affect the voltage at the first output terminal Vo1. In other words, the voltage selection circuit 200 selects the larger first input voltage Vin1 rather than the smaller second input voltage Vin2.
[0046] When the first input voltage Vin1 decreases while the second input voltage Vin2 remains constant, the voltage V at the second node... N2 When the second indicator signal rises to the rising threshold VH (at time T3), the voltage V at the sixth node... N6 (That is, the sixth indicator signal) rapidly rises to Vin2. Since the fifth indicator signal is the inverted signal of the sixth indicator signal, it can be known that the fifth indicator signal is at a low level, although it is not shown. When the voltage V of the first node... N1 When the first indicator signal drops to the falling threshold VL (at time T4), the voltage V of the fourth node... N4 (That is, the fourth indicator signal) rapidly decreases (e.g., decreases to zero volts). The time period between time T3 and time T4 is also called the dead time. During the dead time, the voltage V of the fourth node... N4 It equals the first input voltage Vin1 and the voltage V at the sixth node. N6 The third indicator signal is equal to the second input voltage Vin2. Since the third indicator signal is the inverted signal of the fourth indicator signal, it is known that the third indicator signal is at a low level during the dead time, although not shown. Since the fifth indicator signal is at a low level, the fifth transistor M5 is turned on. Since the fourth indicator signal is equal to the first input voltage Vin1, and the second input voltage Vin2 is greater than the first input voltage Vin1, the sixth transistor M6 is not completely turned off and can still conduct slightly, supplying power to the first output terminal Vo1. Since the third indicator signal is at a low level, the first transistor M1 is turned on. Since the sixth indicator signal is equal to the second input voltage Vin2, and the second input voltage Vin2 is greater than the first input voltage Vin1, the second transistor M2 is turned off, and the first input voltage Vin1 and the second input voltage Vin2 will not be shoot-through.
[0047] Figure 3 Another exemplary circuit diagram of a voltage selection circuit 300 according to an embodiment of the present disclosure is shown. Figure 3 In the example, the first output control circuit 320 includes a first transistor M1 and a second transistor M2. The control electrode of the first transistor M1 is coupled to the non-inverting output of the second hysteresis comparator CMP2. The first electrode of the first transistor M1 is coupled to the first input terminal Vin1. The second electrode of the first transistor M1 is coupled to the first electrode of the second transistor M2. The control electrode of the second transistor M2 is coupled to the inverting output of the first hysteresis comparator CMP1. The second electrode of the second transistor M2 is coupled to the first output terminal Vo1.
[0048] The second output control circuit 330 includes a fifth transistor M5 and a sixth transistor M6. The control electrode of the fifth transistor M5 is coupled to the non-inverting output of the first hysteresis comparator CMP1. The first electrode of the fifth transistor M5 is coupled to the second input terminal Vin2. The second electrode of the fifth transistor M5 is coupled to the first electrode of the sixth transistor M6. The control electrode of the sixth transistor M6 is coupled to the inverting output of the second hysteresis comparator CMP2. The second electrode of the sixth transistor M6 is coupled to the first output terminal Vo1.
[0049] Compared to Figure 2 Example, Figure 3 The voltage selection circuit 300 shown controls the signal exchange between the first transistor M1 and the second transistor M2, and the signal exchange between the fifth transistor M5 and the sixth transistor M6. Based on the operating principles of the first transistor M1, the second transistor M2, the fifth transistor M5, and the sixth transistor M6 described above... Figure 3 The voltage selection circuit 300 shown can also achieve this. Figure 2 The voltage selection circuit 200 shown has the following function.
[0050] Figure 4 Another exemplary circuit diagram of a voltage selection circuit 400 according to an embodiment of the present disclosure is shown. Figure 2 Based on the example shown, Figure 4 The first output control circuit 420 shown also includes a third transistor M3 and a fourth transistor M4, and the second output control circuit 430 also includes a seventh transistor M7 and an eighth transistor M8.
[0051] In this circuit, the control electrode of the third transistor M3 is coupled to the control electrode of the first transistor M1. The first electrode of the third transistor M3 is coupled to the first input terminal Vin1. The second electrode of the third transistor M3 is coupled to the first electrode of the fourth transistor M4. The control electrode of the fourth transistor M4 is coupled to the control electrode of the second transistor M2. The second electrode of the fourth transistor M4 is coupled to the second output terminal Vo2 of the voltage selection circuit 400. The control electrode of the seventh transistor M7 is coupled to the control electrode of the fifth transistor M5. The first electrode of the seventh transistor M7 is coupled to the second input terminal Vin2. The second electrode of the seventh transistor M7 is coupled to the first electrode of the eighth transistor M8. The control electrode of the eighth transistor M8 is coupled to the control electrode of the sixth transistor M6. The second electrode of the eighth transistor M8 is coupled to the second output terminal Vo2 of the voltage selection circuit 400.
[0052] exist Figure 4 In the example, the first transistor M1 to the eighth transistor M8 are PMOS transistors. Those skilled in the art will understand that, based on the above inventive concept... Figure 4 Any modifications to the circuit shown should also fall within the scope of this disclosure. In such modifications, the transistor and voltage terminals may also have the same characteristics as described above. Figure 4 The examples shown have different settings.
[0053] exist Figure 4 In the example, the third transistor M3 operates on the same principle as the first transistor M1. The fourth transistor M4 operates on the same principle as the second transistor M2. The seventh transistor M7 operates on the same principle as the fifth transistor M5. The eighth transistor M8 operates on the same principle as the sixth transistor M6. Therefore, the output of the second output terminal Vo2 is the same as the output of the first output terminal Vo1. In some embodiments of this disclosure, the dimensions of the third transistor M3, fourth transistor M4, seventh transistor M7, and eighth transistor M8 can be set to be smaller than those of the first transistor M1, second transistor M2, fifth transistor M5, and sixth transistor M6. In this way, the output voltage of the first output terminal Vo1 has a stronger driving capability and can be used as a power supply. The output voltage of the second output terminal Vo2 has a weaker driving capability and can be used as a voltage reference. Setting up two outputs can simultaneously meet the needs of different applications.
[0054] Those skilled in the art should understand that it is also possible to Figure 3 Add based on the example Figure 4 The transistors shown are the third transistor M3, the fourth transistor M4, the seventh transistor M7, and the eighth transistor M8.
[0055] Embodiments of this disclosure also provide a chip. This chip includes a voltage selection circuit according to embodiments of this disclosure. This chip is, for example, a power management chip.
[0056] Embodiments of this disclosure also provide an electronic device. This electronic device includes a chip according to embodiments of this disclosure. The electronic device is, for example, a smart terminal device, such as a tablet computer or smartphone.
[0057] In summary, the voltage selection circuit according to the embodiments of this disclosure can not only provide the maximum power supply voltage to the subsequent system, but also solve the power supply problem (voltage drop problem) during dead time, and the power supply can remain stable under continuous current load.
[0058] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.
[0059] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this application.
[0060] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.
Claims
1. A voltage selection circuit, comprising: The circuit includes an input comparator, a first hysteresis comparator, a second hysteresis comparator, a first output control circuit, and a second output control circuit. The input comparison circuit is configured to: compare the magnitudes of a first input voltage from a first input terminal and a second input voltage from a second input terminal to generate a first indication signal and a second indication signal, and provide the first indication signal and the second indication signal to the first hysteresis comparator and the second hysteresis comparator respectively, wherein the first indication signal and the second indication signal are inverted signals of each other; The first hysteresis comparator is configured to generate a third indication signal and a fourth indication signal based on the first indication signal, output the third indication signal from the inverting output terminal of the first hysteresis comparator and output the fourth indication signal from the non-inverting output terminal of the first hysteresis comparator, wherein the power supply voltage of the first hysteresis comparator is equal to the first input voltage. The second hysteresis comparator is configured to generate a fifth indication signal and a sixth indication signal based on the second indication signal, output the fifth indication signal from the inverting output terminal of the second hysteresis comparator and output the sixth indication signal from the non-inverting output terminal of the second hysteresis comparator, wherein the power supply voltage of the second hysteresis comparator is equal to the second input voltage; The first output control circuit is configured to generate an output voltage based on the first input voltage and output the output voltage from the first output terminal of the voltage selection circuit when the voltages of the third indicator signal and the sixth indicator signal are both less than the first input voltage. The second output control circuit is configured to generate the output voltage based on the second input voltage and output the output voltage from the first output terminal when the voltages of the fourth indicator signal and the fifth indicator signal are both less than the second input voltage.
2. The voltage selection circuit according to claim 1, wherein, The first output control circuit includes: a first transistor and a second transistor. Wherein, the control electrode of the first transistor is coupled to the inverting output terminal of the first hysteresis comparator, the first electrode of the first transistor is coupled to the first input terminal, and the second electrode of the first transistor is coupled to the first electrode of the second transistor. The control electrode of the second transistor is coupled to the non-inverting output terminal of the second hysteresis comparator, and the second electrode of the second transistor is coupled to the first output terminal.
3. The voltage selection circuit according to claim 1, wherein, The first output control circuit includes: a first transistor and a second transistor. Wherein, the control electrode of the first transistor is coupled to the non-inverting output terminal of the second hysteresis comparator, the first electrode of the first transistor is coupled to the first input terminal, and the second electrode of the first transistor is coupled to the first electrode of the second transistor; The control electrode of the second transistor is coupled to the inverting output terminal of the first hysteresis comparator, and the second electrode of the second transistor is coupled to the first output terminal.
4. The voltage selection circuit according to claim 2 or 3, wherein, The first output control circuit further includes: a third transistor and a fourth transistor. Wherein, the control electrode of the third transistor is coupled to the control electrode of the first transistor, the first electrode of the third transistor is coupled to the first input terminal, and the second electrode of the third transistor is coupled to the first electrode of the fourth transistor; The control electrode of the fourth transistor is coupled to the control electrode of the second transistor, and the second electrode of the fourth transistor is coupled to the second output terminal of the voltage selection circuit.
5. The voltage selection circuit according to claim 1, wherein, The second output control circuit includes a fifth transistor and a sixth transistor. Wherein, the control terminal of the fifth transistor is coupled to the inverting output terminal of the second hysteresis comparator, the first terminal of the fifth transistor is coupled to the second input terminal, and the second terminal of the fifth transistor is coupled to the first terminal of the sixth transistor; The control electrode of the sixth transistor is coupled to the non-inverting output of the first hysteresis comparator, and the second electrode of the sixth transistor is coupled to the first output.
6. The voltage selection circuit according to claim 1, wherein, The second output control circuit includes a fifth transistor and a sixth transistor. Wherein, the control electrode of the fifth transistor is coupled to the non-inverting output terminal of the first hysteresis comparator, the first electrode of the fifth transistor is coupled to the second input terminal, and the second electrode of the fifth transistor is coupled to the first electrode of the sixth transistor; The control electrode of the sixth transistor is coupled to the inverting output terminal of the second hysteresis comparator, and the second electrode of the sixth transistor is coupled to the first output terminal.
7. The voltage selection circuit according to claim 5 or 6, wherein, The second output control circuit also includes a seventh transistor and an eighth transistor. Wherein, the control electrode of the seventh transistor is coupled to the control electrode of the fifth transistor, the first electrode of the seventh transistor is coupled to the second input terminal, and the second electrode of the seventh transistor is coupled to the first electrode of the eighth transistor; The control electrode of the eighth transistor is coupled to the control electrode of the sixth transistor, and the second electrode of the eighth transistor is coupled to the second output terminal of the voltage selection circuit.
8. A voltage selection circuit, comprising: The circuit includes an input comparator, a first hysteresis comparator, a second hysteresis comparator, a first transistor, a second transistor, a fifth transistor, and a sixth transistor. The input comparison circuit is configured to: compare the magnitudes of a first input voltage from a first input terminal and a second input voltage from a second input terminal to generate a first indication signal and a second indication signal, and provide the first indication signal and the second indication signal to the first hysteresis comparator and the second hysteresis comparator respectively, wherein the first indication signal and the second indication signal are inverted signals of each other; The first hysteresis comparator is configured to generate a third indication signal and a fourth indication signal based on the first indication signal, output the third indication signal from the inverting output terminal of the first hysteresis comparator and output the fourth indication signal from the non-inverting output terminal of the first hysteresis comparator, wherein the power supply voltage of the first hysteresis comparator is equal to the first input voltage. The second hysteresis comparator is configured to generate a fifth indication signal and a sixth indication signal based on the second indication signal, output the fifth indication signal from the inverting output terminal of the second hysteresis comparator and output the sixth indication signal from the non-inverting output terminal of the second hysteresis comparator, wherein the power supply voltage of the second hysteresis comparator is equal to the second input voltage; The control terminal of the first transistor is coupled to the inverting output terminal of the first hysteresis comparator, the first terminal of the first transistor is coupled to the first input terminal, and the second terminal of the first transistor is coupled to the first terminal of the second transistor. The control electrode of the second transistor is coupled to the non-inverting output terminal of the second hysteresis comparator, and the second electrode of the second transistor is coupled to the first output terminal of the voltage selection circuit. The control terminal of the fifth transistor is coupled to the inverting output terminal of the second hysteresis comparator, the first terminal of the fifth transistor is coupled to the second input terminal, and the second terminal of the fifth transistor is coupled to the first terminal of the sixth transistor. The control electrode of the sixth transistor is coupled to the non-inverting output of the first hysteresis comparator, and the second electrode of the sixth transistor is coupled to the first output.
9. A chip, comprising: The voltage selection circuit according to any one of claims 1 to 8.
10. An electronic device, comprising: The chip according to claim 9.