Frequency-locked loop and frequency-locked method
By replacing the phase detector with a frequency-to-voltage conversion module in the DC-DC circuit, frequency locking without phase locking is achieved, which solves the circuit stability problem in COT mode and improves the circuit stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 东莞市长工微电子有限公司
- Filing Date
- 2022-12-26
- Publication Date
- 2026-06-12
Smart Images
Figure CN115987276B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of frequency locking technology, and in particular to a frequency locking circuit and frequency locking method. Background Technology
[0002] DC-DC (Direct Current) converters include various control modes, among which the COT (Constant-on-time mode) mode is highly valued for its excellent fast dynamic response capability. However, the power-on delay timer Ton in the COT architecture is affected by many factors. When the external load changes, the phase of the DC-DC switching signal will change accordingly. At this time, the frequency locking circuit will interfere with Ton due to the phase difference, which reduces the stability of the circuit. Summary of the Invention
[0003] This application aims to solve one of the technical problems existing in the prior art. To this end, this application proposes a frequency locking circuit and a frequency locking method, which can achieve frequency locking without phase locking, thereby improving the stability of the circuit.
[0004] To solve the above-mentioned technical problems, this application proposes the following technical solution:
[0005] The first aspect of this application provides a frequency locking circuit, including:
[0006] A frequency-to-voltage conversion module is used to receive a switching frequency signal and a reference oscillation frequency signal, and output a first transconductance signal according to the switching frequency signal and the reference oscillation frequency signal;
[0007] A transconductance adjustment module is provided, wherein the input terminal of the transconductance adjustment module is connected to the output terminal of the frequency-voltage conversion module, and the transconductance adjustment module is used to receive the first transconductance signal and output an adjustment signal according to the first transconductance signal.
[0008] The frequency locking method according to the first aspect of this application has at least the following advantages: The frequency locking circuit of this application first outputs a first transconductance signal in response to the switching frequency signal and the reference oscillation frequency signal through a frequency-to-voltage conversion module, and then outputs an adjustment signal in response to the first transconductance signal through a transconductance adjustment module connected to the output terminal of the frequency-to-voltage conversion module. This application uses a frequency-to-voltage conversion module to convert the switching frequency signal and the reference oscillation frequency signal into a voltage signal, so that the DC-DC converter does not respond to the phase difference between the switching frequency signal and the reference oscillation frequency signal, thus achieving frequency locking without phase locking and improving circuit stability.
[0009] According to some embodiments of the first aspect of this application, the frequency-voltage conversion module includes a first frequency-voltage conversion component, a second frequency-voltage conversion component, and a first transconductance component. The output terminals of the first frequency-voltage conversion component and the second frequency-voltage conversion component are both connected to the input terminal of the first transconductance component. The output terminal of the first transconductance component is connected to the input terminal of the transconductance adjustment module. The first frequency-voltage conversion component is used to receive the reference oscillation frequency signal and output a reference oscillation voltage signal in response to the reference oscillation frequency signal. The second frequency-voltage conversion component is used to receive the switching frequency signal and output a switching voltage signal in response to the switching frequency signal. The first transconductance component is used to receive the reference oscillation voltage signal and the switching voltage signal and output the first transconductance signal in response to the reference oscillation voltage signal and the switching voltage signal.
[0010] According to some embodiments of the first aspect of this application, a switching component and a clock module are further included. One end of the switching component is connected to the output terminal of the first transconductance component, and the other end of the switching component is connected to the input terminal of the transconductance adjustment module. The input terminal of the clock module is connected to the input terminal of the first frequency-voltage conversion component, and the output terminal of the clock module is connected to one end of the switching component. The clock module is used to receive the reference oscillation frequency signal and output a pulse signal according to the reference oscillation frequency signal to control the switching component to open or close.
[0011] According to some embodiments of the first aspect of this application, the transconductance adjustment module includes a first comparator and a second transconductance component. The input terminal of the first comparator is connected to the other end of the switching component, and the output terminal of the first comparator is connected to the input terminal of the second transconductance component. The first comparator is used to receive the first transconductance signal output by the frequency-voltage conversion module and output a first comparison signal in response to the first transconductance signal. The second transconductance component is used to receive the first comparison signal output by the first comparator and output a second comparison signal in response to the first comparison signal.
[0012] According to some embodiments of the first aspect of this application, the transconductance adjustment module further includes an adder, the input terminal of which is connected to the output terminal of the second transconductance component; the adder is used to receive a first timing current signal and a second comparison signal output by the second transconductance component, and output a second timing current signal in response to the second comparison signal and the first timing current signal.
[0013] According to some embodiments of the first aspect of this application, the transconductance adjustment module further includes a second comparator, the input of the second comparator being connected to the output of the adder; the second comparator is used to receive a preset voltage signal and a second timing current signal output by the adder, and outputs the adjustment signal in response to the second timing current signal and the preset voltage signal.
[0014] According to some embodiments of the first aspect of this application, the transconductance adjustment module further includes a first capacitor and a second capacitor, one end of the first capacitor is connected to the output terminal of the adder, and the other end of the first capacitor is grounded; one end of the second capacitor is connected to the output terminal of the frequency-voltage conversion module, and the other end of the second capacitor is grounded.
[0015] A second aspect of this application provides a frequency locking method, applied to the frequency locking circuit described in any of the first aspects of this application, comprising:
[0016] The frequency-to-voltage conversion module receives a switching frequency signal and a reference oscillation frequency signal, and outputs a first transconductance signal based on the switching frequency signal and the reference oscillation frequency signal.
[0017] The transconductance adjustment module receives the first transconductance signal and outputs an adjustment signal based on the first transconductance signal.
[0018] According to some embodiments of the second aspect of this application, the frequency-voltage conversion module includes a first frequency-voltage conversion component, a second frequency-voltage conversion component, and a first transconductance component. The output terminals of the first frequency-voltage conversion component and the second frequency-voltage conversion component are both connected to the input terminal of the first transconductance component, and the output terminal of the first transconductance component is connected to the input terminal of the transconductance adjustment module. The frequency-voltage conversion module receives a switching frequency signal and a reference oscillation frequency signal, and outputs a first transconductance signal according to the switching frequency signal and the reference oscillation frequency signal, including:
[0019] The first frequency-to-voltage conversion unit performs frequency-to-voltage conversion processing on the reference oscillation frequency signal and outputs a reference oscillation voltage signal;
[0020] The second frequency-to-voltage conversion unit performs frequency-to-voltage conversion processing on the switching frequency signal and outputs a switching voltage signal;
[0021] The first transconductance component receives the reference oscillation voltage signal and the switching voltage signal, and determines the magnitudes of the reference oscillation voltage signal and the switching voltage signal to obtain a first transconductance signal; wherein, when the reference oscillation voltage signal is greater than the switching voltage signal, the direction of the first transconductance signal is negative, and when the reference oscillation voltage signal is less than the switching voltage signal, the direction of the first transconductance signal is positive.
[0022] According to some embodiments of the second aspect of this application, the first frequency-to-voltage conversion component includes a first low-pass filter; the first frequency-to-voltage conversion component performs frequency-to-voltage conversion processing on the reference oscillation frequency signal and outputs a reference oscillation voltage signal, including:
[0023] The first frequency-voltage conversion unit generates a first conversion signal with a fixed width based on the rising edge of the reference oscillation frequency signal, and the period of the first conversion signal is the same as the period of the reference oscillation frequency signal.
[0024] The first converted signal is applied to the first low-pass filter to obtain the average voltage of the first converted signal;
[0025] The average voltage of the first conversion signal is converted to obtain a reference oscillation voltage signal;
[0026] Correspondingly, the second frequency-to-voltage conversion component includes a second low-pass filter; the second frequency-to-voltage conversion component performs frequency-to-voltage conversion processing on the switching frequency signal and outputs a switching voltage signal, including:
[0027] The second frequency-voltage conversion component generates a second conversion signal with a fixed width based on the rising edge of the switching frequency signal, and the period of the second conversion signal is the same as the period of the switching frequency signal;
[0028] The second converted signal is applied to the second low-pass filter to obtain the average voltage of the second converted signal;
[0029] The switching voltage signal is obtained by converting the average voltage of the second conversion signal.
[0030] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0031] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0032] Figure 1This is a circuit diagram of the frequency locking circuit according to an embodiment of this application;
[0033] Figure 2 This is a block diagram of a conventional frequency locking circuit according to an embodiment of this application;
[0034] Figure 3 This is a circuit diagram of the first frequency conversion component according to an embodiment of this application;
[0035] Figure 4 This is the waveform processing process of the reference oscillation frequency signal by the frequency locking method in the embodiments of this application;
[0036] Figure 5 This is the main flowchart of the frequency locking method according to an embodiment of this application;
[0037] Figure 6 This is a sub-flowchart of the frequency locking method according to an embodiment of this application;
[0038] Figure 7 This is a sub-flowchart of the frequency locking method according to an embodiment of this application;
[0039] Figure 8 This is a sub-flowchart of the frequency locking method according to an embodiment of this application.
[0040] Figure label:
[0041] Frequency-to-voltage conversion module 100; clock module 200; transconductance adjustment module 300. Detailed Implementation
[0042] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0043] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0044] In the description of this application, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0045] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.
[0046] Reference Figure 1 , Figure 1 This is a circuit diagram of a frequency locking circuit according to an embodiment of this application. It can be understood that the frequency locking circuit of this application includes: a frequency-to-voltage conversion module 100, which receives a switching frequency signal ON and a reference oscillation frequency signal OSC, and outputs a first transconductance signal Igm based on the switching frequency signal ON and the reference oscillation frequency signal OSC; and a transconductance adjustment module 300, whose input terminal is connected to the output terminal of the frequency-to-voltage conversion module 100, and which receives the first transconductance signal Igm and outputs an adjustment signal Ton based on the first transconductance signal Igm.
[0047] It should be noted that DC-DC converters include various control methods, among which the COT mode is highly valued due to its excellent fast dynamic response capability. However, the power-on delay timer Ton in the COT architecture is affected by many factors, and changes in Ton can easily lead to errors in the switching frequency of the DC-DC converter. Therefore, frequency locking technology is needed to lock the switching frequency of the DC-DC converter. (Refer to...) Figure 2 , Figure 2This is a block diagram of a conventional frequency-locking circuit according to an embodiment of this application. The conventional frequency-locking circuit continuously adjusts Ton by comparing the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC using a phase detector U7. However, conventional frequency-locking technology is not suitable for COT applications. While it aims for rapid frequency locking and phase locking simultaneously, this can significantly impact the output voltage and reduce circuit stability. COT DC-DC converters do not require rapid frequency locking; on the contrary, slower locking is preferable because most COT DC-DC applications involve small duty cycles. At small duty cycles, Ton is already very small, and even minor adjustments to Ton can significantly affect the output voltage. Furthermore, COT DC-DC converters should avoid simultaneous frequency and phase locking. In COT control mode, the switch phase is determined by the PWM comparator, but the switch phase changes with the external load. Conventional frequency-locking circuits, upon detecting a phase difference, will intervene with Ton. The system does not want the frequency-locking loop to be unnecessarily interrupted due to phase differences. Therefore, conventional frequency-locking technology is not suitable for COT DC-DC converters.
[0048] According to one embodiment of this application, the frequency-locking circuit first outputs a first transconductance signal Igm through a frequency-to-voltage conversion module 100 in response to the switching frequency signal ON and the reference oscillation frequency signal OSC. Then, a transconductance adjustment module 300 connected to the output terminal of the frequency-to-voltage conversion module 100 outputs an adjustment signal Ton in response to the first transconductance signal Igm. This application replaces the phase detector U7 in the traditional frequency-locking method with a frequency-to-voltage conversion module 100, converting the switching frequency signal ON and the reference oscillation frequency signal OSC into voltage signals. This ensures that the DC-DC converter does not respond to the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC, achieving frequency locking without phase locking and improving circuit stability. Specifically, when the switching frequency signal ON and the reference oscillation frequency signal OSC are in phase but not in frequency, the frequency-voltage conversion module 100 does not respond to the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC. Therefore, the first transconductance signal Igm will not change due to the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC, and no adjustment will be made when the switching frequency signal ON and the reference oscillation frequency signal OSC are in phase but not in frequency.
[0049] It is understood that the frequency-voltage conversion module 100 includes a first frequency-voltage conversion component U9, a second frequency-voltage conversion component U8, and a first transconductance component U7. The output terminals of the first frequency-voltage conversion component U9 and the second frequency-voltage conversion component U8 are both connected to the input terminal of the first transconductance component U7, and the output terminal of the first transconductance component U7 is connected to the input terminal of the transconductance adjustment module 300. Specifically, the first frequency-voltage conversion component U9 is used to receive the reference oscillation frequency signal OSC and output the reference oscillation voltage signal Vref in response to the reference oscillation frequency signal OSC. The second frequency-voltage conversion component U8 is used to receive the switching frequency signal ON and output the switching voltage signal Vdet in response to the switching frequency signal ON. The first transconductance component U7 is used to receive the reference oscillation voltage signal Vref and the switching voltage signal Vdet and output the first transconductance signal Igm in response to the reference oscillation voltage signal Vref and the switching voltage signal Vdet.
[0050] According to one embodiment of this application, the first frequency-to-voltage conversion component U9 and the second frequency-to-voltage conversion component U8 operate in parallel. The first frequency-to-voltage conversion component U9 receives the reference oscillation frequency signal OSC and performs a conversion operation on the reference oscillation frequency signal OSC, converting the frequency into voltage and outputting it, i.e., outputting the reference oscillation voltage signal Vref. Simultaneously, the second frequency-to-voltage conversion component U8 receives the switching frequency signal ON and performs a conversion operation on the switching frequency signal ON, outputting the switching voltage signal Vdet. Then, the first transconductance component U7, which is connected to the first frequency-to-voltage conversion component U9 and the second frequency-to-voltage conversion component U8 respectively, receives the reference oscillation voltage signal Vref and the switching voltage signal Vdet, compares the reference oscillation voltage signal Vref and the switching voltage signal Vdet, and outputs the first transconductance signal Igm. Specifically, if the reference oscillation voltage signal Vref is greater than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is positive; if the reference oscillation voltage signal Vref is less than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is negative.
[0051] Understandably, the system also includes a switching component K1 and a clock module 200. One end of the switching component K1 is connected to the output terminal of the first transconductance component U7, and the other end of the switching component K1 is connected to the input terminal of the transconductance adjustment module 300. The input terminal of the clock module 200 is connected to the input terminal of the first frequency-voltage conversion component U9, and the output terminal of the clock module 200 is connected to one end of the switching component K1. The clock module 200 receives the reference oscillation frequency signal OSC and outputs a pulse signal tPulse based on the reference oscillation frequency signal OSC to control the switching component K1 to open or close.
[0052] According to one embodiment of this application, by connecting the input terminal of the clock module 200 to the input terminal of the first frequency-voltage conversion component U9, and connecting the output terminal of the clock module 200 to one end of the switching component K1, since the bandwidth of the signal output by the frequency-voltage conversion module 100 is low and the signal frequency of the pulse signal tPulse is also low, the extremely low bandwidth of the frequency-locking integrator can be achieved in the switching working mode with a very small duty cycle, thereby further realizing the switching frequency locking of the DC-DC under the COT architecture.
[0053] It should be noted that one end of the switch component K1 is connected to the output terminal of the first transconductance component U7 and the output terminal of the clock module 200, and the other end of the switch component K1 is connected to the input terminal of the transconductance adjustment module 300. The clock module 200 can control the opening and closing of the switch component K1 by outputting a pulse signal tPulse. In the switching operation mode with a long period and a small duty cycle, the extremely low bandwidth of the frequency-locked integrator is achieved. Specifically, when the switch component K1 is open, the first transconductance component U7 and the transconductance adjustment module 300 are also open, and the transconductance adjustment component cannot receive the first transconductance signal Igm output by the first transconductance component U7. Only when the switch component K1 is closed can the first transconductance component U7 and the transconductance adjustment module 300 be connected, thereby enabling the transconductance adjustment component to receive the first transconductance signal Igm output by the first transconductance component U7.
[0054] It is understood that the transconductance adjustment module 300 includes a first comparator COMP and a second transconductance component U6. The input terminal of the first comparator COMP is connected to the other end of the switching component K1, and the output terminal of the first comparator COMP is connected to the input terminal of the second transconductance component U6. The first comparator COMP is used to receive the first transconductance signal Igm output by the frequency-voltage conversion module 100 and outputs a first comparison signal in response to the first transconductance signal Igm. The second transconductance component U6 is used to receive the first comparison signal output by the first comparator COMP and outputs a second comparison signal Iadj in response to the first comparison signal.
[0055] According to one embodiment of this application, the input terminal of the first comparator COMP is connected to the other end of the switching component K1, and the output terminal of the first comparator COMP is connected to the input terminal of the second transconductance component U6. When the frequency locking circuit of this application performs frequency locking, the pulse signal tPulse output by the clock module 200 controls the switching component K1 to close, so as to inject the first transconductance signal Igm output by the first transconductance component U7 into the first comparator COMP, so that the first comparator COMP receives the first transconductance signal Igm and outputs a first comparison signal to the second transconductance component U6. The second transconductance signal will receive the first comparison signal output by the first comparator COMP and output a second comparison signal Iadj in response to the first comparison signal. Specifically, this application can use the first comparison signal to achieve the purpose of adjusting the second comparison signal Iadj. More specifically, when the input first comparison signal is lower than the preset value of the second transconductance component U6, the second comparison signal Iadj output by the second transconductance component U6 will change direction. The second comparison signal Iadj can be positive or negative.
[0056] It is understood that the transconductance adjustment module 300 also includes an adder U5, the input terminal of the adder U5 is connected to the output terminal of the second transconductance component U6; the adder U5 is used to receive the first timing current signal Icharge and the second comparison signal Iadj output by the second transconductance component U6, and outputs the second timing current signal Ichg2 in response to the second comparison signal Iadj and the first timing current signal Icharge.
[0057] According to one embodiment of this application, the input terminal of adder U5 is connected to the output terminal of the second transconductance component U6 and the output terminal of the externally connected first timing current signal Icharge, respectively. When the second comparison signal Iadj is positive, adder U5 receives the second comparison signal Iadj and the first timing current signal Icharge and performs an addition operation on the second comparison signal Iadj and the first timing current signal Icharge, outputting the second timing current signal Ichg2; when the second comparison signal Iadj is negative, adder U5 receives the second comparison signal Iadj and the first timing current signal Icharge and performs a subtraction operation on the second comparison signal Iadj and the first timing current signal Icharge, outputting the second timing current signal Ichg2. Specifically, the first timing current signal Icharge is obtained by multiplying a preset coefficient by the Vin voltage and dividing by a preset resistance.
[0058] It is understood that the transconductance adjustment module 300 also includes a second comparator U2, the input of which is connected to the output of the adder U5; the second comparator U2 is used to receive the preset voltage signal V1 and the second timing current signal Ichg2 output by the adder U5, and outputs the adjustment signal Ton in response to the second timing current signal Ichg2 and the preset voltage signal V1.
[0059] It should be noted that the input terminal of the second comparator U2 is connected to the output terminal of the adder U5 and the output terminal of the external preset voltage, respectively. This application receives the second timing current signal Ichg2 and the preset voltage signal V1 through the second comparator U2 and outputs the adjustment signal Ton in response to the second timing current signal Ichg2 and the preset voltage signal V1, so as to complete the adjustment of the Ton time.
[0060] It is understood that the transconductance adjustment module 300 also includes a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 is connected to the output terminal of the adder U5, and the other end of the first capacitor C1 is grounded. One end of the second capacitor C2 is connected to the output terminal of the frequency-voltage conversion module 100, and the other end of the second capacitor C2 is grounded.
[0061] According to one embodiment of this application, in order to avoid short circuits or overloads in the circuit, this application also provides a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 is connected to the output terminal of the adder U5, and the other end is grounded, so as to protect the first comparator COMP and the second transconductance component U6; one end of the second capacitor C2 is connected to the output terminal of the frequency-voltage conversion module 100, and the other end is grounded, so as to protect the second comparator U2.
[0062] Reference Figure 5 Secondly, embodiments of this application provide a frequency locking method, including but not limited to steps S110 and S120.
[0063] In step S110, the frequency-voltage conversion module 100 receives the switching frequency signal ON and the reference oscillation frequency signal OSC, and outputs the first transconductance signal Igm according to the switching frequency signal ON and the reference oscillation frequency signal OSC.
[0064] In step S120, the transconductance adjustment module 300 receives the first transconductance signal Igm and outputs the adjustment signal Ton according to the first transconductance signal Igm.
[0065] According to one embodiment of this application, the frequency locking circuit first outputs a first transconductance signal Igm in response to the switching frequency signal ON and the reference oscillation frequency signal OSC via a frequency-to-voltage conversion module 100. Simultaneously, a clock module 200 outputs a pulse signal tPulse in response to the reference oscillation frequency signal OSC to control the closing of the switching component K1. Then, a transconductance adjustment module 300, connected to the output terminals of the frequency-to-voltage conversion module 100 and the clock module 200, outputs an adjustment signal Ton in response to the first transconductance signal Igm. On one hand, this application replaces the phase detector in traditional frequency locking methods with a frequency-to-voltage conversion module 100. When the switching frequency signal ON and the reference oscillation frequency signal OSC are in phase but not in frequency, because the frequency-to-voltage conversion module 100 does not respond to the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC, the first transconductance signal Igm will not change due to the phase difference between the switching frequency signal ON and the reference oscillation frequency signal OSC, and no adjustment will be made when the switching frequency signal ON and the reference oscillation frequency signal OSC are in phase but not in frequency. On the other hand, this application uses a clock module 200 to output a low-frequency pulse signal tPulse to control the switching component K1, thereby adjusting the period of the first transconductance signal Igm. This allows the output adjustment signal Ton to be slowly adjusted, enabling the frequency to be slowly locked and improving the stability of the circuit.
[0066] Reference Figure 6 Secondly, embodiments of this application provide a frequency locking method, including but not limited to steps S210 and S220.
[0067] In step S210, the first frequency-to-voltage conversion unit U9 performs frequency-to-voltage conversion processing on the reference oscillation frequency signal OSC and outputs the reference oscillation voltage signal Vref.
[0068] The second frequency-to-voltage conversion unit U8 performs frequency-to-voltage conversion processing on the switching frequency signal ON and outputs the switching voltage signal Vdet.
[0069] In step S220, the first transconductance component U7 receives the reference oscillation voltage signal Vref and the switching voltage signal Vdet, and determines the magnitudes of the reference oscillation voltage signal Vref and the switching voltage signal Vdet to obtain the first transconductance signal Igm; wherein, when the reference oscillation voltage signal Vref is greater than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is negative, and when the reference oscillation voltage signal Vref is less than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is positive.
[0070] It should be noted that the first frequency-to-voltage conversion unit U9 and the second frequency-to-voltage conversion unit U8 operate in parallel. The first frequency-to-voltage conversion unit U9 receives the reference oscillation frequency signal OSC and performs a conversion operation on the reference oscillation frequency signal OSC, converting the frequency into voltage and outputting it, i.e., the reference oscillation voltage signal Vref. Simultaneously, the second frequency-to-voltage conversion unit U8 receives the switching frequency signal ON and performs a conversion operation on the switching frequency signal ON, outputting the switching voltage signal Vdet. Then, the first transconductance unit U7, which is connected to the first frequency-to-voltage conversion unit U9 and the second frequency-to-voltage conversion unit U8 respectively, receives the reference oscillation voltage signal Vref and the switching voltage signal Vdet, compares the reference oscillation voltage signal Vref and the switching voltage signal Vdet, and outputs the first transconductance signal Igm. Specifically, if the reference oscillation voltage signal Vref is greater than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is positive; if the reference oscillation voltage signal Vref is less than the switching voltage signal Vdet, the direction of the first transconductance signal Igm is negative.
[0071] Reference Figure 7 Secondly, embodiments of this application provide a frequency locking method, including but not limited to steps S310, S320, and S330.
[0072] In step S310, the first frequency-voltage conversion unit U9 generates a first conversion signal with a fixed width based on the rising edge of the reference oscillation frequency signal OSC. The period of the first conversion signal is the same as the period of the reference oscillation frequency signal OSC.
[0073] Step S320: Apply the first conversion signal to the first low-pass filter to obtain the average voltage of the first conversion signal;
[0074] Step S330: Convert the average voltage of the first conversion signal to obtain the reference oscillation voltage signal Vref.
[0075] Reference Figure 8 Secondly, embodiments of this application provide a frequency locking method, including but not limited to steps S410, S420, and S430.
[0076] In step S410, the second frequency voltage conversion unit U8 generates a second conversion signal with a fixed width based on the rising edge of the switching frequency signal ON. The period of the second conversion signal is the same as the period of the switching frequency signal ON.
[0077] Step S420: Apply the second conversion signal to the second low-pass filter to obtain the average voltage of the second conversion signal;
[0078] Step S430: Convert the voltage of the second conversion signal according to its average voltage to obtain the switching voltage signal Vdet.
[0079] It is understood that the first frequency voltage conversion component U9 and the second frequency voltage conversion component U8 operate in the same way. The following description will use the process of the first frequency voltage conversion component U9 converting the reference oscillation frequency signal OSC as an example.
[0080] Reference Figure 4 , Figure 4 This is the waveform processing process of the reference oscillation frequency signal by the frequency locking method in this application embodiment. According to one embodiment of this application, the first frequency-voltage conversion unit U9 receives the reference oscillation frequency signal OSC and generates a first conversion signal with a fixed width based on the rising edge of the reference oscillation frequency signal OSC. The low level of the first conversion signal is ground level 0V, and the high level is power supply voltage VCC. The period of the first conversion signal is the same as the period of the reference oscillation frequency signal OSC. The width of the first conversion signal is a fixed value t0, and t0 is less than the minimum period. The duty of the first conversion signal is equal to t0 divided by period. The duty of the signal is different depending on the input period.
[0081] Reference Figure 3 , Figure 3 This is a circuit diagram of the first frequency conversion component in an embodiment of this application. The first frequency voltage conversion component U9 is also provided with a first low-pass filter. After obtaining the first conversion signal, the first frequency voltage conversion component U9 applies the first conversion signal to the first low-pass filter with a sufficiently large time constant to obtain the average voltage of the first conversion signal, which is equal to VCC*t0 / period. After obtaining the average voltage of the first conversion signal, this application will also convert the average voltage of the first conversion signal to obtain the reference oscillation voltage signal Vref and output it to the first transconductance component U7. Specifically, since t0 is a fixed set value, and the frequencies of the input signals are different, different output voltages can be obtained. More specifically, the switching frequency signal ON and the reference oscillation frequency signal OSC are different. The first frequency conversion component and the second frequency conversion component respond to the switching frequency signal ON and the reference oscillation frequency signal OSC respectively and output different switching voltage signals Vdet and reference oscillation voltage signals Vref. Therefore, this application achieves stable COT frequency locking when the phases are different through the first frequency voltage conversion component U9 and the second frequency voltage conversion component U8.
[0082] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.
Claims
1. A frequency-locking circuit, characterized in that, include: A frequency-to-voltage conversion module is used to receive a switching frequency signal and a reference oscillation frequency signal, and output a first transconductance signal according to the switching frequency signal and the reference oscillation frequency signal; A transconductance adjustment module is provided, wherein the input terminal of the transconductance adjustment module is connected to the output terminal of the frequency-voltage conversion module, and the transconductance adjustment module is used to receive the first transconductance signal and output an adjustment signal according to the first transconductance signal; The frequency-to-voltage conversion module includes a first frequency-to-voltage conversion component, a second frequency-to-voltage conversion component, and a first transconductance component. The output terminals of the first and second frequency-to-voltage conversion components are both connected to the input terminal of the first transconductance component. The output terminal of the first transconductance component is connected to the input terminal of the transconductance adjustment module. Specifically, the first frequency-to-voltage conversion component receives the reference oscillation frequency signal and outputs a reference oscillation voltage signal in response to the reference oscillation frequency signal; the second frequency-to-voltage conversion component receives the switching frequency signal and outputs a switching voltage signal in response to the switching frequency signal; and the first transconductance component receives the reference oscillation voltage signal and the switching voltage signal and outputs the first transconductance signal in response to the reference oscillation voltage signal and the switching voltage signal.
2. The frequency locking circuit according to claim 1, characterized in that, It also includes a switching component and a clock module. One end of the switching component is connected to the output terminal of the first transconductance component, and the other end of the switching component is connected to the input terminal of the transconductance adjustment module. The input terminal of the clock module is connected to the input terminal of the first frequency-voltage conversion component, and the output terminal of the clock module is connected to one end of the switching component. The clock module is used to receive the reference oscillation frequency signal and output a pulse signal according to the reference oscillation frequency signal to control the switching component to open or close.
3. The frequency locking circuit according to claim 2, characterized in that, The transconductance adjustment module includes a first comparator and a second transconductance component. The input terminal of the first comparator is connected to the other end of the switching component, and the output terminal of the first comparator is connected to the input terminal of the second transconductance component. The first comparator is used to receive the first transconductance signal output by the frequency-voltage conversion module and output a first comparison signal in response to the first transconductance signal. The second transconductance component is used to receive the first comparison signal output by the first comparator and output a second comparison signal in response to the first comparison signal.
4. The frequency locking circuit according to claim 3, characterized in that, The transconductance adjustment module further includes an adder, the input of which is connected to the output of the second transconductance component; the adder is used to receive a first timing current signal and a second comparison signal output by the second transconductance component, and outputs a second timing current signal in response to the second comparison signal and the first timing current signal.
5. The frequency locking circuit according to claim 4, characterized in that, The transconductance adjustment module further includes a second comparator, the input of which is connected to the output of the adder; the second comparator is used to receive a preset voltage signal and a second timing current signal output by the adder, and outputs the adjustment signal in response to the second timing current signal and the preset voltage signal.
6. The frequency locking circuit according to claim 4, characterized in that, The transconductance adjustment module further includes a first capacitor and a second capacitor. One end of the first capacitor is connected to the output terminal of the adder, and the other end of the first capacitor is grounded. One end of the second capacitor is connected to the output terminal of the frequency-voltage conversion module, and the other end of the second capacitor is grounded.
7. A frequency locking method, characterized in that, The frequency-locking circuit according to any one of claims 1 to 6, wherein the frequency-voltage conversion module includes a first frequency-voltage conversion component, a second frequency-voltage conversion component, and a first transconductance component, wherein the output terminals of the first frequency-voltage conversion component and the second frequency-voltage conversion component are both connected to the input terminal of the first transconductance component, and the output terminal of the first transconductance component is connected to the input terminal of the transconductance adjustment module; the frequency-locking method includes: The frequency-to-voltage conversion module receives a switching frequency signal and a reference oscillation frequency signal, and outputs a first transconductance signal based on the switching frequency signal and the reference oscillation frequency signal. The transconductance adjustment module receives the first transconductance signal and outputs an adjustment signal according to the first transconductance signal; The frequency-to-voltage conversion module receives a switching frequency signal and a reference oscillation frequency signal, and outputs a first transconductance signal based on the switching frequency signal and the reference oscillation frequency signal, including: The first frequency-to-voltage conversion unit performs frequency-to-voltage conversion processing on the reference oscillation frequency signal and outputs a reference oscillation voltage signal; The second frequency-to-voltage conversion unit performs frequency-to-voltage conversion processing on the switching frequency signal and outputs a switching voltage signal; The first transconductance component receives the reference oscillation voltage signal and the switching voltage signal, and determines the magnitudes of the reference oscillation voltage signal and the switching voltage signal to obtain a first transconductance signal; wherein, when the reference oscillation voltage signal is greater than the switching voltage signal, the direction of the first transconductance signal is negative, and when the reference oscillation voltage signal is less than the switching voltage signal, the direction of the first transconductance signal is positive.
8. The frequency locking method according to claim 7, characterized in that, The first frequency-to-voltage conversion component includes a first low-pass filter; the first frequency-to-voltage conversion component performs frequency-to-voltage conversion processing on the reference oscillation frequency signal and outputs a reference oscillation voltage signal, including: The first frequency-voltage conversion unit generates a first conversion signal with a fixed width based on the rising edge of the reference oscillation frequency signal, and the period of the first conversion signal is the same as the period of the reference oscillation frequency signal. The first converted signal is applied to the first low-pass filter to obtain the average voltage of the first converted signal; The average voltage of the first conversion signal is converted to obtain a reference oscillation voltage signal; Correspondingly, the second frequency-to-voltage conversion component includes a second low-pass filter; the second frequency-to-voltage conversion component performs frequency-to-voltage conversion processing on the switching frequency signal and outputs a switching voltage signal, including: The second frequency-voltage conversion component generates a second conversion signal with a fixed width based on the rising edge of the switching frequency signal, and the period of the second conversion signal is the same as the period of the switching frequency signal; The second converted signal is applied to the second low-pass filter to obtain the average voltage of the second converted signal; The switching voltage signal is obtained by converting the average voltage of the second conversion signal.