A memristor based on a two-dimensional material heterojunction and a method for manufacturing the same

Abstract

The present invention belongs to the technical field of electronic memories, and specifically provides a memristor based on a two-dimensional material heterojunction and a manufacturing method thereof. The memristor is composed of a substrate, a metal electrode, and a two-dimensional material heterojunction from bottom to top; the on / off ratio of the device is as high as 10<supgt;3< / supgt>, and the durability exceeds 600 cycles; the memristor based on the two-dimensional material heterojunction provided by the present invention can be used to simulate artificial synapses.

Description

Technical Field

[0001] The present invention belongs to the field of electronic memory, and specifically relates to a memristor based on a two-dimensional material heterojunction and a manufacturing method thereof. Background Art

[0002] Memristor is a new type of memory device based on resistance switching. Compared with traditional memory devices, memristor has the characteristics of miniaturization, low power consumption and strong read and write capabilities. Memristor changes its own resistance value by changing the applied voltage, and can perform logical operations and store large amounts of data at the same time. In addition, memristor works similarly to neuron synapses, making it possible to become a basic component for manufacturing artificial brains in the future, thereby simulating the synaptic function in the brain. Memristors based on two-dimensional materials play an important role in artificial synapse simulation. Therefore, memristors have great application prospects in the fields of storage and neuromorphic computing.

[0003] At present, the most common structure of memristors is a sandwich stacking structure of metal material / resistive layer material / metal material. Among them, the resistive layer material is the most critical part of the memristor device, and its properties directly determine the electrical properties of the device. There are many types of two-dimensional materials, and they have rich physical properties. They can be used as resistive layer materials to design and manufacture various new memristor devices with excellent performance. Therefore, the use of new two-dimensional materials is a key factor in the successful research of new memristors. In addition, compared with the sandwich vertical stacking structure memristor, the manufacturing process of the planar structure memristor with electrodes at both ends is relatively simple.

[0004] Graphene-based two-dimensional layered semiconductors have great application prospects for the next generation of nanoelectronic devices after the silicon era. Two-dimensional materials have a natural layered structure, and a single layer can exist independently and stably; traditional memristors usually use common two-dimensional materials as resistive switching layer materials, such as SnS, MoS2, etc., and hope to control memristors by applying gate voltage or laser irradiation and material doping, but the device performance needs to be improved. Although the switching ratio of the device can be improved by controlling the memristor by applying gate voltage or laser irradiation and material doping, it increases the complexity of device preparation.

[0005] A document with DOI number “https: / / doi.org / 10.1021 / acsnano.0c03869” and title “In-Plane Ferroelectric Tin Monosulfide and Its Application in Ferroelectric Analog Synaptic Device” discloses a planar structure memristor based on the two-dimensional material SnS. The device structure is Pt / SnS / Pt. The resistance value of the device can be changed by applying source-drain voltage to the left and right electrodes of the memristor. The switching ratio is 20 and the number of cycles is 50. However, its switching ratio and durability are low. Summary of the invention

[0006] In view of the defects of the prior art, the purpose of the present invention is to provide a memristor based on a two-dimensional material heterojunction, using a two-dimensional material WO2Cl2, and sealing it by covering a thin layer of hexagonal boron nitride (hBN), providing a low-cost and high-efficiency method for making a memristor based on a two-dimensional material heterojunction, and the obtained heterojunction device has a high switching ratio, that is, the ratio of high resistance to low resistance and durability. The resistance value of the device can be changed by applying a source-drain voltage to the left and right electrodes of the memristor, so that the new memristor has two resistance states, a high resistance state and a low resistance state. The manufacturing process of a memristor with a planar structure is relatively simple compared to a memristor with a vertical structure; and the memristor with electrodes at both ends can be applied to the simulation of artificial synapses, and has a good application prospect in brain-like computing and artificial intelligence.

[0007] In order to achieve the above object, the technical solution of the present invention is:

[0008] A memristor based on a two-dimensional material heterojunction, wherein the memristor is composed of a substrate, a metal electrode, and a two-dimensional material heterojunction from bottom to top, wherein the two-dimensional material heterojunction is formed by pressing a two-dimensional WO2Cl2 thin sheet onto a two-dimensional hexagonal boron nitride hBN thin sheet.

[0009] The method for manufacturing the memristor based on the two-dimensional material heterojunction comprises the following steps:

[0010] The specific preparation method includes: preparing a patterned metal electrode on a clean substrate; preparing a two-dimensional WO2Cl2 sheet on polydimethylsiloxane (PDMS) by mechanical stripping of a WO2Cl2 block in a vacuum or inert gas atmosphere, and then pressing the two-dimensional WO2Cl2 sheet on the PDMS onto the electrode of the substrate to form a two-dimensional WO2Cl2 sheet / electrode / substrate composite layer structure; the WO2Cl2 block is prepared by chemical vapor transport (CVT) at a temperature gradient of 280-350°C from WCl6 and WO3; preparing a two-dimensional hexagonal boron nitride hBN sheet on PDMS by mechanical stripping of a hexagonal boron nitride block in a vacuum or inert gas atmosphere, and then pressing the two-dimensional hexagonal boron nitride sheet on the PDMS onto the two-dimensional WO2Cl2 sheet / electrode / substrate composite layer structure, at which time the two-dimensional hexagonal boron nitride sheet forms a heterojunction with the WO2Cl2 sheet, and the prepared device is a heterojunction / electrode / substrate composite layer structure;

[0011] Furthermore, the polydimethylsiloxane PDMS is attached to a glass slide.

[0012] Further, the substrate is preferably a silicon wafer, and the silicon wafer is composed of a SiO2 oxide layer and a Si layer, hereinafter referred to as SiO2 / Si. Further preferably, the total thickness of the silicon wafer is 500±15 μm, wherein the thickness of the SiO2 oxide layer is 285 nm.

[0013] Furthermore, the vacuum or inert gas atmosphere can be provided by a glove box, and corresponding operations under the vacuum or inert gas atmosphere can be completed in the glove box.

[0014] Beneficial effects:

[0015] Firstly, the memristor based on the two-dimensional material heterojunction disclosed in the present invention proposes to use a new two-dimensional material WO2Cl2 as the resistive switching layer material, which expands the selection range of the resistive switching layer material system, and hermetically encapsulates it by covering it with a thin layer of hexagonal boron nitride (hBN). Hexagonal boron nitride (hBN) is suitable for hermetically encapsulating WO2Cl2, a water-oxygen sensitive two-dimensional material, due to its excellent electrical insulation, high thermal conductivity, chemical stability and hydrophobicity, which greatly increases the survival life of the sensitive two-dimensional material in the air.

[0016] Secondly, the raw materials of the above-mentioned two-dimensional material heterojunction memristor are easy to obtain. The preparation process of the raw material hBN is mature and has formed industrial development. It can be provided by two-dimensional material manufacturers. WO2Cl2 can also be easily synthesized, which reduces the cost of device preparation. Since there is no need for additional means such as material doping to control the device, and there is no need to consider the preparation of the top electrode in the vertical structure, the complexity of device preparation is simplified by constructing a two-terminal electrode device;

[0017] Again, after testing, it was found that the resistance value of the two-dimensional material heterojunction memristor can be changed by applying source-drain voltage to the left and right electrodes, so that the memristor has two resistance states: high resistance state and low resistance state. The switching ratio of the memristor device, that is, the ratio of high resistance to low resistance, is as high as 10. 3 , the device durability exceeds 600 cycles. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic structural diagram of the device of Example 1;

[0019] Figure 2 This is a photo of the device made in Example 1 of the present invention under an optical microscope;

[0020] Figure 3 This is the IV curve of the device made in Example 1 of the present invention;

[0021] Figure 4 This is a resistance-cycle number curve of the device made in Example 1 of the present invention.

[0022] Figure 5 This is a postsynaptic current-pulse number curve of the device made in Example 1 of the present invention. DETAILED DESCRIPTION

[0023] Below in conjunction with the accompanying drawings in the embodiments of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of embodiments of the present invention, rather than all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative work, all belong to the scope of protection of the present invention. Those who do not specify specific conditions in the embodiments are carried out according to normal conditions or conditions recommended by the manufacturer, and those who do not specify the manufacturer for reagents or instruments used are conventional products that can be obtained by commercial purchase.

[0024] Example 1: A method for manufacturing a memristor based on a two-dimensional material heterojunction

[0025] Step S1: preparing WO2Cl2 bulk material. Prepare raw materials WCl6 and WO3, and use chemical vapor transport (CVT) to prepare WO2Cl2 bulk material at a temperature gradient of 280-350°C.

[0026] Step S2: Preliminary preparation. Prepare clean SiO2 / Si (silicon wafer), the total thickness of the silicon wafer is 500±15μm, and the thickness of the oxide layer is 285nm; place the cut SiO2 / Si (silicon wafer) substrate in acetone, ethanol, and deionized water in turn, and clean it in an ultrasonic cleaner for 2 minutes, the ultrasonic power is 99W, and the nitrogen gun is blown dry. Acetone cleaning is used to remove pollutants such as grease debris on the silicon wafer, ethanol cleaning is to remove residual acetone, and deionized water cleaning is to remove residual ethanol; prepare hexagonal boron nitride bulk and WO2Cl2 bulk, among which hexagonal boron nitride bulk (hBN) is purchased from HQ Graphene, and the hBN crystal size is 1mm. WO2Cl2 is an AB stacked α-WO2Cl2 with a space group of CC (No.9).

[0027] Step S3: Prepare metal electrodes. Adsorb the cleaned silicon wafer on the glue spreader, and spin-coat two layers of glue in succession. First, use a disposable dropper to drop methyl methacrylate (MMAEL6) glue on the silicon wafer. First, set the glue spreader to rotate at 4000r / min for 33s, then 7000r / min for 8s. After the spin coating is completed, bake it on a heating table at 120°C for 2min; then drop polymethyl methacrylate (PMMAA5) electron beam photoresist on it, first set the glue spreader to rotate at 4000r / min for 33s, then 7000r / min for 8s, and then bake it on the heating table after the end. Use DrawBeam software to draw the top electrode design pattern, and then use the electron beam lithography (Electron-beamlithography) EBL system in the electron beam cavity to reduce the vacuum in the cavity to 10 -4 Below the Pa level; after exposure, development and fixing are performed, the development time in acetone is 34s, and the fixing time in isopropanol is 10s;

[0028] Place the silicon wafer processed in the previous step in the electron beam chamber of the electron beam evaporation (EBE) system and evacuate the chamber to 10 -4 Pa level. First, titanium (Ti) was evaporated as an adhesion layer with an evaporation thickness of 10 nm, and then gold (Au) was evaporated with an evaporation thickness of 30 nm. The rate of Ti evaporation was The rate of Au evaporation is The purpose of making an adhesion layer is that the adhesion between gold and silicon wafer is not good enough and it is easy to fall off in subsequent operations. The silicon wafer with metal electrodes is obtained by soaking it in acetone and performing a peeling operation.

[0029] Step S4: preparing a thin layer of two-dimensional material in a glove box. Using a tape mechanical stripping method, a WO2Cl2 thin sheet is prepared on the PDMS attached to the glass slide, and using a tape mechanical stripping method, a hexagonal boron nitride thin sheet is prepared on the PDMS attached to the glass slide.

[0030] Step S5: preparing a two-dimensional material heterojunction on a two-dimensional material transfer platform in a glove box.

[0031] Step S5.1, transfer the WO2Cl2 flakes onto a silicon wafer with metal electrodes.

[0032] Step S5.2, transferring the hexagonal boron nitride wafer to the WO2Cl2 wafer to obtain a boron nitride / WO2Cl2 heterojunction, and then obtaining a target device.

[0033] like Figure 1 This is a schematic diagram of the structure of the device described in Example 1.

[0034] like Figure 2 The figure shows a photograph of the device made in Example 1 under an optical microscope, the white solid line scalebar is 10 micrometers, and the electrodes are marked by white dotted lines.

[0035] Testing process and results

[0036] In order to verify the effect, the technical solution disclosed in the embodiment of the present application also conducts specific tests on the memristor, such as Figure 3 The IV curve of the device in the present invention is as follows: a variable source-drain voltage is applied to the metal electrodes at both ends: 0-Vmax-(-Vmax)-0 (Vmax=5V), and the voltage is applied to measure the current using the two-terminal method; Figure 4 The resistance-cycle curve of the device in the present invention, wherein the high resistance state (HRS) and the low resistance state (LRS) can be maintained for 10 3 Compared with other two-dimensional material memristors, the switching ratio and cycle endurance of the device are at a higher level. Figure 5 The postsynaptic current-pulse number curve of the device in the present invention. First, 51 consecutive pulse voltages with an amplitude of -3V and a width of 1ms are applied, with an interval of 50ms between two pulses, and then 51 consecutive pulse voltages with an amplitude of +3V and a width of 1ms are applied, with an interval of 50ms between two pulses. The reading voltage of the postsynaptic current is 0.7V.

[0037] pass Figure 3 From the data, before and after the source-drain voltage reaches Vmax (or -Vmax), the resistance value (i.e., the device voltage value divided by the current value) at the same voltage will present two resistance states: high and low. Figure 4The data shows that the device has an on / off ratio of more than 10 with a read voltage of +1.4V. 3 , durability exceeds 600 cycles. Figure 5 The data show that under the action of continuous negative (or positive) voltage pulses, the device exhibits long-term potentiation (or long-term depression) behavior of artificial synapses.

[0038] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for manufacturing a memristor based on a two-dimensional material heterojunction, characterized in that: The preparation method comprises the following steps: preparing a patterned metal electrode on a clean substrate; preparing a two-dimensional WO2Cl2 thin sheet on polydimethylsiloxane (PDMS) by mechanical stripping of a WO2Cl2 block in a vacuum or inert gas atmosphere, and then pressing the two-dimensional WO2Cl2 thin sheet on the PDMS onto the electrode of the substrate to form a two-dimensional WO2Cl2 thin sheet / electrode / substrate composite layer structure; the WO2Cl2 block is prepared by chemical vapor transport at a temperature gradient of 280-350°C from WCl6 and WO3; preparing a two-dimensional hexagonal boron nitride hBN thin sheet on PDMS by mechanical stripping of a hexagonal boron nitride block in a vacuum or inert gas atmosphere, and then pressing the two-dimensional hexagonal boron nitride thin sheet on the PDMS onto the two-dimensional WO2Cl2 thin sheet / electrode / substrate composite layer structure, at which time the two-dimensional hexagonal boron nitride thin sheet forms a heterojunction with the WO2Cl2 thin sheet, and the prepared device is a heterojunction / electrode / substrate composite layer structure.

2. The method for manufacturing a memristor based on a two-dimensional material heterojunction according to claim 1, characterized in that: The polydimethylsiloxane PDMS is attached to a glass slide.

3. The method for manufacturing a memristor based on a two-dimensional material heterojunction according to claim 1, characterized in that: The substrate is a silicon wafer, and the silicon wafer is composed of a SiO2 oxide layer and a Si layer.

4. The method for manufacturing a memristor based on a two-dimensional material heterojunction according to claim 3, characterized in that: The total thickness of the silicon wafer is 500±15 μm, wherein the thickness of the SiO2 oxide layer is 285 nm.

5. The method for manufacturing a memristor based on a two-dimensional material heterojunction according to claim 1, characterized in that: The vacuum or inert gas atmosphere is provided by a glove box.

6. A memristor based on a two-dimensional material heterojunction fabricated by the fabrication method according to any one of claims 1 to 5, characterized in that: The memristor is composed of a substrate, a metal electrode, and a two-dimensional material heterojunction from bottom to top, and the two-dimensional material heterojunction is formed by pressing a two-dimensional WO2Cl2 thin sheet on a two-dimensional hexagonal boron nitride hBN thin sheet.

7. Application of the memristor based on the two-dimensional material heterojunction as claimed in claim 6 in the simulation of artificial synapses.

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