Determination of rf front-end lo leakage and quadrature error parameters
By inserting pseudo-noise sequences into the direct conversion RF front-end architecture and combining them with signal processing on the observation receiver side, the problems of LO leakage and quadrature error are solved, improving signal quality and estimation efficiency, and making it suitable for DC information carrying systems.
Patent Information
- Application Number
- CN202180053039.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-07-22
- Filing Date
- 2021-07-20
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2041-07-20
AI Technical Summary
Direct conversion RF front-end architecture has LO leakage and quadrature error problems, which lead to reduced signal integrity. Traditional filtering cannot effectively eliminate LO leakage and quadrature error causes the receiver to make incorrect signal decisions.
By inserting a pseudo-noise (PN) sequence at the transmitter baseband and observing the deamplification gain at the receiver side, the LO leakage and orthogonal error parameters are jointly estimated. Signal processing and parameter estimation are performed using components such as PN sequence injection and signal generation modules, observation modules, and analysis modules.
It enables rapid estimation of LO leakage and quadrature error without affecting user data, reduces data acquisition length, improves signal quality, is suitable for DC information carrying systems, and enhances signal-to-noise ratio and estimation accuracy.
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Figure CN115989647B_ABST
Abstract
Description
[0001] Related applications
[0002] This disclosure claims priority to U.S. Provisional Patent Application No. 63 / 054,953, filed July 22, 2020, entitled “Joint Parameter Estimation of Quadratic Error and LO Leakage Based on Spread Spectrum,” the entire disclosure of which is incorporated herein by reference. Technical Field
[0003] This disclosure generally relates to the estimation of local oscillator (LO) leakage and quadrature error parameters in a transceiver radio frequency (RF) front end. In particular, this disclosure relates to the estimation of LO leakage and quadrature error parameters in a direct-conversion RF front end architecture. Background Technology
[0004] Transmitters used in wireless infrastructure, such as cellular base stations, are traditionally implemented using superheterodyne or complex intermediate frequency (IF) architectures. Implementing wireless transmitters using a direct conversion architecture instead of a superheterodyne architecture can reduce overall system cost and size by integrating and using fewer components.
[0005] Direct-conversion transmitters typically include in-phase (I) and quadrature-phase (Q) baseband paths, each with its own mixer that performs frequency conversion using a LO signal at a frequency approximately equal to the desired RF center frequency. The LO signals of the I-path mixer and the Q-path mixer are 90 degrees out of phase (sine and cosine), and the mixer outputs are summed at the RF. Attached Figure Description
[0006] To provide a more complete understanding of this disclosure and its features and advantages, reference is made to the following description in conjunction with the accompanying drawings, wherein like reference numerals denote like parts, wherein:
[0007] Figure 1 An ideal RF mixer is shown;
[0008] Figure 2 This illustrates the concept of LO leakage;
[0009] Figure 3 This is an illustrative block diagram of a part of the RF front end of a direct conversion transceiver;
[0010] Figure 4 This is an illustrative block diagram of an ideal mixer model;
[0011] Figure 5 It is an illustrative block diagram of the channel model between the transmitter and the receiver;
[0012] Figure 6 An exemplary transceiver front end is shown according to some embodiments of the present disclosure;
[0013] Figure 7 A pseudo-noise (PN) sequence injection and signal generation module according to some embodiments of the present disclosure is shown;
[0014] Figure 8 A transmitter (TX) RF front end according to some embodiments of the present disclosure is shown;
[0015] Figure 9 A simulated TX RF front end according to some embodiments of the present disclosure is shown;
[0016] Figure 10 An observation module according to some embodiments of this disclosure is shown;
[0017] Figure 11 An accumulator module according to some embodiments of the present disclosure is shown;
[0018] Figure 12 Analysis modules according to some embodiments of this disclosure are shown;
[0019] Figure 13 This is a flowchart of a method for determining LO leakage and orthogonality error parameters according to some embodiments of the present disclosure;
[0020] Figure 14 This is a flowchart of a method for estimating orthogonal error parameters according to some embodiments of the present disclosure;
[0021] Figure 15 This is a flowchart of a method for calculating LO leakage parameters according to some embodiments of this disclosure; and
[0022] Figure 16 Block diagrams are provided illustrating example data processing systems according to some embodiments of the present disclosure, which can be configured to implement or control at least a portion of an operational transceiver front end. Detailed Implementation
[0023] Overview
[0024] The systems, methods, and apparatuses disclosed herein each have several innovative aspects, none of which alone is responsible for all the desired properties disclosed herein. Details of one or more implementations of the subjects described herein are set forth below and in the accompanying drawings.
[0025] Integrating the transceiver RF front-end into a radio frequency integrated circuit (RFIC) is now popular. One of the preferred RF front-end architectures is based on direct conversion, also known as zero intermediate frequency (zero IF). Direct conversion transceivers based on a direct conversion front-end architecture may suffer from LO leakage. If left uncorrected, transmit LO leakage may cause unwanted transmissions within the desired transmit range, potentially jeopardizing system performance. Furthermore, direct conversion front-end architectures may suffer from quadrature errors, also known as I / Q imbalance.
[0026] To understand the issue of LO leakage, refer to... Figure 1 and Figure 2 .exist Figure 1 The example illustrates an RF mixer with two input ports and one output port. The first input signal is shown to the left of the RF mixer, the second input signal is shown below the RF mixer, and the output signal is shown to the right of the RF mixer. Each output signal has a specific frequency (f) and amplitude (A). An ideal mixer produces an output frequency F. OUT It consists of two inputs F IN and F LO The product of the input (IN) frequency and the LO frequency. In terms of frequency, the output should be F. IN +F LO and / or F IN -F LO If any input is not driven, there may be no output. Figure 1 In the example, F can be IN Set the baseband frequency to 1MHz (F) BB ), and can put F LO F is set to LO frequency of 500MHz LO If the mixer is ideal, it can produce an output containing two tones: one at 499MHz and one at 501MHz.
[0027] Due to the parasitic capacitance within the silicon die and the bonding wire-to-bond wire coupling, the signal applied to the LO port of the RF mixer can also be directly coupled to the RF output. For example... Figure 2 As shown in the example, this can lead to F BB and F LO Add unwanted energy, as shown in the upper right corner of the image (F). BB and F LO F OUT As indicated by the upward arrow in the image. F BB The energy at that point can be ignored because it is far from the desired output and can be filtered out by the RF component located after the mixer output. Regardless of F... BB What is the energy at that location, F? LOEnergy at any point can be a problem. It may be very close to or within the desired output signal and difficult or impossible to remove by filtering, because filtering also filters out the desired signal. LO This unwanted energy is called LO leakage, which means that the LO driving the mixer leaks to the output port of the mixer.
[0028] In a true IF architecture that transmits only one sideband, LO leakage can be addressed using RF filtering. Conversely, in a zero-IF architecture where both sidebands are transmitted, LO leakage is typically added at the center of the modulation spectrum of the desired output, presenting a more challenging problem. Traditional filtering is no longer an option, as any filter that eliminates LO leakage will generally also remove the portion of the desired transmission.
[0029] To understand the problem of orthogonal error, refer to... Figure 3 . Figure 3 Example block diagram 100 shows a portion of a direct-conversion wireless transmitter that uses an IQ modulator to modulate a bitstream onto a carrier. Figure 3 In the example, the two bitstreams, denoted as traffic_I and traffic_Q, can be converted into analog signals by digital-to-analog converters (DACs) 102a and 102b. The outputs of DACs 102a and 102b can drive two low-pass filters or a TX baseband filter (BBF) 104 to, for example, remove the Nyquist image. The output of filter 104 can then drive the baseband input of an IQ modulator. Figure 3 It includes two RF mixers 108a and 108b for each of the I and Q paths, and a mixer 110. RF mixers 108a and 108b can be used with… Figure 2 The RF mixer shown operates similarly. The LO signal from LO 106 can be split into two signals with equal amplitude but a 90° phase difference. These two quadrature signals can drive the inputs of two RF mixers 108a and 108b, which in this example can be considered analog multipliers. The LO inputs to RF mixers 108a and 108b can be driven by relatively pure continuous waveform (CW) signals generated by a phase-locked loop (PLL). The outputs of the two RF mixers 108a and 108b can be summed in mixer 110 to provide the output of an IQ modulator. The signal can be transmitted via a TX RF front end, which typically includes a power amplifier 112 and an antenna 114.
[0030] Processing the I and Q signals can result in unequal amplitudes or imperfect 90° phase separation between them. For example, the gain of the I path can be greater than the gain of the Q path; this could be caused by gain mismatch in DACs 102a and 102b, low-pass filter insertion loss, mismatch, or gain imbalance within the IQ modulator. Gain imbalance can cause the I multiplier at RF mixer 108a to be larger than the Q multiplier at RF mixer 108b, and vice versa. This typically leads to reduced signal integrity at the receiver, as the receiver expects perfect balance between the I and Q signals. Furthermore, in IQ modulators, a polyphase filter or divide-by-two trigger circuitry is typically used to achieve 90° phase separation of the LO. In either circuit, 90° phase separation or quadrature usually involves defects. IQ gain imbalance and phase imperfection (collectively referred to as quadrature error) can lead to incorrect reconstruction of signal and bit decisions in the receiver.
[0031] Note that this disclosure is not limited to transceivers that handle two bit streams, for example... Figure 3 The examples are traffic_I and traffic_Q. For instance, a single bitstream (e.g., traffic_I or traffic_Q) can be split into two parallel bitstreams to support other modulation schemes, such as quadrature phase shift keying (QPSK).
[0032] Therefore, LO leakage and orthogonality error can be introduced. Figure 3 In the section of the RF transceiver denoted as 120, the contributions of LO leakage and quadrature error to the signal can be expressed as follows: Figure 4 The model is shown. In Figure 4 In Model 200, the I signal path may be affected by LO leakage (LOL_I), while the Q signal path may be affected by LO leakage (LOL_Q). The signals on the I and Q signal paths originate, for example, from... Figure 3 The DACs 102a and 102b are shown. Gain error (g) TX ) and phase defects (COS(θ) TX ) and sin(θ TX This may cause orthogonal errors to be added to the I and Q signal paths. This could result in an orthogonal error component of -g in the I signal path. TX sin(θ TX ), and the error component of the Q signal path is g TX cos(θ TX RF mixers (e.g., Figure 3 The RF mixers 108a and 108b shown are in Figure 4 The mixer is modeled as an ideal mixer, and 90° phase separation is achieved by applying factors cos(ωt) and -sin(ωt) to the I and Q signal paths to obtain the I and Q signals respectively.
[0033] Figure 5 Model 300 shows the signal path between the transmitter (TX) and the receiver (RX). Figure 5 The signal path shown includes the I component U for the I / Q user signal. I The upper path and the Q component U for the I / Q signal Q The next path.
[0034] As will be further described below, U I and U Q The signal can be modified by modulating a PN sequence, for example, U I PN-I and U of signal modulation Q The modulation of PN-Q. Here, PN, also known as pseudo-random noise, is a signal that resembles noise that meets one or more standard tests of statistical randomness. A PN sequence typically consists of a deterministic pulse sequence or a pulse sequence of binary zeros that repeats after a predetermined period.
[0035] In addition, U can be modified using a DC correction signal. I and U Q Signal, for example, for U I DC-1 correction of the signal and U Q DC-Q correction of the signal. The resulting signal is represented as U. I (n) and U Q (n).
[0036] The contribution of LO leakage in Figure 5 The diagram shows U added to the I and Q signal paths, respectively. I (n) and U Q (n) The inherent LOL_I and inherent LOL_Q components of the signal.
[0037] refer to Figure 5 The model shown can be used in the TX DAC (e.g., Figure 3 A composite channel model (H) is defined between the DACs 102a and 102b and the analog-to-digital converter (ADC) of the observation receiver (RX) 306. The composite channel model can be defined by a cascaded quadrature error model 302 (e.g., similar to...). Figure 4 The loopback bridge model 304 is generated to model the signal to be transmitted by the transmitter at TX and received by the receiver at RX, as well as the transmitter and receiver gains G. Figure 5 In the example, it is assumed that the loopback bridge 304 is ideal, i.e., as reflected by the cos(σ) and ±sin(σ) operations on the I and Q signal components, there is only gain and phase rotation between the TX and loopback RX signals.
[0038] exist Figure 5 In the model, the TX signal passes through the TX RF front end and is fed back to the observation receiver 306. The composite channel model H can then be modeled as follows. Assume there are K transport blocks, each with N samples. Let x... k (n)=[x k,I (n),x K,Q (n)] T Let represent the nth transmitted sample in the k-th block, where I and Q represent samples transmitted on in-phase and quadrature signals, respectively. Similarly, let y k (n)=[y k,I (n),y k,Q (n)] T This indicates the nth received sample from the kth block of the RX receiver.
[0039] y k (n) and x k The composite channel H between (n) can be represented by a 2x2 real matrix H, where Reference Figure 5 H can be rewritten as:
[0040]
[0041] The RX-TX relationship can be modeled as follows:
[0042] y k (n)=H*x k (n)+w k (n) (Formula 2)
[0043] Where w k (n) can be a 2x1 additive white Gaussian noise vector at the receiver, whose distribution follows w k (n)~N(0,g w *I2).
[0044] Formulas 1 and 2 will be used further in the following description.
[0045] Signal u I (n) and u Q (n) represents the signal at TX before the LO leakage error and orthogonality error, which can be fed into the TX accumulator for further analysis, such as... Figure 5 The symbol ① in the diagram represents the signal y received by the RX 306. k,I (n) and y k,Q (n) The signal can be fed to the RX accumulator for further analysis, such as Figure 5 The symbol ② is shown in the diagram.
[0046] u I and uQ The signal can be multiplied by a PN sequence with a bit rate much higher than the original data rate. This PN sequence is also known as a PN spread sequence. The resulting transmitted signal may resemble band-limited white noise. This type of noise signal can be used to reconstruct the original data at the receiver, for example, by multiplying the signal by the same PN sequence. This process is called despreading, and mathematically, it can be considered as the correlation between the transmitted PN sequence and the PN sequence that the receiver already knows the transmitter is using. After despreading, the signal-to-noise ratio can be approximately increased by a spreading factor, which is the ratio of the spread sequence rate to the data rate.
[0047] This disclosure provides a method and system for advantageously estimating, in a joint manner, the LO leakage and quadrature error parameters of a transmitter RF front-end (e.g., a direct upconversion transmitter RF front-end). The proposed method utilizes a PN sequence inserted at the transmitter baseband, for example... Figure 5 The diagram shows the modulated PN-I and modulated PN-Q sequences. At the observation receiver side, the RX accumulator is implemented to sum the receiver signal to utilize the despreading gain from the same PN sequence from the transmitter side. Through the despreading process, the receiver-transmitter channel can be estimated, for example... Figure 5 The composite channel model H is shown. The estimated channel H can be used to extract orthogonal error parameters. The estimated channel H can also be used to eliminate user data interference presented in the RX accumulator output, which can be further used to calculate LO leakage.
[0048] The advantages of the proposed method and system include: 1) the added PN sequence can add zero DC mean to the user data, thus making it suitable for systems that carry information on DC; 2) it allows for simultaneous estimation of quadrature error and LO leakage using the same set of data captures, reducing data capture length and speeding up estimation time—which is crucial in environments such as fast frequency hopping; and 3) it allows for very low added PN sequence power, while long PN sequences provide large spread / de-amplification gains.
[0049] As those skilled in the art will understand, aspects of this disclosure can be embodied in various ways (e.g., as a method, system, computer program product, or computer-readable storage medium). Therefore, aspects of this disclosure can take the form of a completely hardware embodiment, a completely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, which are generally referred to herein as “circuit, module” or “system.” The functionality described in this disclosure can be implemented as an algorithm executed by one or more hardware processing units, such as one or more microprocessors of one or more computers. In various embodiments, different steps and portions of each method described herein can be executed by different processing units. Furthermore, aspects of this disclosure can take the form of a computer program product embodied in one or more computer-readable media, preferably non-transitory, on which computer-readable program code is embodied (e.g., stored).
[0050] The following detailed description presents various descriptions of specific embodiments. However, the innovations described herein can be embodied in many different ways, for example, as defined and covered by the claims and / or selected examples. In the following description, reference is made to the accompanying drawings, wherein similar reference numerals may denote the same or functionally similar elements. It should be understood that the elements shown in the drawings are not necessarily drawn to scale. Furthermore, it should be understood that some embodiments may include more elements than shown in the drawings and / or a subset of the elements illustrated in the drawings. In addition, some embodiments may combine any suitable combination of features from two or more drawings.
[0051] The following disclosure describes various illustrative embodiments and examples for implementing the features and functions of this disclosure. While specific components, arrangements, and / or features are described below in conjunction with various exemplary embodiments, these are merely examples for simplifying this disclosure and are not intended to be limiting. It will be appreciated that in the development of any actual embodiment, many implementation-specific decisions must be made to achieve the developer's specific objectives, including compliance with system, business, and / or legal constraints, which may vary from implementation to implementation. Furthermore, it will be appreciated that while such development work may be complex and time-consuming, it will be a routine task for those skilled in the art who benefit from this disclosure.
[0052] In this disclosure, if used, the terms “substantially,” “approximately,” “about,” etc., may be used to generally refer to within + / -20% of the target value, for example, within + / -10% of the target value based on the context of a particular value described herein or known in the art, or (A and B). For the purposes of this disclosure, the phrase “A, B, and / or C” or the symbol “A / B / C” refers to (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, C).
[0053] Other features and advantages of this disclosure will be apparent from the following description and claims.
[0054] Example transceiver front end
[0055] Figure 6 A block diagram of an example transceiver front-end 400 for jointly estimating LO leakage and orthogonality error according to some embodiments is shown. The transceiver front-end 400 can be integrated into an RFIC. The transceiver front-end 400 can be a direct conversion (e.g., zero IF) front-end.
[0056] In some embodiments, the transceiver front-end 400 can operate in a calibration mode, where LO leakage and quadrature error can be determined without actually transmitting a signal to the receiver. After calibration, the transceiver front-end 400 can be set to an operating mode where a signal is transmitted to the receiver.
[0057] The transceiver front end 400 may include a PN sequence injection and signal generation module 420. The PN sequence injection and generation module 420 can be configured to receive user data d. k (n), which may include the correction factor dcCorr. Figure 6 In the middle, d k The two arrows of (n)+dcCorr represent the I and Q signal paths of the user data. The PN sequence injection and signal generation module 420 can also be configured to receive the PN scaling factor θ for each of the I and Q signal paths from the analysis module 480. k The PN sequence injection and signal generation module 420 can be configured to receive data from user data d. k (n) Generates a sequence including the PN sequence (in...) Figure 6 u, which describes the paths of the I and Q signals k (n)) user signals, where the PN sequence is based on a scaling factor θ k u k (n) The signal can be output to the TX RF front-end module 440 and the observation module 460. The original PN sequence PN is generated in the PN sequence injection and signal generation module 420. raw (n) can be output to the observation module 460. The PN sequence injection and signal generation module 420 will... Figure 7 Further details are provided below.
[0058] The transceiver front end 400 may include a TX RF front end module 440. The TX RF front end module 440 can be configured to receive signals from the PN sequence injection and signal generation module 420. k (n) signal. The TX RF front-end module 440 can send signals to u k (n) The signal introduces a LO leakage signal. The TX RF front-end module 440 transmits the signal to one or more observation receivers 442. The TX RF front-end module 440 will... Figure 8 Further details are provided below.
[0059] The transceiver front-end 400 may include one or more observation receivers 442, which represent one or more receivers of the signal transmitted by the TX RF front-end 440. The observation receiver 442 may be configured to receive the signal y k (n) is provided to the observation module 460 for further processing.
[0060] When a signal is transmitted to the receiver, orthogonality errors may be introduced into the signal. Figure 6 The diagram illustrates a composite channel H, which can be modeled to represent orthogonal errors, for example, as shown in the figure. Figure 5 As shown in the example. In calibration mode, the TX RF front-end module 440, the composite channel H, and the observation receiver 442 can be used as a system performance implementation, i.e., a model representing the actual transmission path, resulting in u being input to the TX RF back-end module 440. k (n) The signal is modified into signal y. k (n), without the need for actual transmission.
[0061] The transceiver front end 400 may include an observation module 460. The observation module 460 may be configured to receive signals from the PN sequence injection and signal generation module 420. k (n) Signal and original PN sequence PN raw (n). The observation module 460 can also be configured to receive y from the observation receiver 442. k (n) signal. Observation module 460 can use, for example, an integer delay value del received from analysis module 480. int and fractional delay value del frac Used for signal synchronization purposes. Based on various input signals, the observation module 460 can detect the received u k (n) Signal generation and accumulation of user signal t k From the received u k (n) Signal generation: Despread accumulated user signal Φ k From the received y k(n) generates the cumulative receiver signal r k From the received y k The (n)th signal generates the despread accumulator receiver signal r. k,despr . t k Φ k r k and r k,despr The signal can be output to the analysis module 480 for further processing. The observation module 460 will... Figure 10 Further details are provided below.
[0062] The transceiver front end 400 may also include an analysis module 480. The analysis module 480 can be configured to generate a scaling factor θ. k For use by the PN sequence injection and signal generation module 420. The analysis module 480 can be configured to generate integer delay values del. int and fractional delay value del frac For use by observation module 460. Analysis module 480 can be configured to analyze the t data obtained from observation module 460. k Φ k r k and r k,despr The signal is analyzed, and based on the results, the LO leakage and orthogonality error parameters of the transceiver front-end 400 are calculated. The analysis module 480 will... Figure 12 Further details are provided below.
[0063] Example PN sequence injection and signal generation module
[0064] Figure 7 More detailed examples are shown below. Figure 6 An example of the PN sequence injection and signal generation module 420 is shown. In addition to the PN sequence injection and signal generation module 420, dashed modules that are communicatively connected to the PN sequence injection and signal generation module 420 are also shown. Specifically, the TX RF front-end module 440, the observation module 460, and the analysis module 480 are shown as dashed boxes. Figure 7 in, u k (n) The signal is in the form of separate I and Q signal paths, u k,I (n) and u k,Q (n) is shown. Furthermore, for each of the I and Q signal paths, the scaling factor θ... k In their respective forms θ k,I and θ k,Q express.
[0065] PN sequence injection and signal generation module 420 may include a module for generating the original PN sequence PN. rawA PN(n) generator 422. A binary phase shift keying (BPSK) modulator can generate a PN(n) sequence according to a standard BPSK modulation scheme. The PN(n) sequence and scaling factor θ k It can be fed into the in-phase and quadrature scaling module 426 to generate a scaled PN(n) sequence PN(n)θ for each of the I and Q signal paths. k,I and PN(n)θ k,Q Adder 428 can thus scale PN(n)θ k,I and PN(n)θ k,Q Add to user data d k (n), which may include dcCorr components to obtain the u of the I and Q signal paths. k,I (n) and u k,Q (n) Signal.
[0066] The PN sequence injection and signal generation module 420 can be implemented as a software-controlled hardware module or digital circuit. Alternatively, the PN sequence injection and signal generation module 420 can be implemented in software.
[0067] Example TX front-end module
[0068] Figure 8 More detailed examples such as Figure 6 An example of the TX RF front-end module 440 is shown. In addition to the TX RF front-end module 440, dashed modules connected to it for communication are also shown. Specifically, the PN sequence injection and signal generation module 420 and the observation receiver 442 are shown as dashed boxes.
[0069] The TX RF front-end module 440 may include a baseband LO leakage model, which can be used, for example, in calibration mode, to add the LO leakage signal to the input signal to generate x. k,I (n) and x k,Q (n) signal. The TX RF front-end module 440 may also include an orthogonal error model 446, which can, for example in calibration mode, be used to transmit the signal to x before it is transmitted to the observation receiver 442. k,I (n) and x k,Q (n) Add orthogonal error to the signal.
[0070] When the transceiver front end is not operating in calibration mode, the TX RF front end module can be configured to operate as an analog TX RF front end 440', such as... Figure 9 As shown. In Figure 9 In the analog TX RF front end, there is an RF module 443, which prepares u k,I (n) and u k,Q(n) The signal is transmitted through one or more antennas 441. RF module 443 may include various hardware components, such as Figure 3 The power amplifier 112 shown.
[0071] In some embodiments, the following methods can be used simultaneously: Figure 8 and Figure 9 The configuration can then be used as follows: Figure 8 The configuration shown is used to calibrate the transceiver, while using, for example, Figure 9 The configuration shown is used to send signals.
[0072] Example observation module
[0073] Figure 10 More detailed examples such as Figure 6 An example of the observation module 460 is shown. In addition to the observation module 460, dashed modules that are communicatively connected to it are shown. Specifically, the PN sequence injection and signal generation module 420, the observation receiver 442, and the analysis module 480 are shown as dashed boxes.
[0074] The observation module 460 may include a function for receiving u from the PN sequence injection and signal generation module 420. k,I (n) and u k,Q (n) A first-in-first-out (FIFO) buffer 462 for the signal. The observation module 460 may also include a second FIFO buffer 464 for receiving PN from the PN sequence injection and signal generation module 420. raw (n) Signal. FIFOs 462 and 464 can use the disconnection value received from analysis module 480 to apply signal synchronization. The first FIFO can receive the u k (n) The signal (i.e., for the I and Q signal paths) is output to the accumulator module 470. k (n) The delayed version of the signal can be compared with u k (n) signals are input together to despreader 466 to obtain the despread u despread,k (n) signal. PN from the second FIFO 464. raw (n) The signal can be used for despreading operations. despread,k (n) The signal can be input to the accumulator module 470.
[0075] y received from observation receiver 442 k (n) The signal can be received by the interpolator module 468, and the interpolator can use the del from the analysis module. frac The received signal is synchronized using a value. In, for example, calibration mode, as described above, this can be processed using a model of the TXRF front-end 440 and the transmission channel H. k (n) signal to receive yk (n) signal. The interpolator module 468 can output y to the accumulator module 470. k (n) signal, i.e., used for I and Q signal paths. y k (n) The delayed version of the signal can be compared with y k (n) signals are input together to despreader 466 to obtain the despread y signal. despread,k (n) signal. PN from the second FIFO 464. raw (n) The signal can be used for this despreading operation. despread,k (n) The signal can be input to the accumulator module 470.
[0076] The accumulator module 470 can accumulate the received signal and obtain t from it. k Φ k r k and r k,despr The signal is output to the analysis module 480 for further processing. The accumulator module 470 will... Figure 11 Further details are provided below.
[0077] The observation module 460 can be implemented in hardware. The accumulator can be implemented as a digital circuit. Alternatively, the accumulator can be implemented in software.
[0078] Example accumulator module
[0079] The accumulator module 470 can be implemented in various ways. Figure 11 An example is shown where the accumulator module 470 includes a transmitter side and an observation receiver side. On the transmitter side, the first TX accumulator #1 can receive u k (n) signal and output the t obtained therefrom. k Signal. The second TX accumulator #2 can receive u. despread,k (n) signal and output the Φ obtained therefrom. k Signal. On the observation receiver side, the first RX accumulator #1 can receive y k (n) signal and output the r obtained therefrom. k Signal. The second RX accumulator #2 can receive y despread,k (n) signal and output r thus obtained k,despreaded Signal.
[0080] The accumulator can be implemented as a composite accumulator, for example, one for transmitter-side data and one for observation receiver-side data.
[0081] Example Analysis Module
[0082] Figure 12 More detailed examples such as Figure 6An example of the analysis module 480 is shown. In addition to the analysis module 480, dashed modules that are communicatively connected to it are shown. Specifically, the PN sequence injection and signal generation module 420 and the observation module 460 are shown as dashed boxes.
[0083] Analysis module 480 may include PN scaling generator module 481 for generating scaling factor θ k,I and θ k,Q Scaling factor θ k,I and θ k,Q The output can be sent to the PN sequence injection and signal generation module 420. The analysis module 480 may include a programmable integer delay module 482 and a programmable fractional delay module 483, used to generate del... int and del frac value.
[0084] The channel estimation module 484 can be configured to receive Φ from the observation module 460 k and r k,despr The channel estimation module 484 can be configured to estimate the signal based on the received Φ. k and r k,despr Signals to determine composite channels Its characteristics.
[0085] The resulting channel characteristics The data can be input to the user data cancellation module 485. The user data cancellation module 485 can also receive data from the observation module 460. k and r k The user data cancellation module 485 can be configured to cancel signals based on the received t k and r k Signal and channel characteristics To eliminate interference and generate r LOL,k .
[0086] The LO leakage estimation module 486 can be based on the channel characteristics obtained from the channel estimation module 484. and r obtained from user data elimination module 485 LOL,k To estimate the LO leakage in the transceiver front end.
[0087] The orthogonal error calculation module 487 can be based on the channel characteristics obtained from the channel estimation module 484. To calculate the orthogonal error in the transceiver front end.
[0088] Therefore, the LO leakage and orthogonality error parameters can be estimated simultaneously by the analysis module 480. The obtained LO leakage and orthogonality error parameters can be used to configure the transceiver front-end 400 to compensate for LO leakage and orthogonality error.
[0089] In the example embodiment, the calculated LO leakage can be used to update dcCorr to compensate for the LO leakage. For orthogonal error correction, the calculated orthogonal error can be used to drive the actuator before LO leakage correction. Figure 6 (Not shown in the image).
[0090] The analysis module 480 can be implemented via firmware, such as the firmware of the transceiver front end 400.
[0091] Signal injection and solver modeling
[0092] The following sections will explain in more detail the signal injection and solver modeling used to obtain LO leakage and orthogonal error parameters. (Refer to...) Figure 6-12 The components shown.
[0093] Signal Injection and Solver Modeling - PN Sequence Injection Transmitter
[0094] In the nth sample of the kth transport block, the PN generator module (e.g., PN generator 422) can generate a PN. raw (n). Then, PN raw (n) can be fed into a BPSK modulator, such as BPSK modulator 424, to generate a PN sequence PN(n)∈{—1,1} according to standard BPSK modulation, i.e.
[0095]
[0096] PN(n) can be fed into in-phase and quadrature scaling modules, such as in-phase and quadrature scaling module 428, to obtain appropriate scaling. Specifically, the scalers for I and Q can be written in vector form:
[0097]
[0098] Here, g PN It is the amplitude of the PN sequence, which can be selected to be small enough compared to the user data so as not to affect the quality of the transmitted signal.
[0099] Note that θ k Values other than those specified in Formula 4 can be chosen such that [θ0, θ1, ..., θ] K-1 ][θ0, θ1, ..., θ K-1 ] T It is a rank-2 matrix with a small condition number.
[0100] The output of the in-phase and fourth-order scaling modules can be written in vector form PN(n)θ k PN(n)θ k It can be used with user data d on the data path k(n) are summed and fed to the transmitter front end, such as the TX RF front end 440, and the feedback bridge for feeding to the observation module 460. Thus, the following signal is obtained:
[0101] u k (n)=d k (n)+θ k *PN(n)+dcCorr (Formula 5)
[0102] Where d k (n) represents the user data of the nth sample in the kth block. Note that an additional term for dcCorr can also be added to the right side of Equation 5, which represents the LO leakage correction value added to the data path.
[0103] LO leaks can be added to the TX front end u k (n), thereby generating transmission data x k (n), that is, x k (n)=u k (n) + LOL. Here, LOL = [LOL i LOL q ] T It is a LO leak and is assumed to be a constant over K transport blocks.
[0104] Signal injection and solver modeling - signal at the observation receiver
[0105] Then, x k (n) can be fed into the feedback bridge for feeding into the observation module 460. According to Figure 4 and Figure 5 The receiver signal, as introduced in the model, can be represented by the following:
[0106]
[0107] Note that a delay term δ can be added to the equation representing the delay between the received and transmitted signals. H is a composite channel containing orthogonal error parameters as shown in Equation 1.
[0108] Signal injection and solver modeling - LO leakage and orthogonal error solver calculates channel
[0109] The delay δ between the RX and TX signals can have an integer part and a fractional part. The integer and fractional delays can be pre-calculated by the loopback path delay measurement module, which is outside the scope of this disclosure, and can be provided, for example, by a programmable integer delay module 482 and a programmable fractional delay module 483. The integer delay can be compensated at the TX FIFO (e.g., FIFOs 462 and 464); the fractional delay can be compensated using an RX interpolator such as interpolator module 468. These two operations are equivalent to removing the delay and producing an RX signal as follows:
[0110] y k (n)=H*(d k (n)+N*θ k *PN(n)+dcCorr+LOL)+w k (n), n=0,1,...,N-1. (Formula 7)
[0111] After collecting all N samples of the k-th block, these samples can be multiplied by the same PN sequence PN(N) at the despreader (e.g., despreader 466) and then combined at the RX correlator according to the following equation:
[0112]
[0113] here, By paying attention to PN(n) 2 =1, the right-hand side of Formula 8 can be rearranged as follows:
[0114]
[0115] Due to the despreading process, the second and third terms on the right-hand side of Equation 9 can be suppressed, which leads to the simplified formula for the k-th block:
[0116] r k,despreaded =H*φ k (Formula 10)
[0117] in
[0118] All r k,despreaded The matrix (k = 0, ..., K-1) can be combined into a matrix form at the channel estimation module (e.g., channel estimation module 484), as follows:
[0119] R = H * ∑. (Formula 11)
[0120] Here and φ k This can be provided by a TX accumulator (e.g., TX accumulator #1) through a despreading process. The transmit signal in Equation 5 is invoked. The TX accumulator may output: in H can then be solved using the following formula in the channel estimation module (e.g., channel estimation module 484):
[0121]
[0122] Note that matrix inversion can be avoided by carefully selecting parameters. For example, when transmitting K = 2 data blocks, and θ0 = [g PN ,0] T and θ1=[0, g PN ] T In this example, if the term ∑ is ignored due to the large solution amplification gain... n=0,...,N-1 (d k If (n) + dcCorr)*PN(n), then the channel estimator can simply output
[0123] Calculate orthogonal parameters
[0124] Channel estimator This can be fed into an orthogonal error estimator module, such as orthogonal error calculation module 487, which can calculate the orthogonal error parameters according to the following equation:
[0125]
[0126] in
[0127] User data elimination
[0128] The receiver accumulator, such as RX accumulator #1, can also output the sum of the received samples of the k-th block without despreading, which yields the following equation:
[0129]
[0130] The first term on the right-hand side of Formula 15 is the expected value for calculating LOL. k k = 0, 1, ..., K-1 can be fed to a user data cancellation module, such as user data cancellation unit 485, to eliminate interference caused by user data.
[0131] Besides r k In addition, the TX accumulator can also sum the samples t of the k-th block of the TX data. k The output is sent to the user data erasure module, such as user data erasure unit 485.
[0132] t k =∑ n=0,...,N-1 d k (n)+dcCorr+θ k*PN(n). (Formula 16)
[0133] The user data cancellation module can eliminate interference and generate r LOL,K ,
[0134]
[0135] LO Leakage Calculation
[0136] The r can be fed to the LO leakage estimation module (e.g., LO leakage estimation module 486). LOL,K In the LO leakage estimation module, r LOL,K The sums can be made over all K blocks, which yields the next equation:
[0137] ∑ k=0,...,K-1 r LOL,k =N*K*H*LOL+H*∑ n=0,...,N-1,k=0,...,K-1 (w k (n)) (Formula 18)
[0138] Since the value is large (N*K), the second term in Equation 18 can be ignored. Then, the LO leakage can be calculated as:
[0139] LOL = 1 / (N*K)*H -1 *∑ k=0,...,K-1 r LOL,k (Formula 19)
[0140] Example methods for determining LO leakage and orthogonal error parameters
[0141] Figure 13 The diagram illustrates the methods for determining the transceiver front end (e.g., reference). Figure 6-12 A flowchart of a method 500 for determining LO leakage and orthogonality error parameters in a transceiver front-end (400). Advantageously, this method allows for the simultaneous determination of LO leakage parameters and orthogonality error parameters.
[0142] In step 502, a PN sequence can be generated. The PN sequence is, for example, derived from... Figure 7 The PN generator 422 shown generates the sequence. In step 504, the PN sequence may be generated by a BPSK modulator (e.g., Figure 7 After processing by the BPSK modulator 424 shown, it is inserted into the user signal at the transmitter baseband. In step 506, for example, in... Figure 10 The observation module 460 shown receives the transmitter signal. In step 508, the transmitter signal can be despread using the same PN sequence inserted into the user signal. This despreading is, for example, performed by... Figure 10 The upper despreader 466 in the middle is executed. In step 510, it can be performed, for example, by means of... Figure 6The observation receiver 442 shown receives the observation receiver signal. The observation receiver signal can be received by simulating actual transmission by applying a baseband leakage model and a quadrature error model to the transmitter signal, as shown in the reference. Figure 8 As described above. In step 512, the observation receiver signal can be despread using the same PN sequence inserted into the user signal. Despreading, for example, is performed by... Figure 10 The despreader 466 in the middle is executed. In step 514, the LO leakage parameter and the orthogonal error parameter can be determined based on the received transmitter signal, the despread transmitter signal, the received observation receiver signal, and the despread received signal, for example, as referenced. Figure 12 The explanation given.
[0143] Determine the audarature error parameters
[0144] Figure 14 This is a flowchart of method 600 for determining orthogonal error parameters, which may be... Figure 13 This is part of step 514. In step 602, channel characteristics can be estimated based on the despread receiver signal and the despread transmitter signal. Step 602 can be performed, for example, by channel estimation module 484. In step 604, the estimated channel characteristics can be used to extract orthogonal error parameters. Step 604 can be performed, for example, by orthogonal error calculation module 487.
[0145] Calculate LO leakage parameters
[0146] Figure 15 This is a flowchart of method 700 for calculating LO leakage parameters, which can be... Figure 13 This is part of step 514. In step 702, channel characteristics can be estimated based on the despread receiver signal and the despread transmitter signal. Step 702 can be performed, for example, by channel estimation module 484. In step 704, user data interference can be eliminated based on the received observed receiver signal and the received transmitter signal, using the estimated channel characteristics. Step 704 can be performed, for example, by user data elimination module 485. In step 706, LO leakage parameters can be calculated based on the eliminated user data interference and the estimated channel characteristics. Step 704 can be performed, for example, by LO leakage estimation module 486.
[0147] Example Data Processing System
[0148] Figure 16 A block diagram illustrating an example data processing system 800 according to some embodiments of the present disclosure is provided. The system 800 can be configured to control the operation of a portion of a transceiver front-end as described herein. For example, the data processing system 800 can be configured to implement or control a portion of the operation of a transceiver front-end 400, as referenced herein. Figure 6-12 As stated above.
[0149] like Figure 16 As shown, the data processing system 800 may include at least one processor 802, such as a hardware processor 802, coupled to a memory element 804 via a system bus 806. Thus, the data processing system can store program code within the memory element 804. Furthermore, the processor 802 can execute program code accessed from the memory element 804 via the system bus 806. In one aspect, the data processing system may be implemented as a computer suitable for storing and / or executing program code. However, it should be understood that the data processing system 800 may be implemented in the form of any system including a processor and memory capable of performing the functions described in this disclosure.
[0150] In some embodiments, processor 802 may execute software or algorithms to perform the activities discussed in this disclosure, particularly activities related to configuring and / or operating one or more I / Q-based transceiver front-ends as described herein. Processor 802 may include any combination of hardware, software, or firmware providing programmable logic, including, as non-limiting examples, microprocessors, digital signal processors (DSPs), field-programmable gate arrays (FPGAs), programmable logic arrays (PLAs), application-specific integrated circuits (ASICs), or virtual machine processors. Processor 802 may be communicatively coupled to memory element 804, for example, in a direct memory access (DMA) configuration, such that processor 802 can read from or write to memory element 804.
[0151] Typically, memory element 804 may include any suitable volatile or non-volatile memory technology, including double data rate (DDR) random access memory (RAM), synchronous RAM (SRAM), dynamic RAM (DRAM), flash memory, read-only memory (ROM), optical media, virtual memory regions, magnetic storage or magnetic tape storage, or any other suitable technology. Unless otherwise specified, any memory element discussed herein should be construed as included within the broad term "memory". Information measured, processed, tracked, or sent to or from any component of data processing system 800 may be provided in any database, register, control list, cache, or storage structure, all of which may be referenced at any suitable time. Any such storage option may be included within the broad term "memory" as used herein. Similarly, any potential processing elements, modules, and machines described herein should be construed as included within the broad term "processor". Elements shown in this figure may also include suitable interfaces for receiving, sending, and / or otherwise transmitting data or information in a networked environment, enabling them to communicate with, for example, data processing system 800.
[0152] In some example implementations, the mechanisms for operating the transceiver front end, as outlined herein, can be implemented through logic encoded in one or more tangible media. This logic may include non-transient media, such as embedded logic provided in an ASIC, DSP instructions, software to be executed by a processor or other similar machine (potentially including object code and source code), or other similar media. In some of these examples, such as Figure 16 Memory elements such as memory element 804 shown herein can store data or information used for the operations described herein. This includes memory elements capable of storing software, logic, code, or processor instructions that are executed to perform the activities described herein. A processor can execute any type of instructions associated with data or information to implement the operations detailed herein. In one example, such as Figure 16 A processor, such as processor 802 shown, can transform an element or item (e.g., data) from one state or thing to another. In another example, the activities outlined herein can be implemented using fixed logic or programmable logic (e.g., software / computer instructions executed by a processor), and the elements identified herein can be some type of programmable processor, programmable digital logic (e.g., FPGA, DSP, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or ASIC that includes digital logic, software, code, electronic instructions, or any suitable combination thereof).
[0153] Memory element 804 may include one or more physical memory devices, such as local memory 808 and one or more mass storage devices 810. Local memory may refer to RAM or other non-persistent memory devices that are typically used during the actual execution of the program code. Mass storage devices may be implemented as hard disk drives or other persistent data storage devices. Processing system 800 may also include one or more cache memories (not shown) that provide temporary storage for at least some of the program code to reduce the number of times the program code must be retrieved from mass storage device 810 during execution.
[0154] like Figure 16 As shown, memory element 804 can store application program 818. In various embodiments, application program 818 can be stored in local memory 808, one or more mass storage devices 810, or separately from local memory and mass storage devices. It should be understood that data processing system 800 can further execute an operating system that can facilitate the execution of application program 818. Figure 8(Not shown in the image). The application program 818, implemented as executable program code, can be executed by the data processing system 800, for example, by the processor 802. The application program 818 is implemented in an executable form, and in response to executing the application program, the data processing system 800 can be configured to perform one or more operational or method steps described herein.
[0155] Optionally, the input / output (I / O) devices depicted as input device 812 and output device 814 can be coupled to the data processing system. Examples of input devices may include, but are not limited to, a keyboard, a pointing device such as a mouse, etc. Examples of output devices may include, but are not limited to, a monitor or display, a speaker, etc. In some embodiments, output device 814 can be any type of screen display, such as a plasma display, a liquid crystal display (LCD), an organic light-emitting diode (OLED) display, an electroluminescent (EL) display, or any other indicator, such as a dial, a barometer, or an LED. In some implementations, the system may include a driver (not shown) for output device 814. Input and / or output devices 812, 814 can be coupled to the data processing system directly or via an intermediate I / O controller.
[0156] In one embodiment, the input and output devices can be implemented as a combined input / output device (in... Figure 16 (Seen in the diagram with dashed lines surrounding input device 812 and output device 814). An example of such a combined device is a touch-sensitive display, sometimes also called a "touchscreen display" or simply a "touchscreen". In such embodiments, input to the device can be provided by the movement of a physical object (such as a user's stylus or finger) on or near the touchscreen display.
[0157] Optionally, network adapter 816 may also be coupled to the data processing system to enable it to couple to other systems, computer systems, remote network devices, and / or remote storage devices via an intervening private or public network. The network adapter may include a data receiver for receiving data transmitted to the data processing system 800 by said systems, devices, and / or networks, and a data transmitter for transmitting data from the data processing system 800 to said systems and / or devices. Modems, cable modems, and Ethernet cards are examples of different types of network adapters that can be used with the data processing system 800.
[0158] Select Example
[0159] The following paragraphs provide various examples of the embodiments disclosed herein.
[0160] Example 1 provides a method in a transceiver front-end based on in-phase and quadrature-phase (I / Q) signals. This method may include, for example, receiving a transmitter signal in an observation module of the transceiver front-end. The transmitter signal may be based on a user data signal and a PN sequence. The method may also include, for example, receiving a receiver signal comprising a user data signal and a PN sequence in the observation module. The receiver signal may be based on a user data signal and a PN sequence. The receiver signal is typically based on the transmitter signal. For example, the receiver signal may be a transmitter signal that has been transmitted and is received at the receiver. The method may also include, for example, receiving the PN sequence in the observation module. The method may also include, for example, obtaining a despread transmitter signal using the PN sequence in the observation module. The method may also include, for example, obtaining a despread receiver signal using the PN sequence in the observation module.
[0161] Example 2 provides a method according to Example 1, wherein the method may further include, for example, accumulating the transmitter signal and the receiver signal in an accumulator module of the observation module. The method may also include, for example, despreading the transmitter signal using a PN sequence in a first despreader of the observation module to obtain a despread transmitter signal. The method may further include, for example, despreading the receiver signal using a PN sequence in a second despreader of the observation module to obtain a despread receiver signal.
[0162] Example 3 provides a method according to Example 2, wherein the method may further include, for example, synchronizing the received transmitter signal in a first FIFO buffer of the observation module and then providing it to the accumulator module and the first despreader. The method may further include, for example, synchronizing the PN sequence in a second FIFO buffer of the observation module and then providing it to the first and second despreaders. The method may further include, for example, synchronizing the received signal in an interpolator module of the observation module before providing the received receiver signal to the accumulator module and the second despreader.
[0163] Example 4 provides a method according to Example 3, wherein synchronization is performed, for example, via a first FIFO buffer and a second FIFO buffer, using one or more integer delay values received, for example, from an analysis module at the transceiver front end, and wherein, for example, synchronization is performed by an interpolator module using one or more fractional delay values received, for example, from the analysis module.
[0164] Example 5 provides a method according to Example 1, wherein the method may further include, for example, receiving a transmitter signal, a despread transmitter signal, a receiver signal, and a despread receiver signal from an observation module in an analysis module at the transceiver front end. The method may further include, for example, determining one or more LO leakage parameters of the transceiver front end based on the transmitter signal, the despread transmitter signal, the receiver signal, and the despread receiver signal in the analysis module. The method may further include, for example, determining one or more orthogonal error parameters of the transceiver front end based on the despread transmitter signal and the despread receiver signal in the analysis module.
[0165] Example 6 provides a method according to Example 5, wherein the method may further include, for example, receiving despread transmitter and receiver signals from the observation module in a channel estimation module of the analysis module. The channel estimation module can determine the channel characteristics of the transmission channel between the transmitter RF front-end of the transceiver front-end and the observation receiver based on the despread transmitter and receiver signals.
[0166] Example 7 provides a method according to Example 6, in which the transmitter RF front end, transmission channel, and observation receiver are implemented as software models in the transceiver front end.
[0167] Example 8 provides a method according to Example 6, wherein the method may further include, for example, receiving transmitter and receiver signals from an observation module in a user data cancellation module of an analysis module. The method may further include eliminating interference in a user data cancellation module, for example, based on the transmitter signal, receiver signal, and channel characteristics (e.g., determined by a channel estimation module). The method may further include, for example, determining one or more LO leakage parameters in a LO leakage estimation module of an analysis module, based on channel characteristics determined by the channel estimation module and the result of interference elimination.
[0168] Example 9 provides a method according to Example 6, wherein the method may further include, for example, determining one or more orthogonal error parameters based on channel characteristics (e.g., determined by the channel estimation module) in the orthogonal error calculation module of the analysis module.
[0169] Example 10 provides a method according to Example 6, wherein the method may further include, for example, generating a scaling factor in a PN scaling generator module. The PN sequences in the transmitter and receiver signals may have already been multiplied by the scaling factor. The determination of channel characteristics may also be based on, for example, the scaling factor received from the scaling generator module.
[0170] Example 11 provides a method according to Example 1, wherein the method may further include, for example, generating a PN sequence in a PN generator of a PN sequence injection and signal generation module. The method may further include, for example, modulating the PN sequence according to a BPSK standard in a BPSK modulator of the PN sequence injection and signal generation module to obtain a modulated PN sequence. The method may further include, for example, scaling the modulated PN sequence in an in-phase and quadrature scaling module of the PN sequence injection and signal generation module to obtain a scaled PN sequence. The method may further include, for example, adding the scaled PN sequence to a user data signal in one or more adder modules of the PN sequence injection and signal generation module to obtain a transmitter signal.
[0171] Example 12 provides an RFIC. An RFIC can be part of a transceiver front-end based on in-phase and quadrature-phase (I / Q) signals. An RFIC may include software-controlled digital circuitry including a PN generator for generating a PN sequence and one or more adder modules for adding the PN sequence or its derivative to a user data signal based on in-phase and quadrature-phase (I / Q) signals. An RFIC may also include another digital circuitry including an accumulator module for receiving transmitter and receiver signals, and this other digital circuitry also includes one or more despreader modules for despreading the transmitter and receiver signals using the PN sequence to obtain despread transmitter and receiver signals.
[0172] Example 13 provides an RFIC according to Example 12, wherein the RFIC may further include firmware including software code that, when executed by one or more processors, uses despread transmitter and receiver signals as inputs to generate and output channel characteristics of the transmission channel between the transmitter RF front end and the observation receiver.
[0173] Example 14 provides an RFIC based on Example 13, in which the transmitter RF front-end, transmission channel, and observation receiver can be implemented as system performance, simulating the transmitter RF front-end, transmission channel, and observation receiver.
[0174] Example 15 provides an RFIC according to Example 13, wherein the firmware may further include software code that, when executed by one or more processors, uses channel characteristics and user data cancellation results as inputs to generate and output one or more LO leakage parameters, and when executed by said one or more processors, uses the transmitter signal, the receiver signal, and the channel characteristics as inputs to generate and output the data cancellation results.
[0175] Example 16 provides an RFIC according to Example 13, wherein the firmware may further include software code that, when executed by one or more processors, uses channel characteristics as input to generate and output one or more quadrature error parameters.
[0176] Example 17 provides a method for generating LO leakage parameters and quadrature error parameters. The method may include generating a PN sequence. The method may also include inserting the PN sequence or its derivative into a user data signal to obtain a transmitter signal. The method may also include receiving the transmitter signal. The method may also include obtaining a despread transmitter signal from the transmitter signal using the same PN sequence. The method may also include receiving an observation receiver signal based on the transceiver signal. The method may also include obtaining a despread receiver signal from the receiver signal using the same PN sequence. The method may further include determining the LO leakage parameters and quadrature error parameters based on the transmitter signal, the despread transmitter signal, the observation receiver signal, and the despread received signal.
[0177] Example 18 provides a method according to Example 17, wherein determining the orthogonal error parameter may include: estimating channel characteristics based on the despread receiver signal and the despread transmitter signal; and using the estimated channel characteristics to extract the orthogonal error parameter.
[0178] Example 19 provides a method according to Example 17, wherein determining the LO leakage parameter may include estimating channel characteristics based on the despread receiver signal and the despread transmitter signal. Determining the LO leakage parameter may also include eliminating user data interference based on the received observed receiver signal and the received transmitter signal and using the estimated channel characteristics. Determining the LO leakage parameter may further include calculating the LO leakage parameter based on the eliminated user data interference and the estimated channel characteristics.
[0179] Example 20 provides a method according to Example 17, wherein the method may further include generating a receiver signal using a model of a transmitter RF front end, a transmission channel, and an observation receiver.
[0180] Example 21 provides a transceiver front-end based on in-phase and quadrature-phase (I / Q) signals. The transceiver front-end may include an observation module. The observation module can receive a transmitter signal including user data signals and a PN sequence. The observation module can also receive a receiver signal including user data signals and a PN sequence. The observation module can also receive the PN sequence. The observation module can also use the PN sequence to obtain a despread transmitter signal. The observation module can also use the PN sequence to obtain a despread receiver signal.
[0181] Example 22 provides a transceiver front end according to Example 21, wherein the observation module may include an accumulator module for receiving and accumulating transmitter and receiver signals. The observation module may also include a first despreader for despreading the transmitter signal using a PN sequence to obtain a despread transmitter signal. The observation module may also include a second despreader for despreading the receiver signal using a PN sequence to obtain a despread receiver signal.
[0182] Example 23 provides a transceiver front-end according to Example 22, wherein the observation module may further include a first FIFO buffer for synchronizing the received transmitter signal before providing it to the accumulator module and the first despreader. The observation module may also include a second FIFO buffer for synchronizing the PN sequence before providing it to the first and second despreaders. The observation module may also include an interpolator module for synchronizing the received receiver signal before providing it to the accumulator module and the second despreader.
[0183] Example 24 provides a transceiver front-end according to Example 23, wherein a first FIFO buffer and a second FIFO buffer can perform synchronization using one or more integer delay values received from the analysis module of the transceiver front-end. An interpolator module can perform synchronization using one or more fractional delay values received from the analysis module.
[0184] Example 25 provides a transceiver front-end according to Example 21, wherein the transceiver front-end may further include an analysis module. The analysis module can receive transmitter signals, despread transmitter signals, receiver signals, and despread receiver signals from the observation module. The analysis module can also determine one or more LO leakage parameters of the transceiver front-end based on the transmitter signals, despread transmitter signals, receiver signals, and despread receiver signals. The analysis module can also determine one or more orthogonal error parameters of the transceiver front-end based on the despread transmitter signals and despread receiver signals.
[0185] Example 26 provides a transceiver front-end according to Example 25, wherein the analysis module may include a channel estimation module to receive despread transmitter and receiver signals from the observation module. The channel estimation module may determine the channel characteristics of the transmission channel between the transmitter RF front-end and the observation receiver of the transceiver front-end based on the despread transmitter and receiver signals.
[0186] Example 27 provides a transceiver front end according to Example 26, wherein the transmitter RF front end, the transmission channel, and the observation receiver can be implemented as software models in the transceiver front end.
[0187] Example 28 provides a transceiver front-end according to Example 26, wherein the analysis module may further include a user data cancellation module to receive transmitter and receiver signals from the observation module. The user data cancellation module may cancel interference based on the transmitter signal, receiver signal, and channel characteristics determined by the channel estimation module. The analysis module may further include a LO leakage estimation module for determining one or more LO leakage parameters based on the channel characteristics determined by the channel estimation module and the output from the user data cancellation module.
[0188] Example 29 provides a transceiver front end according to Example 26, wherein the analysis module may further include an orthogonal error calculation module to determine one or more orthogonal error parameters based on the channel characteristics determined by the channel estimation module.
[0189] Example 30 provides a transceiver front-end according to Example 26, wherein the transceiver front-end may further include a PN scaling generator module to generate a scaling factor. The PN sequences in the transmitter and receiver signals may have already been multiplied by the scaling factor. The channel estimation module may further determine the channel characteristics based on the scaling factor received from the scaling generator module.
[0190] Example 31 provides a transceiver front-end according to Example 31, wherein the transceiver front-end may further include a PN sequence injection and signal generation module. The PN sequence injection and signal generation module may include a PN generator for generating a PN sequence. The PN sequence injection and signal generation module may also include a BPSK modulator to modulate the PN sequence according to a BPSK standard and obtain a modulated PN sequence. The PN sequence injection and signal generation module may further include in-phase and quadrature scaling modules to scale the modulated PN sequence to obtain a scaled PN sequence. The PN sequence injection and signal generation module may further include one or more adder modules for adding the scaled PN sequence to a user data signal to obtain a transmitter signal.
[0191] Other notes, changes and explanations
[0192] It should be understood that not all objectives or advantages may be achieved according to any particular embodiment described herein. Therefore, for example, those skilled in the art will recognize that certain embodiments may be configured to operate in a manner that achieves or optimizes one or more advantages taught herein, without necessarily achieving other objectives or advantages taught or suggested herein.
[0193] It should also be noted that all specifications, dimensions, and relationships (e.g., number of modules / systems, logical operations, etc.) outlined herein are for illustrative and teaching purposes only. Such information may be significantly altered without departing from the spirit of this disclosure or the scope of the appended claims. This specification applies only to some non-limiting examples and should therefore be interpreted as such examples. In the foregoing description, exemplary embodiments have been described with reference to specific arrangements of components. Various modifications and changes may be made to these embodiments without departing from the scope of the appended claims. Therefore, the description and drawings should be considered illustrative rather than restrictive.
[0194] Note that the interactions can be described in terms of two, three, four, or more components for the numerous examples provided herein. However, this is done merely for clarity and illustration. It should be understood that the system can be combined in any suitable manner. Along similar design alternatives, any of the components, modules, and elements shown in the figures can be combined in a variety of possible configurations, all of which are clearly within the broad scope of this disclosure.
[0195] Note that in this specification, references are made to various features (e.g., elements, structures, modules, components, steps, operations, features, etc.) included in “one embodiment,” “exemplary embodiment,” “embodiment,” “another embodiment,” “some embodiments,” and “various embodiments.” Any such feature is included in one or more embodiments of this disclosure but may or need not be combined in the same embodiments.
[0196] Those skilled in the art can identify many other changes, substitutions, variations, alterations, and modifications, and this disclosure is intended to include all such changes, substitutions, variations, alterations, and modifications that fall within the scope of the appended claims. Note that all optional features of the systems and methods described above can also be implemented with respect to the methods or systems described herein, and the details in the examples can be used anywhere in one or more embodiments.
Claims
1. A method implemented by a transceiver front-end based on in-phase and quadrature phase, the method comprising: Receive transmitter signals, wherein the transmitter signals are based on user data signals and pseudo-noise sequences; Receive receiver signals, wherein the receiver signals are based on the user data signal and the pseudo-noise sequence; The despread transmitter signal is obtained using the pseudo-noise sequence; as well as The despread receiver signal is obtained using the pseudo-noise sequence; as well as Based on the transmitter signal, the despread transmitter signal, the receiver signal, and the despread receiver signal, determine one or more local oscillator leakage parameters of the transceiver front end based on in-phase and quadrature phase. as well as Based on the despread transmitter signal and the despread receiver signal, one or more quadrature error parameters are determined for the transceiver front end based on in-phase and quadrature phase.
2. The method according to claim 1, further comprising: Accumulate one or more transmitter signals and one or more receiver signals to obtain accumulated transmitter signals and accumulated receiver signals; The accumulated transmitter signal is despread using the pseudo-noise sequence to obtain the despread transmitter signal; and The accumulated receiver signal is despread using the pseudo-noise sequence to obtain the despread receiver signal. The determination of the one or more local oscillator leakage parameters of the transceiver front end based on in-phase and quadrature phase includes determining the one or more local oscillator leakage parameters based on the accumulated transmitter signal, the accumulated receiver signal, the accumulated despread transmitter signal, and the accumulated despread receiver signal. The determination of the one or more quadrature error parameters of the transceiver front end based on in-phase and quadrature phase includes determining the one or more quadrature error parameters based on the accumulated despread transmitter signal and the accumulated despread receiver signal.
3. The method according to claim 1, further comprising: Accumulate one or more transmitter signals and one or more receiver signals to obtain accumulated transmitter signals and accumulated receiver signals; The pseudo-noise sequence is used to despread the one or more transmitter signals to obtain a despread transmitter signal, and the despread transmitter signal is accumulated to obtain an accumulated despread transmitter signal. as well as The pseudo-noise sequence is used to despread the one or more receiver signals to obtain a despread receiver signal, and the despread receiver signal is accumulated to obtain an accumulated despread receiver signal. Determining one or more local oscillator leakage parameters of the transceiver front end based on in-phase and quadrature phase includes determining the one or more local oscillator leakage parameters based on the accumulated transmitter signal, the accumulated despread transmitter signal, the accumulated receiver signal, and the accumulated despread receiver signal. and Determining one or more quadrature error parameters for the transceiver front end based on in-phase and quadrature phase includes determining the one or more quadrature error parameters based on the accumulated despread transmitter signal and the accumulated despread receiver signal.
4. The method according to claim 2 or 3, further comprising: Synchronize the transmitter signal before accumulating and despreading it; Synchronize the pseudo-noise sequence before despreading the transmitter signal and the receiver signal; and The receiver signals are synchronized before being accumulated and despread.
5. The method according to claim 4, One or more integer delay values are used to synchronize the transmitter signal, and One or more fractional delay values are used to synchronize the receiver signal.
6. The method according to claim 1, further comprising: Based on the despread transmitter signal and the despread receiver signal, the channel characteristics of the transmission channel between the transmitter RF front-end and the observation receiver, based on in-phase and quadrature phase transceiver front-ends, are determined.
7. The method according to claim 6 further includes implementing the transmitter radio frequency front-end, the transmission channel and the observation receiver as software models in the transceiver front-end based on in-phase and quadrature phase.
8. The method according to claim 6, further comprising: Interference is eliminated based on the transmitter signal, the receiver signal, and the channel characteristics; and The leakage parameters of the one or more local oscillators are determined based on the channel characteristics and the results of the interference cancellation.
9. The method according to claim 6, further comprising: The one or more orthogonal error parameters are determined based on the channel characteristics.
10. The method of claim 6, further comprising: Generate scaling factor; and A scaled pseudo-noise sequence is generated using the scaling factor. The transmitter signal and the receiver signal are based on the scaled pseudo-noise sequence. Furthermore, the channel characteristics are determined based on the scaling factor.
11. The method according to claim 1, further comprising: Generate the pseudo-noise sequence; The pseudo-noise sequence is modulated according to the binary phase shift keying standard to obtain the modulated pseudo-noise sequence; The modulated pseudo-noise sequence is scaled to obtain a scaled pseudo-noise sequence; and The scaled pseudo-noise sequence is added to the user data signal to obtain the transmitter signal.
12. A radio frequency integrated circuit, comprising: The software-controlled digital circuit includes a pseudo-noise generator for generating a pseudo-noise sequence and one or more adder modules for adding the pseudo-noise sequence or its derivative to a user data signal based on in-phase and quadrature phase. and Another digital circuit includes an accumulator module for receiving a transmitter signal and a receiver signal, wherein the transmitter signal is based on the user data signal based on in-phase and quadrature phase and the pseudo-noise sequence, and wherein the receiver signal is based on the user data signal based on in-phase and quadrature phase and the pseudo-noise sequence. The other digital circuit further includes one or more despreader modules for using the pseudo-noise sequence to despread the transmitter signal and the receiver signal to obtain despread transmitter signal and despread receiver signal; The firmware includes software code that, when executed by one or more processors, generates one or more local oscillator leakage parameters based on the transmitter signal, the despread transmitter signal, the receiver signal, and the despread receiver signal; and generates one or more quadrature error parameters based on the despread transmitter signal and the despread receiver signal.
13. The radio frequency integrated circuit according to claim 12, wherein The firmware includes first software code that, when executed by one or more processors, uses the despread transmitter signal and the despread receiver signal as inputs to generate channel characteristics of the transmission channel between the transmitter RF front end and the observation receiver.
14. The radio frequency integrated circuit of claim 13, wherein the transmitter radio frequency front end, the transmission channel and the observation receiver are implemented as system performance simulating the transmitter radio frequency front end, the transmission channel and the observation receiver.
15. The radio frequency integrated circuit according to claim 13, The firmware includes second software code that, when executed by the one or more processors, uses the transmitter signal, the receiver signal, and the channel characteristics as input to generate user data cancellation results. Furthermore, the firmware includes third software code that, when executed by the one or more processors, uses the channel characteristics and the user data cancellation result as input to generate the one or more local oscillator leakage parameters.
16. The radio frequency integrated circuit of claim 13, wherein the firmware further comprises fourth software code, which, when executed by the one or more processors, uses the channel characteristics as input to generate the one or more quadrature error parameters.
17. A method for generating local oscillator leakage parameters and quadrature error parameters, the method comprising: Generate pseudo-noise sequences; The pseudo-noise sequence or its derivative is inserted into the user data signal to obtain the transmitter signal; The despread transmitter signal is obtained from the transmitter signal using the pseudo-noise sequence; Receive observation receiver signals, the observation receiver signals being based on the transmitter signals; The despread receiver signal is obtained from the observed receiver signal using the pseudo-noise sequence; and The local oscillator leakage parameter and orthogonal error parameter are determined based on the transmitter signal, the despread transmitter signal, the observation receiver signal, and the despread received signal.
18. The method of claim 17, wherein determining the orthogonal error parameter comprises: Channel characteristics are estimated based on the despread receiver signal and the despread transmitter signal; and The orthogonal error parameters are extracted using the estimated channel characteristics.
19. The method of claim 17, wherein determining the local oscillator leakage parameter comprises: Channel characteristics are estimated based on the despread receiver signal and the despread transmitter signal; Eliminate user data interference based on the observed receiver signal, the transmitter signal, and the channel characteristics; and The local oscillator leakage parameter is calculated based on the results of eliminating user data interference and the channel characteristics.
20. The method of claim 17, further comprising: The receiver signal is generated using models of one or more of the transmitter RF front-end, transmission channel, and observation receiver.
Citation Information
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