A cesium optical pumping horizontal gradiometer output frequency signal measurement circuit

Abstract

This invention relates to a circuit for measuring the output frequency signal of a cesium optically pumped horizontal gradient meter. The circuit includes a signal conditioning module and a frequency measurement module. The raw signals output from two cesium optically pumped magnetometers are processed by the signal conditioning module, and the external frequency signal to be measured is input to the FPGA. An externally sourced, voltage-triggered, temperature-controlled crystal oscillator square wave signal serves as the frequency measurement reference signal input to the FPGA. The rising edge of a standard signal is used as an enable flag to synchronously start counting the three signals. Within a specified frequency measurement gate time, the three signals are counted synchronously, and the number of rising edges is recorded. Using an external temperature-controlled crystal oscillator as the frequency measurement reference signal effectively avoids the drift and irregular jitter of the pulse signal caused by temperature changes in the onboard crystal oscillator of the FPGA, thus effectively improving the frequency measurement accuracy and circuit stability.

Description

Technical Field

[0001] This invention relates to the fields of airborne and marine magnetic detection, and in particular to a circuit for measuring the output frequency signal of a cesium optical pump horizontal gradient meter. Background Technology

[0002] Currently, magnetic detection technology has evolved from single total magnetic field measurement to multi-parameter joint measurement of total field and total field gradient. The horizontal gradient is often used as a supplement to the total magnetic field measurement, which can refine the resolution of the total magnetic field measurement, effectively suppress external magnetic field interference, effectively highlight the location of magnetic anomalies, and effectively mark the boundaries of magnetic anomalies. It has high research value in the field of magnetic anomaly detection and localization.

[0003] Existing frequency measurement methods mostly involve directly acquiring the TTL square wave signal output by the cesium optical pump magnetometer. This method is simple to implement, but the transmission distance is short, and the acquired signal is easily affected by power supply ripple and external electromagnetic interference, resulting in a large error between the measurement result and the actual value. On the other hand, relying solely on the onboard clock of the FPGA as the reference signal for frequency measurement is easily affected by external temperature changes, causing the reference signal to drift or fluctuate irregularly, thus affecting the accuracy of frequency measurement. Summary of the Invention

[0004] To address the aforementioned problems in the existing technology, this invention provides a cesium optical pump horizontal gradient meter output frequency signal measurement circuit. When measuring the output frequency signal of the cesium optical pump, it can reduce power supply ripple and external electromagnetic interference to the signal, improve the stability of the frequency measurement reference pulse, increase the overall operating speed, and improve the accuracy of frequency measurement.

[0005] This invention provides a circuit for measuring the output frequency signal of a cesium optically pumped horizontal gradient meter, comprising a signal conditioning module and a frequency measurement module; wherein,

[0006] The signal conditioning module receives two sets of output signals from the cesium optical pump magnetometer and filters, amplifies, and shapes the signals.

[0007] The frequency measurement module receives two sets of conditioned signals and a frequency measurement reference signal generated by an external constant temperature crystal oscillator. It counts the rising edges of the three sets of signals within a specified gate time and sends the number of rising edges of the three signals to the STM32 via a serial port for calculation to obtain the frequency value, the total magnetic field value, and the total magnetic field gradient value.

[0008] Furthermore, the signal conditioning module includes:

[0009] The decoupling isolation circuit filters out the power sinusoidal signal that is coupled to the signal output by the cesium optical pump magnetometer;

[0010] An active low-pass filter circuit filters out high-frequency interference present in the output signal frequency band;

[0011] A limiting amplifier circuit is used to limit and amplify the signal after interference has been filtered out.

[0012] The signal shaping circuit shapes the signal into a 5V TTL signal, which is then used as the pulse to be measured and input to the subsequent frequency measurement module.

[0013] Furthermore, the frequency measurement module includes:

[0014] A voltage-controlled external thermostatic crystal oscillator signal source circuit, consisting of a thermostatic crystal oscillator, is used to generate a stable frequency measurement reference signal; when gradient measurement is involved, the counting enable signals of the two magnetometers must be kept strictly consistent by the external thermostatic crystal oscillator.

[0015] The FPGA chip is used to receive three square wave signals and control the frequency measurement gate time to ensure that the three signals start counting simultaneously.

[0016] The STM32 chip is used to receive the three count values ​​output by the FPGA chip, and through calculation, the frequency of the output signals of the two magnetometers is obtained. Through the next step of conversion, the total magnetic field and the total magnetic field gradient are obtained.

[0017] Furthermore, the decoupling isolation circuit includes: a surface-mount fuse F1, a filter capacitor C0, a radially polarized capacitor EC0, a power magnetic ring inductor L1, and a capacitor C1. The surface-mount fuse F1 is connected to the power supply. One end of the power magnetic ring inductor L1 is connected to the surface-mount fuse F1, and the other end is connected to the output terminal of the magnetometer signal. One end of the power magnetic ring inductor L1 is connected to the filter capacitor C0 and the radially polarized capacitor EC0 to form a second-order passive filter circuit. The other ends of the filter capacitor C0 and the radially polarized capacitor EC0 are grounded to filter out high-frequency ripple noise of the power supply signal. The other end of the power magnetic ring inductor L1 is connected to the output of the capacitor C1.

[0018] Furthermore, the active low-pass filter circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit with identical structures. The first-stage amplifier circuit includes a resistor R0, one end of which is connected to the output terminal of the previous stage circuit, and the other end of which is connected to the filter capacitor C2, forming the low-pass filter section of the first-stage amplifier circuit. The input impedance of the circuit can be adjusted by adjusting the value of the resistor R0. One end of the resistor R1 is connected to the resistor R0 and the filter capacitor C2, and the other end is connected across the output terminal of the operational amplifier. One end of the resistor R2 is connected to the right end of the resistor R0 and the filter capacitor C2, and the right end is connected to the inverting terminal of the operational amplifier. At the same time, the capacitor C3 is connected in parallel with the resistors R1 and R2 to form the feedback and amplification section.

[0019] Furthermore, the limiting amplifier circuit includes a resistor R6 connected to the output terminal of the upper stage circuit and connected to the non-inverting terminal of the operational amplifier chip; resistors R8 and R9 are feedback resistors, which are connected in series across the output terminal and the non-inverting terminal of the operational amplifier chip; and bidirectional limiting Schottky diodes D0 and D1 are connected in reverse parallel and then in parallel across the feedback resistor R9.

[0020] Furthermore, the signal shaping circuit includes an operational amplifier chip employing a high-speed comparator with low propagation delay, directly connecting the output voltage signal to the positive input terminal of the operational amplifier chip, and connecting a resistor R13 in parallel on the operational amplifier chip as feedback.

[0021] Furthermore, the power supply pin of the external thermostatic crystal oscillator signal source circuit is connected to the power supply VCC through the ferrite bead L2. The filter capacitors C9 and C10 are connected in parallel, with the left end grounded and the right end connected to the power supply pin of the thermostatic crystal oscillator, forming an LC filter circuit with the ferrite bead L2. A resistor R15 is connected in series at the output terminal of the thermostatic crystal oscillator.

[0022] Furthermore, after the three signals are input to the FPGA chip, the gate time is set to 10Hz. The rising edge of the frequency measurement reference clock is used as the enable signal for frequency measurement counting. After the frequency measurement starts, the frequency measurement reference pulse is counted. The number of rising edges of the frequency measurement reference pulse within the gate time is recorded as N. At the same time, the rising edge of the signal under test is detected. After the rising edge of signal one is detected, the signal is counted, and the number of rising edges of signal one is recorded as N1. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N2, and the number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test within the gate time is recorded as N3. Similarly, after detecting the rising edge of signal two, the signal is counted, and the number of rising edges of signal two is recorded as N4. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N5. The number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test is recorded as N6 within the gate time. The counting of the frequency measurement reference pulse is stopped after N counts to 10,000,000. This is the termination of one frequency measurement. When the frequency measurement is terminated, the counting of N1 and N4 is stopped. At the same time, the number of rising edges of the two channels of the measured signal from the next rising edge of the two measured signals after the frequency measurement stops is recorded as N7 and N8, respectively, which are the rising edges of the frequency measurement reference pulse.

[0023] This invention provides a circuit for measuring the output frequency signal of a cesium optically pumped horizontal gradient meter. The circuit consists of two parts: the first part is a signal conditioning module, composed of a decoupling isolation circuit, an active low-pass filter circuit, a limiting amplifier circuit, and a signal shaping circuit; the second part is a frequency measurement module, composed of an FPGA chip, a voltage-controlled external thermostatic crystal oscillator signal source circuit, and an STM32 microcontroller. The raw signals output from two cesium optically pumped magnetometers are processed by the signal conditioning module and input to the FPGA as a set of external frequency signals to be measured; while the external voltage-triggered thermostatic crystal oscillator square wave signal is input to the FPGA as the frequency measurement reference signal. Within a specified frequency measurement gate time, the three signals are counted synchronously, and the number of rising edges is recorded. Finally, the frequency, magnetic field value, and horizontal gradient value of the output signals from the two magnetometers are calculated in the STM32 microcontroller. Using an external thermostatic crystal oscillator as the frequency measurement reference signal can effectively avoid the drift and irregular jitter of the pulse signal caused by temperature changes in the onboard crystal oscillator of the FPGA, effectively improving the frequency measurement accuracy and circuit stability. Using STM32 to calculate the output signal frequency, magnetic field value, and horizontal gradient value can avoid the disadvantage of FPGA's weak floating-point arithmetic capability, greatly reduce the occupation of logic resources, and effectively improve the running speed. Attached Figure Description

[0024] Figure 1 This is a general block diagram of the frequency measurement circuit described in this invention;

[0025] Figure 2 This is a schematic diagram of the hardware circuit of the present invention. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0027] See Figure 1 Combination Figure 2 As shown, a circuit for measuring the output frequency signal of a cesium optically pumped horizontal gradient meter includes a signal conditioning module and a frequency measurement module; wherein,

[0028] The signal conditioning module receives two sets of output signals from the cesium optical pump magnetometer and filters, amplifies, and shapes the signals.

[0029] The frequency measurement module receives two sets of conditioned signals and a frequency measurement reference signal generated by an external constant temperature crystal oscillator. It counts the rising edges of the three sets of signals within a specified gate time and sends the number of rising edges of the three signals to the STM32 via a serial port for calculation to obtain the frequency value, the total magnetic field value, and the total magnetic field gradient value.

[0030] The signal conditioning module includes:

[0031] The decoupling isolation circuit filters out the power sinusoidal signal that is coupled to the signal output by the cesium optical pump magnetometer;

[0032] An active low-pass filter circuit filters out high-frequency interference present in the output signal frequency band;

[0033] A limiting amplifier circuit is used to limit and amplify the signal after interference has been filtered out.

[0034] The signal shaping circuit shapes the signal into a 5V TTL signal, which is then used as the pulse to be measured and input to the subsequent frequency measurement module.

[0035] The frequency measurement module includes:

[0036] A voltage-controlled external thermostatic crystal oscillator signal source circuit, composed of a thermostatic crystal oscillator, is used to generate a stable frequency measurement reference signal;

[0037] The FPGA chip is used to receive three square wave signals and control the frequency measurement gate time to ensure that the three signals start counting simultaneously.

[0038] The STM32 chip is used to receive the three count values ​​output by the FPGA chip, and through calculation, the frequency of the output signals of the two magnetometers is obtained. Through the next step of conversion, the total magnetic field and the total magnetic field gradient are obtained.

[0039] The original signal is processed by the signal conditioning module and then sent to the signal conditioning module to receive the original sinusoidal signal output by the cesium optically pumped magnetometer. The signal is filtered, shaped and amplified. The frequency measurement module synchronously counts the rising edges of the two output signals of the conditioning circuit and the reference square wave signal output by the external constant temperature crystal oscillator signal source. The number of rising edges of the first magnetometer output signal is recorded as N1, the number of rising edges of the second magnetometer output signal is N2, the number of rising edges of the frequency measurement reference pulse is N, and the frequency of the reference pulse is FN. These four values ​​are stored in FIFO and sent to STM32 through serial port for calculation. The frequency output of the two-channel cesium optically pumped magnetometer can be obtained. After further conversion and calculation, the total magnetic field and the horizontal gradient of the total field can be obtained.

[0040] Taking a single-channel signal as an example, the peak-to-peak value of the sinusoidal signal output from the coaxial cable interface of the cesium optically pumped magnetometer is 15mV to 25mV, and the power supply is a 28V aviation power supply. The original sinusoidal signal frequency range is 50kHz to 350kHz, and the power supply ripple bandwidth is typically greater than 300kHz. According to the decoupling isolation circuit described in this invention, a design method combining a second-order fixed-K type passive low-pass filter with a single capacitor using a normalized design approach can filter out the power supply ripple coupled to the original output signal of the cesium optically pumped magnetometer and prevent the DC current from flowing into the subsequent circuit. This includes:

[0041] The circuit consists of a surface-mount fuse F1, a filter capacitor C0, a radially polarized capacitor EC0, a power toroidal inductor L1, and a capacitor C1. The surface-mount fuse F1 is connected to the power supply. One end of the power toroidal inductor L1 is connected to the surface-mount fuse F1, and the other end is connected to the output terminal of the magnetometer signal. One end of the power toroidal inductor L1 is connected to the filter capacitor C0 and the radially polarized capacitor EC0 to form a second-order passive filter circuit. The other ends of the filter capacitor C0 and the radially polarized capacitor EC0 are grounded to filter out high-frequency ripple noise from the power supply signal. The other end of the power toroidal inductor L1 is connected to the output of capacitor C1. Capacitor C1, as a non-linear component, effectively isolates DC signals from entering the circuit. Compared to a transformer, it has lower losses, smaller size, and does not generate additional interference, playing a crucial role in the realization of the circuit function.

[0042] First, a second-order fixed-K type low-pass filter with a cutoff frequency of 400kHz is designed. Initial values ​​for L and C are calculated using cutoff frequency transformation based on the preset cutoff frequency. Then, the ideal design values ​​for L and C are obtained using impedance transformation based on the actual characteristic impedance of the circuit. Since the circuit load is difficult to estimate, the capacitor and inductor are generally slightly larger than the calculated values. After calculation, a surface-mount fuse F1 of F2A 250V specification is selected, the capacitor C0 is 0.1uF, the radial polarization capacitor EC0 is 330uF / 50V, and the power toroidal inductor is 200uH. Based on these parameters, the power supply ripple noise can be filtered to below 10mV. In addition to the filter circuit, a capacitor C1 of 0.1uF is added at the signal output terminal, which can effectively isolate the DC power supply signal without generating significant energy loss.

[0043] After separating the DC power signal from the original sine wave signal, an active RC low-pass filter is designed to filter out the high-frequency interference present in the frequency band. The active low-pass filter amplifier circuit is designed with a multi-feedback topology. After the original sine wave signal of the cesium optical pump magnetometer is separated from the DC power signal by the AC blocking and DC blocking device, there is still a certain amount of high-frequency noise in its frequency band. Therefore, its core design is to realize the low-pass filtering function and provide a large input impedance. It does not need to set a high amplification factor, but only to realize a function similar to a voltage follower.

[0044] The active low-pass filter circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit with identical structures. The first-stage amplifier circuit includes a resistor R0, one end of which is connected to the output terminal of the previous stage circuit, and the other end of which is connected to the filter capacitor C2, forming the low-pass filter section of the first-stage amplifier circuit. The input impedance of the circuit can be adjusted by adjusting the value of the resistor R0. One end of the resistor R1 is connected to the resistor R0 and the filter capacitor C2, and the other end is connected across the output terminal of the operational amplifier. One end of the resistor R2 is connected to the right end of the resistor R0 and the filter capacitor C2, and the right end is connected to the inverting terminal of the operational amplifier. At the same time, the capacitor C3 is connected in parallel with the resistors R1 and R2 to form the feedback and amplification section.

[0045] Since the magnetometer's signal peak-to-peak value is only around 20mV, the AD8065 operational amplifier was selected based on the op-amp gain-bandwidth product (GBW) and slew rate (SR). The active low-pass filter design employs a fourth-order Chebyshev filter with a multiple feedback topology. Because the magnetometer's output signal bandwidth is 50kHz–350kHz, and the noise is primarily high-frequency noise above 400kHz, the passband frequency was set to 350kHz and the stopband frequency to 400kHz. Furthermore, since the primary function of this stage is to filter out high-frequency noise, the passband gain was set to 0dB, effectively functioning as a voltage follower. Because the operational amplifier is not infinitely fast, this limitation affects the filter's response. Therefore, the values ​​of resistors and capacitors were slightly adjusted during the design process to compensate for the finite bandwidth product of the op-amp. After calculation, derivation, and table lookup, the designed first-stage operational amplifier has resistors R0 and R1 of 2.6kΩ, R2 of 1.3kΩ, capacitor C2 of 560pF, and capacitor C3 of 183pF. Based on these parameters, the first-stage amplifier achieves a gain (V / V) of 1, fp (Hz) of 270kΩ, and a Q value of 619mΩ. The second-stage amplifier has resistors R3 and R4 of 3.44kΩ, R5 of 1.72kΩ, capacitor C4 of 1nF, and capacitor C5 of 26.8pF. Based on these parameters, the second-stage amplifier achieves a gain (V / V) of 1, fp (Hz) of 395kΩ, and a Q value of 2.17.

[0046] After the original signal is filtered down to high-frequency noise, it can be amplified. The limiting amplifier circuit can limit and amplify the original signal of the cesium optical pump magnetometer processed by the upper stage circuit. Since this stage circuit involves signal amplification, a low-noise, high-gain bandwidth product operational amplifier should be selected to achieve high amplification over a wide bandwidth.

[0047] The limiting amplifier circuit includes resistor R6 connected to the output of the preceding circuit, which is then connected to the non-inverting input of the operational amplifier chip. Resistors R8 and R9 are feedback resistors, connected in series across the output and non-inverting inputs of the operational amplifier chip. A bidirectional limiting Schottky diode D0 and diode D1 are connected in reverse parallel across the feedback resistor R9. By utilizing the forward voltage characteristics of the diodes, the circuit achieves its limiting amplification function.

[0048] The operational amplifier used in the limiting amplifier circuit is the low-noise, high-gain-bandwidth AD8021. Resistors R6 and R7 are both 100Ω. R6 is connected to the non-inverting input of the amplifier, and R7 is connected to the inverting input to reduce input bias. Resistor R8 is set to 10Ω. Utilizing the reverse-parallel bidirectional limiting Schottky diode with a forward voltage of 600mV, calculations show that the output voltage is 1.1 times the input voltage plus 600mV.

[0049] The signal after limiting and amplification is still a sine wave signal, which does not match the I / O level supported by the FPGA. Therefore, it needs to be shaped into a TTL square wave signal to facilitate frequency measurement in the FPGA.

[0050] The signal shaping circuit includes an operational amplifier chip with a high-speed comparator that has low propagation delay. The output voltage signal is directly connected to the positive input terminal of the operational amplifier chip, and a resistor R13 is connected in parallel with the operational amplifier chip as feedback.

[0051] The signal shaping circuit uses the LT1016 high-speed comparator with a propagation delay of only 10ms. Employing a positive feedback design, the entire comparator remains in an open-loop state, shaping the signal into a TTL signal with a high level below 5V. The processed channel one signal is denoted as S1, and the processed channel two signal as S2. The signal shaping circuit can also shape the processed raw signal into a TTL square wave signal for convenient input into the FPGA of the frequency measurement module for frequency measurement. This circuit uses a positive feedback design, employing a high-speed comparator with low propagation delay. The output voltage signal is directly connected to the positive input terminal of the op-amp, keeping the comparator in an open-loop state, thus realizing the function of shaping a sine wave signal into a TTL level signal.

[0052] The power supply pin of the external thermostatic crystal oscillator signal source circuit is connected to the power supply VCC through the ferrite bead L2. The filter capacitors C9 and C10 are connected in parallel, with the left end grounded and the right end connected to the power supply pin of the thermostatic crystal oscillator. Together with the ferrite bead L2, they form an LC filter circuit. A resistor R15 is connected in series at the output terminal of the thermostatic crystal oscillator.

[0053] An external temperature-controlled crystal oscillator with a nominal frequency of 100MHz and a frequency range of 1.000MHz to 160.000MHz is selected. The output signal of the crystal oscillator is denoted as S3. The frequency of the S3 signal can be changed at any time by altering the input voltage. Using a temperature-controlled crystal oscillator instead of an onboard crystal oscillator avoids the temperature drift and unpredictable jitter of ordinary crystal oscillators, while also ensuring an adjustable frequency reference, significantly increasing the accuracy of frequency measurement.

[0054] The external temperature-controlled crystal oscillator signal source circuit can control the frequency of the crystal oscillator through the supply voltage, providing a standard, stable, and temperature-independent square wave signal for frequency measurement. The power supply pin of the active crystal oscillator is connected to the power supply VCC through a ferrite bead L2 to reduce the impact of power supply noise on the output frequency and to smooth the current flowing into the crystal oscillator. Functionally, the ferrite bead works on the same principle as an inductor. Filter capacitors C9 and C10 are connected in parallel, with the left end grounded and the right end connected to the power supply pin of the temperature-controlled crystal oscillator, forming an LC filter circuit with L2. It is worth mentioning that if EMC requirements are not high, the ferrite bead L2 can be omitted. To make the output frequency signal more stable, an RC filter is designed at the output end in this invention to reduce frequency signal overshoot. Generally, a small resistor R15 is connected in series at the output end as a reserved matching design to reduce signal reflection and prevent overshoot. C8 is a reserved capacitor at the power supply end, which can be adjusted according to actual conditions. Simultaneously, as a standard stable pulse independent of other signals, its rising edge serves as the reference for circuit state transitions, achieving better stability and synchronization.

[0055] The FPGA chip can take the processed output frequency signals of the two cesium optically pumped magnetometers and the standard pulse generated by the externally controlled-temperature crystal oscillator as external inputs. It can also detect the rising edge signal generated by the externally controlled-temperature crystal oscillator. By programming, the rising edge of the three square wave signals can be synchronously counted using the pulse of the controlled-temperature crystal oscillator as the enable signal. The number of rising edges of the test signal and the reference signal at different times, the frequency of the reference pulse, and other values ​​are stored in the FIFO. The chip communicates with the STM32 via serial port and sends these four values ​​to the STM32 for calculation and conversion. This allows the chip to obtain the frequencies F1 and F2 of the two magnetometer output signals, their corresponding magnetic field values ​​B1 and B2, and the horizontal gradient value of the magnetic field B12.

[0056] After the three signals are input to the FPGA chip, the gate time is set to 10Hz. The rising edge of the frequency measurement reference clock is used as the enable signal for frequency measurement counting. After the frequency measurement starts, the frequency measurement reference pulse is counted. The number of rising edges of the frequency measurement reference pulse within the gate time is recorded as N. At the same time, the rising edge of the signal under test is detected. After the rising edge of signal one is detected, the signal is counted. The number of rising edges of signal one is recorded as N1. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N2. And the number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test within the gate time is recorded as N3. The same applies to channel two. After the rising edge of signal two is detected, the signal is counted. The number of rising edges of signal two is recorded as N4. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N5. And the number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test within the gate time is recorded as N6. The counting of the frequency measurement reference pulse stops after N reaches 10,000,000 (i.e., the 0.1s gate time corresponding to a crystal oscillator frequency of 100MHz), marking the termination of one frequency measurement. After the frequency measurement terminates, the counting of N1 and N4 stops. Simultaneously, the number of rising edges N7 and N8 of the two channels' measured signals from the end of the frequency measurement until the next rising edge of the two measured signals is the frequency measurement reference pulse is recorded. This data is stored in a FIFO and then sent to the STM32 via serial port for calculation. The resulting output signal frequency of magnetometer 1 is then calculated. Similarly, the output signal frequency of magnetometer 2 is The corresponding magnetic field values ​​are B1 = F1 / 3.49857 and B2 = F2 / 3.49857. The corresponding horizontal gradient value is B12 = (B1 - B2) / D, where D is the baseline distance between the two magnetometers.

[0057] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit for measuring the output frequency signal of a cesium optically pumped horizontal gradient meter, characterized in that, It includes a signal conditioning module and a frequency measurement module; among which, The signal conditioning module receives two sets of output signals from the cesium optically pumped magnetometer and filters, amplifies, and shapes the signals; the signal conditioning module includes: The decoupling isolation circuit filters out the power sinusoidal signal that is coupled to the signal output by the cesium optical pump magnetometer; An active low-pass filter circuit filters out high-frequency interference present in the output signal frequency band; A limiting amplifier circuit is used to limit and amplify the signal after interference has been filtered out. The signal shaping circuit shapes the signal into a 5V TTL signal, which is then used as the pulse to be measured and input to the subsequent frequency measurement module. The frequency measurement module receives two sets of conditioned signals and a frequency reference signal generated by an external temperature-controlled crystal oscillator. It counts the rising edges of the three signals within a specified gate time and sends the resulting number of rising edges to an STM32 microcontroller via serial port for calculation to obtain the frequency value, total magnetic field value, and total magnetic field gradient value. The frequency measurement module includes: A voltage-controlled external thermostatic crystal oscillator signal source circuit, composed of a thermostatic crystal oscillator, is used to generate a stable frequency measurement reference signal; The FPGA chip is used to receive three square wave signals and control the frequency measurement gate time to ensure that the three signals start counting synchronously. The STM32 chip is used to receive the three count values ​​output by the FPGA chip, and through calculation, the frequency of the output signals of the two magnetometers is obtained. Through the next step of conversion, the total magnetic field and the total magnetic field gradient are obtained. The decoupling isolation circuit includes: a surface-mount fuse F1, a filter capacitor C0, a radially polarized capacitor EC0, a power magnetic ring inductor L1, and a capacitor C1. The surface-mount fuse F1 is connected to the power supply. One end of the power magnetic ring inductor L1 is connected to the surface-mount fuse F1, and the other end is connected to the output terminal of the magnetometer signal. One end of the power magnetic ring inductor L1 is connected to the filter capacitor C0 and the radially polarized capacitor EC0 to form a second-order passive filter circuit. The other ends of the filter capacitor C0 and the radially polarized capacitor EC0 are grounded to filter out high-frequency ripple noise of the power supply signal. The other end of the power magnetic ring inductor L1 is connected to the output of the capacitor C1.

2. The cesium optical pump horizontal gradient meter output frequency signal measurement circuit according to claim 1, characterized in that, The active low-pass filter circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit with identical structures. The first-stage amplifier circuit includes a resistor R0, one end of which is connected to the output terminal of the previous stage circuit, and the other end of which is connected to the filter capacitor C2, forming the low-pass filter section of the first-stage amplifier circuit. The input impedance of the circuit can be adjusted by adjusting the value of the resistor R0. One end of the resistor R1 is connected to the resistor R0 and the filter capacitor C2, and the other end is connected across the output terminal of the operational amplifier. One end of the resistor R2 is connected to the right end of the resistor R0 and the filter capacitor C2, and the right end is connected to the inverting terminal of the operational amplifier. At the same time, the capacitor C3 is connected in parallel with the resistors R1 and R2 to form the feedback and amplification section.

3. The cesium optical pump horizontal gradient meter output frequency signal measurement circuit according to claim 1, characterized in that, The limiting amplifier circuit includes a resistor R6 connected to the output terminal of the upper stage circuit and connected to the non-inverting terminal of the operational amplifier chip. Resistors R8 and R9 are feedback resistors, which are connected in series across the output terminal and the non-inverting terminal of the operational amplifier chip. Bidirectional limiting Schottky diodes D0 and D1 are connected in reverse parallel and then in parallel across the two ends of the feedback resistor R9.

4. The cesium optical pump horizontal gradient meter output frequency signal measurement circuit according to claim 1, characterized in that, The signal shaping circuit includes an operational amplifier chip with a high-speed comparator that has low propagation delay. The output voltage signal is directly connected to the positive input terminal of the operational amplifier chip, and a resistor R13 is connected in parallel with the operational amplifier chip as feedback.

5. The cesium optical pump horizontal gradient meter output frequency signal measurement circuit according to claim 1, characterized in that, The power supply pin of the external temperature-controlled crystal oscillator signal source circuit is connected to the power supply VCC through the ferrite bead L2. The filter capacitors C9 and C10 are connected in parallel, with the left end grounded and the right end connected to the power supply pin of the temperature-controlled crystal oscillator. Together with the ferrite bead L2, they form an LC filter circuit. A resistor R15 is connected in series at the output terminal of the temperature-controlled crystal oscillator.

6. The cesium optical pump horizontal gradient meter output frequency signal measurement circuit according to claim 1, characterized in that, After the three signals are input to the FPGA chip, the gate time is set to 10Hz. The rising edge of the frequency measurement reference clock is used as the enable signal for frequency measurement counting. After the frequency measurement starts, the frequency measurement reference pulse is counted. The number of rising edges of the frequency measurement reference pulse within the gate time is recorded as N. At the same time, the rising edge of the signal under test is detected. After the rising edge of signal one is detected, the signal is counted. The number of rising edges of signal one is recorded as N1. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N2. And the number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test within the gate time is recorded as N3. The same applies to channel two. After detecting the rising edge of signal two, the signal is counted, and the number of rising edges of signal two is recorded as N4. At the same time, the number of rising edges of the frequency measurement reference pulse signal that has been counted at this time is recorded as N5. The number of rising edges of the frequency measurement reference pulse within one cycle of the signal under test is recorded as N6 within the gate time. The counting of the frequency measurement reference pulse is stopped after N counts to 10,000,000. This is the termination of one frequency measurement. When the frequency measurement is terminated, the counting of N1 and N4 is stopped. At the same time, the number of rising edges of the two channels of the measured signal from the next rising edge of the two measured signals after the frequency measurement stops is recorded as N7 and N8, respectively, which are the rising edges of the frequency measurement reference pulse.

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