Optimizing the execution efficiency of mixed-signal systems based on microservices

Abstract

The present invention proposes a method for optimizing the execution efficiency of a hybrid signal system based on microservices. In the method, each Actor is encapsulated as an independent service, and data is transmitted between Actor services through a message queue. When trying to read from an empty channel, the service is in a waiting state until a message is available. The scheduler is responsible for controlling the advancement of simulation time, result verification, and backtracking. The method makes full use of the advantages of cloud computing and microservices, and uses a parallelized algorithm to accelerate the execution speed of the hybrid system simulation engine.

Description

Technical Field

[0001] The present invention belongs to the technical field of model simulation, and in particular relates to a method for optimizing the execution efficiency of a mixed signal system based on microservices. Background Art

[0002] The present invention is applied to heterogeneous modeling, simulation and design systems of concurrent systems oriented to model actors. The actor-oriented design framework emphasizes concurrency and data communication between components. Each actor has a defined abstract interface, which encapsulates its internal state and behavior and restricts the interaction mode with its environment. An actor has one or more ports, which are divided into input ports and output ports. The actor receives (sends) messages at the input (output) ports. Messages are also called signals. A collection of signals at each port is called the behavior of the actor. Actors with continuous behavior and actors with discrete behavior together constitute a mixed signal system.

[0003] Multiple Actors can be assembled into a composite Actor by establishing connectors between ports. The connector from ActorA's output port a1 to ActorB's input port b1 indicates that the signal will flow from A's a1 port to B's b1 port.

[0004] In graphical modeling languages, Actors are often represented by boxes combined with triangles (ports). Triangle vertices pointing inside the box represent input ports, and triangle vertices pointing outside the box represent output ports. Connectors are represented by lines.

[0005] The overall execution process of the model is controlled by an instance of the manager class. The executable interface defines operations that perform the abstract semantics of the participants of the calculation. These operations are divided into three phases: setup, iteration, and packaging. Each phase is further divided into sub-phases. In the initialization operation, the executor performs any operations that may affect static analysis (including scheduling, type inference and checking, code generation, etc.). Among them, the iteration phase is the main execution phase of the model, that is, each participant performs a series of loop operations, and each Actor (executing component) enters a stable state through a limited number of updates. The prefire, fire, and postfire interfaces in the iteration are to coordinate the interaction between participants. Prefire tests the prerequisites required for the ignition of participants; fire reads input data, performs calculations, and produces output data; postfire updates the component status to mark the completion of execution.

[0006] The existing technology performs topological analysis on the system's dependency graph to obtain a relatively optimized Actor execution order, and calls the Actor execution interface in sequence to complete the overall iteration. This shows that the current technology is still a sequential execution process, without using parallelization algorithms, and the execution speed is relatively slow. Summary of the invention

[0007] The purpose of the present invention is to solve the problems in the prior art and propose an optimization method for the execution efficiency of a mixed signal system based on microservices.

[0008] The present invention is implemented by the following technical solution. The present invention proposes a method for optimizing the execution efficiency of a mixed signal system based on microservices, and the method comprises the following steps:

[0009] Step 1: First, analyze whether there is a causal loop in the system. If there is a causal loop, it means that the system is deadlocked and an error message is returned; if not, continue to execute;

[0010] Step 2: The scheduler initializes the simulation time and the step time step, sets the message queue represented by each connector and configures it to the corresponding Actor service;

[0011] Step 3: Send service startup instructions to all Actors, and all Actors share the scheduler time;

[0012] Step 4: Each Actor service runs in parallel. The starting point Actor in the dependency graph directly outputs the output result to the message queue, and other Actors observe its input. If the input is empty, it enters the waiting state. If there is input, it immediately calculates its output and prepares for the next execution. The Actor that ends the execution or enters the waiting state reports to the scheduler and reports whether its status has been updated during this execution.

[0013] Step 5: After receiving the return results from all executors, the controller will take action. If there are updated Actors, it will continue to send execution signals to all Actor services and repeat steps 3 and 4. If all Actors have not updated their status in this scheduling, the error value and breakpoint will be tested to determine whether the current iteration is successful. If not, it will backtrack and reselect the time step, reiterate and repeat steps 3 and 4. If successful, it will predict the next step and enter the next round of iteration and repeat steps 3 and 4.

[0014] Furthermore, the start instruction is a clock signal.

[0015] Furthermore, the starting point Actor is an Actor with direct output capability or an Actor with an initial state.

[0016] Furthermore, the Actor with direct output capability is a signal source.

[0017] Furthermore, the Actor with the initial state is an integrator.

[0018] Furthermore, the unupdated state reaches a fixed point.

[0019] Furthermore, the fixed point specifically refers to: considering each Actor as a function f, if each Actor satisfies monotonicity and Scott continuity, then the system composed of these Actors must have a fixed point solution, that is, scheduling the execution of Actors in an arbitrary order in an iteration, after a finite number of executions, all components will inevitably reach a stable, fixed point state.

[0020] Furthermore, each Actor is encapsulated as an independent service, and data is transmitted between Actor services through message queues. When trying to read from an empty channel, the service is in a waiting state until a message is available.

[0021] The present invention proposes an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method for optimizing the execution efficiency of a microservice-based mixed signal system when executing the computer program.

[0022] The present invention provides a computer-readable storage medium for storing computer instructions, which, when executed by a processor, implement the steps of the method for optimizing the execution efficiency of a microservice-based mixed signal system.

[0023] Beneficial effects of the present invention:

[0024] The present invention proposes a method for optimizing the execution efficiency of a hybrid signal system based on microservices, wherein the method adopts a parallelization algorithm to improve the running speed. The present invention makes full use of the advantages of cloud computing and microservices, and uses a parallelization algorithm to accelerate the execution speed of a hybrid system simulation engine. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0026] Figure 1 Flowchart of a method for optimizing execution efficiency of a microservices-based mixed-signal system. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] From the perspective of the engine architecture, the scheduling of components is the control flow plane, and the processing and transmission of data is the data flow plane. The control flow plane of the data flow model can be simplified. Each Actor is encapsulated as an independent service, and data is transmitted between Actor services through message queues. When trying to read from an empty channel, the service is in a waiting state until a message is available. The scheduler is responsible for controlling the advancement of simulation time, result verification, and backtracking.

[0029] Combination Figure 1 The present invention proposes a method for optimizing the execution efficiency of a hybrid signal system based on microservices, the method comprising the following steps:

[0030] Step 1: First, analyze whether there is a causal loop in the system. If there is a causal loop, it means that the system is deadlocked and an error message is returned; if not, continue to execute;

[0031] Step 2: The scheduler initializes the simulation time and the step time step, sets the message queue represented by each connector and configures it to the corresponding Actor service;

[0032] Step 3: Send service startup instructions to all Actors, and all Actors share the scheduler time;

[0033] Step 4: Each Actor service runs in parallel. The starting point Actor in the dependency graph directly outputs the output result to the message queue, and other Actors observe its input. If the input is empty, it enters the waiting state. If it has, it immediately calculates its output (seen by other blocks at the same time) and prepares for the next execution (changes state). The Actor that ends the execution or enters the waiting state reports to the scheduler and reports whether its status has been updated during this execution.

[0034] Step 5: After receiving the return results from all executors, the controller will take action. If there are updated Actors, it will continue to send execution signals to all Actor services and repeat steps 3 and 4. If all Actors have not updated their status in this scheduling, the error value and breakpoint will be tested to determine whether the current iteration is successful. If not, it will backtrack and reselect the time step, reiterate and repeat steps 3 and 4. If successful, it will predict the next step and enter the next round of iteration and repeat steps 3 and 4.

[0035] Furthermore, the start instruction is a clock signal.

[0036] Furthermore, the starting point Actor is an Actor with direct output capability or an Actor with an initial state.

[0037] Furthermore, the Actor with direct output capability is a signal source.

[0038] Furthermore, the Actor with the initial state is an integrator.

[0039] Furthermore, the unupdated state reaches a fixed point.

[0040] Furthermore, the fixed point specifically refers to: considering each Actor as a function f, if each Actor satisfies monotonicity and Scott continuity, then the system composed of these Actor combinations must have a fixed point solution, that is, scheduling the execution of the Actors in an arbitrary order in an iteration, and after a finite number of executions, all components will inevitably reach a stable, fixed point state. When the number of components contained in a system is N, the maximum number of scheduling times required for an iteration is N2 times, that is, each Actor will be executed N times, and then reach a fixed point solution. According to this theory, after simplifying the control flow plane, each Actor in the data flow plane only needs to check the specific input, and if there is input, perform calculations and complete the output. When the state of the entire system no longer changes, it reaches the fixed point of the current simulation step.

[0041] The present invention proposes an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method for optimizing the execution efficiency of a microservice-based mixed signal system when executing the computer program.

[0042] The present invention provides a computer-readable storage medium for storing computer instructions, which, when executed by a processor, implement the steps of the method for optimizing the execution efficiency of a microservice-based mixed signal system.

[0043] The memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DRRAM). It should be noted that the memory of the method described in the present invention is intended to include, but is not limited to, these and any other suitable types of memory.

[0044] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media integrations. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a high-density digital video disc (DVD)), or a semiconductor medium (eg, a solid state disc (SSD)).

[0045] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0046] It should be noted that the processor in the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or an instruction in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor can be combined and performed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0047] The above is a detailed introduction to the method for optimizing the execution efficiency of a microservice-based hybrid signal system proposed in the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A method for optimizing the execution efficiency of a mixed signal system based on microservices, characterized in that: The method comprises the following steps: Step 1: First, analyze whether there is a causal loop in the system. If there is a causal loop, it means that the system is deadlocked and an error message is returned; if not, continue to execute; Step 2: The scheduler initializes the simulation time and the step time step, sets the message queue represented by each connector and configures it to the corresponding Actor service; Step 3: Send service startup instructions to all Actors, and all Actors share the scheduler time; Step 4: Each Actor service runs in parallel. The starting point Actor in the dependency graph directly outputs the output result to the message queue, and other Actors observe its input. If the input is empty, it enters the waiting state. If there is input, it immediately calculates its output and prepares for the next execution. The Actor that ends the execution or enters the waiting state reports to the scheduler and reports whether its status has been updated during this execution. Step 5: After receiving the return results from all executors, the controller will perform operations. If there are updated Actors, it will continue to send execution signals to all Actor services and repeat steps 3 and 4. If all Actors have not updated their status in this scheduling, the error value and breakpoint will be tested to determine whether the current iteration is successful. If not, it will backtrack and reselect the time step, reiterate and repeat steps 3 and 4. If successful, it will predict the next step and enter the next round of iteration and repeat steps 3 and 4. The unupdated state has reached a fixed point; The fixed point specifically refers to: considering each Actor as a function f, if each Actor satisfies monotonicity and Scott continuity, then the system composed of these Actors must have a fixed point solution, that is, scheduling the execution of Actors in an arbitrary order in an iteration, and after a finite number of executions, all components will inevitably reach a stable fixed point state.

2. The method according to claim 1, characterized in that The start instruction is a clock signal.

3. The method according to claim 1, characterized in that: The starting point Actor is an Actor with direct output capability or an Actor with an initial state.

4. The method according to claim 3, characterized in that The Actor with direct output capability is the signal source.

5. The method according to claim 3, characterized in that: The Actor with the initial state is an integrator.

6. The method according to claim 1, characterized in that Each Actor is encapsulated as an independent service. Actor services transmit data through message queues. When trying to read from an empty channel, the service is in a waiting state until a message is available.

7. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

8. A computer-readable storage medium for storing computer instructions, characterized in that: When the computer instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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