Randomly rotating dem structure for reducing switching activity
By replacing the pseudo-random number generator with input data and designing a structure to reduce switching activity, the high switching activity and complexity of the random rotation DEM algorithm are solved, and a low-complexity and high-performance analog-to-digital converter is realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIDIAN UNIV
- Filing Date
- 2023-01-07
- Publication Date
- 2026-07-07
AI Technical Summary
Existing random rotation DEM algorithms suffer from high complexity or performance loss in reducing switching activity, especially in analog-to-digital converters, where high switching activity leads to energy loss and increased noise.
By replacing the pseudo-random number generator with input data and reducing switching activity through a simple logic structure, a switching activity reduction structure including a data selector and a comparator is designed. The structure prioritizes the selection of the cell in the previous cycle to reduce switching activity.
While reducing switching activity, it maintains low complexity and good performance, improves the accuracy and speed of analog-to-digital converters, reduces mismatch and harmonics, and lowers overall power consumption.
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Figure CN116032281B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of dynamic element matching (DEM) technology, and specifically relates to a random rotating DEM structure that reduces switching activity. Background Technology
[0002] In reality, various analog signals exist, such as sound, temperature, images, and smells. With the rapid development of large-scale and very large-scale integrated circuits, the digital domain exhibits advantages such as higher frequency and accuracy compared to processing signals in the analog domain. Therefore, analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) have become worthy of research. Because data converters are susceptible to adverse effects from mismatch during use, such as reduced accuracy and linearity, DEM algorithms are often used to reduce mismatch and its impact. Furthermore, to meet the needs of different scenarios, such as reducing power consumption and complexity, improving performance, and reducing switching activity, various improved DEM algorithms are also warranting further research.
[0003] Existing solutions: Figure 1 This is a commonly used DEM algorithm—the Binary Weighted Random Rotation Selection (RRBS) method. Taking a 3-bit data converter as an example, the most significant, second most significant, and least significant bits of the input correspond to B2, B1, and B0, respectively. Based on the weighted allocation units, B0 controls one unit, B1 controls two units, and B2 controls four units. When the input is 010 and the random rotation number is 3, taking a left rotation as an example (left and right rotations differ only in direction), B0 rotates from its original {U0} to {U3}, B1 and B2 are sorted starting from {U3}, B1 rotates to {U4, U5}, and B2 rotates to {U6, U0, U1, U2}. B1 is 1, therefore units {U4, U5} are selected; B0 and B2 are 0, therefore {U3}, {U6, U0, U1, U2} are not selected. The selection methods for other different inputs are similar to those described above, and the initial state before rotation is the same for each cycle (i.e., it is not a rotation again at the position after the rotation in the previous cycle). This algorithm... Figure 2 The implementation of the barrel shifter and pseudo-random number generator in the model.
[0004] The pseudo-random number generator consists of 15 D flip-flops and logic gates. The three random numbers generated are input as random rotation numbers into a barrel shifter. The barrel shifter is composed of a 2-to-1 data selector, which controls the sequential rotation of the thermometer code after conversion (B2, B1, B0) by 4 bits, 2 bits, and 1 bit, based on each bit of the random rotation number. This method enhances randomness, randomizing mismatches that would otherwise accumulate at fixed positions, thus significantly reducing noise introduced by mismatches.
[0005] Since each transition of a cell from a selected state to an unselected state, or vice versa, generates significant energy loss (the greater the switching activity, the greater the energy loss), and the random rotation in the RRBS method has considerable uncertainty, it may enhance switching activity. Meanwhile, existing methods for reducing switching activity are either overly complex, greatly increasing circuit complexity, or sacrifice performance, leading to a decrease in spurious-free dynamic range (SFDR). Summary of the Invention
[0006] To overcome the shortcomings of the existing technology, the present invention aims to provide a random rotation DEM structure that reduces switching activity. This structure uses input data instead of a pseudo-random number generator and employs simpler logic to reduce switching activity, thereby reducing complexity.
[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0008] A random rotation DEM structure for reducing switching activity includes a digital-to-analog converter (DAC). The digital input of the DAC is divided into an input code and a random rotation number. The random rotation number and the output of a barrel shifter delayed by one cycle after a D flip-flop are input to the switching activity reduction structure. The feedback output of the switching activity reduction structure is fed back to the barrel shifter as input. The output of the barrel shifter after rotation controls the corresponding switch and is connected to the corresponding cell array.
[0009] The switch activity reduction structure has two stages, each stage including two 7-to-1 data selectors, a comparator, and a 2-to-1 data selector.
[0010] The seven-to-one data selector uses a random rotation number as a control signal. The first stage selects the units on the left and right sides of the lowest bit B0 of the data converter after rotation, and the second stage selects the units on the left and right sides of the lowest bit B0 after rotation. The comparator will judge and give different operation instructions based on the result of the seven-to-one data selector. Finally, the rotation direction is output through the two-to-one data selector.
[0011] The rotation direction needs to be combined with the states of the second highest bit B1 and the highest bit B2 of the data converter to give the final feedback output through a logic gate. This output will be used as input to feed back to the barrel shifter.
[0012] The rotation principle is that after rotation, the unit selected in the previous cycle is selected first to ensure minimal switching activity.
[0013] Taking a 6-bit DAC input as an example, the 6-bit digital code is divided into three high-order bits (MSB) and three low-order bits (LSB). The MSB is still used as the input, namely the highest bit B2, the second highest bit B1, and the lowest bit B0. The LSB is used as the random rotation number instead of using a pseudo-random number generator.
[0014] In cycle 1, the digital input code is 010011. Therefore, the three high-order bits 010 are randomly rotated, and the three low-order bits 011 are used as the random rotation number. B0 is rotated 3 bits to the left from {U0} to {U3}. Since all units in the previous cycle were not selected, B1 and B2 allocate units using the default sorting method (same as RRBS). B1 controls {U4, U5}, and B2 controls {U6, U0, U1, U2}. When B1 is 1, units {U4, U5} are selected.
[0015] In cycle 2, the digital input code is 100101. B0 is rotated 5 bits to the left from {U0} to {U5}. In the previous cycle, the units to the left and right of {U5} were compared sequentially. {U4} was selected while {U6} was not selected, so it was prioritized to be arranged to the right. B2 is 1 while B1 is 0, so B2 was prioritized to be arranged to the right. B1 controls {U0, U6}, and B2 controls {U1, U2, U3, U4} and is selected.
[0016] In cycle 3, the digital input code is 011100. B0 is rotated 4 bits to the left from {U0} to {U4}. In the previous cycle, the units on the left and right sides of {U4} are compared sequentially. {U3} is selected while {U5} is not selected, so it is prioritized to be arranged to the right. B1 is 1 while B0 is 0, so B1 is prioritized to be arranged to the right. B1 controls {U2, U3} and is selected. B2 controls {U0, U1, U5, U6}. Except for two special cases where the arrangement follows the default left-rotating RRBS method, the other cases are the same as the above principle.
[0017] The first special case is when B1 and B2 are the same. In this case, the units controlled by B1 and B2 are either selected or not selected. The arrangement will not affect the switching activity, so no judgment is needed.
[0018] The second scenario is that when the selection states of the leftmost and rightmost bits of the control unit B0 are the same, it is necessary to determine the selection states of the two bits to the left and two bits to the right of the initial unit. If they are still the same, no further determination is needed. This is because B1 only controls two units, so only the states of those two units need to be determined. Although B2 controls four units, since there are only seven units in total, the last two units selected from the first four units (left or right) are repeated, so only the first two units need to be determined.
[0019] The barrel shifter adjusts the order of inputs based on the digital inputs from the previous stage and the feedback output from the switch activity reduction structure, thus providing the corresponding output.
[0020] The barrel shifter uses the input data as the random rotation number. The highest control bit B2, the second highest bit B1, and the lowest bit B0 are selected and rotated 4 bits in sequence. The 2-bit and 1-bit control bits are directly connected to the random rotation number part of the input data to change the rotation direction of the DEM. Two 2-to-1 data selectors are added before the input. The feedback output of the switch activity reduction structure is used as the control signal, and the function can be realized through a simple structure.
[0021] The beneficial effects of this invention are:
[0022] This invention proposes a low-complexity DEM algorithm to reduce switching activity based on random rotation. The core idea of this algorithm is to prioritize the selection of cells selected in the previous cycle based on the rotation results after the number of random rotations is determined, thereby reducing switching activity. To achieve this, the original structure of the RRBS method is improved, and a structure to reduce switching activity is designed. The input data is processed through a data selector, comparator, and logic gates. A seven-to-one data selector and comparator, using the rotation number as the control signal, select and compare directions that are beneficial for reducing switching activity. Then, a rotation control signal is generated by the logic gates to determine whether to perform a rotation operation on the input data. Changing the rotation direction of the DEM achieves the goal of reducing switching activity and minimizing mismatch and harmonics. A balance is achieved between complexity and performance, reducing mismatch with lower complexity and lower switching activity (power consumption), and improving the accuracy and speed of the data converter.
[0023] This invention improves upon the RRBS method by designing a structure that reduces switching activity. Traditional RRBS methods suffer from significant energy loss during rotation, while this invention drastically reduces total energy loss by minimizing switching activity. Furthermore, the structure used to reduce switching activity is remarkably simple (using only a small number of data selectors and comparators), exhibiting significantly lower complexity compared to existing structures for reducing switching activity. In terms of performance, it is similar to traditional RRBS, but in the low-frequency domain, it better reduces mismatch and improves spurious-free dynamic range and accuracy. Because the randomness of several input data bits used to generate the rotation number is high and the pseudo-random number generator is optimized away, mismatch is further reduced, thus improving the spurious-free dynamic range. Attached Figure Description
[0024] Figure 1 This is based on the principle of the traditional RRBS algorithm.
[0025] Figure 2This is the structure of the traditional RRBS algorithm.
[0026] Figure 3 This describes the input data processing method for a low-complexity DEM algorithm used to reduce switching activity.
[0027] Figure 4 This describes the principle of the low-complexity DEM algorithm used to reduce switching activity.
[0028] Figure 5 This is a low-complexity DEM algorithm flow for reducing switching activity.
[0029] Figure 6 The structure reduces switching activity.
[0030] Figure 7 This is the structure for generating rotation control signals for B1 and B2.
[0031] Figure 8 It has a barrel-shaped shifter structure. Detailed Implementation
[0032] The present invention will now be described in further detail with reference to the accompanying drawings.
[0033] The technical solution provided by this invention is as follows: This invention designs a low-complexity DEM algorithm applicable to low-frequency high-precision analog-to-digital converters and current-driven analog-to-digital converters. Figure 3 and Figure 4 The working principle of this algorithm is shown below.
[0034] Figure 3 In this example, taking a 6-bit DAC input, the 6-bit digital code is divided into three high-order bits (MSB) and three low-order bits (LSB). The MSB is still used as the input, namely B2, B1, and B0. The LSB is used as the random rotation number instead of a pseudo-random number generator. There are three reasons for this approach:
[0035] First, the input data sampled using coherent sampling techniques has sufficient randomness, making randomization of the input data entirely feasible. Second, in the low-frequency domain, the rate of data change is slower, so the lower bits change more frequently than the higher bits, meaning the lower bits are more suitable as random rotation numbers. Finally, because the weights of the three higher bits are much greater than those of the three lower bits, performing random rotation only on the three higher bits not only does not affect the final result but also reduces complexity.
[0036] Figure 4 The diagram illustrates the specific rotation principle. Its core idea is that after rotation, the unit selected in the previous cycle is preferentially selected to ensure minimal switching activity. The detailed operation process is as follows:
[0037] In cycle 1, the digital input code is 010011. Therefore, the three high bits (010) are randomly rotated, and the three low bits (011) are used as the random rotation number. B0 is rotated 3 bits to the left from {U0} to {U3}. Since all units in the previous cycle were not selected, B1 and B2 allocate units using the default sorting method (same as RRBS). B1 controls {U4, U5}, and B2 controls {U6, U0, U1, U2}. When B1 is 1, units {U4, U5} are selected.
[0038] In cycle 2, the digital input code is 100101. B0 is rotated 5 bits to the left from {U0} to {U5}. In the previous cycle, the cells to the left and right of {U5} were compared sequentially; {U4} was selected while {U6} was not selected, so it is prioritized to be arranged to the right. B2 is 1 while B1 is 0, so B2 is prioritized to be arranged to the right. B1 controls {U0, U6}, and B2 controls {U1, U2, U3, U4} and is selected.
[0039] In cycle 3, the digital input code is 011100. B0 is rotated 4 bits to the left from {U0} to {U4}. In the previous cycle, the units to the left and right of {U4} were compared sequentially. {U3} was selected while {U5} was not selected, so it was prioritized to be arranged to the right. B1 is 1 while B0 is 0, so B1 is prioritized to be arranged to the right. B1 controls {U2, U3} and is selected, while B2 controls {U0, U1, U5, U6}.
[0040] All other cases follow the same principle as described above. However, there are two special cases where the RRBS arrangement will follow the default left-rotating pattern. The first special case is when B1 and B2 are the same. In this case, the units controlled by B1 and B2 are either selected or not selected. The arrangement does not affect the switch activity, so no judgment is needed. The second case is when the selection states of the bit to the left and the bit to the right of the control unit B0 are the same. It is necessary to judge the selection states of the bits to the left and the bits to the right of the initial unit. If they are still the same, no judgment is needed. This is because B1 only controls 2 units, so only the states of the two units need to be judged; while B2 controls 4 units, since there are only 7 units in total, starting from one unit, the last 2 units selected to the left or right of the 4 units are repeated, so only the first 2 units need to be judged.
[0041] Figure 5 The diagram shows a flowchart of a low-complexity DEM algorithm used to reduce switching activity.
[0042] The digital input of a digital-to-analog converter (DAC) is first divided into two parts: the input code and the random rotation number. Since current high-precision DACs generally employ a segmented structure with lower weighting for the least significant bits, the least significant bit portion after segmentation typically does not require the use of the DEM algorithm, thus reducing power consumption and complexity. The number of bits in the input data within each segment must be the same as the number of bits in the random rotation number to ensure that each unit can potentially be selected as the initial unit.
[0043] Structures with reduced switching activity, such as Figure 6 As shown, the input is a random rotation number and the output of a barrel shifter delayed by one cycle after being flipped by a D flip-flop. The structure has two stages, each consisting of two 7-to-1 data selectors, a comparator, and a 2-to-1 data selector. The 7-to-1 data selector uses the random rotation number as the control signal. The first stage selects one bit on either side of B0 after rotation, and the second stage selects two bits on either side of B0 after rotation. The comparator then determines the operation instruction based on the result of the 7-to-1 data selector, and finally outputs the rotation direction through the 2-to-1 data selector. The rotation direction, along with the states of B1 and B2, needs to be processed through logic gates to provide the final feedback output, such as... Figure 7 As shown. This output will be fed back as input to the barrel shifter. The switching active structure designed in this invention not only has the advantages of simple structure and low complexity, but also significantly reduces switching activity, while basically not affecting the DEM algorithm's ability to reduce mismatch.
[0044] The barrel shifter adjusts the input order based on the digital inputs of the previous stage and the feedback output of the switching activity reduction structure, thus providing the corresponding output. The specific structure is as follows: Figure 8 As shown, to use the input data as the random rotation number, the control bits B2, B1, and B0 are typically selected by 4 bits in sequence, and the 2-bit and 1-bit control bits are directly connected to the random rotation number part of the input data. To change the rotation direction of the DEM, this algorithm adds two 2-to-1 data selectors before the input, using the feedback output of the switch activity reduction structure as the control signal, thus achieving the function with a simple structure.
[0045] Finally, the output of the barrel shifter after rotation controls the corresponding switch and connects to the corresponding unit array.
[0046] The low-complexity DEM algorithm for reducing switching activity proposed in this invention adds a switching activity reduction structure to the RRBS method. Compared with traditional methods, it can significantly reduce switching activity, which means it can greatly reduce overall power consumption. At the same time, it ensures that the circuit implemented by this algorithm has good performance, effectively reducing data converter mismatch and improving its accuracy and speed. Furthermore, the various structures of this algorithm are relatively simple, reducing the overall design complexity, which means that chip area can be reduced.
[0047] This invention addresses the challenge of balancing complexity reduction with reducing the number of switching flips in the commonly used digital calibration algorithm (DEM) in data converters. It proposes a DEM algorithm that reduces switching activity with lower complexity. The algorithm, based on random rotation, replaces the pseudo-random generator with the digital input of the digital-to-analog converter, thereby reducing complexity. Simultaneously, a structure to reduce switching activity is designed. By processing the input data through a data selector and comparator, the rotation direction of the DEM is changed, achieving the goal of reducing switching activity and minimizing mismatch and harmonics.
Claims
1. A randomly rotated DEM structure for reducing switching activity, characterized in that, The system includes a digital-to-analog converter (DAC), whose digital input is divided into an input code and a random rotation number. The input code and the random rotation number are input to a barrel shifter. The random rotation number and the output of the barrel shifter after a one-cycle delay by a D flip-flop are input to a switch activity reduction structure. The feedback output of the switch activity reduction structure is fed back to the barrel shifter as an input. The output of the barrel shifter after rotation controls a corresponding switch and is connected to a corresponding unit array. The switch activity reduction structure has two stages, each stage including two 7-to-1 data selectors, a comparator, and a 2-to-1 data selector.
2. The randomly rotated DEM structure for reducing switching activity according to claim 1, characterized in that, The seven-to-one data selector uses a random rotation number as a control signal. The first stage selects the units on the left and right sides of the lowest bit B0 of the data converter after rotation, and the second stage selects the units on the left and right sides of the lowest bit B0 after rotation. The comparator will judge and give different operation instructions based on the result of the seven-to-one data selector. Finally, the rotation direction is output through the two-to-one data selector.
3. The randomly rotated DEM structure for reducing switching activity according to claim 2, characterized in that, The rotation direction needs to be combined with the states of the second highest bit B1 and the highest bit B2 of the data converter to give the final feedback output through a logic gate. This output will be used as input to feed back to the barrel shifter.
4. The randomly rotated DEM structure for reducing switching activity according to claim 3, characterized in that, The rotation principle is that after rotation, the unit selected in the previous cycle is selected to ensure minimal switching activity. For a 6-bit DAC input, the 6-bit digital code is divided into three high-order bits (MSB) and three low-order bits (LSB). The MSB is still used as the input, namely the highest bit B2, the second highest bit B1, and the lowest bit B0. The LSB is used as the random rotation number instead of using a pseudo-random number generator. In cycle 1, the digital input code is 010011. Therefore, the three high bits 010 are randomly rotated, and the three low bits 011 are used as the random rotation number. B0 is rotated 3 bits to the left from {U0} to {U3}. Since all units in the previous cycle were not selected, B1 and B2 are allocated units in the same sorting method as RRBS. B1 controls {U4, U5}, and B2 controls {U6, U0, U1, U2}. When B1 is 1, the two units {U4, U5} are selected. In cycle 2, the digital input code is 100101. B0 is rotated 5 bits to the left from {U0} to {U5}. In the previous cycle, the units on the left and right sides of {U5} are compared sequentially. {U4} is selected while {U6} is not selected, so they are arranged to the right. B2 is 1 and B1 is 0, so B2 is arranged to the right. B1 controls {U0, U6}, and B2 controls {U1, U2, U3, U4} and is selected. In cycle 3, the digital input code is 011100. B0 is rotated 4 bits to the left from {U0} to {U4}. In the previous cycle, the units on the left and right sides of {U4} are compared in turn. {U3} is selected while {U5} is not selected, so they are arranged to the right. B1 is 1 and B0 is 0, so B1 is arranged to the right. B1 controls {U2, U3} and is selected. B2 controls {U0, U1, U5, U6}. Except for two special cases, it will be arranged according to the default left-rotating RRBS method.
5. The randomly rotated DEM structure for reducing switching activity according to claim 4, characterized in that, The first special case is when B1 and B2 are the same. In this case, the units controlled by B1 and B2 are either selected or not selected. The arrangement will not affect the switching activity, so no judgment is needed. The second scenario is that when the selection states of the leftmost and rightmost bits of the control unit B0 are the same, it is necessary to determine the selection states of the leftmost and rightmost bits of the initial unit. If they are still the same, no further determination is needed. This is because B1 only controls two units, so it is only necessary to determine the states of two units. Although B2 controls four units, since there are only seven units in total, the last two units selected from the four units to the left or right are repeated, so it is only necessary to determine the states of the first two units.
6. The randomly rotated DEM structure for reducing switching activity according to claim 3, characterized in that, The barrel shifter adjusts the order of inputs based on the digital inputs from the previous stage and the feedback output from the switch activity reduction structure, thus providing the corresponding output.
7. The randomly rotated DEM structure for reducing switching activity according to claim 3, characterized in that, The barrel shifter uses the input data as the random rotation number. The highest control bit B2, the second highest bit B1, and the lowest bit B0 are selected and rotated 4 bits in sequence. The 2-bit and 1-bit control bits are directly connected to the random rotation number part of the input data to change the rotation direction of the DEM. Two 2-to-1 data selectors are added before the input. The feedback output of the switch activity reduction structure is used as the control signal, and the function can be realized through a simple structure.