A signal receiving and transmitting processing device based on satellite communication

Abstract

The present invention relates to a signal transceiver processing device based on satellite communication, which is used for processing multi-channel radio frequency signals received and transmitted by an antenna, and the device comprises a satellite signal splitter and combiner module, a plurality of receiving channels and a plurality of transmitting channels; the satellite signal splitter and combiner module comprises a splitter and combiner and a clock generating circuit; the splitter and combiner split and combine the multi-channel radio frequency signals; the clock generating circuit provides a clock signal for the receiving channel and the transmitting channel; each receiving channel comprises an intermediate frequency baseband receiving module, the intermediate frequency baseband receiving module comprises a local oscillator generating circuit and an out-of-band suppression circuit, a mixing circuit, a first channel suppression circuit, an intermediate frequency channel signal compensation circuit, and a second channel suppression circuit connected in sequence, the clock generating circuit is connected to the local oscillator generating circuit, the local oscillator generating circuit is connected to the mixing circuit, and the splitter and combiner are connected to the out-of-band suppression circuit. The present invention solves the problem that the anti-interference performance cannot be well improved when realizing multi-channel transceiver in satellite communication.

Description

Technical Field

[0001] The present invention relates to the field of satellite communication technology, and more specifically, to a signal transceiver processing device based on satellite communication. Background Art

[0002] In the current field of satellite communications, especially in vehicle-mounted and ship-mounted portable terminals, the distance between the antenna and the channel terminal (host) is relatively far. Most of the antennas here are active antennas in motion. The signals received by the antenna include not only the transmission and reception signals of satellite communications, but also satellite navigation signals, control signals and DC signals. The antenna and the channel terminal are transmitted through a one-line RF cable. Therefore, the one-line RF cable must transmit not only satellite communication transceiver signals, satellite navigation signals, control signals but also DC signals. The separation and combination of multiple signals not only brings design difficulties to the circuit, but also requires the antenna end to provide a large RF gain due to the separation and synthesis of multiple signals, plus the loss of the one-line RF cable, which will inevitably affect the anti-interference performance of the receiving system. In addition, with the continuous increase in communication methods and channel equipment and the improvement of spectrum utilization, it is required to realize the simultaneous transmission of multiple transceiver signals and the miniaturization of equipment. Miniaturization, low cost and high performance are also the key points that need to be considered in the design.

[0003] In order to improve the anti-interference performance, the methods usually used in the RF channel are as follows: 1. By increasing the P-1 (1dB compression point) of the receiving channel, but this method is limited by the performance of the device itself, and the chip with high linearity often increases in size or power consumption; 2. By using a filter with good suppression on the channel. The advantage of this method is that it is simple and convenient, but if the channel bandwidth of the receiving channel is very narrow or the frequency is high, the usual filter cannot meet the requirements; 3. Using the superheterodyne method, after down-conversion, the filter suppresses out-of-band interference to achieve improved anti-interference performance. This method is very common in the current communication field. The disadvantage is that after passing through the mixer, it will generate spurious and will also increase the complexity of the circuit; 4. In phased array antennas, due to the large number of antenna elements, if superheterodyne and narrowband filters are used in each channel, the complexity, cost and volume of the circuit will increase significantly. Summary of the invention

[0004] The present invention aims to overcome at least one defect (shortcoming) of the above-mentioned prior art and provide a signal transceiver processing device based on satellite communication, which is used to solve the problem that the anti-interference performance cannot be well improved when multi-channel transceiver is realized in satellite communication.

[0005] The technical solution adopted by the present invention is:

[0006] A signal transceiver processing device based on satellite communication, used for processing multi-channel radio frequency signals received and transmitted by an antenna, the device comprising a satellite signal splitter / combiner module, a plurality of receiving channels and a plurality of transmitting channels;

[0007] The satellite signal splitter and combiner module includes a splitter and a clock generating circuit; the splitter and the combiner are respectively connected to the receiving channel and the transmitting channel, and split and combine the multiple RF signals; the clock generating circuit is respectively connected to the receiving channel and the transmitting channel, and provides clock signals for the receiving channel and the transmitting channel;

[0008] Each of the receiving channels includes an intermediate frequency baseband receiving module, which includes a local oscillator generating circuit and an out-of-band suppression circuit, a mixing circuit, a first channel suppression circuit, an intermediate frequency channel signal compensation circuit, and a second channel suppression circuit connected in sequence. The clock generating circuit is connected to the local oscillator generating circuit, the local oscillator generating circuit is connected to the mixing circuit, and the splitter / combiner is connected to the out-of-band suppression circuit.

[0009] Further, the effective passband bandwidth of the first channel suppression circuit and the second channel suppression circuit is 500KHz;

[0010] The suppression of the first channel suppression circuit and the second channel suppression circuit deviating from the center frequency ±800KHz is greater than or equal to 35dB, and / or the suppression deviating from the center frequency ±1.1MHz is greater than or equal to 40dB;

[0011] Insertion losses of the first channel suppression circuit and the second channel suppression circuit are less than or equal to 1.5 dB.

[0012] Furthermore, the gain of the intermediate frequency channel signal compensation circuit is greater than or equal to 30 dB.

[0013] Furthermore, the suppression of the out-of-band suppression circuit outside the passband by 15 MHz is greater than or equal to 15 dB, and the insertion loss of the out-of-band suppression circuit is less than or equal to 1.5 dB.

[0014] Furthermore, the intermediate frequency baseband receiving module also includes a variable frequency tuning circuit and an adjustable low-pass filtering circuit connected in sequence, the variable frequency tuning circuit is connected to the second channel suppression circuit, and the clock generating circuit is connected to the variable frequency tuning circuit.

[0015] Furthermore, the intermediate frequency baseband receiving module also includes a baseband signal compensation circuit, and the baseband signal compensation circuit is connected to the adjustable low-pass filter circuit.

[0016] Furthermore, each of the transmitting channels includes a transmitting modulation module, which includes a baseband I / Q impedance matching and out-of-band suppression circuit, a transmitting I / Q modulation circuit, and an out-of-band suppression and gain compensation circuit connected in sequence, the clock generation circuit is connected to the transmitting I / Q modulation circuit, and the splitter / combiner is connected to the out-of-band suppression and gain compensation circuit.

[0017] Furthermore, the satellite splitter and combiner module also includes an ASK modulation and demodulation circuit and / or an isolation filter circuit, the ASK modulation and demodulation circuit is used to modulate and demodulate the ASK signal, the isolation filter circuit is used to receive a DC signal and isolate and filter the DC signal, the splitter and combiner is connected to the ASK modulation and demodulation circuit, and the splitter and combiner is connected to the isolation filter circuit.

[0018] Further, the splitter and combiner are respectively connected to the receiving channel and the transmitting channel through a splitter and combiner filter circuit, and the splitter and combiner filter circuit filters the multiple RF signals, and / or the clock generating circuit is respectively connected to the receiving channel and the transmitting channel through a clock filter amplifier circuit, and the clock filter amplifier circuit filters and amplifies the clock signals provided to the receiving channel and the transmitting channel.

[0019] Furthermore, the out-of-band suppression circuit, the mixing circuit, the first channel suppression circuit, the intermediate frequency channel signal compensation circuit, the second channel suppression circuit and the local oscillator generating circuit are arranged on a printed circuit board, and the printed circuit board is provided with a first layer, a second layer and an intermediate layer located between the first layer and the second layer; the out-of-band suppression circuit, the mixing circuit, the first channel suppression circuit, the intermediate frequency channel signal compensation circuit and the second channel suppression circuit are located on the first layer, the local oscillator generating circuit is located on the second layer, and the intermediate layer is provided with a hollow.

[0020] Compared with the prior art, the beneficial effects of the present invention are: through the out-of-band suppression circuit and multiple intermediate frequency channel suppression circuits, on the one hand, out-of-band suppression of strong interference is achieved, especially suppression near the near end of the channel, and even when processing multiple transmit and receive signals at the same time, it still has high anti-interference performance; on the other hand, it can reduce the circuit complexity of the antenna and reduce the size of the antenna. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a schematic diagram of the composition of a signal receiving and sending processing device based on satellite communication according to Example 1 of the present invention.

[0022] Figure 2 This is a schematic diagram of the composition of the intermediate frequency baseband receiving module in the receiving channel of Example 1 of the present invention.

[0023] Figure 3This is another schematic diagram of the composition of the intermediate frequency baseband receiving module in the receiving channel of Example 1 of the present invention.

[0024] Figure 4 This is a schematic diagram of the composition of the transmission modulation module in the transmission channel of Example 1 of the present invention.

[0025] Figure 5 This is another schematic diagram of the components of the signal transceiver processing device based on satellite communication according to Embodiment 1 of the present invention.

[0026] Figure 6 This is a schematic diagram of the composition of the intermediate frequency baseband receiving module in the receiving channel of Example 2 of the present invention.

[0027] Figure 7 This is a schematic diagram of the composition of a signal receiving and sending processing device based on satellite communication according to Example 3 of the present invention.

[0028] Figure 8 This is a schematic diagram of the satellite signal splitting and combining module composition of Example 3 of the present invention.

[0029] Figure numerals: 100-signal transceiver processing device; 200-antenna; 300-main control unit; 110-satellite signal splitter and combiner module; 120-receiving channel; 130-transmitting channel; 111-splitter and combiner; 112-clock generating circuit; 113-splitter and combiner filter circuit; 114-receiving amplifier circuit; 1141-satellite receiving amplifier circuit; 1142-navigation receiving amplifier circuit; 115-transmitting amplifier circuit; 1151-satellite transmitting amplifier circuit; 116-clock filter amplifier circuit; 117-ASK modulation and demodulation circuit; 118-satellite signal suppression circuit; 119-isolation filter circuit; 12 1-local oscillator generating circuit; 1211-phase-locked loop circuit; 1212-local oscillator amplifying circuit; 1213-local oscillator filtering circuit; 1214-clock shunt circuit; 122-out-of-band suppression circuit; 123-mixing circuit; 124-first channel suppression circuit; 125-intermediate frequency channel signal compensation circuit; 126-second channel suppression circuit; 127-variable frequency tuning circuit; 128-adjustable low-pass filtering circuit; 129-baseband signal compensation circuit; 131-baseband I / Q impedance matching and out-of-band suppression circuit; 132-transmitting I / Q modulation circuit; 133-out-of-band suppression and gain compensation circuit; 201-moving antenna. DETAILED DESCRIPTION

[0030] The drawings of the present invention are only for illustrative purposes and should not be construed as limiting the present invention. In order to better illustrate the following embodiments, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product; it is understandable to those skilled in the art that some well-known structures and their descriptions in the drawings may be omitted.

[0031] Example 1

[0032] This embodiment provides a signal transceiver processing device 100 based on satellite communication, which is used to process multi-channel radio frequency signals received and transmitted. The received multi-channel radio frequency signals may include satellite communication receiving signals, satellite navigation signals, DC signals, etc., and the transmitted multi-channel radio frequency signals may include satellite communication transmitting signals, satellite control signals, etc.

[0033] Figure 1 FIG. 1 is a schematic diagram of a signal transceiver processing device 100 based on satellite communication in one embodiment. Figure 1 As shown, the signal transceiver processing device 100 includes a satellite signal splitter / combiner module 110, a plurality of receiving channels 120, and a plurality of transmitting channels 130. The number of receiving channels 120 and the number of transmitting channels 130 can be set according to actual conditions, and the number of receiving channels 120 and the number of transmitting channels 130 can be the same or different.

[0034] The signal transceiver processing device 100 provided in this embodiment can be integrated into a host terminal in actual application, and cooperate with the antenna 200 to perform transceiver processing of multiple signals. When the signal transceiver processing device 100 is used in conjunction with the antenna 200, the number of receiving channels 120 and the number of transmitting channels 130 can match the number of antenna 200 elements in the antenna 200 array. The signal transceiver processing device 100 can process the radio frequency signal received by the antenna 200, and the radio frequency signal processed by the signal transceiver processing device 100 can also be transmitted through the antenna 200. Specifically, the satellite signal splitter and combiner module 110 is connected to the antenna 200, receives the radio frequency signal from the antenna 200, and transmits the radio frequency signal through the antenna 200.

[0035] That is, this embodiment is different from the traditional method of performing multi-channel out-of-band suppression in the antenna 200, and instead performs multi-channel out-of-band suppression in the integrated host terminal, which can reduce the circuit complexity of the antenna 200 and reduce the size of the antenna 200.

[0036] The signal transceiver processing device 100 integrated into a host terminal can also cooperate with the main control unit 300 to perform transceiver processing of multiple RF signals. The signal transceiver processing device 100 can output the received RF signal to the main control unit 300 after processing, and the signal output by the main control unit 300 can also be processed by the signal transceiver processing device 100 and then transmitted. The main control unit 300 can be an MCU (Micro Processor Unit), FPGA (Field Programmable Gate Array), etc. Specifically, the receiving channel 120 and the transmitting channel 130 are respectively connected to the main control unit 300, and the signal processed by the receiving channel 120 is output to the main control unit 300, and the signal output by the main control unit 300 is output to the transmitting channel 130 for processing.

[0037] The satellite signal splitter and combiner module 110 includes a splitter and combiner 111 and a clock generating circuit 112; the splitter and combiner 111 are respectively connected to the receiving channel 120 and the transmitting channel 130, and splits and combines multiple RF signals; the clock generating circuit 112 is respectively connected to the receiving channel 120 and the transmitting channel 130, and provides clock signals for the receiving channel 120 and the transmitting channel 130.

[0038] The demultiplexer 111 can demultiplex the received multiple RF signals and output them to different receiving channels 120, so that each receiving channel 120 can process the received RF signals. The demultiplexer 111 can also combine the multiple RF signals output by each transmitting channel 130, so that each transmitting channel 130 can process the RF signals to be transmitted.

[0039] The splitter / combiner 111 can be connected to the receiving channel 120 and the transmitting channel 130 respectively through a splitter / combiner filter circuit 113, and the splitter / combiner filter circuit 113 filters the multi-channel RF signals. The splitter / combiner 111 and the splitter / combiner filter circuit 113 ensure the isolation between the various signals, and achieve low insertion loss and high isolation between signals of different channels. Compared with the traditional single-channel filtering method, the provision of the splitter / combiner filter circuit 113 can improve the filtering effect and isolation effect between signals of different channels.

[0040] The splitter and combiner filter circuit 113 may also be provided with a receiving amplifier circuit 114 and a transmitting amplifier circuit 115. The splitter and combiner 111 is connected to the receiving channel 120 through the splitter and combiner filter circuit 113 and the receiving amplifier circuit 114 in sequence, and the splitter and combiner 111 is connected to the transmitting channel 130 through the splitter and combiner filter circuit 113 and the transmitting amplifier circuit 115 in sequence. The receiving amplifier circuit 114 and the transmitting amplifier circuit 115 can amplify the corresponding channel signals and compensate for the insertion loss caused by the splitter and combiner and the transmission of the antenna 200.

[0041] The clock generation circuit 112 can simultaneously provide clock signals for a plurality of receiving channels 120 and a plurality of transmitting channels 130. Specifically, the clock generation circuit 112 can use a constant temperature crystal oscillator with high stability and good phase noise to generate a stable clock signal.

[0042] In order to provide a stable clock signal to the receiving channel 120 and the transmitting channel 130, the clock generating circuit 112 may also be connected to a clock filtering and amplifying circuit 116, through which the receiving channel 120 and the transmitting channel 130 are respectively connected. The clock filtering and amplifying circuit 116 filters and amplifies the clock signal provided to the receiving channel 120 and the transmitting channel 130, and the harmonic suppression of the clock signal may be greater than or equal to 40 dB.

[0043] Each receiving channel 120 includes an intermediate frequency baseband receiving module, Figure 2 Figure 1 is a schematic diagram of the composition of the intermediate frequency baseband receiving module. Figure 2 As shown, the intermediate frequency baseband receiving module includes a local oscillator generating circuit 121 and an out-of-band suppression circuit 122, a mixing circuit 123, a first channel suppression circuit 124, an intermediate frequency channel signal compensation circuit 125, and a second channel suppression circuit 126 which are connected in sequence. The local oscillator generating circuit 121 is connected to the mixing circuit 123, the splitter / combiner 111 is connected to the out-of-band suppression circuit 122, and the clock generating circuit 112 is connected to the local oscillator generating circuit 121.

[0044] The signal output by the splitter / combiner 111 enters the receiving channel 120, and first passes through the out-of-band suppression circuit 122 to improve the out-of-band anti-interference performance; then it is mixed with the local oscillator signal generated by the local oscillator generating circuit 121 through the mixing circuit 123 to obtain the intermediate frequency signal, thereby realizing the down-conversion of the signal; the intermediate frequency signal can pass through the first channel suppression circuit 124 and the second channel suppression circuit 126 to realize narrowband anti-interference performance, and can well suppress the near-end and far-end of the signal, thereby solving the near-end interference problem that cannot be solved by the antenna 200; between the first channel suppression circuit 124 and the second channel suppression circuit 126, the intermediate frequency channel signal compensation circuit 125 is used to compensate for the insertion loss of the intermediate frequency signal.

[0045] The insertion loss of the out-of-band suppression circuit 122 can be less than or equal to 1.5 dB, and the suppression of 15 MHz outside the passband is greater than or equal to 15 dB, so that the out-of-band anti-interference performance can be guaranteed. The out-of-band suppression circuit 122 can abandon the traditional surface acoustic wave filter (SAW, which uses the piezoelectric properties of piezoelectric materials, uses input and output transducers to convert the input signal of the radio wave into mechanical energy, and then converts the mechanical energy into an electrical signal to filter unnecessary signals and noise) and LC filter (also known as passive filter, which is a filter circuit designed and constructed by combining inductance, capacitance and resistance, and can filter out one or more harmonics), and adopt FBAR filter (film bulk acoustic resonator filter, film cavity acoustic resonance filter), which is manufactured using silicon substrate, micro-electromechanical system technology and thin film technology.

[0046] The first channel suppression circuit 124 and the second channel suppression circuit 126 need to have good suppression of the satellite receiving frequency band signal and the local oscillator signal at the same time, avoid the generation of image interference and reciprocal mixing interference, and achieve good impedance matching of the intermediate frequency channel, and also fully consider the feasibility of the device, so the first channel suppression circuit 124 and the second channel suppression circuit 126 can first ensure that the insertion loss is not too large, and the insertion loss is preferably less than or equal to 1.5dB, and then focus on the near-end and far-end out-of-band suppression, and at the same time, try to reduce the difficulty of impedance matching as much as possible, the intermediate frequency effective bandwidth is 500KHz, the suppression of the deviation from the center frequency ±800KHz is greater than 35dB, and the suppression of the deviation from the center frequency ±1.1MHz is greater than or equal to 40dB, so that each channel suppression circuit suppresses the intermediate frequency signal and the local oscillator signal by more than 40dB. Using a two-stage channel suppression circuit, the suppression at ±800KHz from the center frequency can be greater than 70dB, and the suppression at ±1.1MHz from the center frequency can be greater than 80dB.

[0047] The gain of the intermediate frequency channel signal compensation circuit 125 can be greater than 30 dB, which can compensate as much as possible for the influence of the insertion loss caused by the first channel suppression circuit 124, the second channel suppression circuit 126 and the mixing circuit 123 on the system performance.

[0048] Figure 3 The intermediate frequency baseband receiving module is a refinement of the local oscillator generating circuit 121. The local oscillator generating circuit 121 generates a local oscillator signal under the control of the clock signal output by the clock generating circuit 112. Figure 3As shown, the local oscillator generating circuit 121 may specifically include a phase-locked loop circuit 1211, a local oscillator amplifier circuit 1212, and a local oscillator filter circuit 1213 connected in sequence. The phase-locked loop circuit 1211 is connected to the clock generating circuit 112. The phase-locked loop circuit 1211 may also be connected to the clock generating circuit 112 via a clock filter amplifier circuit 116.

[0049] The local oscillator filter circuit 1213 is connected to the mixer circuit 123. The local oscillator filter circuit 1213 achieves high suppression of the received RF signal and the intermediate frequency signal after down-conversion, and its suppression can be greater than or equal to 40dB. The use of the local oscillator filter circuit 1213 with high suppression performance can reduce the influence of the spurious frequency points generated by the nonlinearity of the mixer circuit 123 on the receiving channel 120.

[0050] Each transmit channel 130 includes a transmit modulation module, Figure 4 Figure 1 is a schematic diagram of the composition of the transmit modulation module. Figure 4 As shown, the transmit modulation module includes a baseband I / Q impedance matching and out-of-band suppression circuit 131, a transmit I / Q modulation circuit 132, and an out-of-band suppression and gain compensation circuit 133, which are connected in sequence. The transmit I / Q modulation circuit 132 is connected to the clock generation circuit 112, and the transmit I / Q modulation circuit 132 can also be connected to the clock generation circuit 112 through the clock filter amplifier circuit 116. The out-of-band suppression and gain compensation circuit 133 is connected to the splitter and combiner 111, and the out-of-band suppression and gain compensation circuit 133 can also be connected to the splitter and combiner 111 through the splitter and combiner filter circuit 113.

[0051] The baseband I / Q impedance matching and out-of-band suppression circuit 131 mainly realizes low-pass out-of-band suppression and impedance matching of the baseband I / Q signal to be transmitted. The transmitting I / Q modulation circuit 132 realizes the conversion of the baseband I / Q signal to the intermediate frequency signal, as well as the up-conversion and automatic gain control of the intermediate frequency signal to the radio frequency signal. The transmitting I / Q modulation circuit 132 integrates an internal phase-locked loop and a voltage-controlled oscillator VCO. The transmitting I / Q modulation circuit 132 converts the baseband I / Q signal into an intermediate frequency signal under the control of the clock signal generated by the clock generation circuit 112 and filtered and amplified by the clock filter amplifier circuit 116. The out-of-band suppression and gain compensation circuit 133 mainly realizes the out-of-band spurious suppression and gain compensation of the transmitting channel 130.

[0052] like Figure 5 As shown, the signal receiving and transmitting processing device 100 provided in this embodiment can not only process satellite receiving signals and satellite transmitting signals, but also process ASK signals (ASK is "Amplitude Shift Keying", also known as "Amplitude Keying", which is equivalent to amplitude modulation in analog signals, except that the binary digits are multiplied by the carrier signal; the ASK signal is a signal modulated by the ASK modulation method), DC signals, etc.

[0053] In order to process the ASK signals received and transmitted, the satellite signal splitter and combiner module 110 also includes an ASK modulation and demodulation circuit 117 connected to the splitter and combiner 111, and the splitter and combiner 111 can be connected to the ASK modulation and demodulation circuit 117 through a satellite signal suppression circuit 118. The ASK modulation and demodulation circuit 117 can modulate and demodulate the ASK signal. The satellite signal suppression circuit 118 can suppress interference on the ASK signal before the ASK signal enters the ASK modulation and demodulation circuit 117 for demodulation; the satellite signal suppression circuit 118 can also suppress interference on the ASK signal after the ASK modulation and demodulation circuit 117 modulates the ASK signal and then sends it to the splitter and combiner 111 for combining, and finally transmits it through the antenna 200.

[0054] The ASK modulation and demodulation circuit 117 can be connected to the main control unit 300 , and the ASK signal demodulated by the ASK modulation and demodulation circuit 117 can be output to the main control unit 300 . The signal to be modulated output by the main control unit 300 can be modulated into an ASK signal by the ASK modulation and demodulation circuit 117 .

[0055] In order to process the DC signal to be transmitted, the satellite splitter / combiner module 110 further includes an isolation filter circuit 119 connected to the splitter / combiner 111 , and the isolation filter circuit 119 is used to receive the DC signal and isolate and filter the DC signal. The satellite signal suppression circuit 118 is connected to the isolation filter circuit 119 .

[0056] The isolation filter circuit 119 may be connected to the main control unit 300 , and the DC signal output by the main control unit 300 is isolated and filtered by the isolation filter circuit 119 .

[0057] Example 2

[0058] Based on the same inventive concept, on the basis of Embodiment 1, this embodiment further optimizes the intermediate frequency baseband receiving module in the receiving channel 120. Figure 6 As shown, the intermediate frequency baseband receiving module may also include a frequency conversion tuning circuit 127 and an adjustable low-pass filtering circuit 128 connected in sequence, the frequency conversion tuning circuit 127 is connected to the second channel suppression circuit 126, and the clock generating circuit 112 is connected to the frequency conversion tuning circuit 127.

[0059] The intermediate frequency signal after the two-stage channel suppression circuit directly enters the frequency conversion tuning circuit 127 in the intermediate frequency baseband receiving module to realize the conversion of the intermediate frequency signal to the baseband I / Q signal and automatic gain control, and is low-pass filtered through the adjustable low-pass filter circuit 128. The adjustable low-pass filter circuit 128 set here abandons the traditional idea of ​​performing adjustable filtering in the satellite receiving front end or intermediate frequency signal processing, but performs low-pass filtering on the simulated baseband I / Q signal, and the filtering bandwidth can be flexibly configured and adjusted as needed to achieve precise filtering. This processing method is combined with the above intermediate frequency channel signal compensation circuit 125, which plays an important role in reducing baseband noise power and improving anti-interference performance.

[0060] The frequency conversion tuning circuit 127 converts the intermediate frequency signal into a baseband I / Q signal under the control of the clock signal output by the clock generating circuit 112. The phase-locked loop circuit 1211 in the local oscillator generating circuit 121 and the frequency conversion tuning circuit 127 both need to receive the clock signal output by the clock generating circuit 112, so a clock shunt circuit 1214 can be provided, and the clock generating circuit 112 is connected to the phase-locked loop circuit 1211 in the local oscillator generating circuit 121 and the frequency conversion tuning circuit 127 through the clock shunt circuit 1214, respectively. The clock shunt circuit 1214 can generate two clock signals according to the clock signal output by the clock generating circuit 112, and provide them to the phase-locked loop circuit 1211 and the frequency conversion tuning circuit 127 respectively.

[0061] The intermediate frequency baseband receiving module may further include a baseband signal compensation circuit 129, which is connected to the adjustable low-pass filter circuit 128. The baseband signal compensation circuit 129 realizes the amplification of the baseband I / Q signal, thereby performing gain compensation and reducing the previous gain pressure. Specifically, to achieve gain control of the baseband I / Q signal, it is only necessary to change the gain adjustment resistor in the baseband signal compensation circuit 129.

[0062] As for the specific structure of the signal transceiver processing device 100, a cavity design can be adopted, and the transmitting channel 130 and the receiving channel 120 are shielded and isolated by the cavity, and different transmitting channels 130 and different receiving channels 120 can also be shielded and isolated by the cavity. In the receiving channel 120, the mixing circuit 123, the first channel suppression circuit 124, the intermediate frequency channel signal compensation circuit 125, the second channel suppression circuit 126 and the clock generation circuit 112 are arranged on a printed board, and the printed board is provided with a first layer, a second layer and an intermediate layer between the first layer and the second layer. The mixing circuit 123, the first channel suppression circuit 124, the intermediate frequency channel signal compensation circuit 125 and the second channel suppression circuit 126 are located on the first layer, the clock generation circuit 112 is located on the second layer, and the intermediate layer is hollowed out. The RF signal and the intermediate frequency signal are routed on the first layer, and the local oscillator signal is routed on the second layer. Each signal is physically isolated in space by crimping the printed circuit board with a cover plate. The crimping part uses a printed circuit board window processing method to avoid crosstalk between the RF signal, the local oscillator signal and the intermediate frequency signal. All RF signal routing can be processed by dense vias and grounding to minimize crosstalk between signals.

[0063] The receiving channel 120 and / or the transmitting channel 130 may be modularly designed, and different receiving channels 120 and different transmitting channels 130 may be powered independently. The phase-locked loop circuit 1211 of the local oscillator generating circuit 121 in the receiving channel 120 may be powered by a low dropout regulator (LDO).

[0064] Example 3

[0065] Based on the same inventive concept, this embodiment takes a signal transceiver processing device 100 having three receiving channels 120 and two transmitting channels 130 as an example for further description. Figure 7 As shown, the signal transceiver processing device 100 includes a satellite signal splitter and combiner module 110, three receiving channels 120 and two transmitting channels 130, which can process a total of five radio frequency signals, namely, satellite transmission signals, satellite reception signals, DC signals, ASK signals and satellite navigation signals. The satellite signal splitter and combiner module 110 may have three receiving interfaces RX1, RX2 and RX3 connected to the three receiving channels 120 respectively, transmitting interfaces TX1 and TX2 connected to the two transmitting channels 130 respectively, a clock interface CLK to transmit clock signals to the receiving channels 120 and the transmitting channels 130, and an interface BD_RX for connecting to the main control unit 300.

[0066] The antenna 200 to which the signal transceiver processing device 100 is connected may be a mobile communication antenna 201. The signal transceiver processing device 100 is connected to the mobile communication antenna 201 via a one-wire radio frequency cable. The mobile communication antenna 201 can be configured on various mobile carriers. When the carrier is moving, the mobile communication antenna 201 can automatically search, identify, lock and accurately track the synchronous orbit satellite in real time, maintain a reliable communication link with the satellite, and realize satellite communication in motion. The one-wire radio frequency cable is a radio frequency coaxial cable, which can be convenient for users to use and reduce the connection wiring between devices during use.

[0067] Figure 8 FIG. 1 is a schematic diagram of the composition of the satellite signal splitting and combining module 110 in the signal transceiver processing device 100. Figure 8 As shown, the satellite signal splitter and combiner module 110 includes a splitter and combiner 111 and a splitter and combiner filter circuit 113 that are interconnected. The splitter and combiner filter circuit 113 is connected to the receiving channel 120 through a satellite receiving amplifier circuit 1141, connected to the receiving channel 120 through a navigation receiving amplifier circuit 1142, and connected to each transmitting channel 130 through a transmitting amplifier circuit 115. Each receiving channel 120 and each transmitting channel 130 are respectively connected to a main control unit 300.

[0068] The satellite signal splitter / combiner module 110 further includes an ASK modulation / demodulation circuit 117 connected to the splitter / combiner 111, and the ASK modulation / demodulation circuit 117 is also connected to the main control unit 300. The splitter / combiner 111 can be connected to the ASK modulation / demodulation circuit 117 via a satellite signal suppression circuit 118, and the satellite signal suppression circuit 118 is also connected to the main control unit 300, and the satellite signal suppression circuit 118 can be connected to the main control unit 300 via an isolation filter circuit 119.

[0069] After receiving multiple RF signals, the mobile antenna 201 transmits the multiple RF signals to the splitter / combiner 111 through a single-line RF cable. The splitter / combiner 111 splits the multiple RF signals and filters them through the splitter / combiner filter circuit 113. The different types of RF signals received can be processed differently after filtering:

[0070] (1) The satellite reception signal filtered by the splitter / combiner filter circuit 113 can be output to the satellite reception amplifier circuit 1141 for amplification. The amplified satellite reception signal enters one of the receiving channels 120. The satellite reception amplifier circuit 1141 can compensate for the insertion loss of the satellite reception signal caused by the splitter / combiner path and the one-line connection.

[0071] (2) The satellite navigation signal filtered by the split-combination filter circuit 113 can be output to the navigation receiving amplifier circuit 1142 for amplification. The amplified satellite navigation signal enters another receiving channel 120. The navigation receiving amplifier circuit 1142 can compensate for the insertion loss of the satellite navigation signal caused by the split-combination path and the one-line connection.

[0072] (3) The ASK signal filtered by the separation and combination filter circuit 113 can be first filtered by the satellite signal suppression circuit 118 and then enter the ASK modulation and demodulation circuit 117 for demodulation. After the demodulated ASK signal is obtained, it is transmitted to the main control unit 300. The satellite signal suppression circuit 118 can ensure low loss of the ASK signal.

[0073] The satellite signal splitter / combiner module 110 also includes a clock generation circuit 112. The clock generation circuit 112 uses a highly stable, good phase noise constant temperature crystal oscillator, and provides stable clock signals for the three receiving channels 120 and the two transmitting channels 130. The clock generation circuit 112 is connected to the receiving channel 120 and the amplification channel through a clock filter amplifier circuit 116. The clock filter amplifier circuit 116 filters and amplifies the clock signals provided to the receiving channel 120 and the transmitting channel 130, and the harmonic suppression of the clock signal can be greater than or equal to 40dB.

[0074] The satellite signal splitting and combining module 110 also includes a power conversion circuit 101, which filters and converts the voltage DC signal input from the outside to obtain the voltage signal required by the signal transceiver processing device 100 to meet its power consumption requirements.

[0075] Each receiving channel 120 includes an intermediate frequency baseband receiving module, Figure 6 Figure 1 is a schematic diagram of the composition of the intermediate frequency baseband receiving module. Figure 6As shown, the intermediate frequency baseband receiving module includes a local oscillator generating circuit 121 and an out-of-band suppression circuit 122, a mixing circuit 123, a first channel suppression circuit 124, an intermediate frequency channel signal compensation circuit 125, a second channel suppression circuit 126, a variable frequency tuning circuit 127, an adjustable low-pass filter circuit 128 and a baseband signal compensation circuit 129 connected in sequence. Among them, the local oscillator generating circuit 121 includes a phase-locked loop circuit 1211, a local oscillator amplifier circuit 1212 and a local oscillator filter circuit 1213 connected in sequence, the clock generating circuit 112 is connected to the phase-locked loop circuit 1211 through the clock filter amplifier circuit 116 and the clock shunt circuit 1214 in sequence, the local oscillator filter circuit 1213 is connected to the mixing circuit 123, and the clock shunt circuit 1214 is also connected to the variable frequency tuning circuit 127. The splitter / combiner 111 is connected to the out-of-band suppression circuit 122 via the splitter / combiner filter circuit 113 , the satellite receiving amplifier circuit 1141 / the navigation receiving amplifier circuit 1142 in sequence, and the baseband signal compensation circuit 129 is connected to the main control unit 300 .

[0076] The insertion loss of the out-of-band suppression circuit 122 can be less than or equal to 1.5dB, and the suppression of 15MHz outside the passband is greater than or equal to 15dB. The insertion loss of the first channel suppression circuit 124 and the second channel suppression circuit 126 is preferably less than or equal to 1.5dB, the effective bandwidth of the intermediate frequency is 500KHz, the suppression of ±800KHz from the center frequency is greater than 35dB, and the suppression of ±1.1MHz from the center frequency is greater than or equal to 40dB, so that each channel suppression circuit suppresses the intermediate frequency signal and the local oscillator signal by more than 40dB. Using a two-stage channel suppression circuit, the suppression at ±800KHz from the center frequency can be greater than 70dB, and the suppression at ±1.1MHz from the center frequency can be greater than 80dB. The gain of the intermediate frequency channel signal compensation circuit 125 can be greater than 30dB. The suppression of the local oscillator filter circuit 1213 can be greater than or equal to 40dB.

[0077] like Figure 6 , Figure 8 As shown, the clock signal filtered and amplified by the clock filter amplifier circuit 116 is divided into two clock signals through the clock branch circuit 1214, and transmitted to the phase-locked loop circuit 1211 and the frequency conversion tuning circuit 127 respectively. The phase-locked loop circuit 1211 generates a local oscillator signal under the clock signal, and the local oscillator signal is amplified and filtered by the local oscillator amplifier circuit 1212 and the local oscillator filter circuit 1213 in sequence, and the amplified and filtered local oscillator signal is output to the mixer circuit 123.

[0078] The mobile antenna 201 can simultaneously receive three satellite reception signals / satellite navigation signals, which are divided by the splitter / combiner 111, filtered by the splitter / combiner filter circuit 113, and amplified by the satellite reception amplifier circuit 1141 / navigation reception amplifier circuit 1142, and then processed into baseband I / Q signals by the three receiving channels 120. The satellite reception signal / satellite navigation signal entering the receiving channel 120 first passes through the out-of-band suppression circuit 122 to improve the out-of-band anti-interference performance; then passes through the mixer circuit 123 to mix with the amplified and filtered local oscillator signal to obtain an intermediate frequency signal to achieve down-conversion of the radio frequency signal; the intermediate frequency signal can pass through the first channel suppression circuit 124 and the second channel suppression circuit 126 to achieve narrowband anti-interference performance, and can well suppress the near end and far end of the signal; between the first channel suppression circuit 124 and the second channel suppression circuit 126, the intermediate frequency channel signal compensation circuit 125 is also used to compensate for the insertion loss of the intermediate frequency signal.

[0079] The second channel suppression circuit 126 outputs the intermediate frequency signal to the variable frequency tuning circuit 127, and the variable frequency tuning circuit 127 converts the intermediate frequency signal into a baseband I / Q signal under the control of the clock signal; the baseband I / Q signal is then low-pass filtered by an adjustable low-pass filter circuit 128; the baseband I / Q signal after low-pass filtering is gain compensated by a baseband signal compensation circuit 129 to achieve gain control of the baseband I / Q; finally, the baseband I / Q signal after gain compensation is output to the main control unit 300.

[0080] Each transmit channel 130 includes a transmit modulation module, Figure 4 This is a schematic diagram of the composition of the transmission modulation module. Figure 4 As shown, the transmission modulation module includes a baseband I / Q impedance matching and out-of-band suppression circuit 131, a transmission I / Q modulation circuit 132, and an out-of-band suppression and gain compensation circuit 133, which are connected in sequence. The clock generation circuit 112 is connected to the transmission I / Q modulation circuit 132, and the separation and combination filter circuit 113 is connected to the out-of-band suppression and gain compensation circuit 133. The baseband I / Q impedance matching and out-of-band suppression circuit 131 mainly realizes low-pass out-of-band suppression and impedance matching of the baseband I / Q signal to be transmitted, and the transmission I / Q modulation circuit 132 realizes the conversion of the baseband I / Q signal to the intermediate frequency signal, as well as the up-conversion and automatic gain control of the intermediate frequency signal to the radio frequency signal. The transmission I / Q modulation circuit 132 integrates an internal phase-locked loop and a voltage-controlled oscillator VCO. The out-of-band suppression and gain compensation circuit 133 mainly realizes the out-of-band spurious suppression and gain compensation of the transmission channel 130.

[0081] like Figure 4 , Figure 8As shown, the main control unit 300 transmits the baseband I / Q signal to be transmitted to the transmission channel 130, which is processed into a satellite transmission signal by the transmission channel 130. The main control unit 300 can transmit two baseband I / Q signals at the same time, which are processed into satellite transmission signals by two transmission channels 130 respectively. The baseband I / Q signal after entering the transmission channel 130 first passes through the baseband I / Q impedance matching and out-of-band suppression circuit 131 for low-pass out-of-band suppression and impedance matching; then it is converted into an intermediate frequency signal through the transmission I / Q modulation circuit 132, and up-converted into a satellite transmission signal; the satellite transmission signal is output to the satellite transmission amplifier circuit 1151 for amplification, and the amplified satellite transmission signal is filtered by the separation and combination filter circuit 113; the satellite transmission signals output by different transmission channels 130 are combined by the separation and combination device 111, and the combined satellite transmission signal is transmitted to the mobile antenna 201 through a one-line radio frequency cable, and is transmitted by the mobile antenna 201.

[0082] The main control unit 300 can also output an ASK signal, which enters the ASK modulation and demodulation circuit 117 for modulation to obtain a modulated ASK signal, and then is filtered by the satellite signal suppression circuit 118. Finally, the ASK signal is combined with other satellite transmission signals (if any) and / or DC signals (if any) through a combiner and then transmitted through the moving antenna 201.

[0083] The main control unit 300 can also output a DC signal. After the DC signal enters the isolation filter circuit 119 for filtering, it enters the satellite signal suppression circuit 118 for further filtering, and finally passes through a combiner to combine with other satellite transmission signals (if any) and / or ASK signals (if any) and then is transmitted through the moving antenna 201.

[0084] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the technical solution of the present invention, and are not intended to limit the specific implementation methods of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the claims of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. A signal transceiver processing device based on satellite communication, used for processing multi-channel radio frequency signals received and transmitted by an antenna, characterized in that: The device comprises a satellite signal splitting and combining module, a plurality of receiving channels and a plurality of transmitting channels; The satellite signal splitter and combiner module comprises a splitter and combiner and a clock generating circuit; the splitter and combiner are respectively connected to the receiving channel and the transmitting channel, and splits and combines the multi-channel radio frequency signals; The clock generating circuit is connected to the receiving channel and the transmitting channel respectively, and provides clock signals for the receiving channel and the transmitting channel; Each of the receiving channels comprises an intermediate frequency baseband receiving module, the intermediate frequency baseband receiving module comprises a local oscillator generating circuit and an out-of-band suppression circuit, a mixing circuit, a first channel suppression circuit, an intermediate frequency channel signal compensation circuit, and a second channel suppression circuit connected in sequence, the clock generating circuit is connected to the local oscillator generating circuit, the local oscillator generating circuit is connected to the mixing circuit, and the splitter / combiner is connected to the out-of-band suppression circuit; The intermediate frequency signal passes through the first channel suppression circuit and the second channel suppression circuit to achieve narrowband anti-interference performance; between the first channel suppression circuit and the second channel suppression circuit, the intermediate frequency signal insertion loss is compensated by the intermediate frequency channel signal compensation circuit; the satellite splitter and combiner module also includes an ASK modulation and demodulation circuit and / or an isolation filter circuit, the ASK modulation and demodulation circuit is used to modulate and demodulate the ASK signal, the isolation filter circuit is used to receive a DC signal and isolate and filter the DC signal, the splitter and combiner is connected to the ASK modulation and demodulation circuit, and the splitter and combiner is connected to the isolation filter circuit; The intermediate frequency baseband receiving module also includes a frequency conversion tuning circuit and an adjustable low-pass filtering circuit connected in sequence, the frequency conversion tuning circuit is connected to the second channel suppression circuit, and the clock generating circuit is connected to the frequency conversion tuning circuit; The intermediate frequency baseband receiving module further includes a baseband signal compensation circuit, and the baseband signal compensation circuit is connected to the adjustable low-pass filter circuit.

2. A signal transceiver processing device based on satellite communication according to claim 1, characterized in that: The effective passband bandwidth of the first channel suppression circuit and the second channel suppression circuit is 500KHz; The suppression of the first channel suppression circuit and the second channel suppression circuit deviating from the center frequency ±800KHz is greater than or equal to 35dB, and / or the suppression deviating from the center frequency ±1.1MHz is greater than or equal to 40dB; Insertion losses of the first channel suppression circuit and the second channel suppression circuit are less than or equal to 1.5 dB.

3. The signal transceiver processing device based on satellite communication according to claim 1, characterized in that: The gain of the intermediate frequency channel signal compensation circuit is greater than or equal to 30 dB.

4. The signal transceiver processing device based on satellite communication according to claim 1, characterized in that: The out-of-band suppression circuit has a suppression of greater than or equal to 15 dB outside the passband at a distance of 15 MHz from the passband, and an insertion loss of less than or equal to 1.5 dB.

5. A signal transceiver processing device based on satellite communication according to any one of claims 1 to 4, characterized in that: Each of the transmitting channels includes a transmitting modulation module, which includes a baseband I / Q impedance matching and out-of-band suppression circuit, a transmitting I / Q modulation circuit, and an out-of-band suppression and gain compensation circuit connected in sequence. The clock generating circuit is connected to the transmitting I / Q modulation circuit, and the splitter / combiner is connected to the out-of-band suppression and gain compensation circuit.

6. A signal transceiver processing device based on satellite communication according to any one of claims 1 to 4, characterized in that: The splitter / combiner is connected to the receiving channel and the transmitting channel respectively through a splitter / combiner filter circuit, and the splitter / combiner filter circuit filters the multi-path RF signals; and / or the clock generating circuit is connected to the receiving channel and the transmitting channel respectively through a clock filter amplifier circuit, and the clock filter amplifier circuit filters and amplifies the clock signals provided to the receiving channel and the transmitting channel.

7. A signal transceiver processing device based on satellite communication according to any one of claims 1 to 4, characterized in that: The out-of-band suppression circuit, the mixing circuit, the first channel suppression circuit, the intermediate frequency channel signal compensation circuit, the second channel suppression circuit and the local oscillator generating circuit are arranged on a printed board, and the printed board is provided with a first layer, a second layer and an intermediate layer located between the first layer and the second layer; the out-of-band suppression circuit, the mixing circuit, the first channel suppression circuit, the intermediate frequency channel signal compensation circuit and the second channel suppression circuit are located on the first layer, the local oscillator generating circuit is located on the second layer, and the intermediate layer is provided with a hollow.

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