Timeout verification method, device, equipment and storage medium

Abstract

The embodiment of the present invention proposes a timeout verification method, device, equipment and storage medium, which relates to the field of controller testing technology; it can automatically and accurately verify the timeout time of the controller detecting the lost message. The tester applied to the timeout verification system executes the timeout verification process multiple times, including: sending test messages to the controller to be diagnosed with different message periods; according to the message period corresponding to the target test message detected by the controller to be diagnosed, verifying the timeout time of the controller to be diagnosed detecting the lost message.

Description

[Technical field]

[0001] Embodiments of the present invention relate to the field of controller testing technology, and in particular to a timeout verification method, device, equipment and storage medium. [Background technology]

[0002] With the trend of intelligence and electrification, various controllers are widely used in automobiles. In order to ensure the normal transmission and reception of messages of vehicle network nodes and normal communication of vehicle buses, the relevant fields use diagnostic specifications to detect whether there are faults such as node loss in the vehicle. Therefore, it is necessary to detect whether the message transmission and reception of the controller to be applied to the vehicle is normal, and verify the timeout time for the controller to detect the loss of messages, so as to confirm that the controller can detect the existence of the fault within the specified time and report the corresponding fault code.

[0003] Currently, there are only a few means to verify the timeout period for the controller to detect lost messages. There are some problems that the timeout period cannot be accurately determined, and there is a lack of automated testing methods. [Summary of the invention]

[0004] The embodiments of the present application provide a timeout verification method, apparatus, device and storage medium, which can automatically and accurately verify the timeout time for a controller to detect lost messages.

[0005] In a first aspect, an embodiment of the present invention provides a timeout verification method, which is applied to a tester of a timeout verification system. The method executes a timeout verification process multiple times, including: sending test messages to a controller to be diagnosed with different message periods; and verifying the timeout time of the controller to be diagnosed detecting the lost message according to the message period corresponding to the target test message lost detected by the controller to be diagnosed.

[0006] The embodiment of the present application sets up a timeout verification system for verifying the timeout time of the controller, and sends test messages to the controller to be diagnosed in different periods through a tester to obtain the cycle time corresponding to the lost target test message detected by the controller to be diagnosed, and measures the time when the controller to be diagnosed detects the lost message through the cycle time corresponding to the lost target test message detected by the controller to be diagnosed; the above-mentioned method of verifying the timeout time is automatically implemented by sending a message to the controller to be diagnosed by the tester, and the timeout time of the controller detecting the lost message is automatically and accurately verified, thereby reducing the test time and ensuring the completeness of the test coverage.

[0007] In one possible implementation, sending test messages to the controller to be diagnosed at different message periods includes:

[0008] The test message is sent to the controller to be diagnosed for the Nth time in a target cycle; the target cycle is obtained by superimposing the preset time length N-1 times with the cycle to be detected as the initial cycle;

[0009] When it is read that the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time, the time corresponding to the target cycle is output;

[0010] According to the message period corresponding to the target test message lost by the controller to be diagnosed, the timeout time for the controller to be diagnosed to detect the lost message is verified, including:

[0011] The timeout time for the controller to be diagnosed to detect lost messages is verified according to the time corresponding to the target cycle.

[0012] In one possible implementation, when the fault code output by the controller to be diagnosed for the loss of the test message sent for the Nth time is not read, a preset time length is added to the target cycle, and the test message is sent to the controller to be diagnosed for the N+1th time.

[0013] In one possible implementation, according to the message period corresponding to the target test message lost by the controller to be diagnosed, verifying the timeout time for the controller to be diagnosed to detect the lost message includes:

[0014] When the controller to be diagnosed detects that the corresponding message cycle of the lost target test message is within the error range of the cycle to be diagnosed, it is verified that the timeout time of the lost message detected by the controller to be diagnosed is within the loss time range corresponding to the cycle to be diagnosed, and it is determined that the timeout time of the controller to be diagnosed is normal.

[0015] In one possible implementation, according to the message period corresponding to the target test message lost by the controller to be diagnosed, verifying the timeout time for the controller to be diagnosed to detect the lost message includes:

[0016] When the controller to be diagnosed detects that the message period corresponding to the lost target test message is not within the error range of the period to be diagnosed, it is determined that the timeout period of the controller to be diagnosed is abnormal.

[0017] In one possible implementation, the timeout verification system further includes a programmable power supply, and each time the timeout verification process is performed, before sending a test message to the controller to be diagnosed in different message cycles, it also includes:

[0018] Controlling the programmable power supply to power on and clearing historical fault codes;

[0019] After verifying the timeout time for the controller to be diagnosed to detect the lost message according to the message period corresponding to the target test message lost by the controller to be diagnosed, the method further includes:

[0020] Recording the result of the timeout verification of the controller to be diagnosed detecting the lost message;

[0021] Controlling the programmable power supply to power off;

[0022] After performing the timeout verification multiple times, the timeout verification result of detecting the lost message of the controller to be diagnosed is checked.

[0023] In a second aspect, an embodiment of the present invention provides a timeout verification device, which is provided in an electronic device, and the device includes:

[0024] A message sending module, used for sending test messages to the controller to be diagnosed at different message cycles;

[0025] The verification module is used to verify the timeout period of the controller to be diagnosed detecting the lost message according to the message period corresponding to the target test message detected lost by the controller to be diagnosed.

[0026] In one possible implementation, the message sending module includes:

[0027] A periodic sending submodule, used for sending the test message to the controller to be diagnosed for the Nth time in a target period; the target period is obtained by superimposing the preset time length N-1 times with the period to be detected as the initial period;

[0028] A reading submodule, configured to output a time corresponding to the target cycle when it is read that the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time;

[0029] The verification module is specifically used to verify the timeout time of the controller to be diagnosed detecting the lost message according to the time corresponding to the target cycle.

[0030] In one possible implementation, the reading submodule is also used to increase a preset time length for the target cycle and send the test message to the controller to be diagnosed for the N+1th time when the controller to be diagnosed fails to read the fault code output for the lost test message sent for the Nth time.

[0031] In one possible implementation, the verification module is specifically used to verify that the timeout time of the lost message detected by the controller to be diagnosed is within the loss time range corresponding to the cycle to be diagnosed when the message cycle corresponding to the lost target test message detected by the controller to be diagnosed is within the error range of the cycle to be diagnosed, and determine that the timeout time of the controller to be diagnosed is normal.

[0032] In one possible implementation, the verification module is further configured to determine that a timeout period of the controller to be diagnosed is abnormal when the controller to be diagnosed detects that a message period corresponding to a lost target test message is not within an error range of a period to be diagnosed.

[0033] In one possible implementation, the timeout verification system further includes a programmable power supply; the device further includes:

[0034] Clear the module and clear the historical fault codes;

[0035] A power control module is used to control the programmable power supply to power on before sending a test message to the controller to be diagnosed at different message periods during each timeout verification process; and to control the programmable power supply to power off after verifying the timeout time for the controller to be diagnosed to detect the lost message according to the message period corresponding to the target test message lost by the controller to be diagnosed;

[0036] A recording module, used for recording the result of the timeout time verification of the controller to be diagnosed detecting the lost message during each execution of the timeout time verification process;

[0037] The checking module is used to check the timeout verification result of detecting the lost message of the controller to be diagnosed after executing the timeout verification multiple times.

[0038] In a third aspect, an embodiment of the present invention provides a device, comprising at least one processor; and at least one memory communicatively connected to the processor, characterized in that the device is connected to a tester, the memory stores program instructions executable by the processor, and the processor calls the program instructions to execute the method provided in the first aspect.

[0039] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions enable the computer to execute the method provided in the first aspect.

[0040] It should be understood that the second to fourth aspects of the embodiments of the present invention are consistent with the technical solutions of the first aspect of the embodiments of the present invention, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be described in detail.

Brief Description of the Drawings

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 It is a flowchart of the timeout verification method steps proposed in the embodiment of the present application;

[0043] Figure 2 This is a schematic diagram of the structure of a timeout verification system in an example of the present application;

[0044] Figure 3 This is a flowchart of the timeout verification method steps proposed in another embodiment of the present application;

[0045] Figure 4 It is a structural diagram of a timeout verification system in another example of the present application;

[0046] Figure 5 is an information flow chart of another exemplary execution timeout verification method of the present application;

[0047] Figure 6 This is a functional module diagram of the timeout verification device proposed in an embodiment of the present invention.

[0048] Figure 7 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. [Specific implementation method]

[0049] In order to better understand the technical solution of this specification, the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0050] It should be clear that the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this specification.

[0051] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit this specification. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0052] Figure 1 is a flowchart of the timeout verification method steps proposed in the embodiment of the present application, such as Figure 1 As shown, the timeout verification includes the following steps:

[0053] S11: The tester sends test messages to the controller to be diagnosed in different message cycles.

[0054] In order to realize automatic verification of the timeout time of the controller to detect the lost message, the embodiment of the present application constructs a timeout time verification system, and the timeout time verification system includes a tester and a controller to be diagnosed.

[0055] The controller to be diagnosed can be any controller in various control systems of the whole vehicle. After completing various tests, the controller is installed in the vehicle, and as different nodes of the whole vehicle system, it collaborates to complete different instructions in operation. For example, the controller to be diagnosed can include at least one of the following: vehicle controller VCU, automatic transmission controller TCU, body control unit BCM, electric power steering system electronic control unit EPS, steering wheel angle sensor SAS, etc., which is not limited in the embodiments of this application.

[0056] The embodiment of the present application is aimed at any controller that detects that it cannot normally receive messages, and can automatically verify whether the controller that cannot receive messages can normally report a fault in the case of lost messages.

[0057] The tester can be a device that can implement simulation test functions. In one example of the present application, the tester is a bus simulation test device (CAN open environment, CANoe), Figure 2 is a schematic diagram of the structure of a timeout verification system in an example of the present application, such as Figure 2 As shown, the hardware part VN1640 of the tester CANoe is connected to the controller to be diagnosed DUT through CAN_H and CAN_L; CANoe can run relevant programs to simulate the messages that the controller to be diagnosed will receive in the whole vehicle, and send them to the controller to be diagnosed as test messages to verify whether the controller to be diagnosed can report the fault code in the case of message loss within the specified time range.

[0058] Step S12: the tester verifies the timeout period of the controller to be diagnosed for detecting lost messages according to the message period corresponding to the target test message lost by the controller to be diagnosed.

[0059] For example, the tester sends message A, message B, and message C to the controller to be diagnosed. The fault code given by the controller to be diagnosed corresponds to message B. Message B is the target test message detected to be lost by the controller to be diagnosed, indicating that the controller to be diagnosed cannot detect the loss of messages A and C.

[0060] Since the controller to be diagnosed that can normally detect message loss can detect message loss in N times the detection period, it is possible to infer whether the controller to be diagnosed can detect message loss within a predetermined range through the corresponding period of the lost message detected by the controller to be diagnosed.

[0061] If the controller to be diagnosed can report the fault code of the lost test message within the predetermined range, that is, the controller to be diagnosed can read the fault code, it means that the timeout time for the controller to be diagnosed to detect the lost message is normal; if the controller to be diagnosed cannot report the fault code of the lost test message within the predetermined range, it means that the timeout time for the controller to be diagnosed to detect the lost message is abnormal. Since the limited time range for measuring whether the timeout time is normal is related to the period of the message, the embodiment of the present application uses a tester to simulate the test message and send it to the controller to be diagnosed, so as to deduce the timeout time according to the period of the message in which the controller to be diagnosed can report the fault code, thereby realizing automatic verification of the timeout time.

[0062] For example, the message cycle received by the controller to be diagnosed in normal state is T, and the controller to be diagnosed needs to report a fault code for the lost message within NT; the tester sends multiple test messages of different cycles to the controller to be diagnosed, and the lost message corresponding to the fault code reported by the controller to be diagnosed is test message Q, and the cycle corresponding to test message Q is T+t. The controller to be diagnosed calculates N(T+t)-NT>2N, and the controller to be diagnosed can determine and verify that the timeout time for the controller to be diagnosed to detect the lost message is abnormal.

[0063] Furthermore, the embodiment of the present application also proposes an implementation method of verifying the timeout time for the controller to be diagnosed to detect lost messages according to the message period corresponding to the target test message lost detected by the controller to be diagnosed;

[0064] By determining whether a message period corresponding to a target test message detected as lost by the controller to be diagnosed is within an error range, a timeout period for the controller to be diagnosed to detect lost messages is verified.

[0065] When the controller to be diagnosed detects that the corresponding message cycle of the lost target test message is within the error range of the cycle to be diagnosed, it is verified that the timeout time of the lost message detected by the controller to be diagnosed is within the loss time range corresponding to the cycle to be diagnosed, and it is determined that the timeout time of the controller to be diagnosed is normal.

[0066] When the controller to be diagnosed detects that the message period corresponding to the lost target test message is not within the error range of the period to be diagnosed, it is determined that the timeout period of the controller to be diagnosed is abnormal.

[0067] Among them, the error range of the message cycle can be obtained by the standard timeout time corresponding to the cycle to be detected. For example, when the controller to be diagnosed participates in the operation of the whole vehicle, it will receive a message with a period of T. In the timeout time verification of the controller to be diagnosed, the period to be detected can be T. According to the vehicle communication protocol, the controller to be diagnosed needs to detect the message loss within NT time during the operation of the whole vehicle. It can be determined that the loss time range corresponding to the cycle to be diagnosed is (N-1)T to (N+1)T; accordingly, it can be determined that the error range of the cycle to be diagnosed can be (N-1)T / N to (N+1)T / N.

[0068] Figure 3 is a flowchart of the timeout verification method steps proposed in another embodiment of the present application, such as Figure 3 As shown, the steps include:

[0069] S31: Sending the test message to the controller to be diagnosed for the Nth time at a target period.

[0070] The target period is obtained by superimposing the preset time length N-1 times with the period to be detected as the initial period. The superposition of the preset time length N-1 times with the period to be detected as the initial period indicates that the period of sending the test message for the Nth time is obtained by adding the preset time length to the period of sending the test message for the N-1th time.

[0071] The preset time length may be set according to the initial period, for example, may be one percent of the initial period.

[0072] In one embodiment of the present invention, the tester can implement "sending test messages to the controller to be diagnosed in different message periods" by gradually increasing the message period.

[0073] For example, the controller to be diagnosed will receive a message with a period of T in the whole vehicle. T can be used as the initial period. The tester can send a message with a period of T to the controller to be diagnosed for the first time, increase the period of the message for the second time with a step size of 0.05T, and send a message with a period of T+0.05T to the controller to be diagnosed. Increase the period of the message for the third time with a step size of 0.05T, and send a message with a period of T+0.1T to the controller to be diagnosed, and so on. If the fault code is read, no test message is sent to the controller to be diagnosed, and the current period is output. If the fault code is not read, continue to increase the time based on the last test message period with a step size of 0.05T to obtain a new period, and send test messages with the new period until the fault code output by the controller to be diagnosed is read.

[0074] S32: When the tester reads the fault code output by the controller to be diagnosed for the loss of the test message sent for the Nth time, the time corresponding to the target cycle is output, and the timeout time for the controller to be diagnosed to detect the loss of the message is verified according to the time corresponding to the target cycle.

[0075] The tester reads the fault code, indicating that the controller to be diagnosed has detected the message loss, and can then verify the timeout period for the controller to be diagnosed to detect the message loss, that is, verify how long the controller to be diagnosed can detect the message loss.

[0076] S33: When the fault code output by the controller to be diagnosed for the loss of the test message sent for the Nth time is not read, a preset time length is added to the target cycle, and the test message is sent to the controller to be diagnosed for the N+1th time.

[0077] The tester did not read the fault code, which means that the controller to be diagnosed did not detect the message loss, and it is necessary to continue sending test messages to the controller to be diagnosed. Since the controller to be diagnosed did not detect the message sent for the Nth time with the target cycle, the message sending cycle is modified based on the target cycle, and the new cycle is used to test the time when the controller to be diagnosed can detect the lost message.

[0078] Therefore, when the fault code output by the controller to be diagnosed for the lost test message sent for the Nth time is not read, the preset time length is increased for the target cycle, and the test message is sent to the controller to be diagnosed for the N+1th time in the new cycle obtained by increasing the preset time length to the target cycle.

[0079] The embodiment of the present invention also proposes that the timeout verification process can be executed multiple times, the timeout time for the controller to be diagnosed to detect message loss can be verified multiple times, and the results of the multiple verifications of the timeout time for the controller to be diagnosed to detect message loss can be checked to ensure the accuracy of the timeout verification.

[0080] The timeout verification system also includes a program-controlled power supply;

[0081] Each timeout verification process is performed, before sending a test message to the controller to be diagnosed in different message cycles, it also includes:

[0082] Control the programmable power supply to power on and clear historical fault codes.

[0083] Automatic switching of each execution timeout verification process is achieved by controlling the programmable power supply; after each power-on, the historical fault code is cleared to ensure that the lost target message can be accurately obtained by reading the fault code, thereby accurately obtaining the time when the controller to be diagnosed detects the message loss.

[0084] After verifying the timeout time for the controller to be diagnosed to detect the lost message according to the message period corresponding to the target test message lost by the controller to be diagnosed, the method further includes:

[0085] Recording the result of the timeout verification of the controller to be diagnosed detecting the lost message;

[0086] Controlling the programmable power supply to power off;

[0087] After performing the timeout verification multiple times, the timeout verification result of detecting the lost message of the controller to be diagnosed is checked.

[0088] Figure 4 is a schematic diagram of the structure of a timeout verification system in another example of the present application, such as Figure 4 As shown, the tester is connected to the programmable power supply via USB, the tester is connected to the controller to be diagnosed via CAN_H and CAN_L, and the controller to be diagnosed is connected to the programmable power supply via K15 and K30.

[0089] Figure 5 is another example of an information flow chart of a timeout verification method of the present application, such as Figure 5 As shown, based on Figure 4 The timeout verification system shown, the tester performs the timeout verification method including the following steps:

[0090] K11: The tester controls the programmable power supply to power on and clears the historical fault codes of the controller to be diagnosed.

[0091] K12: The tester simulates a message with a period of T and sends it to the controller to be diagnosed.

[0092] K13: Determine whether the fault code of the lost message is read from the controller to be diagnosed.

[0093] K14: Read the fault code output by the controller to be diagnosed, and output the corresponding message period T. By calculating that the period T of the lost message detected by the controller to be diagnosed is within the predetermined time range (9T / 10-11T / 10), it is verified that the timeout time of the lost message detected by the controller to be diagnosed is normal.

[0094] K15: The fault code output by the controller to be diagnosed is not read, the message period is increased by 0.05T, and a message with a simulation period of T+0.05T is sent to the controller to be diagnosed.

[0095] K16: Determine whether the fault code of the lost message is read from the controller to be diagnosed.

[0096] K17: Read the fault code output by the controller to be diagnosed, and output the period of the corresponding message T+0.05T. By calculating that the period T of the controller to be diagnosed detecting the lost message is within the predetermined time range (9T / 10-11T / 10), verify that the timeout time for the controller to be diagnosed to detect the lost message is normal. For example, if the period of the test message is 20ms, the controller to be diagnosed is required to report the corresponding fault code within 180ms-220ms. If the fault code is not reported, or the fault code is reported in advance, the timeout time verification fails.

[0097] K18: If the fault code output by the controller to be diagnosed is not read, increase the message cycle by 0.05T, simulate a message with a cycle of T+0.1T, and send it to the controller to be diagnosed. Repeat part of steps K13 to K15: determine whether the fault code of the lost message is read from the controller to be diagnosed, read the fault code output by the controller to be diagnosed, and output the corresponding message cycle; if the fault code output by the controller to be diagnosed is not read, increase the message cycle by 0.05T, and continue to simulate sending messages to the controller to be diagnosed until the fault code output by the controller to be diagnosed is read.

[0098] K19: Records the timeout verification result of the controller to be diagnosed detecting lost messages.

[0099] K20: The tester controls the programmable power supply to power off.

[0100] Figure 6 is a functional module diagram of a timeout verification device proposed in an embodiment of the present invention. The timeout verification device is arranged in an electronic device, such as Figure 6 As shown, the device comprises:

[0101] The electronic device may be a computer, an integrated computer, etc.

[0102] The message sending module 61 is used to send test messages to the controller to be diagnosed at different message periods;

[0103] The verification module 62 is used to verify the timeout period of the controller to be diagnosed detecting the lost message according to the message period corresponding to the target test message detected as lost by the controller to be diagnosed.

[0104] Figure 6 The timeout verification device provided in the embodiment shown can be used to implement the present invention Figures 1 to 5 The technical solution of the method embodiment shown, its implementation principle and technical effects can be further referred to the relevant description in the method embodiment.

[0105] Optionally, the message sending module includes:

[0106] A periodic sending submodule, used for sending the test message to the controller to be diagnosed for the Nth time in a target period; the target period is obtained by superimposing the preset time length N-1 times with the period to be detected as the initial period;

[0107] A reading submodule, configured to output a time corresponding to the target cycle when it is read that the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time;

[0108] The verification module is specifically used to verify the timeout time of the controller to be diagnosed detecting the lost message according to the time corresponding to the target cycle.

[0109] Optionally, the reading submodule is further used to increase a preset time length for the target cycle and send the test message to the controller to be diagnosed for the N+1th time when the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time.

[0110] Optionally, the verification module is specifically used to verify that when the controller to be diagnosed detects that the message period corresponding to the lost target test message is within the error range of the period to be diagnosed, the timeout time of the lost message detected by the controller to be diagnosed is within the loss time range corresponding to the period to be diagnosed, and determine that the timeout time of the controller to be diagnosed is normal.

[0111] Optionally, the verification module is further configured to determine that a timeout period of the controller to be diagnosed is abnormal when the controller to be diagnosed detects that a message period corresponding to a lost target test message is not within an error range of a period to be diagnosed.

[0112] Optionally, the timeout verification system further includes a programmable power supply; the device further includes:

[0113] Clear the module and clear the historical fault codes;

[0114] A power control module is used to control the programmable power supply to power on before sending a test message to the controller to be diagnosed at different message periods during each timeout verification process; and to control the programmable power supply to power off after verifying the timeout time for the controller to be diagnosed to detect the lost message according to the message period corresponding to the target test message lost by the controller to be diagnosed;

[0115] A recording module, used for recording the result of the timeout time verification of the controller to be diagnosed detecting the lost message during each execution of the timeout time verification process;

[0116] The checking module is used to check the timeout verification result of detecting the lost message of the controller to be diagnosed after executing the timeout verification multiple times.

[0117] The device provided in the above-mentioned embodiment is used to execute the technical solution of the above-mentioned method embodiment. Its implementation principle and technical effect can be further referred to the relevant description in the method embodiment, which will not be repeated here.

[0118] The device provided in the above embodiment can be, for example, a chip or a chip module. The device provided in the above embodiment is used to execute the technical solution of the above method embodiment. Its implementation principle and technical effect can be further referred to the relevant description in the method embodiment, which will not be repeated here.

[0119] Regarding the various modules / units included in the various devices described in the above embodiments, they can be software modules / units, or hardware modules / units, or they can be partially software modules / units and partially hardware modules / units. For example, for various devices applied to or integrated in a chip, the various modules / units included therein can all be implemented in the form of hardware such as circuits, or at least some of the modules / units can be implemented in the form of software programs, which run on a processor integrated inside the chip, and the remaining modules / units can be implemented in the form of hardware such as circuits; for various devices applied to or integrated in a chip module, the various modules / units included therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component of the chip module (such as a chip, circuit module, etc.) or in different components, or at least some of the modules / units can be implemented in the form of software programs. The software program may be implemented in the form of a program, which runs on a processor integrated in the chip module, and the remaining modules / units may be implemented in the form of hardware such as circuits; for each device applied to or integrated in the electronic terminal device, each module / unit contained therein may be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (for example, a chip, a circuit module, etc.) or in different components in the electronic terminal device, or at least some modules / units may be implemented in the form of a software program, which runs on a processor integrated in the electronic terminal device, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits.

[0120] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present invention, the electronic device 700 includes a processor 710, a memory 711, and a computer program stored in the memory 711 and executable on the processor 710. When the processor 710 executes the program, the steps in the aforementioned method embodiment are implemented. The electronic device provided in the embodiment can be used to execute the technical solution of the method embodiment shown above. The implementation principle and technical effects thereof can be further referred to the relevant description in the method embodiment, which will not be repeated here.

[0121] An embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions enable the computer to execute the present specification. Figure 1 to Figure 5 The embodiment shown provides a timeout verification method. The computer-readable storage medium may refer to a non-volatile computer storage medium.

[0122] The above-mentioned computer-readable storage medium can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, - but not limited to - an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it.

[0123] Computer-readable signal media may include a data signal propagated in baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including, but not limited to, electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0124] The program code embodied on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wire, optical cable, radio frequency (RF), etc., or any suitable combination of the foregoing.

[0125] Computer program code for performing the operations of the present specification may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0126] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0127] In the description of the embodiments of the present invention, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of this specification. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0128] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this specification, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0129] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of this specification includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of this specification belong.

[0130] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0131] It should be noted that the terminals involved in the embodiments of the present invention may include but are not limited to personal computers (PCs), personal digital assistants (PDAs), wireless handheld devices, tablet computers, mobile phones, MP3 players, MP4 players, etc.

[0132] In the several embodiments provided in this specification, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0133] In addition, each functional unit in each embodiment of this specification may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0134] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform some steps of the method described in each embodiment of this specification. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.

[0135] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A timeout verification method, characterized in that: A tester applied to a timeout verification system, the method performs a timeout verification process multiple times, including: Sending test messages to the controller to be diagnosed at different message cycles, wherein the controller to be diagnosed is any controller in various control systems of the vehicle; Verifying a timeout period for detecting lost messages by the controller to be diagnosed according to a message period corresponding to the target test message lost by the controller to be diagnosed; According to the message period corresponding to the target test message lost by the controller to be diagnosed, the timeout time for the controller to be diagnosed to detect the lost message is verified, including: When the difference between N times the message period corresponding to the lost target test message detected by the controller to be diagnosed and N times the message period received when the controller to be diagnosed is normal is greater than a set threshold, it is determined that the timeout time for the controller to be diagnosed to detect the lost message is abnormal.

2. The method according to claim 1, characterized in that Send test messages to the controller to be diagnosed at different message cycles, including: The test message is sent to the controller to be diagnosed for the Nth time in a target cycle; the target cycle is obtained by superimposing the preset time length N-1 times with the cycle to be detected as the initial cycle; When it is read that the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time, the time corresponding to the target cycle is output; According to the message period corresponding to the target test message lost by the controller to be diagnosed, the timeout time for the controller to be diagnosed to detect the lost message is verified, including: The timeout time for the controller to be diagnosed to detect lost messages is verified according to the time corresponding to the target cycle.

3. The method according to claim 2, characterized in that When the fault code output by the controller to be diagnosed for the loss of the test message sent for the Nth time is not read, a preset time length is added to the target cycle, and the test message is sent to the controller to be diagnosed for the N+1th time.

4. The method according to claim 1, characterized in that: According to the message period corresponding to the target test message lost by the controller to be diagnosed, the timeout time for the controller to be diagnosed to detect the lost message is verified, including: When the controller to be diagnosed detects that the corresponding message cycle of the lost target test message is within the error range of the cycle to be diagnosed, it is verified that the timeout time of the lost message detected by the controller to be diagnosed is within the loss time range corresponding to the cycle to be diagnosed, and it is determined that the timeout time of the controller to be diagnosed is normal.

5. The method according to claim 1, characterized in that According to the message period corresponding to the target test message lost by the controller to be diagnosed, the timeout time for the controller to be diagnosed to detect the lost message is verified, including: When the controller to be diagnosed detects that the message period corresponding to the lost target test message is not within the error range of the period to be diagnosed, it is determined that the timeout period of the controller to be diagnosed is abnormal.

6. The method according to claim 1, characterized in that The timeout verification system also includes a program-controlled power supply, and each time the timeout verification process is performed, before sending a test message to the controller to be diagnosed in different message cycles, it also includes: Controlling the programmable power supply to power on and clearing historical fault codes; After verifying the timeout time for the controller to be diagnosed to detect the lost message according to the message period corresponding to the target test message lost by the controller to be diagnosed, the method further includes: Recording the result of the timeout verification of the controller to be diagnosed detecting the lost message; Controlling the programmable power supply to power off; After performing the timeout verification multiple times, the timeout verification result of detecting the lost message of the controller to be diagnosed is checked.

7. A timeout verification device, characterized in that: A tester is provided in a timeout verification system, and the method performs a timeout verification process multiple times, including: A message sending module, used for sending test messages to the controller to be diagnosed at different message periods, wherein the controller to be diagnosed is any controller in various control systems of the whole vehicle; A verification module, configured to verify a timeout period for detecting a lost message by the controller to be diagnosed according to a message period corresponding to a target test message lost by the controller to be diagnosed; The verification module is specifically used for: When the difference between N times the message period corresponding to the lost target test message detected by the controller to be diagnosed and N times the message period received when the controller to be diagnosed is normal is greater than a set threshold, it is determined that the timeout time for the controller to be diagnosed to detect the lost message is abnormal.

8. The device according to claim 7, characterized in that The message sending module comprises: A periodic sending submodule, used for sending the test message to the controller to be diagnosed for the Nth time in a target period; the target period is obtained by superimposing the preset time length N-1 times with the period to be detected as the initial period; A reading submodule, configured to output a time corresponding to the target cycle when it is read that the controller to be diagnosed outputs a fault code for the loss of the test message sent for the Nth time; The verification module is specifically used to verify the timeout time of the controller to be diagnosed detecting the lost message according to the time corresponding to the target cycle.

9. A device comprising: at least one processor; And at least one memory communicatively connected to the processor, characterized in that the device is connected to a tester, the memory stores program instructions executable by the processor, and the processor calls the program instructions to control the tester to execute any method as claimed in claims 1 to 6.

10. A computer-readable storage medium storing computer instructions, characterized in that: The computer instructions enable the computer to execute the method according to any one of claims 1 to 6.

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