Data processing method of solid state disk and related device

Abstract

The application discloses a data processing method of a solid state disk and related equipment, and the method comprises the following steps: determining the number of IO queues; creating a cache area according to the number of the IO queues; receiving a plurality of data operation instructions sent by a host end, and respectively storing the plurality of data operation instructions into a plurality of groups of linked lists in the cache area according to the positions of the data operation instructions in the IO queues; determining the logical address corresponding to the first data operation instruction in each group of linked lists; and if the logical address is continuous with a target logical address, executing the data operation instruction. The application improves the reading performance of the solid state disk by executing the data operation instruction with the continuous logical address.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of hard disk, and particularly relates to a data processing method of a solid state disk and related equipment. BACKGROUND

[0002] In a solid state disk (SSD) system based on a Non Volatile Memory Host Controller Interface Specification (NVMe), the solid state disk and the host end communicate through an input / output (IO) interface. The host end can initiate multiple data operation instructions, and uniformly distribute the multiple data operation instructions to multiple IO queues. After receiving the data operation instructions, the solid state disk parses the instructions, calls a cache management unit to complete reading or writing operations on the solid state disk, and records in a flash translation layer (FTL). Specifically, when the solid state disk performs a writing operation, the solid state disk writes data under the data operation instruction into a flash memory (Nand Flash), and records a mapping relationship between a logical address of the data and a physical address of the flash memory in the FTL; when the host reads the data, the solid state disk reads the data from the flash memory according to the mapping relationship in the FTL, and then returns the data to the host.

[0003] Generally, in multiple data operation instructions initiated by the host end, the logical addresses corresponding to each data operation instruction have continuity. However, the host end divides these data operation instructions into multiple continuous command sets, and uniformly distributes the multiple continuous command sets into multiple queues. For example, in the case that the host end supports 8 queues, the host end stores 0B to 2MB data (corresponding to 16KB to 128KB data operation instructions) into queue 1, 2MB to 4MB data into queue 2, 4MB to 6MB data into queue 3, 6MB to 8MB data into queue 4, 8MB to 10MB data into queue 5, 10MB to 12MB data into queue 6, 12MB to 14MB data into queue 7, 14MB to 16MB data into queue 8, and 16MB to 18MB data into queue 1. In this way, the data in queue 1 will be a segment of 0B to 2MB data, followed by a segment of 16MB to 18MB data, which is not continuous, that is, the data operation instructions in one queue are composed of multiple non-continuous data operation instruction sets.

[0004] The solid state disk only sequentially writes all the data operation instructions in the queues in the order of the queue after receiving the data operation instructions, which makes the logically sequentially arranged data operation instructions possibly stored in scattered physical spaces, and records the mapping relationship between the logical addresses and the physical addresses of the data operation instructions in the FTL. When the user accesses the continuous logical addresses, the solid state disk end non-sequentially reads the data in the Nand Flash according to the mapping relationship of the FTL, which not only affects the read-write performance of the solid state disk, but also makes the mapping relationship in the FTL of the solid state disk complex and the management efficiency low. SUMMARY

[0005] In view of the above, it is necessary to propose a data processing method of a solid state disk and related equipment to realize efficient sorting in limited memory space, improve the read-write performance of the solid state disk and the management efficiency of the FTL.

[0006] In a first aspect, an embodiment of the present application provides a data processing method of a solid state disk, the solid state disk communicates with a host end through an IO interface, the IO interface includes a plurality of IO queues, and the method comprises: determining the number of IO queues; creating a cache area according to the number of IO queues; wherein the cache area is composed of a plurality of groups of linked lists, the number of groups of linked lists is the same as the number of IO queues; one group of linked lists is used to store a plurality of data operation instructions under one IO queue; receiving a plurality of data operation instructions sent by the host end, and storing the plurality of data operation instructions in the plurality of groups of linked lists of the cache area according to the position of each data operation instruction in the IO queue; determining the logical address corresponding to the first data operation instruction in each group of linked lists; if the logical address is continuous with a target logical address, executing the data operation instruction, and updating the target logical address to the logical address of the currently executed data operation instruction; the target logical address is the logical address of the executed data operation instruction.

[0007] Optionally, receiving a plurality of data operation instructions sent by the host end comprises: receiving the data operation instructions sent by the host end from an intermediate storage; the intermediate storage is used to receive and store the data operation instructions sent by the host end, and send the data operation instructions to the solid state disk.

[0008] Optionally, determining the logical address corresponding to the first data operation instruction in each group of linked lists comprises: traversing the first data operation instruction in each group of linked lists, and parsing the currently traversed data operation instruction to obtain the logical address corresponding to the current data operation instruction.

[0009] Optionally, the data processing method of the solid state disk further comprises: if no data operation instruction meeting the execution condition is found after the traversal, updating the data operation instructions in all the linked lists; the execution condition is that the logical address parsed is continuous with the target logical address; and determining the logical address corresponding to the first data operation instruction in each group of linked lists after the updating.

[0010] Optionally, the data processing method of the solid state disk further comprises: if no data operation instruction is executed within a preset time, executing the data operation instruction currently traversed.

[0011] Optionally, the receiving of the data operation instruction sent by the host end comprises: receiving the data operation instruction sent by the host end through a first thread; and the determining of the logical address corresponding to the first data operation instruction in each linked list comprises: determining the logical address corresponding to the first data operation instruction in each linked list through a second thread; wherein the first thread starts to execute prior to the second thread, and the execution time difference Δt of the first thread and the second thread satisfies Δt>0.

[0012] In the second aspect, the embodiments of the present application further provide a solid state disk, which communicates with a host end through an IO interface, the IO interface comprises a plurality of IO queues, and the solid state disk comprises: a determining module configured to determine the number of IO queues; a creating module configured to create a cache area according to the number of IO queues; wherein the cache area is composed of a plurality of groups of linked lists, the number of groups of linked lists is the same as the number of IO queues, and one group of linked lists is configured to store a plurality of data operation instructions under one IO queue; a receiving module configured to receive a plurality of data operation instructions sent by the host end, and store the plurality of data operation instructions into the plurality of groups of linked lists of the cache area according to the positions of the data operation instructions in the IO queues; the determining module is further configured to determine the logical address corresponding to the first data operation instruction in each group of linked lists; a judging module configured to judge whether the logical address determined by the determining module is continuous with a target logical address; and an executing module configured to execute the data operation instruction if the logical address is continuous with the target logical address, and update the target logical address as the logical address of the data operation instruction currently executed; the target logical address is the logical address of the data operation instruction executed.

[0013] In the third aspect, the embodiments of the present application further provide a computer readable storage medium storing one or more programs, the one or more programs including instructions which, when executed by a computer, cause the computer to perform the data processing method of the solid state disk in the first aspect.

[0014] In a fourth aspect, the embodiments of the present application also provide an electronic device, comprising: a processor and a memory; wherein the memory is configured to store one or more programs, and the one or more programs comprise computer execution instructions; when the electronic device is running, the processor executes the computer execution instructions stored in the memory, so that the electronic device executes the data processing method of the solid state disk of the first aspect.

[0015] In the above embodiments, the solid state disk communicates with the host end through an IO interface, and the IO interface comprises a plurality of IO queues. The solid state disk first determines the number of IO queues; then creates a cache area with the same number of linked list groups according to the number of IO queues, and a group of linked lists is used to store a plurality of data operation instructions under an IO queue; in this way, the number of linked list groups in the cache area of the solid state disk can correspond to the number of IO queues, so as to facilitate the subsequent storage of data operation instructions in the IO queue. A plurality of data operation instructions sent by the host end are received, and the plurality of data operation instructions are respectively stored in a plurality of groups of linked lists in the cache area according to the positions of each data operation instruction in the IO queue; since the host usually sends data operation instructions with consecutive logical addresses to the IO queue in order, the positions of each data operation instruction in the IO queue can correspond to the positions of the data operation instructions stored in the linked list groups, and the continuity of each data operation instruction in the logical address in each linked list group is guaranteed as much as possible. The logical address corresponding to the first data operation instruction in each group of linked lists is determined; if the logical address is continuous with a target logical address, the data operation instruction is executed, and the target logical address is updated to the logical address of the currently executed data operation instruction; the target logical address is the logical address of the executed data operation instruction. In this way, by executing data operation instructions with consecutive logical addresses, the effect of sorting the plurality of data operation instructions sent by the host end according to the logical addresses is achieved, and when the user accesses the continuous logical addresses, the solid state disk can sequentially read data, thereby improving the reading performance of the solid state disk; through the above execution operation, the solid state disk stores the data with consecutive logical addresses into consecutive physical addresses, so that the mapping relationship in the FTL of the solid state disk is clear, and the management efficiency is improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is the architecture schematic diagram of the solid state disk storage system provided by the embodiments of the present application;

[0017] Figure 2 is the first flowchart of the data processing method of the solid state disk provided by the embodiments of the present application;

[0018] Figure 3 is the first schematic diagram of data storage of the solid state disk provided by the embodiments of the present application;

[0019] Figure 4is a second schematic view of data storage of the solid state disk provided by the embodiment of the present application;

[0020] Figure 5 is a second flow schematic view of the data processing method of the solid state disk provided by the embodiment of the present application;

[0021] Figure 6a is a third schematic view of data storage of the solid state disk provided by the embodiment of the present application;

[0022] Figure 6b is a fourth schematic view of data storage of the solid state disk provided by the embodiment of the present application;

[0023] Figure 7 is a third flow schematic view of the data processing method of the solid state disk provided by the embodiment of the present application;

[0024] Figure 8 is a fourth flow schematic view of the data processing method of the solid state disk provided by the embodiment of the present application;

[0025] Figure 9 is a fifth flow schematic view of the data processing method of the solid state disk provided by the embodiment of the present application;

[0026] Figure 10 is a first distribution diagram of threads of the data processing method of the solid state disk provided by the embodiment of the present application;

[0027] Figure 11 is a second distribution diagram of threads of the data processing method of the solid state disk provided by the embodiment of the present application;

[0028] Figure 12 is a thread execution timing diagram of the data processing method of the solid state disk provided by the embodiment of the present application;

[0029] Figure 13 is a software test diagram of the data processing method of the solid state disk provided by the embodiment of the present application;

[0030] Figure 14 is an architecture schematic view of a solid state disk provided by the embodiment of the present application;

[0031] Figure 15 is an architecture schematic view of an electronic device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and not to limit the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0033] Before the embodiments of the present application are explained in detail, the terms involved in the embodiments of the present application are explained.

[0034] IO queue: located in the IO interface, the host exchanges data with external devices through the IO queue in the IO interface; for example, when the host writes data to the solid state disk or reads data from the solid state disk, the IO request first enters the IO queue and waits for resource scheduling of the solid state disk.

[0035] Linked list: a storage structure on a physical storage unit, composed of a series of nodes. The node is the storage unit of the linked list, used to store data.

[0036] Logical address: logical layer address of the solid state disk for writing data.

[0037] Physical address: address corresponding to the physical medium of the solid state disk.

[0038] The data processing method of the solid state disk provided by the embodiments of the present application can be applied to a solid state disk storage system. Figure 1 A structural schematic diagram of the solid state disk storage system is shown. As shown in Figure 1 The solid state disk storage system 10 is used to improve the read-write performance of the solid state disk. The solid state disk storage system 10 includes a host end 11 and a solid state disk 12. The solid state disk and the host end are linked through an IO interface, and the IO interface includes a plurality of IO queues.

[0039] The solid state disk 12 can be a storage device based on flash memory. For example, a mobile hard disk, a secure digital (SD) card or a universal serial bus (USB) flash drive.

[0040] It should be noted that the solid state disk 12 can be used to determine the number of IO queues and create a cache area according to the number of IO queues.

[0041] The solid state disk 12 can also be used to interact with the host end 11. For example, the solid state disk 12 receives a plurality of data operation instructions sent by the host end 10, and stores the plurality of data operation instructions into a plurality of linked lists in the cache area according to the position of each data operation instruction in the IO queue.

[0042] The solid state disk 12 can also be configured to determine a logical address corresponding to a first data operation instruction in each group of linked lists; if the logical address is continuous with the target logical address, the data operation instruction is executed, and the target logical address is updated to the logical address of the currently executed data operation instruction.

[0043] The host 11 can be an upper computer or other front-end device. The host 11 can be configured to send a data operation instruction input by a user to the solid state disk.

[0044] In different application scenarios, the host 11 and the solid state disk 12 can be independent devices or can be integrated into the same device, and the embodiments of the present application do not make specific limitations in this regard.

[0045] Figure 2 is a flowchart of a data processing method of a solid state disk according to some example embodiments. In some embodiments, the above-mentioned data processing method of the solid state disk can be applied to a solid state disk as shown in Figure 1 or a host or other similar device.

[0046] S201, determine the number of IO queues.

[0047] It should be noted that the solid state disk and the host are connected through an IO interface, and the IO interface includes a plurality of IO queues. The maximum number of IO queues is determined by the model of the solid state disk, and the maximum number of IO queues supported by different models of solid state disks is different. When the host interacts with the solid state disk, the host can create a plurality of IO queues less than or equal to the maximum number of IO queues supported by the solid state disk according to the maximum number of IO queues supported by the solid state disk, and distribute a plurality of data operation instructions evenly to the plurality of IO queues.

[0048] As a possible implementation, the solid state disk determines the number of IO queues created by the host in the IO interface.

[0049] S202, create a cache area according to the number of IO queues.

[0050] The cache area is composed of a plurality of groups of linked lists, and the number of groups of linked lists is the same as the number of IO queues; a group of linked lists is used to store a plurality of data operation instructions under an IO queue.

[0051] It should be noted that the logical addresses of a plurality of data operation instructions under an IO queue are usually continuous.

[0052] As a possible implementation, the solid state disk creates a group of linked lists with the same number as the number of IO queues as the cache area.

[0053] It should be noted that a group of linked lists is composed of a series of nodes; the node is a storage unit of the linked list and is used to store data.

[0054] Furthermore, the cache region created in this embodiment of the invention only needs to satisfy the requirement that the number of linked list groups is the same as the number of IO queues, and the depth of the linked list and the depth of the queue can be different.

[0055] For example, such as Figure 3 As shown, with 8 I / O queues, each containing 512 data operation instructions (commands, hereinafter referred to as CMDs), the SSD creates 8 linked lists in the cache area, each list holding 8 CMDs. That is, when creating the cache area, the SSD only needs the number of linked list groups to match the number of I / O queues; the number of CMDs that each linked list can hold does not need to match the number of I / O queues. Understandably, this method of creating the cache area ensures the correspondence between I / O queues and linked list groups while also avoiding the problem of creating an excessively large cache area that consumes too many storage resources.

[0056] S203: Receive multiple data operation commands sent by the host.

[0057] It should be noted that after the host evenly distributes multiple data operation instructions into multiple IO queues, it will send IO request messages to the solid-state drive. The IO request messages are used to request the solid-state drive to perform resource scheduling.

[0058] For example, such as Figure 4 As shown, assuming a single command (cmd) corresponds to a data length of 128KB, and each I / O queue has a depth of 512, meaning each queue can hold a maximum of 512 data operation instructions. If the host needs to write 1GB of contiguous data, 8192 cmds are required. However, even if all eight I / O queues are filled simultaneously, only a maximum of 4096 cmds can be accommodated. Following the principle of even distribution, the host divides the 8192 contiguous cmds at logical addresses into eight groups of 1024 cmds each, based on the number of I / O queues. Then, 512 cmds are taken from each group and inserted into the eight I / O queues.

[0059] As can be seen from the process described above where the host distributes data operation instructions to multiple IO queues, the data operation instructions that were originally consecutive are no longer consecutive between adjacent IO queues after being distributed to multiple IO queues.

[0060] As one possible approach, after receiving an IO request message from the host, the solid-state drive (SSD) receives multiple data operation instructions from the host.

[0061] The specific implementation of this step can be found in the subsequent description of the embodiments of the present invention, and will not be repeated here.

[0062] S204. Based on the position of each data operation instruction in the IO queue, store multiple data operation instructions into multiple linked lists in the cache area.

[0063] It should be noted that the host will assign queue identification information to each data operation instruction. The queue identification information is used to reflect the position of a data operation instruction in the IO queue.

[0064] After receiving a data operation instruction, the solid-state drive (SSD) determines the position of the data operation instruction in the I / O queue based on the queue identifier information of the data operation instruction; then, based on the position of the data operation instruction in the I / O queue, it stores the data operation instruction in a corresponding linked list.

[0065] Solid-state drives (SSDs) store multiple data operation instructions into multiple linked lists in the cache area according to the above rules.

[0066] For example, such as Figure 3 As shown, the solid-state drive stores cmd1-cmd8 of queue 1 in linked list 1, cmd1025-cmd1032 of queue 2 in linked list 2, cmd2049-cmd2056 of queue 3 in linked list 3, cmd3073-cmd3080 of queue 4 in linked list 4, cmd4097-cmd4104 of queue 5 in linked list 5, cmd5121-cmd5128 of queue 6 in linked list 6, cmd6145-cmd6152 of queue 7 in linked list 7, and cmd7169-cmd7176 of queue 8 in linked list 8.

[0067] S205. Determine the logical address corresponding to the first data operation instruction in each linked list.

[0068] As one possible approach, the solid-state drive (SSD) parses the first data operation instruction in each linked list to obtain the logical address corresponding to the first data operation instruction in each linked list.

[0069] The specific implementation of this step can be found in the subsequent description of the embodiments of the present invention, and will not be repeated here.

[0070] S206. For each logical address determined, determine whether the logical address is continuous with the target logical address.

[0071] The target logical address is the logical address of the data manipulation instruction that has been executed.

[0072] It should be noted that the executed data operation instruction can be the latest executed data operation instruction of the solid state disk, or can be an initial operation instruction. The initial operation instruction is the first data operation instruction executed by the solid state disk, and does not need to be judged by the address. When the initial operation instruction is executed, the logical address of the subsequent operation instruction is judged. The embodiment of the application does not make specific limitation.

[0073] As a possible implementation, the solid state disk compares the logical address of each parsed data operation instruction with the target logical address to determine whether the logical address and the target logical address are continuous.

[0074] If the logical address and the target logical address are continuous, S207 is executed: the data operation instruction is executed, and the target logical address is updated to the logical address of the currently executed data operation instruction.

[0075] As a possible implementation, if the result of the judgment is continuous, the solid state disk executes the data operation instruction (for example, writes data), and updates the target logical address to the logical address of the data operation instruction.

[0076] It should be noted that when the solid state disk executes the data operation instruction, the IO queue to which the data operation instruction belongs deletes the data operation instruction, and the second data operation instruction in the queue becomes the new first data operation instruction in the queue. Then, the solid state disk continues to determine the logical address corresponding to the first data operation instruction in the group of linked lists, which is not repeated here.

[0077] S208, if the logical address and the target logical address are not continuous, the data operation instruction is skipped.

[0078] It should be noted that after the solid state disk skips the data operation instruction, it continues to determine whether the first data operation in the next group of linked lists is continuous with the target operation instruction, until the determination of the first data operation instruction in all linked lists is completed.

[0079] In a design, in order to sort the logical addresses of the cache area while not affecting the acquisition of new data operation instructions, as shown in Figure 5 The above S203 provided by the embodiment of the application can specifically include the following S2031.

[0080] S2031, receiving the data operation instruction sent by the host from the intermediate storage.

[0081] The intermediate storage is used to receive and store the data operation instruction sent by the host and send the data operation instruction to the solid state disk.

[0082] It should be noted that intermediate storage refers to the intermediate storage unit between the host computer and the solid-state drive. For example... Figure 6a as well as Figure 6b As shown, after the intermediate memory receives and stores the data operation instructions sent by the host, the solid-state drive receives the data operation instructions from the intermediate memory and stores the data operation instructions in the cache area so that the solid-state drive can sort the logical addresses of the data operation instructions in the cache area.

[0083] Understandably, when the SSD retrieves data operation instructions from the intermediate storage, while the logical addresses of the data operation instructions are sorted in the cache area, the intermediate storage can continue to receive and store data operation instructions sent by the host, thus improving the working efficiency of the SSD.

[0084] In one design, to determine the logical address corresponding to the first data operation instruction in each linked list, such as... Figure 7 As shown, the above-mentioned S205 provided in the embodiments of the present invention may specifically include the following S2051-S2052.

[0085] S2051, the instruction to traverse the first data operation in each linked list.

[0086] As one possible approach, the solid-state drive (SSD) obtains the data operation instructions from the first node of each linked list and iterates through the obtained data operation instructions.

[0087] S2052. Parse the currently traversed data operation instruction to obtain the logical address corresponding to the current data operation instruction.

[0088] As one possible approach, during the traversal process, each time the solid-state drive accesses a data operation instruction, it reads the instruction code of that instruction and determines the logical address corresponding to the current data operation instruction based on the instruction code.

[0089] In one design, in order to continue searching for data operation instructions contiguous with the target logical address, such as... Figure 8 As shown, if the traversal is complete and no logical address contiguous with the target logical address is resolved (for example, see reference...), Figure 3 After the solid-state drive (SSD) executes cmd8 in linked list 1, it uses the logical address corresponding to cmd8 as the target logical address. At this time, there are no more data operation instructions to judge in linked list 1. Therefore, the SSD will judge the first data operation instruction in linked list 2. The first data operation instruction in the linked list is cmd1025, which is not continuous with cmd8. Similarly, the first data operation instruction in the subsequent linked lists is not continuous with cmd8, that is, no logical address continuous with the target logical address is parsed. The data processing method of the solid-state drive provided in the above embodiment of the present invention also includes the following S209-S210.

[0090] S209, updating the data operation instructions in all the linked lists.

[0091] As a possible implementation, the solid state disk clears all the data operation instructions in the linked lists, continues to obtain new data operation instructions from the intermediate storage, and stores the newly obtained data operation instructions into the corresponding linked list groups until all the linked list groups are full or there is no data operation instruction in the intermediate storage.

[0092] S210, determining the logical address corresponding to the first data operation instruction in each updated linked list group.

[0093] The specific implementation of this step can refer to S205 described above, which will not be repeated here.

[0094] In one design, in order to avoid the timeout problem caused by the failure to find continuous data operation instructions, as shown in Figure 9 The data processing method of the solid state disk provided by the embodiment of the application further includes the following S211.

[0095] S211, if no data operation instruction is executed within the preset time, executing the currently iterated data operation instruction.

[0096] It should be noted that the preset time is set in the solid state disk in advance, for example, the preset time is 50 ms. The embodiment of the application does not make specific limitation thereto.

[0097] As a possible implementation, the solid state disk determines whether an instruction to execute a data operation instruction is received within the preset time; if no instruction to execute a data operation instruction is received within the preset time, the solid state disk executes the currently iterated data operation instruction. For example, within 50 ms, the solid state disk does not execute any data operation instruction, and then the solid state disk executes the currently iterated data operation instruction, regardless of whether the logical address of the data operation instruction is continuous with the target logical address.

[0098] It can be understood that when the solid state disk does not execute any data operation instruction within a period of time, it indicates that there is possibly no data operation instruction continuous with the target logical address, at this time, in order to avoid storage timeout, the solid state disk directly executes the currently iterated data operation instruction.

[0099] In one design, in order to improve the data processing efficiency of the solid state disk, the above S203 provided by the embodiment of the application, as shown in Figure 10 may specifically include that the solid state disk receives the data operation instruction sent by the host through the first thread. The above S205 provided by the embodiment of the application, as shown in Figure 11As shown, specifically can include: solid state disk through the second thread determines the first data operation instruction corresponding to the logical address in each chain table.

[0100] Wherein, the first thread starts to execute prior to the second thread, the execution time difference of the first thread and the second thread △t satisfies, △t>0.

[0101] In order to more intuitively represent the execution of the first thread and the second thread, as shown in Figure 12 As shown, the execution of the first thread and the second thread is represented by a time sequence diagram.

[0102] It can be understood that the solid state disk uses two threads to coordinate scheduling to balance the time of obtaining data operation instruction command and the time of determining the logical address, that is, after the first thread obtains a plurality of data operation instructions, the second thread is started to determine the logical address of each data operation instruction, so as to judge whether to execute the determined data operation instruction. In this way, the thread resources can be more efficiently utilized, and the processing performance of the solid state disk on data can be improved.

[0103] In the data processing method of the solid state disk provided by the embodiment of the application, the solid state disk communicates with the host end through an IO interface, and the IO interface includes a plurality of IO queues. The solid state disk first determines the number of IO queues; then creates a cache area with the same number of chain table groups according to the number of IO queues, and a group of chain tables is used to store a plurality of data operation instructions under an IO queue; in this way, the number of chain table groups in the cache area of the solid state disk can be ensured to correspond to the number of IO queues, so as to facilitate subsequent storage of data operation instructions in the IO queue. A plurality of data operation instructions sent by the host end are received, and the plurality of data operation instructions are respectively stored into a plurality of groups of chain tables in the cache area according to the positions of each data operation instruction in the IO queue; since the host usually sends data operation instructions with continuous logical addresses to the IO queue in order, the positions of each data operation instruction in the IO queue can be ensured to correspond to the positions in the chain table group, and the continuity of each data operation instruction in the logical address in each chain table group is ensured as much as possible. The logical address corresponding to the first data operation instruction in each chain table is determined; if the logical address is continuous with a target logical address, the data operation instruction is executed, and the target logical address is updated to the logical address of the currently executed data operation instruction; the target logical address is the logical address of the executed data operation instruction. In this way, by executing the data operation instruction with the continuous logical address, the effect of sorting the plurality of data operation instructions sent by the host end according to the logical address is realized, and when the user accesses the continuous logical address, the solid state disk can sequentially read data, thereby improving the reading performance of the solid state disk. In addition, by the above execution operation, the solid state disk stores the data with the continuous logical address into the continuous physical address, so that the mapping relationship in the FTL of the solid state disk is clear, and the management efficiency is improved.

[0104] As Figure 13 shown, the read-write performance of the solid state disk before using the embodiment of the application and the read-write performance of the solid state disk after using the embodiment of the application are tested respectively using a hard disk test software. It can be seen from the test results that the performance of the solid state disk is obviously improved after using the data processing method of the embodiment of the application.

[0105] The above mainly introduces the scheme provided by the embodiment of the application from the perspective of the method. To realize the above functions, it includes the hardware results and / or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed in the present text, the embodiment of the application can be executed in the form of hardware or computer software driving hardware, which depends on the characteristics of the technical scheme application and the involved constraint conditions. The professional people can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the application.

[0106] The embodiment of the application can divide the above equipment into functional modules according to the above method examples, for example, each functional module can be divided according to each function, or two or more functions can be integrated in one processing module. The above integrated module can be realized in the form of hardware or in the form of software functional module. Optionally, the division of the module in the embodiment of the application is illustrative, and is only a logical functional division, which can be divided in another way in actual implementation.

[0107] Figure 14 is a schematic diagram of the architecture of a solid state disk provided by the embodiment of the application. Referring to Figure 14 , the solid state disk 30 is used to improve the read-write performance of the solid state disk, for example, to execute the data processing method of the solid state disk as shown in Figure 2 . The solid state disk 30 communicates with the host end through an IO interface, the IO interface includes a plurality of IO queues, and the solid state disk 30 includes a determination module 301, a creation module 302, a receiving module 303, a judgment module 304 and an execution module 305.

[0108] The determination module 301 is used to determine the number of IO queues.

[0109] The creation module 302 is used to create a cache area according to the number of IO queues; wherein the cache area is composed of a plurality of groups of linked lists, the number of groups of linked lists is the same as the number of IO queues; and one group of linked lists is used to store a plurality of data operation instructions under one IO queue.

[0110] The receiving module 303 is configured to receive a plurality of data operation instructions sent by the host end, and store the plurality of data operation instructions into a plurality of linked lists in the cache area according to positions of the data operation instructions in the IO queue respectively.

[0111] The determining module 301 is further configured to determine a logical address corresponding to the first data operation instruction in each linked list.

[0112] The judging module 304 is configured to judge whether the logical address determined by the determining module is continuous with a target logical address.

[0113] The executing module 305 is configured to execute the data operation instruction if the logical address is continuous with the target logical address, and update the target logical address as a logical address of a currently executed data operation instruction, and the target logical address is a logical address of an executed data operation instruction.

[0114] Optionally, the receiving module 303 is further configured to receive the data operation instruction sent by the host end from an intermediate storage; and the intermediate storage is configured to receive and store the data operation instruction sent by the host end.

[0115] Optionally, the determining module 301 is further configured to traverse the first data operation instruction in each linked list, and parse a currently traversed data operation instruction to obtain a logical address corresponding to the current data operation instruction.

[0116] Optionally, the solid state disk 30 further comprises an updating module 306. The updating module 306 is configured to update the data operation instructions in all linked lists if no data operation instruction meeting an execution condition is found after the traversal; and the execution condition is that the parsed logical address is continuous with the target logical address.

[0117] The determining module 301 is further configured to determine a logical address corresponding to the first data operation instruction in each linked list.

[0118] Optionally, the executing module 305 is further configured to execute the currently traversed data operation instruction if no data operation instruction is executed within a preset time.

[0119] Optionally, the receiving module 303 is further configured to receive the data operation instruction sent by the host end through a first thread; and the determining module 301 is further configured to determine the logical address corresponding to the first data operation instruction in each linked list through a second thread; wherein a time difference Δt between the first thread and the second thread satisfies Δt>0.

[0120] Figure 15 is an architecture schematic diagram of an electronic device provided by the present disclosure. Referring to Figure 15 The electronic device 40 is configured to improve the read-write performance of the solid state disk, for example, to execute Figure 2The data processing method of the solid state disk is shown. The electronic device 40 can include at least one processor 401 and a memory 403 for storing processor-executable instructions. The processor 401 is configured to execute the instructions in the memory 403 to implement the data processing method in the above embodiments.

[0121] In addition, the electronic device 40 can further include a communication bus 402 and at least one communication interface 404.

[0122] The processor 401 can be a central processing unit (CPU), a micro-processing unit, an ASIC, or one or more integrated circuits for controlling program execution of the present disclosure.

[0123] The communication bus 402 can include a path for transmitting information between the above components.

[0124] The communication interface 404 uses any transceiver-like device for communicating with other devices or communication networks, such as an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), etc.

[0125] The memory 403 can be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to this. The memory can exist independently and be connected to the processing unit through a bus. The memory can also be integrated with the processing unit.

[0126] The memory 403 is used to store instructions for executing the present disclosure, and the processor 401 is used to control the execution. The processor 401 is used to execute the instructions stored in the memory 403, thereby realizing the functions in the present method.

[0127] In a specific implementation, as an embodiment, the processor 401 can include one or more CPUs, such as CPU0 and CPU1 in the above. Figure 15 ​

[0128] In particular implementations, as one example, electronic device 40 can include multiple processors, such as processor 401 and processor 407 in FIG. 4. Each of these processors can be a single-CPU processor or a multi-CPU processor. A processor here can refer to one or more devices, circuits, and / or processing cores for processing data, such as computer program instructions. Figure 15

[0129] In particular implementations, as one example, electronic device 40 can also include output device 405 and input device 406. Output device 405 is in communication with processor 401 and can present information in a variety of ways. For example, output device 405 can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, a projector, or the like. Input device 406 is in communication with processor 401 and can accept user input in a variety of ways. For example, input device 406 can be a mouse, a keyboard, a touch screen device, a sensor device, or the like.

[0130] Those skilled in the art will understand that the structures shown in FIG. 4 do not constitute a limitation of electronic device 40, which can include more or fewer components than shown, or combine some components, or have a different arrangement of the components. Figure 15

[0131] In addition, the present disclosure also provides a computer readable storage medium, including instructions, when the instructions are executed by a processor, the processor executes the starting method of the application program provided by the above-mentioned embodiments.

[0132] Further, the present disclosure also provides a computer program product, including instructions, when the instructions are executed by a processor, the processor executes the starting method of the application program provided by the above-mentioned embodiments.

[0133] Other embodiments of the present disclosure will be apparent to those skilled in the art with the consideration of the specification and practice of the disclosed application. The present disclosure is intended to cover any variations, uses, or adaptations of the present disclosure following the general principles thereof and including such departures from the present disclosure that come within known, accepted, or customary practice in the art to which the present disclosure pertains. The specification and examples are to be regarded as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.​​

Claims

1. A data processing method for a solid-state drive, characterized in that, The solid-state drive communicates with the host via an I / O interface, which includes multiple I / O queues. The method includes: Determine the number of IO queues; A cache region is created based on the number of IO queues; wherein the cache region consists of multiple sets of linked lists, the number of sets of linked lists being the same as the number of IO queues; a set of linked lists is used to store multiple data operation instructions under one IO queue; Receive multiple data operation instructions sent by the host, and store the multiple data operation instructions into multiple linked lists in the cache area according to the position of each data operation instruction in the IO queue; Determine the logical address corresponding to the first data operation instruction in each of the linked lists; If the logical address is contiguous with the target logical address, then the data operation instruction is executed, and the target logical address is updated to the logical address of the currently executed data operation instruction; the target logical address is the logical address of the already executed data operation instruction.

2. The data processing method for a solid-state drive according to claim 1, characterized in that, The receiving of multiple data operation instructions sent by the host includes: The intermediate memory receives data operation instructions sent by the host; the intermediate memory is used to receive and store the data operation instructions sent by the host, and send the data operation instructions to the solid-state drive.

3. The data processing method for a solid-state drive according to claim 1 or 2, characterized in that, Determining the logical address corresponding to the first data operation instruction in each linked list includes: Iterate through the first data operation instruction in each linked list and parse the currently traversed data operation instruction to obtain the logical address corresponding to the current data operation instruction.

4. The data processing method for a solid-state drive according to claim 3, characterized in that, The method further includes: If no data operation instruction that meets the execution condition is found after traversal, then update the data operation instructions in all linked lists; the execution condition is that the parsed logical address is continuous with the target logical address. Determine the logical address corresponding to the first data operation instruction in each of the linked lists after the update.

5. The data processing method for a solid-state drive according to claim 4, characterized in that, The method further includes: If no data operation instruction is executed within the preset time, then the currently traversed data operation instruction will be executed.

6. The data processing method for a solid-state drive according to claim 5, characterized in that, The step of receiving the data operation instruction sent by the host includes: receiving the data operation instruction sent by the host through a first thread; Determining the logical address corresponding to the first data operation instruction in each linked list includes: determining the logical address corresponding to the first data operation instruction in each linked list through a second thread; In this case, the first thread starts executing before the second thread, and the execution time difference Δt between the first thread and the second thread satisfies Δt>0.

7. A solid-state drive, characterized in that, The solid-state drive (SSD) communicates with the host via an I / O interface, which includes multiple I / O queues. The SSD includes: A determination module is used to determine the number of IO queues; A creation module is used to create a cache region based on the number of IO queues; wherein, the cache region consists of multiple sets of linked lists, and the number of sets of linked lists is the same as the number of IO queues; a set of linked lists is used to store multiple data operation instructions under one IO queue; The receiving module is used to receive multiple data operation instructions sent by the host, and store the multiple data operation instructions into multiple linked lists in the cache area according to the position of each data operation instruction in the IO queue. The determining module is also used to determine the logical address corresponding to the first data operation instruction in each group of the linked lists; The judgment module is used to determine whether the logical address determined by the determination module is continuous with the target logical address; An execution module is configured to execute the data operation instruction if the logical address is contiguous with the target logical address, and update the target logical address to the logical address of the currently executed data operation instruction; the target logical address is the logical address of the already executed data operation instruction.

8. The solid-state drive according to claim 7, characterized in that, The receiving module is also used for: The intermediate memory receives data operation instructions sent by the host terminal from the intermediate memory; the intermediate memory is used to receive and store the data operation instructions sent by the host terminal.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, the one or more programs including instructions that, when executed by a computer, cause the computer to perform the data processing method of the solid-state drive according to any one of claims 1-6.

10. An electronic device, characterized in that, include: A processor and a memory; wherein the memory is used to store one or more programs, the one or more programs including computer execution instructions, wherein when the electronic device is running, the processor executes the computer execution instructions stored in the memory to cause the electronic device to perform the data processing method of the solid-state drive according to any one of claims 1-6.

Images