Method for identifying non-functional devices in analog circuits

Abstract

The application discloses a kind of non-functional device identification method in analog circuit design diagram, according to the netlist file of analog circuit, the component information and node information of analog circuit are extracted, traverse component dictionary set, short-circuit device is judged according to node information, then root node is selected, node tree is generated based on each root node respectively, Tarjan algorithm is used to identify cut point in analog circuit, according to cut point and make it become the subnode of cut point, carry out path search, the component on the path is used as non-functional component, short-circuit device and non-functional component are collected, and the final non-functional component set is obtained.The application can automatically identify non-functional component in analog circuit according to analog circuit diagram, reduce the fault number that analog circuit needs simulation, so as to shorten the time of analog circuit fault simulation.

Description

Technical Field

[0001] This invention belongs to the field of analog circuit technology, and more specifically, relates to a method for identifying non-functional devices in analog circuits. Background Technology

[0002] The automotive industry is currently the fastest-growing integrated circuit market. Automotive integrated circuits contain a large number of analog circuits, and regulations stipulate that automotive ICS (Integrated Circuit Systems) must have zero defective components, meaning 100% fault coverage is required. A crucial element in achieving high fault coverage is analog circuit fault simulation; to achieve 100% coverage, fault simulation of every single device in the circuit is necessary. Because automotive-grade circuits are massive, containing tens of thousands of components in their design, even with hard faults—for example, each two-port device has two hard faults: open circuit and short circuit—and three-port devices have even more. Simulation time is unbearable, sometimes reaching months or even years. Therefore, minimizing the fault simulation time for analog circuits is essential.

[0003] There are two main approaches to shortening the simulation time for analog circuit faults: (1) speeding up circuit simulation; and (2) reducing the number of circuit simulations. The methods for reducing the number of circuit simulations can be further divided into three types: (1) fault equivalence; (2) identification of isolated components; and (3) identification of non-functional (invalid) components. Currently, the identification of non-functional components is mostly done manually, which is inefficient. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method for identifying non-functional components in analog circuits. This method automatically identifies non-functional components in analog circuits based on the analog circuit diagram, reduces the number of faults that need to be simulated in the analog circuit, and thus shortens the simulation time for analog circuit faults.

[0005] To achieve the above-mentioned objective, the method for identifying non-functional devices in analog circuits according to the present invention includes the following steps:

[0006] S1: Extract the component information and node information of the analog circuit from the netlist file of the analog circuit to obtain the component dictionary set Components and the node dictionary set Nodes. The key of the component dictionary set Components is the component name and the value is an array used to store the node name connected to the component. The key of the node dictionary set Nodes is the node name and the value is an array used to store the component name connected to the node.

[0007] S2: Traverse the component dictionary set Components, compare the node names of each component, and if there are multiple nodes with the same name connected to a component, then the component is short-circuited and the component is added to the short-circuited component set A.

[0008] S3: Select K nodes from the nodes of the analog circuit as root nodes according to actual needs.

[0009] S4: Let k = 1;

[0010] S5: Based on the k-th root node, the Tarjan algorithm is used to identify the cut points in the analog circuit. The specific method is as follows:

[0011] S5.1: Based on the k-th root node, the keys in the node dictionary set Nodes are used as nodes, and the keys in the component dictionary set Components are used as connections between nodes. The connection relationships between different nodes are determined by mutual lookup between the two dictionaries Components and Nodes, thus obtaining the node tree. k ;

[0012] S5.2: Use a depth-first search to find each node x in the node tree. i The order in which nodes are visited during a depth-first search is used as the node x. i timestamp dfn[x i ], i = 1, 2, ..., N, where N represents the number of nodes;

[0013] S5.3: According to each node x i timestamp dfn[x i Traverse each node and determine the x-axis of each node based on the Tarjan algorithm. i The traceability value low[x i The specific method is as follows:

[0014] Let the current node be now, initialize the trace value low[now] = dfn[now], the number of subtrees child = 0, and get the parent node fa and all child nodes to of node now. d d = 1, 2, ..., D, where D represents the number of child nodes of node now. For each child node to... d If the child node to d timestamp dfn[to d If the timestamp of node now is less than that of node to, then node to... d If it is an ancestor node, then further determine whether to... d=fa, if not, update the trace value of node now: low[now] = min(low[now], dfn[to d If the child node to... d timestamp dfn[to d If the timestamp of node now is greater than that of node now (low[now]), let the number of subtrees of node now be child = child + 1, and then set the child node to... d The improved Tarjan algorithm is used to determine its traceability value low[to] d Then update the trace value of node now: low[now] = min(low[now], low[to]). d ]);

[0015] After determining the traceability value for all nodes, we sequentially determine whether each node is a cut vertex. The specific method is as follows:

[0016] When node x i If the node is the root node, then check if the number of its subtrees is greater than or equal to 2. If it is, then node x... i It is a cut point; otherwise, it is not.

[0017] When node x i If node x is not the root node, then... i The child node has a trace value greater than node x. i The timestamp of node x i If it is a cut vertex, then node x is a cut vertex; otherwise, node x is a cut vertex. i Not a cut point;

[0018] Tree k The number of cut vertices obtained is M. For the m-th cut vertex... i m This represents the node index of the m-th cut point. The node whose traceback value is greater than the cut point's timestamp is used to construct the child nodes that make the cut point's timestamp greater than the cut point's timestamp. The set of child nodes of the cut point, toSet k,m In the given information, m = 1, 2, ..., M;

[0019] S6: Based on the M cut points obtained in step S5 and the set of child nodes toSet k,m The search yielded a set B of non-functional components. k The specific method is as follows: for each cut point Arbitrarily select its child node set toSet k,m A path search is performed using any node as a child node. The path search ends when a found child node is an articulation point or no child node exists. This process is repeated based on M articulation points. and the set of child nodes toSetk,m The components traversed along all the paths obtained from the search constitute the tree structure based on the current node. k The resulting set of non-functional components B k ;

[0020] S7: Determine if k < K. If yes, proceed to step S8; otherwise, proceed to step S9.

[0021] S8: Let k = k + 1, then return to step S5;

[0022] S9: Find the set A of short-circuited devices and the set B of K non-functional components. k The set of non-functional components of the analog circuit is obtained by combining the sets of A∪B₁∪B₂∪… ...…∪B₂∪…∪B₁∪…∪ K .

[0023] This invention discloses a method for identifying non-functional components in analog circuit design diagrams. The method extracts component and node information from the netlist file of the analog circuit, traverses the component dictionary, identifies short-circuited components based on node information, selects root nodes, generates node trees based on each root node, uses the Tarjan algorithm to identify cut points in the analog circuit, performs path searching based on the cut points and their child nodes, identifies components along the path as non-functional components, and combines short-circuited and non-functional components to obtain the final set of non-functional components.

[0024] This invention abstracts analog circuits into undirected graphs and then uses cut vertices in graph theory to solve short-circuit and open-circuit problems. This enables automatic identification of non-functional components in analog circuits based on the analog circuit diagram, reducing the number of faults that need to be simulated in analog circuits and thus shortening the simulation time for analog circuit faults. Attached Figure Description

[0025] Figure 1 This is an example diagram of a single device short-circuited in an analog circuit;

[0026] Figure 2 This is an example diagram of multiple devices being short-circuited in an analog circuit;

[0027] Figure 3 yes Figure 2 The example diagram of the analog circuit shown is a graphical model.

[0028] Figure 4 This is a graphical example of an analog circuit with an open circuit.

[0029] Figure 5 This is a flowchart illustrating a specific implementation method for identifying non-functional devices in analog circuits according to the present invention.

[0030] Figure 6This is a flowchart illustrating the process of identifying cut points based on the Tarjan algorithm in this invention;

[0031] Figure 7 This is the circuit diagram of the Class B push-pull power amplifier circuit in this embodiment;

[0032] Figure 8 This is an abstract diagram of the circuit structure in this embodiment;

[0033] Figure 9 This is the circuit diagram of a Class B push-pull power amplifier circuit after a deliberately malfunctioned circuit.

[0034] Figure 10 This is in this embodiment Figure 9 Example of a node tree diagram for the circuit shown;

[0035] Figure 11 This is a schematic diagram of the recursive restoration search path in this embodiment. Detailed Implementation

[0036] The specific embodiments of the present invention will now be described with reference to the accompanying drawings to enable those skilled in the art to better understand the invention. It should be particularly noted that in the following description, detailed descriptions of known functions and designs that might obscure the main content of the invention will be omitted here.

[0037] To better illustrate the present invention, the principles of the present invention will first be briefly explained.

[0038] In this invention, non-functional components (also called invalid components) refer to components in the analog circuit design that do not contribute to the circuit function but are connected to the main circuit. These mainly refer to all components that are short-circuited or open-circuited. This invention abstracts the analog circuit as an undirected graph and uses cut vertices from graph theory to solve short-circuit and open-circuit problems because when considering short-circuit and open-circuit conditions in analog circuits, only the circuit connection structure matters, not the current flow or component parameters. An undirected graph reflects the connection relationships between different nodes. For analog circuit diagrams, it also reflects certain connection relationships, namely the connection relationships between different components or different ports. Therefore, replacing ports with nodes and components with wires, they are essentially the same and can be abstracted into a graph structure for processing.

[0039] For analog circuits, short circuits can be categorized into single-device short circuits and multi-device short circuits. Figure 1 This is an example diagram of a single device short-circuited in an analog circuit. For example... Figure 1 As shown, in the case of a short circuit in an analog circuit, if a single device is short-circuited, such as R3, both nodes of R3 are 0. Therefore, it is only necessary to compare whether the two nodes are equal to determine that a single device is short-circuited. Figure 2This is an example diagram of multiple devices being short-circuited in an analog circuit. For example... Figure 2 As shown, both components R1 and R2 are short-circuited. Since the port nodes of the two components are different, the identification method for single-component short circuits cannot be used. Figure 3 yes Figure 2 The example diagram shows a graphical model of an analog circuit. (For example...) Figure 3 As shown, looking at the entire circuit structure, it is obvious that node 1 is a cut point. In fact, if a node is a short-circuit node, then no matter how many short-circuit devices are inside it, since the two ends of the short-circuit circuit are the same node, they can only be connected back to the main circuit through the same node. Therefore, a short-circuit node must be a cut point.

[0040] In the case of an open circuit in an analog circuit, since an open circuit has occurred in the analog circuit, there must be components that have not been connected back to the main circuit and returned to the root node, and their ports are left floating. Figure 4 This is a graphical example of an analog circuit with an open circuit. For example... Figure 4 As shown, regardless of the number of components in the main circuit, it will return to the root node through several nodes. However, because the port of a component that experiences an open circuit is floating, the floating node will not point to any next node, just like... Figure 4 As shown in component b, they cannot return to any node in the search tree by taking a detour, so node 2 becomes an cut point.

[0041] Based on the above principle analysis, this invention proposes a method for identifying non-functional devices in analog circuits.

[0042] Figure 5 This is a flowchart illustrating a specific implementation method for identifying non-functional devices in analog circuits according to the present invention.

[0043] like Figure 5 As shown, the specific steps of the non-functional device identification method in the analog circuit of the present invention include:

[0044] S501: Obtain analog circuit information:

[0045] Extract the component and node information of the analog circuit from the netlist file to obtain the component dictionary set Components and the node dictionary set Nodes. The component dictionary set Components has the key as the component name and the value as an array to store the node names connected to the component. The node dictionary set Nodes has the key as the node name and the value as an array to store the component names connected to the node.

[0046] S502: Identify short circuits in individual components:

[0047] Traverse the component dictionary set Components, compare the node names of each component, and if there are multiple nodes with the same name connected to a component, then the component is short-circuited and added to the short-circuited component set A.

[0048] S503: Select the root node.

[0049] Select K nodes from the nodes of the analog circuit as root nodes according to actual needs.

[0050] The root node is used to generate the node tree for searching and identifying non-functional components. In practical applications, if the selected root node itself contains short-circuited components or is not connected to the main circuit, the node tree generated based on that root node may misidentify these components during the search. Therefore, it is necessary to set multiple root nodes to search separately, making the obtained set of non-functional components more accurate and comprehensive. In analog circuits, ground nodes and power nodes are definitely connected to the main circuit; therefore, it is best to include ground nodes and power nodes among the K root nodes.

[0051] S504: Let k = 1.

[0052] S505: Identifying cut vertices based on the k-th root node:

[0053] In step S502, only the case of a single component being short-circuited can be identified. However, for short circuits or open circuits of multiple connected components, other methods are required for judgment. In this invention, before judging whether a component is short-circuited or open-circuited, the cut points in the analog circuit need to be identified based on the k-th root node using the Tarjan algorithm. Figure 6 This is a flowchart illustrating the articulation of the Tarjan algorithm for identifying cut points in this invention. Figure 6 As shown, the specific steps for identifying cut points based on the Tarjan algorithm in this invention include:

[0054] S601: Generate node tree:

[0055] Based on the k-th root node, the keys in the node dictionary set Nodes are used as nodes, and the keys in the component dictionary set Components are used as connections between nodes. The connections between different nodes are determined by mutual lookup between the two dictionaries Components and Nodes, thus obtaining the node tree. k .

[0056] S602: Determine node timestamps:

[0057] Use a depth-first search to find each node x in the node tree. i The order in which nodes are visited during a depth-first search is used as the node x.i timestamp dfn[x i ], i = 1, 2, ..., N, where N represents the number of nodes. Timestamp dfn[x i This refers to the dfs_clock value when visiting this node in Tarjan's algorithm. dfs_clock is a global variable that records the traversal order. It is initialized to 1, and the value is incremented by 1 each time a new node is reached.

[0058] S603: Cut point detection:

[0059] Next, we need to determine the cut vertices in the node tree based on the Tarjan algorithm. To adapt to the needs of this invention, some improvements have been made to the existing Tarjan algorithm, and the specific methods are as follows:

[0060] First, we need to classify each node x... i timestamp dfn[x i Traverse each node and determine the x-axis of each node based on the Tarjan algorithm. i The traceability value low[x i The traceback value represents the smallest timestamp among all nodes in the search tree that can be reached, starting from the current node as the root node of the search tree and traversing an edge outside the search tree. The specific method for determining the traceback value is as follows:

[0061] Let the current node be now, initialize the trace value low[now] = dfn[now], the number of subtrees child = 0, and get the parent node fa and all child nodes to of node now. d d = 1, 2, ..., D, where D represents the number of child nodes of node now. For each child node to... d If the child node to d timestamp dfn[to d If the timestamp of node now is less than that of node to, then node to... d If it is an ancestor node, then further determine whether to... d =fa, if not, update the trace value of node now: low[now] = min(low[now], dfn[to d If the child node to... d timestamp dfn[to d If the timestamp of node now is greater than that of node now (low[now]), let the number of subtrees of node now be child = child + 1, and then set the child node to... d The improved Tarjan algorithm is used to determine its traceability value low[to] dThen update the trace value of node now: low[now] = min(low[now], low[to]). d ]).

[0062] After determining the traceability value for all nodes, each node is sequentially checked to determine whether it is a cut vertex. A cut vertex is defined as follows: if deleting a node and all edges associated with that node from the graph results in the graph being divided into two or more disconnected subgraphs, then that node is called a cut vertex. Based on the above definition, the specific method for determining cut vertices in this invention is as follows:

[0063] When node x i If the node is the root node, then check if the number of its subtrees is greater than or equal to 2. If it is, then node x... i It is a cut vertex if it is not, otherwise it is not. This is because when the number of subtrees is greater than or equal to 2, if the root node is removed, these subtrees will no longer be interconnected, so the root node is a cut vertex in this case.

[0064] When node x i If the root node is not the node, then node x i The child node has a trace value greater than node x. i The timestamp of node x i If it is a cut vertex, then node x is a cut vertex; otherwise, node x is a cut vertex. i It is not a cut vertex. Because if the trace value of the child node is larger, it means that once node x is removed... i node x i The ancestor node of node x will no longer communicate with its child nodes, so at this time node x i This is the cut point.

[0065] Tree k The number of cut vertices obtained is M. For the m-th cut vertex... i m This represents the node index of the m-th cut point. The node whose traceback value is greater than the cut point's timestamp is used to construct the child nodes that make the cut point's timestamp greater than the cut point's timestamp. The set of child nodes of the cut point, toSet k,m In the given information, m = 1, 2, ..., M.

[0066] S506: Determine non-functional components based on the current cut point:

[0067] Based on the M cut points obtained in step S505 and the set of child nodes toSet k,m The search yielded a set B of non-functional components. k The specific method is as follows: for each cut point Arbitrarily select its child node set toSet k,mA path search is performed using a node as a child node. The search proceeds when the found child node is an articulation point or the child node does not exist (i.e., the path reaches the tree). k The path search ends when the path reaches its end; the path will be determined based on M cut points. and the set of child nodes toSet k,m The components traversed along all the paths obtained from the search constitute the tree structure based on the current node. k The resulting set of non-functional components B k .

[0068] S507: Determine if k < K. If yes, proceed to step S508; otherwise, proceed to step 109.

[0069] S508: Let k = k + 1, then return to step SS505.

[0070] S509: Determine the set of non-functional components:

[0071] Find the set A of short-circuited devices and the set B of K non-functional components. k The set of non-functional components of the analog circuit is obtained by combining the sets of A∪B₁∪B₂∪… ...…∪B₂∪…∪B₁∪…∪ K .

[0072] To better illustrate the technical solution of this invention, an experimental verification of this invention is conducted using a Class B push-pull power amplifier circuit as an example. Figure 7 This is the circuit diagram of the Class B push-pull power amplifier circuit in this embodiment. Component names and node names are listed below. Figure 7 The necessary circuit connection information is extracted from the circuit netlist file, and the component dictionary set Components and the node dictionary set Nodes are constructed as follows:

[0073] Components: {'qQ2':['5','4','0'], 'qQ1':['1','2','5'], 'dD2':['3','4'], 'dD1':['2','3'], 'vV2':['1','0'], 'vV1':['Input','0 '], 'rR3': ['Output', '0'], 'cC3': ['5', 'Output'], 'rR2': ['4', '0'], 'rR1': ['1', '2'], 'cC2': ['Input', '4'], 'cC1': ['Input', '2']}. As you can see, the Components dictionary stores the node connection relationships corresponding to the components. For example, the last one, 'cC1':['Input','2'], means that component C1 is connected to port Input and port 2. Figure 3The circuit diagram information matches.

[0074] Nodes: {'5':['qQ2','qQ1','cC3'], '4':['qQ2','dD2','rR2','cC2'], '0':['qQ2','vV2','vV1','rR3','rR2'], '1':['qQ1','v V2','rR1'], '2': ['qQ1', 'dD1', 'rR1', 'cC1'], '3': ['dD2', 'dD1'], 'Input': ['vV1', 'cC2', 'cC1'], 'Output': ['rR3', 'cC3']}. The Nodes section stores information about the nodes and the components they are connected to. For example, '5':['qQ2','qQ1','cC3'] indicates that node 5 is connected to three components: Q2, Q1, and C3, which is consistent with the circuit diagram.

[0075] First, identify the case of a short circuit in a single component. Traverse the component dictionary set Components and find that no node name of a certain component is a subset of the node name of another component. Therefore, no component is short-circuited in this embodiment.

[0076] Then, a graph abstracted from the circuit diagram structure is constructed using the component dictionary set `Components` and the node dictionary set `Nodes`. Traversing the node dictionary set `Nodes`, taking the first element '5': ['qQ2', 'qQ1', 'cC3'] as an example, through `qQ2`, nodes 4 and 0 are found to be connected to node 5 in `Components`; through `qQ1`, nodes 1 and 2 are found to be connected to node 5; and through `cC3`, `Output` is found to be connected to node 5. That is, nodes 4, 0, 1, 2, and `Output` are connected to node 5. The connection relationships of the next five child nodes (4, 0, 1, 2, and `Output`) with other nodes can be obtained similarly. Finally, the timestamp and trace value of each node are determined based on the Tarjan algorithm. Figure 8 This is an abstract diagram of the circuit structure in this embodiment. For example... Figure 8 As shown, the values ​​on the rectangular background are timestamps, and the values ​​on the diamond background are trace values. It can be seen that starting from the root node, there are three search paths obtained in this embodiment:

[0077] ①:5→4→0→1→2→3

[0078] ②: 5→4→0→1→2→Input

[0079] ③: 5→4→0→Output

[0080] After traversal, there is no low[child node] ≥ dfn[parent node] and the number of subtrees of the root node 5 is 1. Therefore, the graph has no cut vertices, which also indicates that the original circuit diagram has no short-circuited or open-circuited nodes.

[0081] To demonstrate the workflow of this invention, short circuits and open circuits are artificially introduced in this embodiment. Figure 9 This is the circuit diagram of a Class B push-pull power amplifier circuit after a deliberately malfunction has been introduced. For example... Figure 9 As shown in the diagram, nodes 2 and 4 were connected, D1 and D2 were short-circuited, and then the ground terminal of R3 was disconnected. At this point, the component dictionary (Components) and node dictionary (Nodes) are as follows:

[0082] Components: {'qQ2':['5','4','0'], 'qQ1':['1','4','5'], 'dD2':['3','4'], 'dD1':['4','3'], 'vV2':['1','0'], 'vV1':['Input','0'], 'rR 3':['output','R3_OPEN_2'], 'cC3':['5',cC3'output'], 'rR2':['4','0'], 'rR1':['1','4'], 'cC2':['Input','4'], 'cC1':['Input','4']}.

[0083] Nodes: {'5':['qQ2','qQ1','cC3'], '4':['qQ2','qQ1','dD2','dD1','rR2','rR1','cC2','cC1'], '0':['qQ2','vV2','vV1','rR2'] , '1': ['qQ1', 'vV2', 'rR1'], '3': ['dD2', 'dD1'], 'Input': ['vV1', 'cC2', 'cC1'], 'output': ['rR3', 'cC3'], 'R3_OPEN_2': ['rR3']}.

[0084] Figure 10 This is in this embodiment Figure 9 The diagram shows an example of a node tree for the circuit diagram. Starting from the root node, four search paths are obtained in this embodiment:

[0085] ①:5→4→0→1

[0086] ②: 5→4→0→Input

[0087] ③:5→4→3

[0088] ④: 5 → Output

[0089] At this time, the number of children child of the root node 5 is 2, and the child nodes are node 4 and node Output. low[Input] = 2 because after traversing to node Input, it can return to node 4 and 0, and dfn[4] < dfn[0], so low[Input] = dfn[4] = 2. low[3] = 6 because initially low[3] = dfn[3] = 6, and when traversing to node 3, there is no path to point to other nodes, so the value of low[3] remains unchanged. The value of low[Output] is also 7 because of this. Then in the graph, low[3] > dfn[4], so node 4 is a cut point, and Set[4] = [3], that is, the child node that makes node 4 a cut point is 3. Also, the number of children child of the root node 5 is greater than 1, so the root node is also a cut point. Since low[4] = dfn[5], low[Output] > dfn[5], so Set[5] = [Output], that is, among the subtrees of node 5, the node that cannot return to node 5 is node Output.

[0090] After obtaining the cut points and the set of their child nodes, it is necessary to recursively restore the search path to obtain the set of non-functional components. Figure 11 This is a schematic diagram of recursively restoring the search path in this embodiment. As Figure 11 shown, traverse Set: {'4': [3], '5': [Output]}. First, in the node dictionary set Nodes, find the two components dD2 and dD1 connected to it according to node 3, and store them in the result set, the non-functional component set B. Then go to the component dictionary set Components to find components dD2 and dD1, and find that it returns to the cut point, so stop searching. In the node dictionary set Nodes, find the two components cC3 and rR3 connected to it according to node Output, and store them in the non-functional component set B. Then return to the component dictionary set Components. The other node of component cC3 is a cut point, so stop searching. The other node of component rR3 is R3_OPEN_2, and in the component dictionary set Nodes, it is only connected to rR3, so the search is also completed. Get the final result set B: {'dD1', 'rR3', 'cC3', 'dD2'}, which contains all open and short-circuited components.

[0091] Because the circuit structure is actually a black box, in practical applications, it is not known whether node 5 is a short-circuit node. Therefore, it is also necessary to select another different node as the root node and execute the algorithm again from the beginning. The process is similar and will not be elaborated here.

[0092] Next, this invention will be experimentally verified in a large circuit containing 1229 components. This large circuit includes both open-circuit and short-circuit scenarios, and the components include two-port devices such as capacitors and resistors, as well as three-port devices such as MOSFETs. The test results are as follows:

[0093]

[0094] The test results show that the runtime of this invention is also ideal. For a netlist with thousands of rows, it only took 0.02 seconds from reading to obtaining all results. A total of 115 non-functional components with short circuits and open circuits were identified, accounting for 9.4% of the total circuit. After verification, the results were consistent with the actual results. Among them, there were 95 two-terminal devices and 20 three-terminal devices. Because each two-terminal device has two hard faults, open circuit and short circuit, and each three-terminal device has one open circuit fault at each port and one short circuit fault between every pair of ports, a total of 95×2+20×(3+3)=310 fault simulations were reduced. This is very significant for shortening the fault simulation time of analog circuits.

[0095] Although the illustrative specific embodiments of the present invention have been described above to enable those skilled in the art to understand the invention, it should be understood that the invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the invention as defined and determined by the appended claims, and all inventions utilizing the concept of the present invention are protected.

Claims

1. A method for identifying non-functional devices in analog circuits, characterized in that, Includes the following steps: S1: Extract the component information and node information of the analog circuit from the netlist file of the analog circuit to obtain the component dictionary set Components and the node dictionary set Nodes. The key of the component dictionary set Components is the component name and the value is an array used to store the node name connected to the component. The key of the node dictionary set Nodes is the node name and the value is an array used to store the component name connected to the node. S2: Traverse the component dictionary set Components, compare the node names of each component, and if there are multiple nodes with the same name connected to a component, then the component is short-circuited and the component is added to the short-circuited component set A. S3: Select K nodes from the nodes of the analog circuit as root nodes according to actual needs; S4: Let k = 1; S5: Based on the k-th root node, the Tarjan algorithm is used to identify the cut points in the analog circuit. The specific method is as follows: S5.1: Based on the k-th root node, the keys in the node dictionary set Nodes are used as nodes, and the keys in the component dictionary set Components are used as connections between nodes. The connection relationships between different nodes are determined by mutual lookup between the two dictionaries Components and Nodes, thus obtaining the node tree. k ; S5.2: Use a depth-first search to find each node x in the node tree. i The order in which nodes are visited during a depth-first search is used as the node x. i timestamp dfn[x i ], i = 1, 2, ..., N, where N represents the number of nodes; S5.3: According to each node x i timestamp dfn[x i Traverse each node and determine the x-axis of each node based on the Tarjan algorithm. i The traceability value low[x i The specific method is as follows: Let the current node be now, initialize the trace value low[now] = dfn[now], the number of subtrees child = 0, and get the parent node fa and all child nodes to of node now. d d = 1, 2, ..., D, where D represents the number of child nodes of node now. For each child node to... d If the child node to d timestamp dfn[to d If the timestamp of node now is less than that of node to, then node to... d If it is an ancestor node, then further determine whether to... d =fa, if not, update the trace value of node now: low[now] = min(low[now], dfn[to d If the child node to... d timestamp dfn[to d If the timestamp of node now is greater than that of node now (low[now]), let the number of subtrees of node now be child = child + 1, and then set the child node to... d The improved Tarjan algorithm is used to determine its traceability value low[to] d Then update the trace value of node now: low[now] = min(low[now], low[to]). d ]); After determining the traceability value for all nodes, we sequentially determine whether each node is a cut vertex. The specific method is as follows: When node x i If the node is the root node, then check if the number of its subtrees is greater than or equal to 2. If it is, then node x... i It is a cut point; otherwise, it is not. When node x i If node x is not the root node, then... i The child node has a trace value greater than node x. i The timestamp of node x i If it is a cut vertex, then node x is a cut vertex; otherwise, node x is a cut vertex. i Not a cut point; Tree k The number of cut vertices obtained is M. For the m-th cut vertex... i m This represents the node index of the m-th cut point. The node whose traceback value is greater than the cut point's timestamp is used to construct the child nodes that make the cut point's timestamp greater than the cut point's timestamp. The set of child nodes of the cut point, toSet k,m In the given information, m = 1, 2, ..., M; S6: Based on the M cut points obtained in step S5 and the set of child nodes toSet k,m The search yielded a set B of non-functional components. k The specific method is as follows: for each cut point Arbitrarily select its child node set toSet k,m A path search is performed using any node as a child node. The path search ends when a found child node is an articulation point or no child node exists. This process is repeated based on M articulation points. and the set of child nodes toSet k,m The components traversed along all the paths obtained from the search constitute the tree structure based on the current node. k The resulting set of non-functional components B k ; S7: Determine if k < K. If yes, proceed to step S8; otherwise, proceed to step S9. S8: Let k = k + 1, then return to step S5; S9: Find the set A of short-circuited devices and the set B of K non-functional components. k The set of non-functional components of the analog circuit is obtained by combining the sets of A∪B₁∪B₂∪… ...…∪B₂∪…∪B₁∪…∪ K .

2. The method for identifying non-functional devices in analog circuits according to claim 1, characterized in that, In step S3, the K root nodes include ground nodes and power nodes.

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