A non-uniform correction method and device for an infrared sensing-in-memory circuit

Abstract

The present invention belongs to the technical field of integrated circuits and semiconductor devices, and particularly relates to a non-uniform correction method and device for an infrared sensing and computing circuit. The present invention is used to eliminate the errors existing in the infrared-based sensing and computing integrated circuit, correct the deviations existing in the infrared sensor, as well as the noises generated by processes and environments, so as to ensure the calculation accuracy of the circuit. The non-uniform correction method of the present invention encodes the deviations generated by the infrared detector due to voltage into the neural network weights in advance by means of an algorithm, and utilizes the output characteristics of transistors to achieve the purpose of eliminating errors through software and hardware cooperation. In addition, the present invention also sets a digital non-uniform correction module at the output end of the sensing and computing unit to eliminate thermal noise and other circuit noises.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits and semiconductor devices, and particularly relates to a non-uniform correction method and device for an infrared sensing-in-memory circuit. Background Art

[0002] Infrared detection technology utilizes the infrared thermal radiation energy information of an object to detect certain information to be measured. Infrared detection technology is a technology that detects the infrared radiation energy information that cannot be observed by the human naked eye, converts it into voltage or current information that can be processed by the backend circuit through a certain method, and finally displays it in the form of an image or video on a terminal device. The readout circuit is a key component of an infrared detector. It provides a suitable and stable bias voltage for the infrared detector array, extracts the weak signals generated by the detector units, amplifies, samples and holds, converts, and outputs the extracted signals, and also generates row and column selection control signals, timing control signals, etc. required for the detector readout circuit. With the expansion of the scale of uncooled infrared detector arrays, the reduction of the pixel center pitch, and the improvement of the manufacturing process level, the difficulty of designing a high-performance readout circuit that matches the scale of uncooled infrared detectors has increased sharply. In particular, the control of core parameters such as noise and non-uniformity has become the difficulty and hotspot in the design of large-area uncooled infrared focal plane readout circuits. Usually, the traditional vanadium oxide readout circuit operates blind pixels and detection pixels at the same bias voltage, and eliminates the influence of the bias voltage and thermal noise on the resistance through differential to obtain the change in the current signal caused by radiation.

[0003] Problems existing in the prior art are:

[0004] The traditional readout circuit not only has high power consumption, but also requires a larger layout area than other input-stage structures, and this defect is more obvious in an infrared sensing-in-memory integrated circuit. Since in an infrared sensing-in-memory unit, an SRAM and a transistor array for realizing sensing-in-memory also need to be integrated below the infrared detector resistor, there is no more space to integrate blind pixels and the readout circuit. Summary of the Invention

[0005] In view of the above problems, the present invention proposes a non-uniform correction method and device for an infrared sensing-in-memory circuit.

[0006] The technical solution of the present invention is as follows:

[0007] A non-uniform correction method for an infrared sensing and computing circuit, where the infrared sensing and computing circuit consists of an array composed of infrared sensing and computing units and an arithmetic circuit module. Each infrared sensing and computing unit includes an infrared detector, a MOS transistor, and an SRAM. One end of the infrared detector is connected to the row line of the array, and the other end is connected to the drain of the MOS transistor. The gate of the MOS transistor is connected to the SRAM, and the source of the MOS transistor is connected to the column line. The arithmetic circuit module accumulates the output currents of all the sensing and computing units in each column and then performs analog-to-digital conversion through an analog-to-digital conversion module for output. The non-uniform correction method includes the following steps:

[0008] S1. Collect the deviation caused by the bias voltage across the infrared detector.

[0009] S2. Use the obtained current change as the deviation caused by the infrared detector voltage and encode it into the corresponding weight value of the SRAM. The weight value is the weight value of a trained neural network and is stored in the SRAM to control the gate of the corresponding connected MOS transistor. The specific method of encoding the deviation into the weight value is as follows: Set thresholds according to specific requirements to judge the change in the current of the infrared detector. There are 4 thresholds, namely threshold 1 > threshold 2 > threshold 3 > threshold 4, corresponding to 4 SRAMs connected to 4 parallel MOS transistors in a 4-bit sensing and computing integrated circuit. The 4 SRAMs are defined as SRAM1, SRAM2, SRAM3, and SRAM4 respectively. Each SRAM stores 1 bit of the weight value. It is defined that the lowest bit of the 4-bit weight value is stored in SRAM4, the second lowest bit is stored in SRAM3, the second highest bit is stored in SRAM2, and the highest bit is stored in SRAM1. If the absolute value of the change in the current of the infrared detector is greater than threshold 4 and less than threshold 3, then change the original weight value stored in SRAM4. If the absolute value of the change in the current of the infrared detector is greater than threshold 3 and less than threshold 2, then change the original weight value stored in SRAM3. If the absolute value of the change in the current of the infrared detector is greater than threshold 2 and less than threshold 1, then change the original weight value stored in SRAM2. If the absolute value of the change in the current of the infrared detector is greater than threshold 1, then change the original weight value stored in SRAM1. This scheme takes a 4-bit sensing and computing integrated circuit as an example, and the same principle applies to other bits of sensing and computing integrated circuits.

[0010] S3. The MOS transistor changes its switching state according to the modified weight value in S2: After judging the current of the infrared detector according to the set threshold, if the weight value in the SRAM is modified, the off / on state of the MOS transistor connected to the SRAM changes, and the current flowing through the MOS transistor changes accordingly, so that the output current of the entire sensing and computing integrated circuit changes, offsetting the change in the current of the infrared detector, thereby eliminating the error caused by the change in the bias voltage across the infrared detector.

[0011] S4. Trim the output of the arithmetic circuit module digitally to obtain the final output result.

[0012] Furthermore, the MOS transistors in each infrared sensing and computing unit are composed of multiple MOS transistors connected in parallel, and each MOS transistor is connected to its corresponding SRAM. In this solution, each sensing and computing unit contains multiple parallel transistors for implementing multi-bit SRAMs that store weights corresponding to the transistors one by one.

[0013] Furthermore, the digital trimming in step S4 is specifically as follows: Initialize the deviations caused by thermal radiation, process noise parameters, environmental noise, and row-column noise using digital methods, and perform data trimming to finally correct the deviations, process, and environmental noise generated by the infrared detector.

[0014] A non-uniform correction device for an infrared sensing and computing circuit. The infrared sensing and computing circuit is composed of an array of infrared sensing and computing units and an arithmetic circuit module. Each infrared sensing and computing unit includes an infrared detector, a MOS transistor, and an SRAM. One end of the infrared detector is connected to the row line of the array, and the other end is connected to the drain of the MOS transistor. The gate of the MOS transistor is connected to the SRAM, and the source of the MOS transistor is connected to the column line. The arithmetic circuit module accumulates the output currents of all sensing and computing units in each column and outputs them through an analog-to-digital conversion module after analog-to-digital conversion. The non-uniform correction device includes a first non-uniform correction module and a second non-uniform correction module. The input of the first non-uniform correction module is the weight to be stored in the SRAM and the deviation caused by the bias voltage across the infrared detector. The output of the first non-uniform correction module is connected to the corresponding SRAM. The first non-uniform correction module is used to encode the deviation into the weight. The specific method is as follows: Set a threshold according to specific requirements to judge the change in the current of the infrared detector. If the absolute value of the change in the current of the infrared detector is within the set threshold range, then change the original weight stored in the SRAM accordingly. The input of the second non-uniform correction module is the output of the arithmetic circuit module. The second non-uniform correction module initializes the deviations caused by thermal radiation, process noise parameters, environmental noise, and row-column noise using digital methods, and performs data trimming on the output of the arithmetic circuit module. The output of the second non-uniform correction module is the final output of the infrared sensing and computing circuit.

[0015] The beneficial effects of the present invention are as follows: Use a software and hardware collaborative method for non-uniform correction to eliminate errors in the sensing and computing integrated array, saving layout area and power consumption compared with traditional methods. Description of the Drawings

[0016] Figure 1 It is a sensing and computing integrated array structure based on a vanadium oxide infrared detector.

[0017] Figure 2 It is a schematic diagram of realizing a multi-bit sense-storage-computation integrated unit.

[0018] Figure 3 It is a schematic diagram showing the change of the resistance value of a vanadium oxide infrared detector with external light illumination.

[0019] Figure 4 It is a schematic diagram showing the change of the resistance value of a vanadium oxide infrared detector with external temperature.

[0020] Figure 5 It is a schematic circuit diagram (4 bits) of a sense-storage-computation integrated unit based on a software-hardware collaborative non-uniform correction method.

[0021] Figure 6 It is an array diagram of a sense-storage-computation integrated circuit based on a software-hardware collaborative non-uniform correction method.

[0022] Figure 7 It is a flowchart of a sense-storage-computation integrated array for completing light sensing, storage, calculation, and non-uniform correction.

[0023] Figure 8 It is a timing diagram of the non-uniform correction module 1 encoding the error into the weight value process.

[0024] Figure 9 It is a timing diagram of the non-uniform correction module 2 eliminating the noise in the output voltage of the analog-to-digital conversion module. Specific implementation manners

[0025] The present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0026] Embodiment

[0027] In this example, the transistor used is an N-type insulated gate field effect transistor, that is, an NMOSFET structure. It is well known in the art that the gate voltage of a MOSFET determines the on / off state of the transistor. When the gate voltage V GS is lower than the threshold voltage V th of the transistor, the transistor is turned off and no current flows through the transistor. When the gate voltage V GS is higher than the threshold voltage V th of the transistor, the transistor is turned on and current flows through the transistor. After the transistor is turned on, when the transistor operates in the linear region, changing the drain-source voltage V DS of the transistor can change the drain current I D .

[0028] The sense-in-memory computing unit utilizes the output characteristics of a transistor in the linear region. When the SRAM connected to the transistor gate stores the weight 1, the transistor conducts. If the infrared detector resistor connected to the transistor drain senses a change in external light at this time, the voltage across the infrared detector resistor changes, and the drain-source voltage V DS of the transistor also changes accordingly. When the drain current changes to a value lower than a specific threshold current, the transistor is regarded as off, and vice versa, the transistor is regarded as on, as Figure 1 shown in is a sense-in-memory computing array based on a single transistor, SRAM, and an infrared detector resistor.

[0029] Using the relationship between the transistor channel width-to-length ratio and the drain current can achieve multi-bit operations. According to the above content, it can be known that the pixel synaptic circuit of a single transistor can achieve 1-bit weight. Therefore, by connecting multiple transistors in parallel and controlling the channel width-to-length ratio of each transistor to be in a certain proportion, multi-bit weights can be achieved within the sense-in-memory computing unit, as Figure 2 shown in is the schematic diagram of a sense-in-memory computing unit that realizes multi-bit. Let the channel width-to-length ratios of transistors M1, M2... Mn be W / L: 2W / L:...: 2 n W / L, then proportional transistor currents can be obtained to achieve multi-bit weights.

[0030] The infrared detector used in this example is a VOx vanadium oxide infrared detector resistor, as Figure 3 shown in is the schematic diagram of the resistance value of the VOx vanadium oxide infrared detector resistor changing with external light. As a semiconductor thermosensitive thin film, the temperature coefficient of the vanadium oxide thin film is proportional to the resistivity, and the sensitivity and operating temperature are relatively high. When the VOx vanadium oxide infrared detector detects a change in external light, its resistance will change accordingly. Generally, the stronger the light, the lower the resistance value of the photodetector resistor, and its resistance value changes non-linearly with light.

[0031] The resistance value of the VOx vanadium oxide infrared detector is not only affected by changes in external light, but also by temperature and the voltage across it, that is, the temperature-resistance characteristic and voltage-resistance characteristic of vanadium oxide. As Figure 4 shown in is the schematic diagram of the resistance value of the VOx vanadium oxide infrared detector resistor changing with temperature. Let the resistance value of the infrared detector resistor at any time be R + dR, where R is the initial resistance value and dR is the resistance change amount. Its temperature coefficient of resistance is represented by TCR, TCR = dR / RdT. For vanadium oxide, TCR = -2.2%, that is, when the temperature changes by 1°C, the resistance decreases by 2.2% of the original resistance value. The bias voltage across the VOx vanadium oxide detector resistor will cause a change in resistance, and the resistance change caused by the bias voltage is much greater than the resistance change caused by the thermal radiation signal.

[0032] Due to the above-mentioned temperature-resistance characteristics and voltage-resistance characteristics of vanadium oxide, there will be a large deviation in the sense-storage-computation integrated unit based on this infrared detector. That is, in an ideal sense-storage-computation integrated circuit, the resistance of the infrared detector should only be affected by the change of external light intensity. In order to eliminate the deviation caused by temperature, bias voltage and external environment, the present invention uses the non-uniform correction module 1 to eliminate the error caused by the bias voltage, and uses the non-uniform correction module 2 to eliminate the influence caused by thermal radiation and external environment.

[0033] As Figure 5 is the circuit schematic diagram (4 bits) of the sense-storage-computation integrated unit in this example. The non-uniform correction module 1 is connected to the SRAM, and encodes the deviation caused by the voltage at both ends of the vanadium oxide detector resistance into the SRAM in advance. The specific implementation steps are as follows:

[0034] Step 1: Collect the deviation caused by the bias voltage at both ends of the vanadium oxide infrared detector resistance;

[0035] Step 2: As Figure 6 , in the sense-storage-computation integrated circuit that realizes 4Bit weights, there are 4 parallel transistors. The gate of each transistor is uniquely connected to an SRAM. The SRAM stores the trained neural network weights. If the stored weight is 1, the transistor connected to it conducts; if the weight stored in the SRAM is 0, the corresponding connected transistor is turned off and no current flows through. Assume that before the non-uniform correction module 1 encodes the error into the four SRAMs, the weights stored in SRAM1, SRAM2, SRAM3, and SRAM4 are 1, 0, 0, and 0 in sequence. If the bias voltage at both ends of the vanadium oxide detector resistance causes the current flowing through the transistor to decrease, the weight needs to be changed according to the magnitude of the current change. If the current change is less than a specific threshold 3 and greater than threshold 4, the lowest bit of the original weight, that is, the weight in SRAM4, can be encoded from 0 to 1, so that the transistor M4 conducts. At this time, the current flowing through the transistor increases, that is, the process of encoding the deviation into the weight is completed, offsetting the effect of the decrease in the infrared detector current and eliminating the deviation caused by the voltage.

[0036] Step 3: After the non-uniform correction module 1 completes the elimination of the deviation caused by the voltage, the vanadium oxide infrared detector detects the change of external light intensity, and the resistance value changes, causing a change in the drain-source voltage V DS of the transistor, and the current flowing through the transistor also changes accordingly.

[0037] Step 4: As Figure 6, in the sense-storage-computation integrated array, the output currents of the sense-storage-computation units along the same column line are accumulated to obtain the total column current. After the total column current of each column flows into the analog-to-digital conversion module, a digital output is obtained, which is then used as the input of the non-uniform correction module 2. The non-uniform correction module 2 initializes the deviations caused by thermal radiation, process noise parameters, environmental noise, and row-column noise using digital methods and performs data trimming, finally obtaining an output result that corrects the deviations, processes, and environmental noise generated by the infrared sensor.

[0038] The flowchart of the above infrared sense-storage-computation array for performing photosensing, storage, computation, and non-uniform correction is as Figure 7 shown.

[0039] As Figure 8 is the timing diagram of the non-uniform correction module 1 encoding the deviation caused by the voltage across the infrared detector into the weights stored in the SRAM under the control of the clock signal (taking the sense-storage-computation integrated array with 4-bit weights as an example). Assuming that the weights W1, W2, W3, and W4 stored in the four parallel transistors (such as Figure 5 ) M1, M2, M3, and M4 are 1, 0, 0, and 0 in sequence when the error is not encoded into the weights. At time t1, due to the influence of the voltage across it, the resistance of the infrared detector increases, and the current I R flowing through the infrared detector resistance decreases. The non-uniform correction module 1 encodes this deviation into the SRAM in advance by changing the weight W4 of the M4 transistor, making the M4 transistor conduct and increasing the output current to offset the deviation caused by the voltage across the detector resistance.

[0040] Figure 9 shown is the timing diagram of the non-uniform correction module 2 correcting the output. This non-uniform correction module takes the output voltage Vout1 obtained by processing the sense-storage-computation integrated array through the analog-to-digital conversion (ADC) module as the input and initializes the noise in Vout1 caused by thermal radiation, process, and environment using digital methods.

Claims

1. A non-uniform correction method for an infrared sensing and computing circuit, where the infrared sensing and computing circuit is composed of an array of infrared sensing and computing units and an arithmetic circuit module. Each infrared sensing and computing unit includes an infrared detector, a MOS transistor, and an SRAM. One end of the infrared detector is connected to the row line of the array, and the other end is connected to the drain of the MOS transistor. The gate of the MOS transistor is connected to the SRAM, and the source of the MOS transistor is connected to the column line; the arithmetic circuit module accumulates the output currents of all the sensing and computing units in each column and then performs analog-to-digital conversion through an analog-to-digital conversion module for output; It is characterized in that, the non-uniform correction method includes the following steps: S1. Collect the current change caused by the change in the bias voltage across the infrared detector; S2. Take the obtained current change amount as the deviation caused by the voltage of the infrared detector and encode it into the weight value of the corresponding SRAM. The weight value is the weight value of a trained neural network and is stored in the SRAM to control the gate of the corresponding connected MOS transistor; the specific method of encoding the deviation into the weight value is: set a threshold according to specific requirements to judge the change in the current of the infrared detector. There are 4 thresholds, namely threshold 1 > threshold 2 > threshold 3 > threshold 4, corresponding to 4 SRAMs connected to 4 parallel MOS transistors in a 4-bit sensing and computing integrated circuit. The 4 SRAMs are respectively defined as SRAM1, SRAM2, SRAM3, and SRAM4. Each SRAM stores 1 bit of the weight value. It is defined that the lowest bit of the 4-bit weight value is stored in SRAM4, the second lowest bit of the 4-bit weight value is stored in SRAM3, the second highest bit of the 4-bit weight value is stored in SRAM2, and the highest bit of the 4-bit weight value is stored in SRAM1; if the absolute value of the change in the current of the infrared detector is greater than threshold 4 and less than threshold 3, then change the original weight value stored in SRAM4; if the absolute value of the change in the current of the infrared detector is greater than threshold 3 and less than threshold 2, then change the original weight value stored in SRAM3; if the absolute value of the change in the current of the infrared detector is greater than threshold 2 and less than threshold 1, then change the original weight value stored in SRAM2; if the absolute value of the change in the current of the infrared detector is greater than threshold 1, then change the original weight value stored in SRAM1; S3. The MOS transistor changes its switching state according to the modified weight value in S2: after judging the current of the infrared detector according to the set threshold, if the weight value in the SRAM is modified, the off / on state of the MOS transistor connected to the SRAM changes, and the current flowing through the MOS transistor changes accordingly, so that the output current of the overall sensing and computing integrated circuit changes, offsetting the change in the current of the infrared detector, thereby eliminating the error caused by the change in the bias voltage across the infrared detector; S4. Adjust the output of the arithmetic circuit module by digital means to obtain the final output result.

2. A non-uniform correction method for an infrared sensing and computing circuit according to claim 1, It is characterized in that, The MOS transistors in each infrared sensing and computing unit are composed of multiple MOS transistors connected in parallel, and each MOS transistor is connected to its corresponding SRAM.

3. A non-uniform correction method for an infrared sensing and computing circuit according to claim 1, characterized in that the specific method of trimming in step S4 by digital means is: initializing the deviations caused by thermal radiation, process noise parameters, environmental noise, and row-column noise by digital means, and performing data trimming, and finally obtaining the correction of the deviations, processes, and environmental noise generated by the infrared detector.

4. A non-uniform correction device for a non-uniform correction method for an infrared sensing and computing circuit according to claim 1, characterized in that the non-uniform correction device includes a first non-uniform correction module and a second non-uniform correction module; the input of the first non-uniform correction module is the weight value to be stored in the SRAM and the deviation caused by the bias voltage across the infrared detector, and the output of the first non-uniform correction module is connected to the corresponding SRAM. The first non-uniform correction module is used to encode the deviation into the weight value. The specific method is: setting a threshold according to specific requirements to judge the change in the current of the infrared detector. If the absolute value of the change in the current of the infrared detector is within the set threshold range, the original weight value stored in the SRAM is changed; the input of the second non-uniform correction module is the output of the arithmetic circuit module. The second non-uniform correction module initializes the deviations caused by thermal radiation, process noise parameters, environmental noise, and row-column noise by digital means, and performs data trimming on the output of the arithmetic circuit module. The output of the second non-uniform correction module is the final output of the infrared sensing and computing circuit.

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