Method of manufacturing a semiconductor structure

By employing multiple annealing processes and chemical mechanical polishing, the problem of incomplete filling in trenches with large aspect ratios in spin-coated dielectric layers was solved, thereby improving the performance of semiconductor structures and the stability of conductive structures.

CN116093015BActive Publication Date: 2026-02-17CHANGXIN MEMORY TECH INC
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Patent Information

Application Number
CN202310067594.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-12
Publication Date
2026-02-17
Estimated Expiration
2043-01-12

AI Technical Summary

Technical Problem

Existing spin-coating dielectric layer processes struggle to effectively fill trenches with large aspect ratios when filling trench structures. This results in the fluid dielectric film at the bottom of the trench not being able to fully react with the reactive gas, affecting the performance of the semiconductor structure and the stability of the conductive structure.

Method used

The process employs multiple annealing treatments combined with chemical mechanical polishing. First, a first annealing treatment is performed at a low temperature to form a first dielectric film. Then, a second annealing treatment is performed at a high temperature. By controlling the annealing temperature and gas flow rate and pressure, the flowable dielectric film at the bottom of the trench is ensured to fully react, forming a second dielectric film with superior density and insulation properties compared to the first.

Benefits of technology

This increases the reaction ratio between the fluid dielectric film at the bottom of the trench and the reactive gas, enhancing the performance of the semiconductor structure and the stability of the conductive structure, while reducing the possibility of the conductive structure tilting.

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Abstract

The embodiment of the present disclosure provides a semiconductor structure manufacturing method, which comprises the following steps: providing a substrate, wherein the substrate has a groove extending from the front surface to the back surface of the substrate; forming a flowable dielectric film filling the groove on the front surface of the substrate, and the top surface of the flowable dielectric film is higher than the front surface of the substrate; performing a first annealing treatment on the flowable dielectric film under a first temperature condition to form a first dielectric film; removing the first dielectric film with a partial thickness on the front surface of the substrate after the first annealing treatment; and performing a second annealing treatment on the remaining first dielectric film under a second temperature condition to form a second dielectric film, wherein the first temperature is lower than the second temperature. The semiconductor structure manufacturing method provided by the embodiment of the present disclosure is beneficial to improve the performance of the formed semiconductor structure.
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Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a method for manufacturing a semiconductor structure. Background Technology

[0002] With the rapid development of semiconductor fabrication technology, the feature size of semiconductor devices has been significantly reduced. To achieve higher circuit density, not only are the feature sizes of semiconductor devices reduced, but the size of the isolation structures between devices is also correspondingly reduced. The width of the isolation structures becomes smaller, while their aspect ratio increases, making trench filling increasingly difficult and becoming a crucial process step affecting the performance of semiconductor devices. Currently, the industry widely uses a spin-on dielectric (SOD) process with extremely strong filling capabilities for trench filling.

[0003] However, the current process of filling trench structures using spin-coating dielectric layers needs improvement. Summary of the Invention

[0004] This disclosure provides a method for manufacturing a semiconductor structure, which at least helps to improve the performance of the formed semiconductor structure.

[0005] This disclosure provides a method for manufacturing a semiconductor structure, comprising: providing a substrate having trenches extending from a front side to a back side therein; forming a flowable dielectric film filling the trenches on the front side of the substrate, wherein the top surface of the flowable dielectric film is higher than the front side of the substrate; performing a first annealing treatment on the flowable dielectric film under a first temperature condition to form a first dielectric film; after performing the first annealing treatment, removing a portion of the thickness of the first dielectric film located on the front side of the substrate; and performing a second annealing treatment on the remaining first dielectric film under a second temperature condition to form a second dielectric film, wherein the first temperature is lower than the second temperature.

[0006] In some embodiments, the first annealing process is performed at least twice before the second annealing process, and after each first annealing process, a portion of the thickness of the first dielectric film located on the front side of the substrate is removed.

[0007] In some embodiments, prior to the second annealing process, the top surface of the remaining first dielectric film is higher than the top surface of the trench.

[0008] In some embodiments, the first annealing process includes: providing a reaction gas with a first flow rate at a first pressure, such that the density of the first dielectric film located above the trench is greater than or equal to the density of the first dielectric film located in the trench.

[0009] In some embodiments, after performing the first annealing process, the density of the removed first dielectric film is greater than the density of the retained first dielectric film.

[0010] In some embodiments, the second annealing process includes: providing a reaction gas with a second flow rate at a second pressure, such that the density of the second dielectric film is greater than the density of the first dielectric film above the trench.

[0011] In some embodiments, the first flow rate is less than or equal to the second flow rate, and the first pressure is less than the second pressure.

[0012] In some embodiments, after performing the second annealing treatment, the method further includes: performing a third annealing treatment on the second dielectric film under a third temperature condition to form a third dielectric film, wherein the third temperature is greater than the second temperature, such that the density of the third dielectric film is greater than the density of the second dielectric film.

[0013] In some embodiments, after the third annealing process, the method further includes: removing the third dielectric film located on the front side of the substrate, while retaining the third dielectric film in the trench.

[0014] In some embodiments, after performing the second annealing process, the method further includes: removing the second dielectric film having a first thickness and retaining the second dielectric film having a second thickness located on the front side of the substrate, wherein the first thickness is greater than the second thickness.

[0015] In some embodiments, in the step of removing a portion of the thickness of the first dielectric film located on the front side of the substrate, the removed first dielectric film has a third thickness, which is greater than the first thickness.

[0016] The technical solutions provided in this disclosure have at least the following advantages:

[0017] The semiconductor structure manufacturing method provided in this disclosure involves forming a flowable dielectric film filling trenches on the front side of a substrate, and performing a first annealing treatment on the flowable dielectric film under a first temperature condition to form a first dielectric film. The first temperature is relatively low so that the reaction between the flowable dielectric film and the reactive gas can proceed uniformly and slowly during the first annealing treatment, thereby slowing down the rate at which the first dielectric film formed on the front side of the substrate blocks the top surface of the trenches, and increasing the proportion of the flowable dielectric film in the trenches reacting with the reactive gas. After the first annealing treatment, a portion of the thickness of the first dielectric film located on the front side of the substrate is also removed. A dielectric film is used to prevent the first dielectric film from blocking the top of the trench and affecting the contact and reaction between the reactant gas and the first dielectric film in the subsequent annealing process. The subsequent step also includes performing a second annealing process on the remaining first dielectric film under a second temperature condition to form a second dielectric film. The first temperature is lower than the second temperature, so as to increase the reaction rate between the first dielectric film and the reactant gas by increasing the temperature of the second annealing process. This can increase the reaction ratio between the first dielectric film and the reactant gas, thereby obtaining a second dielectric film with better density and insulation ability than the first dielectric film, which is beneficial to improving the performance of the formed semiconductor structure. Attached Figure Description

[0018] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this disclosure or the conventional technology, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 and Figure 2 This is a schematic diagram of the structure corresponding to each step of a semiconductor structure manufacturing method.

[0020] Figure 3 and Figure 4 This is a schematic diagram of the structure corresponding to each step of a semiconductor structure manufacturing method.

[0021] Figure 5 and Figure 6 This is a schematic diagram of the structure corresponding to each step of a semiconductor structure manufacturing method.

[0022] Figures 7 to 12 A schematic diagram of the structure corresponding to each step of a method for manufacturing a semiconductor structure according to an embodiment of this disclosure;

[0023] Figure 13The reaction formula for the reaction between a flowable dielectric membrane and a reactive gas is provided in one embodiment of this disclosure. Detailed Implementation

[0024] As can be seen from the background technology, the current process of filling trench structures using spin-coating dielectric layers needs improvement.

[0025] Figure 1 and Figure 2 This is a schematic diagram showing the structural steps corresponding to each step of a semiconductor structure manufacturing method. Figure 3 and Figure 4 This is a schematic diagram showing the structural steps corresponding to each step of a semiconductor structure manufacturing method. Figure 5 and Figure 6 This is a schematic diagram of the structure corresponding to each step of a semiconductor structure manufacturing method.

[0026] refer to Figure 1 A substrate 10 is provided, and the substrate 10 has a first trench structure 13 extending along the front side 11 of the substrate 10 to the back side 12 of the substrate 10. The depth-to-width ratio of the first trench structure 13 is small. (Continue to refer to...) Figure 1 A first flowable dielectric film 14 is formed on the front side 11 of the substrate 10, filling the first trench structure 13. The top surface of the first flowable dielectric film 14 is higher than the front side 11 of the substrate 10. A first barrier layer 16 may also be formed on the front side 11 of the substrate 10. The first barrier layer 16 is located between the substrate 10 and the first flowable dielectric film 14 to prevent elements in the first flowable dielectric film 14 from penetrating into the substrate 10. The first barrier layer 16 and the first flowable dielectric film 14 together fill the first trench structure 13. (Reference) Figure 2 The first flowable dielectric film 14 is annealed to obtain a first dielectric film 15 with better density and insulation properties than the first flowable dielectric film 14.

[0027] refer to Figure 3 A substrate 20 is provided, within which a second trench structure 23 extends along the front side 21 of the substrate 20 to the back side 22 of the substrate 20, wherein the aspect ratio of the second trench structure 23 is greater than the aspect ratio of the first trench structure 13. (Continue to refer to...) Figure 3 A second flowable dielectric film 24 is formed on the front side 21 of the substrate 20, filling the second trench structure 23. The top surface of the second flowable dielectric film 24 is higher than the front side 21 of the substrate 20. A second barrier layer 26 may also be formed on the front side 21 of the substrate 20. The second barrier layer 26 is located between the substrate 20 and the second flowable dielectric film 24 to prevent elements in the second flowable dielectric film 24 from penetrating into the substrate 20. The second barrier layer 26 and the second flowable dielectric film 24 together fill the second trench structure 23. (Reference) Figure 4The second flowable dielectric film 24 is annealed to obtain a second dielectric film 25 with superior density and insulation properties. However, after annealing, the second flowable dielectric film 24 located at the bottom of the second trench structure 23 may not have been completely converted into the second dielectric film 25.

[0028] Analysis revealed that, due to the small aspect ratio of the first trench structure 13, before the first dielectric film 15 formed on the front side 11 of the substrate 10 seals the top of the first trench structure 13, the first fluid dielectric film 14 located in the first trench structure 13 completely reacts with the reactive gas. However, the aspect ratio of the second trench structure 23 is greater than that of the first trench structure 13. During the annealing process, due to the large aspect ratio of the second trench structure 23, before the second dielectric film 25 formed on the front side 21 of the substrate 20 seals the second trench structure 23, the second fluid dielectric film 24 located in the second trench structure 23 may not be able to completely react with the reactive gas. Furthermore, as the aspect ratio of the second trench structure 23 gradually increases, the difficulty for the reactive gas to enter the second trench structure 23 increases, and the proportion of the second fluid dielectric film 24 located at the bottom of the second trench structure 23 that cannot contact the reactive gas increases, which is detrimental to the performance of the formed semiconductor structure.

[0029] refer to Figure 5 A substrate 30 is provided, comprising a substrate 31 and a plurality of mutually discrete third conductive structures 32 disposed on the substrate 31. A third trench structure 33 is provided between adjacent third conductive structures 32. The substrate 30 has a front side 34 and a back side 35. The front side 34 of the substrate 30 is the side of the third conductive structure 32 away from the substrate 31, and the back side 35 of the substrate 30 is the side of the substrate 31 away from the third conductive structure 32. The aspect ratio of the third trench structure 33 can be greater than 5, for example, it can be 6, 7, or 9. The third conductive structure 32 includes a conductive layer 37 and an insulating layer 38 covering the conductive layer 37. The insulating layer 38 can also cover the substrate 31. The width of the third conductive structure 32 in the horizontal direction can be 10 nm to 100 nm, that is, the width of the third conductive structure 32 perpendicular to its extension direction can be 10 nm to 100 nm, for example, the width of the third conductive structure 32 can be 10 nm, 15 nm, 20 nm, 35 nm, 53 nm, or 99 nm. (Continue to refer to...) Figure 5 A third flowable dielectric film 36, filling the third trench structure 33, is formed on the front side 34 of the substrate 30, with the top surface of the third flowable dielectric film 36 higher than the front side 34 of the substrate 30. (Reference) Figure 6The third fluid dielectric film 36 is annealed to obtain the third dielectric film 37. However, after annealing the third fluid dielectric film 36, the third fluid dielectric film 36 located at the bottom of the third trench structure 33 may not be completely converted into the third dielectric film 37, and phenomena such as tilting of the third conductive structure 33 or leakage current in adjacent third conductive structures 33 may occur.

[0030] Because the third trench structure 33 has a large depth-to-width ratio, before the third dielectric film 37 formed on the front side 34 of the substrate 30 seals the third trench structure 33, the third fluid dielectric film 36 located in the third trench structure 33 may not be able to react completely with the reactive gas. Furthermore, as the depth-to-width ratio of the third trench structure 33 gradually increases, the proportion of the third fluid dielectric film 36 located at the bottom of the third trench structure 33 that cannot contact the reactive gas increases. As a result, the third fluid dielectric film 36 cannot react completely to form the third dielectric film 37, and the insulation performance of the third fluid dielectric film 36 is poor. This may lead to an increase in the leakage current generated by the adjacent third conductive structure 32, which is detrimental to the performance of the formed semiconductor structure. In addition, because the width of the third conductive structure 32 is smaller in the extension direction perpendicular to the third conductive structure 32, and the density of the third dielectric film 37 formed after annealing is greater than that of the third fluid dielectric film 36, it is easy for different areas of the third conductive structure 32 to be subjected to different forces and tilt.

[0031] This disclosure provides a method for manufacturing a semiconductor structure, in which a flowable dielectric film filling trenches is formed on the front side of a substrate, and the flowable dielectric film is subjected to a first annealing treatment at a first temperature to form a first dielectric film. The first temperature is relatively low so that the reaction between the flowable dielectric film and the reactive gas can proceed uniformly and slowly during the annealing treatment, thereby slowing down the rate at which the first dielectric film formed on the front side of the substrate blocks the top surface of the trenches, and thus increasing the proportion of the flowable dielectric film in the trenches reacting with the reactive gas. After the first annealing treatment, a portion of the thickness of the first dielectric film located on the front side of the substrate is removed. A dielectric film is used to prevent the first dielectric film from blocking the top of the trench and affecting the contact and reaction between the reactant gas and the first dielectric film in the subsequent annealing process. The subsequent steps also include a second annealing process on the remaining first dielectric film under a second temperature condition to form a second dielectric film. The first temperature is lower than the second temperature so that by increasing the temperature of the second annealing process, the reaction rate between the first dielectric film and the reactant gas can be increased, thereby increasing the reaction ratio between the first dielectric film and the reactant gas. This results in a second dielectric film with better density and insulation ability than the first dielectric film, which is beneficial to improving the performance of the formed semiconductor structure.

[0032] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the disclosure. However, the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0033] Figures 7 to 12 This is a schematic diagram of the structure corresponding to each step of a semiconductor structure manufacturing method provided in an embodiment of this disclosure. Figure 13 The reaction formula for the reaction between a flowable dielectric membrane and a reactive gas is provided in one embodiment of this disclosure.

[0034] refer to Figure 7 A substrate 100 is provided, wherein the substrate 100 has a groove 101 extending from the front side 51 to the back side 61 of the substrate 100.

[0035] The substrate 100 includes a front side 51 and a back side 61. In some embodiments, the substrate 100 further includes a substrate 104 and a plurality of mutually discrete conductive structures 105 located on the substrate 104. An isolation structure 108 may also be provided in the substrate 104. A trench 101 is provided between adjacent conductive structures 105. The front side 51 of the substrate 100 is the surface of the conductive structure 105 away from the substrate 104, i.e., the top surface of the conductive structure 105. The back side 61 of the substrate 100 is the surface of the substrate 104 away from the conductive structure 105.

[0036] The substrate 104 can be a semiconductor substrate or a silicon substrate on an insulator. In some embodiments, the substrate 104 can be a silicon substrate. In some embodiments, the substrate 104 can also be a germanium substrate, a silicon germanide substrate, or a silicon carbide substrate, etc. The conductive structure 105 may include a first conductive layer 109, a second conductive layer 110, a diffusion barrier layer 111 located between the first conductive layer 109 and the second conductive layer 110, and an insulating layer 112 covering the first conductive layer 109, the second conductive layer 110, and the diffusion barrier layer 111. The insulating layer 112 may also cover the substrate 104. The insulating layer 112 is used to isolate adjacent conductive structures 105. The material of the first conductive layer 109 may be polycrystalline silicon. The material of the second conductive layer 110 may be one or more conductive materials such as titanium, tantalum, titanium nitride, tantalum nitride, platinum, cobalt, and tungsten. The material of the diffusion barrier layer 111 may be one or more of titanium nitride, tantalum nitride, and tantalum, used to prevent elements of the first conductive layer 109 from diffusing to the second conductive layer 110 and elements of the second conductive layer 110 from diffusing to the first conductive layer 109. The material of the insulating layer 112 may be one or more of silicon oxide, silicon nitride, silicon oxynitride, and silicon carbide nitride. In some embodiments, the conductive structure 105 may be a bit line or a word line.

[0037] Continue to refer to Figure 7 A flowable dielectric film 102 is formed on the front side 51 of the substrate 100, filling the trench 101. The top surface of the flowable dielectric film 102 is higher than the front side 51 of the substrate 100. Since the top surface of the flowable dielectric film 102 is higher than the front side 51 of the substrate 100, it can be ensured that the top surface of the first dielectric film formed subsequently is not lower than the front side 51 of the substrate 100.

[0038] Because the fluid dielectric film 102 is fluid, when filling the trench 101 with the fluid dielectric film 102, the fluid dielectric film 102 can freely flow in liquid form and fill structures of various shapes. The fluid dielectric film 102 has good filling ability and can avoid the formation of voids during the filling of the trench 101. The method of forming the fluid dielectric film 102 can be a spin coating dielectric layer process. The spin coating dielectric layer process is performed by a spin coater. In this process, a predetermined amount of fluid dielectric film 102 material is first dropped, and then the substrate 100 with the trench 101 is formed by high-speed rotation, which can obtain a fluid dielectric film 102 with uniform thickness. In some embodiments, the fluid chemical vapor deposition (FCVD) process can also be used to form the fluid dielectric film 102. The FCVD process forms the fluid dielectric film 102 by reacting a fluid silicon source and an oxygen source at low temperature. Utilizing the fluidity of the fluid dielectric film 102, the trench 101 can be well filled.

[0039] The material of the flowable dielectric film 102 may include polysiloxane (PSZ) or inorganic (perhyfrov polysilazane (PHPS). During annealing, the flowable dielectric film 102 can react with reactant gases to generate a dielectric material. The dielectric material exhibits superior density and insulation properties compared to the flowable dielectric film 102. For example, the material of the flowable dielectric film 102 may be polysiloxane or inorganic (perhyfrov polysilazane), and the dielectric material generated after annealing the flowable dielectric film 102 may be silicon oxide.

[0040] It is understandable that since subsequent steps include multiple annealing processes and the removal of a portion of the dielectric film on the front side of the substrate 100 after each annealing process, the conductive structure 105 is subjected to greater forces and wear during the removal process, which can cause the conductive structure 105 to tilt. In contrast to related technologies, this embodiment experiences less force during the removal of a portion of the dielectric film on the front side of the substrate 100 after each annealing process, thus reducing the possibility of the conductive structure 105 tilting.

[0041] In some embodiments, the fluidizable dielectric film 102 located on the front side 51 of the substrate 100 has a fourth thickness, which can be greater than or equal to 600 nm. For example, the fourth thickness can be 603 nm, 631 nm or 648 nm. By setting the thickness of the fluidizable dielectric film 102 within this range, it is possible to avoid the phenomenon that the thinning accuracy cannot be controlled due to the small thickness of this part of the dielectric film, or that the conductive structure 105 is subjected to large forces and tilts due to the large thickness of this part of the dielectric film.

[0042] refer to Figure 8 Under a first temperature condition, the fluid dielectric film 102 undergoes a first annealing treatment to form a first dielectric film 103. The first temperature is relatively low, which facilitates the slow and uniform reaction of the fluid dielectric film 102 with the reacting gas. Through the first annealing treatment, at least a portion of the fluid dielectric film 102 reacts to form a dielectric material. For example, a portion of the fluid dielectric film 102 located at the bottom of the trench 101 can be converted into a dielectric material. It is understood that in related technologies, the fluid dielectric film 102 is annealed under high temperature conditions to convert it into a dielectric material. However, under high temperature conditions, the dielectric material formed on the front surface 51 of the substrate 100 can quickly seal the top of the trench 101, preventing the portion of the fluid dielectric film 102 located at the bottom of the trench 101 from solidifying into a dielectric material. Compared to related technologies, this embodiment performs the first annealing treatment at a lower first temperature condition, which solves the problem that the portion of the fluid dielectric film 102 at the bottom of the trench 101 cannot fully react and solidify to form a dielectric material.

[0043] It is understandable that if the annealing temperature is too low, the flowable dielectric film 102 may not be able to react with the reactive gas. If the annealing temperature is too high, the reaction rate between the flowable dielectric film 102 and the reactive gas will be too high, and the dielectric material formed on the front side 51 of the substrate 100 may quickly block the top of the trench 101, hindering the reaction between the flowable dielectric film 102 located at the bottom of the trench 101 and the reactive gas. In some embodiments, the first temperature can be 300°C to 350°C, for example, the first temperature can be 300.6°C, 322°C or 349°C. Within this temperature range, the flowable dielectric film 102 can react with the reactive gas, and the lower first temperature is beneficial for the flowable dielectric film 102 to react with the reactive gas slowly and uniformly, which is beneficial for increasing the proportion of dielectric material cured in the first dielectric film 103 formed in the trench 101.

[0044] The first annealing process may further include: providing a reaction gas with a first flow rate under a first pressure, wherein the flowable dielectric membrane 102 can react with the reaction gas to transform into a first dielectric membrane 103.

[0045] The reaction gas used in the first annealing treatment can be oxygen and / or water vapor. (Reference) Figure 13 In some embodiments, the flowable dielectric film 102 can be an inorganic (all-hydrogen) polysilazane, and the reaction gas used can be oxygen and water vapor. The flowable dielectric film 102 contains Si-H bonds and Si-N bonds. After reacting with the reaction gas, the Si-H bonds in the flowable dielectric film 102 break, and the Si-N bonds are converted to Si-O bonds to form silicon oxide, a dielectric material. The density and insulation properties of the silicon oxide dielectric material are superior to those of the flowable dielectric film 102. It is understood that the material of the first dielectric film 103 obtained after the first annealing treatment can include the material of the flowable dielectric film 102 and the cured dielectric material. The first dielectric film 103 can contain Si-H bonds, Si-N bonds, and Si-O bonds.

[0046] In some embodiments, when the reactant gas used in the first annealing treatment is oxygen, the process parameters of the first annealing treatment may further include: a first flow rate of 3.5 slm to 4 slm, for example, a first flow rate of 3.56 slm, 3.88 slm, or 3.9 slm. Within this flow rate range, the flow rate of the reactant gas is relatively small, which is beneficial for controlling the reaction rate between the reactant gas and the flowable dielectric membrane 102, so that the reaction between the two proceeds more uniformly and slowly; and a first pressure of 300 torr to 450 torr, for example, a first pressure of 300.6 torr, 432 torr, or 449 torr. Within this pressure range, the chamber pressure is relatively small, which is beneficial for controlling the reaction rate between the reactant gas and the flowable dielectric membrane 102, so that the reaction between the two proceeds more uniformly and slowly. In some embodiments, when the reaction gas used in the first annealing treatment is water vapor, the process parameters of the first annealing treatment may further include: a first flow rate of 10 to 13 sccm, for example, a first flow rate of 10.6 sccm, 11.7 sccm, or 12.9 sccm. Within this flow rate range, the flow rate of the reaction gas is relatively small, which is beneficial for controlling the reaction rate between the reaction gas and the fluid dielectric membrane 102, so that the reaction between the two proceeds more uniformly and slowly; and a first pressure of 300 torr to 450 torr, for example, a first pressure of 300.6 torr, 432 torr, or 449 torr. Within this pressure range, the chamber pressure is relatively small, which is beneficial for controlling the reaction rate between the reaction gas and the fluid dielectric membrane 102, so that the reaction between the two proceeds more uniformly and slowly.

[0047] It is also understandable that, in the first annealing step, after the fluid dielectric film 102 on the front side 51 of the substrate 100 is transformed into the first dielectric film 103, it will block the reaction gas from entering the trench 101 and reacting with the fluid dielectric film 102 located in the trench 101. Due to the obstruction of the first dielectric film 103 on the front side 51 of the substrate 100, the first dielectric film 103 located in the middle or bottom of the trench 101 has a lower dielectric material content than the first dielectric film 103 located above the trench 101. Therefore, the density of the first dielectric film 103 located above the trench 101 is greater than that of the first dielectric film 103 located in the trench 101. Because the initial temperature is low, the fluid dielectric film 102 can react with the reactive gas slowly and uniformly. The fluid dielectric film 102 on the front side 51 of the substrate 100 is converted into the first dielectric film 103 at a slower rate. As a result, the time required for the first dielectric film 103 formed on the front side 51 of the substrate 100 to seal the top of the trench 101 is longer. The proportion of the fluid dielectric film 102 at the bottom of the trench 101 that can react with the reactive gas is larger. The density of the first dielectric film 103 above the trench 101 may also be less different from the density of the first dielectric film 103 inside the trench 101.

[0048] refer to Figure 9 After the first annealing process, the first dielectric film 103 with a partial thickness located on the front side 51 of the substrate 100 is removed.

[0049] It is understandable that removing a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 can reduce the likelihood of this problem. The density of the first dielectric film 103 located on the front side 51 of the substrate 100 may be greater than that of the first dielectric film 103 located in the trench 101. That is, the dielectric material content of the first dielectric film 103 on the front side 51 of the substrate 100 is relatively large, resulting in a higher density of this portion of the first dielectric film 103. Furthermore, the dielectric material will block the top of the trench 101, which is not conducive to the subsequent second annealing process, where the reacting gas passes through the first dielectric film 103 on the front side 51 of the substrate 100 and reacts with the material located in the trench 101. The first dielectric film 103 reacts in the trench 101. By removing a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100, i.e., removing the first dielectric film 103 with a relatively high density on the front side 51 of the substrate 100, the possibility that the first dielectric film 103 located in the trench 101 cannot react with the reactant gas can be reduced. In addition, after the first annealing treatment, the first dielectric film 103 located on the front side 51 of the substrate 100 is removed. This portion of the first dielectric film 103 has a smaller thickness, and the conductive structure 105 is subjected to less stress. Therefore, the possibility of the conductive structure 105 tilting during the removal of this portion of the first dielectric film 103 is smaller.

[0050] The process for removing a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 can be a chemical mechanical polishing process, a wet etching process, or a dry etching process. For example, a mechanical polishing process can be used to remove a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100, while a chemical mechanical polishing process can remove a portion of the thickness of the first dielectric film 103, resulting in a relatively flat surface of the remaining first dielectric film 103 away from the substrate 100.

[0051] In some embodiments, the removed first dielectric film 103 has a third thickness, that is, the portion of the first dielectric film 103 on the front side 51 of the substrate 100 that has been removed has a third thickness. The ratio of the third thickness to the thickness of the first dielectric film 103 having a fourth thickness can range from 0.16 to 0.33, meaning the proportion of the removed first dielectric film 103 to the first dielectric film 103 on the front side 51 of the substrate 100 can be 0.16 to 0.33. For example, the ratio of the third thickness to the fourth thickness is 0.17, 0.26, or 0.32. It is understandable that if the ratio of the third thickness to the fourth thickness is too small, the required thickness of the first dielectric film 103 to be removed will be difficult to achieve. If the ratio of the third thickness to the fourth thickness is too large, the conductive structure 105 will be subjected to a large force during the removal of the first dielectric film 103 with the third thickness, which may cause the conductive structure 105 to tilt. Within this thickness ratio range, the possibility of the first dielectric film 103 on the front side 51 of the substrate 100 blocking the trench 101 can be reduced, and the possibility of the conductive structure 105 tilting can also be reduced.

[0052] In some embodiments, the third thickness can be 100nm to 200nm, for example, the third thickness can be 100.7nm, 164nm or 198.5nm.

[0053] Subsequent steps may also include performing a second annealing treatment on the first dielectric film 103 under a second temperature condition to form a second dielectric film. It is understood that at least two first annealing treatments may be performed before the second annealing treatment, and after each first annealing treatment, a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed to increase the content of the cured dielectric material in the first dielectric film 103 in the trench 101. This results in less material of the flowable dielectric film 102 contained in the first dielectric film 103 in the trench 101 during the second annealing treatment, which helps reduce the difficulty of the second annealing and increases the content of cured dielectric material in the second dielectric film formed by the second annealing treatment.

[0054] In some embodiments, before performing the second annealing process, three first annealing processes may be performed, and after each first annealing process, a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed. The temperature of the first first annealing process may be lower than the temperature of the second first annealing process, and the temperature of the second first annealing process may be lower than the temperature of the third first annealing process, so that the quality and insulation capability of the first dielectric film 103 can be improved through three first annealing processes.

[0055] In some embodiments, before performing the second annealing process, three first annealing processes may be performed, and after each first annealing process, a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed. The temperature of the first first annealing process may be equal to the temperature of the second first annealing process, and the temperature of the second first annealing process may be lower than the temperature of the third first annealing process. After three first annealing processes, the quality and insulation capability of the first dielectric film 103 can also be improved.

[0056] It is also understood that at least two first annealing processes can be performed before the second annealing process. After each first annealing process, a portion of the thickness of the first dielectric film 103 on the front side 51 of the substrate 100 is removed. The temperature provided by each first annealing process can be equal to increase the content of the dielectric material cured in the first dielectric film 103 in the trench 101.

[0057] In some embodiments, before the second annealing process, the top surface of the remaining first dielectric film 103 is higher than the top surface of the trench 101 to ensure that the top surface of the subsequently formed second dielectric film is not lower than the top surface of the trench 101.

[0058] refer to Figure 10 Under a second temperature condition, the remaining first dielectric film 103 is subjected to a second annealing process to form a second dielectric film 106, wherein the first temperature is lower than the second temperature.

[0059] It is understandable that if the first dielectric film 103 is annealed at a temperature lower than the second temperature, the flowable dielectric film 102 material in the first dielectric film 103 may not be completely converted into a dielectric material after annealing. If the first dielectric film 103 is annealed at a temperature higher than the second temperature, the reaction rate between the first dielectric film 103 and the reactive gas may be too fast, which may cause the second dielectric film 106 formed on the front side 51 of the substrate 100 to block the top of the trench 101, and part of the first dielectric film 103 in the trench 101 may not be converted into the second dielectric film 106. In the method for forming the second dielectric film 106 provided in this embodiment, since the second temperature is higher than the first temperature, that is, the second temperature is relatively high, by increasing the temperature of the second annealing treatment to appropriately increase the reaction rate between the first dielectric film 103 and the reactive gas, the proportion of the solidified dielectric material in the formed second dielectric film 106 can be increased, or the flowable dielectric film 102 material in the first dielectric film 103 can be completely solidified into a dielectric material.

[0060] On the other hand, it is also understandable that in related technologies, the method of annealing the flowable dielectric film 102 under high temperature conditions to obtain the second dielectric film 106 may result in the second dielectric film 106 formed on the front side 51 of the substrate 100 blocking the top of the trench 101, causing the part of the flowable dielectric film at the bottom of the trench 101 to be unable to react with the reactive gas. In this embodiment, by first performing a first annealing treatment at a lower first temperature, and then removing part of the first dielectric film 103 located on the front side 51 of the substrate 100 after the first annealing treatment, a first dielectric film 103 containing a certain amount of dielectric material is obtained. The first dielectric film 103 serves as a flowable dielectric. The intermediate layer of the first dielectric film 102, which is converted into the second dielectric film 106, avoids the phenomenon that the fluid dielectric film 102 at the bottom of the trench 101 cannot react with the reactant gas during the direct conversion of the fluid dielectric film 102 into the second dielectric film 103. The first dielectric film 103 is then annealed at a higher second temperature. Compared with related technologies, the method for forming the second dielectric film 106 provided in this embodiment has the first dielectric film 103 as an intermediate layer, which reduces the difficulty of the fluid dielectric film 102 material in the first dielectric film 103 in the trench 101 reacting with the reactant gas, and is beneficial to improving the quality, density and insulation ability of the formed second dielectric film 106.

[0061] The second temperature can be 400℃~500℃, for example, 400.6℃, 451℃ or 499℃. Within this temperature range, the second temperature is relatively high, which can increase the content of the dielectric material cured in the second dielectric film 106, or completely cure the material of the flowable dielectric film 102 in the first dielectric film 103 into dielectric material. It can also control the reaction rate of the first dielectric film 103 with the reaction gas under the second temperature condition, and prevent the generated second dielectric film 106 from quickly blocking the top of the trench 101.

[0062] The second annealing process may include: providing a reaction gas with a second flow rate under a second pressure, wherein the flowable dielectric 104 in the first dielectric membrane 103 can react with the reaction gas to transform into a second dielectric membrane 106.

[0063] In some embodiments, the reaction gas used in the second annealing treatment can be oxygen and / or water vapor. For example, the first dielectric film 103 contains Si-H bonds, Si-N bonds, and Si-O bonds. The reaction gas used in the second annealing treatment can be oxygen and water vapor. After reacting with the reaction gas, the Si-H bonds in the first dielectric film 103 break, and the Si-N bonds are converted into Si-O bonds to form the second dielectric film 106. The content of dielectric material in the second dielectric film 106 is higher than that in the first dielectric film 103, thereby the density and insulation capacity of the second dielectric film 106 are greater than those of the first dielectric film 103.

[0064] It is understood that the aforementioned steps, through the first annealing treatment, can obtain a first dielectric film 103 containing dielectric material located in the trench 101. The material content of the flowable dielectric film 102 in the first dielectric film 103 is relatively low. In the second annealing treatment, the possibility that the material of the flowable dielectric film 102 in the first dielectric film 103 cannot come into contact with the reactant gas is reduced. Since the possibility that the material of the flowable dielectric film 102 in the first dielectric film 103 cannot come into contact with the reactant gas is reduced, in some embodiments, the second flow rate can be greater than the first flow rate, which can make the reaction rate between the first dielectric film 103 and the reactant gas greater than the reaction rate between the flowable dielectric film 102 and the reactant gas, thereby reducing the process time. In some embodiments, the second flow rate can also be equal to the first flow rate. In some embodiments, the second pressure can be less than the first pressure. By reducing the chamber pressure of the second annealing treatment, the reaction rate between the first dielectric film 103 and the reactant gas in the second annealing treatment can also be accelerated.

[0065] In some embodiments, when the reactant gas used in the second annealing treatment is oxygen, the process parameters of the second annealing treatment may further include: a second flow rate of 3.8 slm to 4.7 slm, for example, a second flow rate of 3.82 slm, 4.18 slm, or 4.7 slm. Within this flow rate range, the reactant gas can have a faster reaction rate with the first dielectric membrane 103, providing flow conditions under which the first dielectric membrane 103 can be converted into the second dielectric membrane 106; and a second pressure of 500 torr to 720 torr, for example, a second pressure of 500.6 torr, 632 torr, or 719 torr. Within this pressure range, the reactant gas can have a faster reaction rate with the first dielectric membrane 103, providing pressure conditions under which the first dielectric membrane 103 can be converted into the second dielectric membrane 106. In some embodiments, when the reaction gas used in the second annealing treatment is water vapor, the process parameters of the second annealing treatment may further include: a second flow rate of 12 to 15 sccm, for example, a second flow rate of 12.3 sccm, 13.7 sccm, or 14.9 sccm. Within this flow rate range, the reaction gas can have a faster reaction rate with the first dielectric membrane 103, providing flow conditions under which the first dielectric membrane 103 can be converted into the second dielectric membrane 106; and a second pressure of 500 torr to 720 torr, for example, a second pressure of 500.6 torr, 632 torr, or 719 torr. Within this pressure range, the reaction gas can have a faster reaction rate with the first dielectric membrane 103, providing pressure conditions under which the first dielectric membrane 103 can be converted into the second dielectric membrane 106.

[0066] Subsequent steps may also include performing a third annealing treatment on the second dielectric film 106 under a third temperature condition to form a third dielectric film with a density greater than that of the second dielectric film 106. Prior to performing the third annealing treatment, a portion of the thickness of the second dielectric film 106 located on the front side 51 of the substrate 100 may be removed.

[0067] refer to Figure 11In some embodiments, after the second annealing process and before the third annealing process, the process may further include removing the second dielectric film 106 having a first thickness, while retaining the second dielectric film 106 having a second thickness located on the front side 51 of the substrate 100. It is understood that during the second annealing process, the second dielectric film 106 formed on the front side 51 of the substrate 100 may hinder the reaction gas from entering the trench 101 and reacting with the first dielectric film 103. This results in the second dielectric film 106 formed in the trench 101 having a lower content of cured dielectric material than the second dielectric film 106 formed on the front side 51 of the substrate 100. Consequently, in the subsequent third annealing process, due to the different reaction rates between the second dielectric film 106 in different regions and the reaction gas, the conductive structure 105 may tilt. By removing the second dielectric film 106 having a first thickness, the possibility of the conductive structure 105 tilting can be reduced. Furthermore, since the first thickness is relatively small, the possibility of the conductive structure 105 tilting during the removal of the second dielectric film 106 having a first thickness is relatively small.

[0068] The first thickness is greater than the second thickness. That is, after the second annealing process, most of the second dielectric film 106 on the front side 51 of the substrate 100 can be removed. This can reduce the possibility of the conductive structure 105 tilting, while retaining the thinner second dielectric film 106. This avoids completely removing the second dielectric film 106 on the front side of the substrate 100, which would cause the conductive structure 105 to be subjected to excessive force and tilt.

[0069] In some embodiments, the first thickness may be less than the third thickness, so that the force on the conductive structure 105 during the removal of the second dielectric film 106 having the first thickness can be controlled by controlling the size of the first thickness.

[0070] It is also understandable that after the second annealing process, the second dielectric film 106, which is located on the front side 51 of the substrate 100, can be left unremoved and the third annealing process can be performed directly.

[0071] refer to Figure 12In some embodiments, after the second annealing process, the process may further include: performing a third annealing process on the second dielectric film 106 at a third temperature to form a third dielectric film 107, wherein the third temperature is higher than the second temperature to increase the annealing temperature of the third annealing process. It is understood that due to the obstruction of the second dielectric film 107 formed on the front side 51 of the substrate 100, the second dielectric film 106 may also include a portion of the first dielectric film 103 that has not reacted with the reactive gas. Through the third annealing process, this portion of the first dielectric film 103 can be cured and converted into a dielectric material. Furthermore, because the content of cured dielectric material in the second dielectric film 106 is relatively high, the reaction rate difference between different regions of the second dielectric film 106 is smaller during the third annealing process, reducing the possibility of the conductive structure 105 tilting due to reaction rate differences. This results in a third dielectric film 107 with better quality, density, and insulation capabilities.

[0072] The third temperature can be 600℃ to 1000℃, for example, the third temperature can be 600.7℃, 800.9℃ or 999.5℃. Within this temperature range, the third temperature is relatively high, which can accelerate the conversion rate of the second dielectric film 106 into the third dielectric film 107 while avoiding too many defects in the generated third dielectric film 107 due to the high annealing temperature.

[0073] The reaction gas used in the third annealing process can be oxygen and / or water vapor. For example, when the reaction gas used in the third annealing process is oxygen, the process parameters of the third annealing process can also include: a third flow rate of 3.8 slm to 4.7 slm, for example, a third flow rate of 3.82 slm, 4.18 slm, or 4.7 slm; and a third pressure of 500 torr to 720 torr, for example, a third pressure of 500.6 torr, 632 torr, or 719 torr. As another example, when the reaction gas used in the third annealing process is water vapor, the process parameters of the first annealing process can also include: a third flow rate of 12 to 15 sccm, for example, a third flow rate of 12.5 sccm, 13.5 sccm, or 14.5 sccm; and a third pressure of 500 torr to 720 torr, for example, a third pressure of 500.6 torr, 632 torr, or 719 torr.

[0074] In some embodiments, after the third annealing process, the process may further include removing the third dielectric film 107 located on the front side 51 of the substrate 100, while retaining the third dielectric film 107 in the trench 101. The method for removing the third dielectric film 107 on the front side 51 of the substrate 100 may be a chemical mechanical polishing (CMP) process, a wet etching process, or a dry etching process. For example, a CMP process may be used to remove the third dielectric film 107 located on the front side 51 of the substrate 100. Since the material of the substrate 100 is different from the material of the third dielectric film 107, during the process of removing part of the third dielectric film 107 using the CMP process, the different polishing rates can be used to determine whether to stop polishing.

[0075] The semiconductor structure manufacturing method provided in this disclosure involves forming a flowable dielectric film 102 filling trenches 101 on the front side 51 of a substrate 100, and performing a first annealing treatment on the flowable dielectric film 102 under a first temperature condition to form a first dielectric film 103. The first temperature is relatively low, which facilitates the slow and uniform reaction of the flowable dielectric film 102 with the reactant gas. This ensures that at least a portion of the flowable dielectric film 102 reacts and solidifies to form a dielectric material during the first annealing treatment, preventing the first dielectric film 103 formed on the front side 51 of the substrate 100 from rapidly solidifying. To prevent the fluid dielectric film 102 in the trench 101 from reacting with the reactive gas due to the top of the trench 101 being blocked, after the first annealing treatment, a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed. This is to prevent the reactive gas from entering the trench 101 during the subsequent second annealing treatment due to the first dielectric film 103 blocking the top of the trench 101. The subsequent step also includes performing a second annealing treatment on the remaining first dielectric film 103 under a second temperature condition to form a second dielectric film 106. The first temperature is lower than the second temperature. By appropriately increasing the temperature of the heat treatment to increase the reaction rate between the first dielectric film 103 and the reactant gas, the proportion of dielectric material in the formed second dielectric film 106 can be increased, or the flowable dielectric film 102 material in the first dielectric film 103 can be completely solidified into dielectric material. In this embodiment, a first annealing treatment is performed at a lower first temperature, and after the first annealing treatment, a portion of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed to obtain a first dielectric film 103 containing a certain amount of solidified dielectric material. The first dielectric film 103 serves as a flowable dielectric. The intermediate layer of the first dielectric membrane 102 as it is converted into the second dielectric membrane 106 avoids the phenomenon that the fluid dielectric membrane 102 at the bottom of the trench 101 cannot react with the reactive gas during the direct conversion of the fluid dielectric membrane 102 into the second dielectric membrane 103. It also reduces the difficulty of converting the first dielectric membrane 103 into the second dielectric membrane 106. Furthermore, the thickness of the dielectric membrane removed from the front side 51 of the substrate 100 after each annealing process is smaller. As a result, the conductive structure 105 experiences less force during each removal of a portion of the dielectric membrane, and the possibility of the conductive structure 105 tilting is smaller.

[0076] In addition, before performing the second annealing process, the first annealing process can be performed multiple times. After each first annealing process, a portion of the thickness of the first dielectric film 103 located on the front side 51 of the substrate 100 is removed to increase the content of the dielectric material cured in the first dielectric film 103 in the trench 101. As a result, the material of the flowable dielectric film 102 contained in the first dielectric film 103 in the trench 101 during the second annealing process is smaller, which helps to reduce the difficulty of the second annealing and increase the content of the dielectric material cured in the second dielectric film formed by the second annealing process.

[0077] Thus, compared to directly and quickly converting the flowable dielectric film 102 into the second dielectric film 106, this embodiment can reduce the difficulty of converting the flowable dielectric film 102 into the second dielectric film 106, and can obtain a second dielectric film 106 with better quality and insulation performance.

[0078] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of this disclosure. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure should be determined by the scope defined in the claims.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that, include: A substrate is provided having grooves extending from the front side to the back side of the substrate; A flowable dielectric film is formed on the front side of the substrate, filling the trenches, and the top surface of the flowable dielectric film is higher than the front side of the substrate; Under a first temperature condition, the flowable dielectric film is subjected to a first annealing treatment to form a first dielectric film. The first annealing treatment step includes: providing a reaction gas with a first flow rate under a first pressure, such that the density of the first dielectric film located above the trench is greater than or equal to the density of the first dielectric film located in the trench. After the first annealing process, the first dielectric film located on the front side of the substrate is removed, wherein the density of the removed first dielectric film is greater than the density of the retained first dielectric film. Under a second temperature condition, the remaining first dielectric film is subjected to a second annealing process to form a second dielectric film, wherein the first temperature is lower than the second temperature.

2. The method for manufacturing a semiconductor structure as described in claim 1, characterized in that, Before performing the second annealing process, the first annealing process is performed at least twice, and after each first annealing process, a portion of the thickness of the first dielectric film located on the front side of the substrate is removed.

3. The method for manufacturing a semiconductor structure as described in claim 1, characterized in that, Before the second annealing process, the top surface of the remaining first dielectric film is higher than the top surface of the trench.

4. The method for manufacturing a semiconductor structure as described in claim 1, characterized in that, The second annealing process includes providing a reaction gas with a second flow rate at a second pressure, such that the density of the second dielectric film is greater than the density of the first dielectric film above the trench.

5. The method for manufacturing a semiconductor structure as described in claim 4, characterized in that, The first flow rate is less than or equal to the second flow rate, and the first pressure is less than the second pressure.

6. The method for manufacturing a semiconductor structure as described in claim 1, characterized in that, After the second annealing process, the method further includes: performing a third annealing process on the second dielectric film under a third temperature condition to form a third dielectric film, wherein the third temperature is greater than the second temperature, so that the density of the third dielectric film is greater than the density of the second dielectric film.

7. The method for manufacturing a semiconductor structure as described in claim 6, characterized in that, After the third annealing process, the method further includes: removing the third dielectric film located on the front side of the substrate, while retaining the third dielectric film in the trench.

8. The method for manufacturing a semiconductor structure as described in claim 1, characterized in that, After performing the second annealing process, the method further includes: removing the second dielectric film having a first thickness and retaining the second dielectric film having a second thickness located on the front side of the substrate, wherein the first thickness is greater than the second thickness.

9. The method for manufacturing a semiconductor structure as described in claim 8, characterized in that, In the step of removing a portion of the thickness of the first dielectric film located on the front side of the substrate, the removed first dielectric film has a third thickness, which is greater than the first thickness.

Citation Information

Patent Citations

  • Method for forming shallow trench isolation structure

    CN104425343A

  • Method for forming isolated channels in semiconductor device

    CN1218988A