Micro light emitting device and method of manufacturing the same

Abstract

The present application relates to a kind of micro light emitting devices and its preparation method, comprising: providing driving substrate and light emitting device layer respectively;First surface of the driving substrate sequentially forms first bonding layer, second bonding layer;First surface of the light emitting device layer sequentially forms third bonding layer, fourth bonding layer;Second bonding layer and fourth bonding layer are patterned respectively to form first pattern layer on second bonding layer, and form second pattern layer on fourth bonding layer;First pattern layer and second pattern layer are pre-bonded to form first pre-bonding structure;First pre-bonding structure is annealed and pressure treated.This method provides a scheme for vertical stack of full-color Micro-LED, which can solve the problem that traditional bonding materials cannot directly realize n-pole interconnection of pixels of the same color in horizontal plane during vertical stack process, array etching is difficult, and bonding material has short service life.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display devices, in particular to a micro light emitting device and a preparation method thereof BACKGROUND

[0002] In the field of display devices, micro light emitting diodes (Micro-LED) have a wide prospect. Compared with traditional display technologies, Micro-LED has great advantages in light emitting mechanism, contrast, life, refresh rate, energy consumption and other aspects. Since the concept of Micro-LED was proposed, it has attracted great attention and gradually become a new generation of display technology, especially in the field of near-eye display applications. The biggest difficulty in the current commercialization process of Micro-LED is to realize the full colorization of Micro-LED. At present, the full colorization Micro-LED scheme is to combine red, green and blue light emitting diodes (LEDs) into a pixel in the horizontal plane. However, this method forms a single pixel with a large area, and in addition, it is difficult to accurately transfer and arrange a large area of red, green and blue Micro-LEDs.

[0003] In order to solve the above problems, the red, green and blue LEDs and the silicon-based driving circuit can be aligned, stacked, bonded and arrayed in the vertical direction by hetero-integration to form a single pixel. In theory, this technology can reduce the single pixel area by 1 / 3. Pixel verticalization is the best method to realize a high-resolution display in a smaller footprint. The most critical step to realize the integration and stacking of three-color LEDs in the vertical direction is to find a transparent material to bond them. Silicon dioxide (SiO2), polyimide (PI) and SU8 photoresist are a choice, but to realize the full-color array of Micro-LEDs, a conductive layer needs to be deposited between the n-poles of the LEDs and them to realize n-pole interconnection. In addition, in the subsequent array etching process, the etching of SiO2 is difficult, and the realization of the process is more difficult, while PI and SU8 photoresist are organic materials, which will affect the life of the display device in the actual display process. SUMMARY

[0004] Therefore, it is necessary to provide a micro light emitting device and a preparation method thereof in view of the problems in the prior art that SiO2, PI and SU8 photoresist transparent materials cannot directly realize n-pole interconnection in the Micro-LED array process, SiO2 array etching is difficult, and PI and SU8 photoresist have short service life

[0005] In a first aspect, a micro light emitting device and a preparation method thereof are provided. The method comprises:

[0006] A driving substrate and a light emitting device layer are provided respectively;

[0007] forming a first bonding layer, a second bonding layer on the first surface of the driving substrate in sequence;

[0008] forming a third bonding layer, a fourth bonding layer on the first surface of the light emitting device layer in sequence; wherein the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers respectively;

[0009] performing a patterning process on the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer; wherein the pattern in the first pattern layer and the pattern in the second pattern layer can be nested with each other;

[0010] performing a pre-bonding process on the first pattern layer and the second pattern layer to form a first pre-bonding structure;

[0011] performing an annealing and pressurizing process on the first pre-bonding structure to form a to-be-arrayed structure; wherein the annealing temperature of the annealing and pressurizing process is lower than the forming environment temperature of the first bonding layer and the third bonding layer respectively, and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer;

[0012] performing an arraying process on the to-be-arrayed structure.

[0013] In one of the embodiments, the forming a first bonding layer, a second bonding layer on the first surface of the driving substrate in sequence comprises:

[0014] depositing a first bonding material on the first surface of the driving substrate to form the first bonding layer under a first preset temperature environment;

[0015] depositing a second bonding material on the first surface of the first bonding layer to form the second bonding layer under a second preset temperature environment;

[0016] the forming a third bonding layer, a fourth bonding layer on the first surface of the light emitting device layer in sequence comprises:

[0017] depositing a third bonding material on the first surface of the light emitting device layer to form the third bonding layer under the first preset temperature environment;

[0018] depositing a fourth bonding material on the first surface of the third bonding layer to form the fourth bonding layer under the second preset temperature environment.

[0019] In one of the embodiments, the first bonding material, the second bonding material, the third bonding material and the fourth bonding material are transparent conductive materials, and the transparent conductive material comprises at least one of indium tin oxide, indium gallium tin oxide and zinc oxide transparent conductive material.

[0020] In one of the embodiments, the first preset temperature is 600-650℃; and the second preset temperature is 25-35℃.

[0021] In one of the embodiments, before the patterning of the second bonding layer and the fourth bonding layer, the method further comprises:

[0022] The second bonding layer and the fourth bonding layer are respectively subjected to thinning and polishing treatment.

[0023] In one of the embodiments, the patterning of the second bonding layer and the fourth bonding layer to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer comprises:

[0024] A first photoresist is spin-coated on the first surface of the second bonding layer to form a first photoresist layer;

[0025] A second photoresist is spin-coated on the first surface of the fourth bonding layer to form a second photoresist layer;

[0026] The first surface of the first photoresist layer is exposed by a first preset mask to form a first developing area;

[0027] The first surface of the second photoresist layer is exposed by a second preset mask to form a second developing area;

[0028] The first developing area is developed and etched to form the first pattern layer;

[0029] The second developing area is developed and etched to form the second pattern layer.

[0030] In one of the embodiments, before the pre-bonding of the first pattern layer and the second pattern layer to form a first pre-bonding structure, the method further comprises:

[0031] The first surface of the second bonding layer and the first surface of the fourth bonding layer are respectively subjected to activation treatment; wherein the activation treatment comprises plasma activation treatment and high-activity sol immersion strengthening activation treatment.

[0032] In one of the embodiments, the annealing temperature in the annealing and pressurizing treatment is 550-600℃, and the annealing time is 0.5-3h.

[0033] In one of the embodiments, the light-emitting device layer is a red light-emitting device layer, and the method further comprises:

[0034] A green light-emitting device layer and a blue light-emitting device layer are respectively provided;

[0035] a fifth bonding layer and a sixth bonding layer are sequentially formed on the second surface of the red light-emitting device layer; wherein the first surface and the second surface of the red light-emitting device layer are opposite to each other;

[0036] a seventh bonding layer and an eighth bonding layer are sequentially formed on the first surface of the green light-emitting device layer, and a ninth bonding layer and a tenth bonding layer are sequentially formed on the second surface of the green light-emitting device layer; wherein the first surface and the second surface of the green light-emitting device layer are opposite to each other;

[0037] eleventh bonding layer and a twelfth bonding layer are sequentially formed on the first surface of the blue light-emitting device layer;

[0038] the sixth bonding layer, the eighth bonding layer, the tenth bonding layer and the twelfth bonding layer are respectively subjected to a patterning treatment, so as to form a third pattern layer on the sixth bonding layer, a fourth pattern layer on the eighth bonding layer, a fifth pattern layer on the tenth bonding layer, and a sixth pattern layer on the twelfth bonding layer; wherein the patterns in the third pattern layer and the fourth pattern layer can be nested with each other, and the patterns in the fifth pattern layer and the sixth pattern layer can be nested with each other;

[0039] the third pattern layer and the fourth pattern layer are subjected to a pre-bonding treatment to form a second pre-bonding structure;

[0040] the second pre-bonding structure is subjected to an annealing and pressurizing treatment;

[0041] the fifth pattern layer and the sixth pattern layer are subjected to a pre-bonding treatment to form a third pre-bonding structure;

[0042] the third pre-bonding structure is subjected to an annealing and pressurizing treatment to form a to-be-arrayed structure;

[0043] the to-be-arrayed structure is subjected to an arraying treatment.

[0044] In a second aspect, a micro light-emitting device is provided, which is prepared by using the preparation method of the micro light-emitting device as described above.

[0045] The preparation method of the micron light emitting device and the micron light emitting device, the first bonding layer and the second bonding layer are sequentially formed on the driving substrate, the third bonding layer and the fourth bonding layer are sequentially formed on the light emitting device layer, the second bonding layer and the fourth bonding layer are patterned to obtain the first pattern layer and the second pattern layer which can be nested with each other, and the first pattern layer and the second pattern layer are used to pre-bond the driving substrate and the light emitting device layer by the hydrophilic bonding method to form a first pre-bonding structure. The first pre-bonding structure is subjected to annealing and pressure treatment. At this time, since the annealing temperature is lower than the formation environment temperature of the first bonding layer and the third bonding layer and higher than the formation environment temperature of the second bonding layer and the fourth bonding layer, the second bonding layer and the fourth bonding layer will grow at high temperature in the process of annealing and pressure treatment, so that the bonding gap becomes smaller and the bonding is tight. The first bonding layer and the second bonding layer will not grow at the annealing temperature, thereby protecting the driving substrate and the light emitting device layer. The micron light emitting device is obtained after the annealing and pressure treatment. Since the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers, the brightness of the micron light emitting device will not be affected. Since they are conductive materials, they are extremely beneficial to the subsequent n-pole interconnection of the pixel array. In addition, the easy etching characteristics will make the process implementation more simple. After the annealing and pressure treatment to form the array structure, the array structure is arrayed to obtain the arrayed micron light emitting device. BRIEF DESCRIPTION OF DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0047] Figure 1 A flowchart of the preparation method of the micron light emitting device provided in an embodiment;

[0048] Figures 2a-2f A cross-sectional structure schematic diagram of the structure obtained in each step of the preparation method of the micron light emitting device in an embodiment;

[0049] Figure 3 A flowchart of the preparation method of the micron light emitting device provided in another embodiment;

[0050] Figure 4 A flowchart of the patterning step in the preparation method of the micron light emitting device provided in an embodiment;

[0051] Figure 5 A flowchart of the preparation method of the micron light emitting device provided in another embodiment;

[0052] Figure 6 Fig. 1 is a schematic diagram of a cross-sectional structure of a micro light emitting device according to an embodiment of the present application.

[0053] Reference Signs List:

[0054] 110, driving substrate; 111, first bonding layer; 112, second bonding layer; 113, first pattern layer; 120, light emitting device layer; 121, third bonding layer; 122, fourth bonding layer; 123, second pattern layer; 210, red light emitting device layer; 211, fifth bonding layer; 212, third pattern layer; 220, green light emitting device layer; 221, seventh bonding layer; 222, fourth pattern layer; 223, ninth bonding layer; 224, fifth pattern layer; 230, blue light emitting device layer; 231, eleventh bonding layer; 232, sixth pattern layer. DETAILED DESCRIPTION

[0055] For the purpose of the present application, the application will be described in relation to the enclosed drawings in which the embodiments of the application are shown. It is however evident that the application can be embodied in many different forms and thus the application should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. It will be understood that the application is not limited in its application to the details of construction and the arrangements of components set forth in the following description or illustrated in the drawings.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0057] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will also be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application, and, similarly, a first aspect, concept or object discussed below could be termed a second aspect, concept or object without departing from the teachings of the present application. For example, a first dopant type can be a second dopant type, and, similarly, a second dopant type can be a first dopant type, where the first and second dopant types are different dopant types, e.g., the first dopant type can be P-type and the second dopant type can be N-type, or the first dopant type can be N-type and the second dopant type can be P-type.

[0058] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can also be oriented in the other direction (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0059] The singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. It will be further understood that the terms "comprises", "comprising", "includes" and / or "including", or the like, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

[0060] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of the invention, thus allowing for variations in the illustrated shape due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, the buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the invention.

[0061] Please see Figure 1 This invention provides a method for fabricating a micron-sized light-emitting device, comprising the following steps:

[0062] Step S11: Provide the driving substrate and the light-emitting device layer respectively.

[0063] The driving substrate can be a substrate for a silicon-based driving circuit, and the light-emitting device layer can be an LED chip layer.

[0064] Step S12: A first bonding layer and a second bonding layer are sequentially formed on the first surface of the driving substrate.

[0065] like Figure 2a As shown, a first bonding layer 111 is first formed on the first surface of the driving substrate 110, and then a second bonding layer 112 is formed on the first surface of the first bonding layer 111. The first surface of the first bonding layer 111 is the surface of the first bonding layer 111 away from the driving substrate 110. The first bonding layer 111 and the second bonding layer 112 are both transparent conductive layers, that is, the materials of the first bonding layer 111 and the second bonding layer 112 are both transparent conductive materials, and the materials of the first bonding layer 111 and the second bonding layer 112 can be the same or different.

[0066] Step S13: A third bonding layer and a fourth bonding layer are sequentially formed on the first surface of the light-emitting device layer.

[0067] like Figure 2b As shown, a third bonding layer 121 is first formed on the first surface of the light-emitting device layer 120, and then a fourth bonding layer 122 is formed on the first surface of the third bonding layer 121. The first surface of the third bonding layer 121 is the surface of the third bonding layer 121 away from the light-emitting device layer 120. The third bonding layer 121 and the fourth bonding layer 122 are both transparent conductive layers, that is, the materials of the third bonding layer 121 and the fourth bonding layer 122 are both transparent conductive materials, and the materials of the third bonding layer 121 and the fourth bonding layer 122 can be the same or different.

[0068] Step S14: Perform patterning processing on the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer.

[0069] like Figure 2c As shown, the second bonding layer 112 is patterned to form the first pattern layer 113. Figure 2c This only provides an example of a first pattern layer 113, which can be... Figure 2c The cross-section shown is rectangular, but it can also be other shapes. For example... Figure 2d As shown, the fourth bonding layer 122 is patterned to form the second pattern layer 123. Figure 2d This only provides an example of a second pattern layer 123; the first pattern layer 113 could be... Figure 2d The cross-section shown is rectangular, but it can also be other shapes. It should be noted that the patterns in the first pattern layer 113 and the patterns in the second pattern layer 123 can be nested together; that is, the orthographic projection of the pattern formed by the first pattern layer 113 onto the plane of the driving substrate 110 does not coincide with the orthographic projection of the pattern formed by the second pattern layer 123 onto the plane of the driving substrate 110. If the cross-sections of the first pattern layer 113 and the second pattern layer 123 are both rectangular, then the height of the pattern layer is on the order of micrometers, the length is on the order of centimeters, and the width is on the order of millimeters.

[0070] Step S15: Pre-bond the first patterned layer and the second patterned layer to form a first pre-bonded structure.

[0071] like Figure 2e As shown, the second pattern layer 123 is flipped to be opposite to and close to the first pattern layer 113 to form a first pre-bonding structure. That is, the structure consisting of the light-emitting device layer 120, the third bonding layer 121 and the second pattern layer 123 connected in sequence is flipped so that the first surface of the light-emitting device layer 120 is close to the first surface of the driving substrate 110 and far away from the second surface of the driving substrate 110. The second surface of the driving substrate 110 is the surface on the driving substrate 110 that is opposite to the first surface.

[0072] Optionally, the orthographic projection of the pattern in the first pattern layer 113 onto the plane of the driving substrate 110 does not coincide with the orthographic projection of the pattern in the second pattern layer 123 onto the plane of the driving substrate 110, and there are no intersecting lines. (Continue to refer to...) Figure 2c , Figure 2d as well as Figure 2eThe cross section of the first pattern layer 113 can be a plurality of first rectangles, and the interval between two adjacent first rectangles is y; the cross section of the second pattern layer 123 can be a plurality of second rectangles, and the length of the second rectangle is x, and the length x of the second rectangle is less than y, which means that when the first pre-bonding structure is formed, the first rectangle and the second rectangle do not fit and there is a gap, and the first pre-bonding structure includes a plurality of gaps.

[0073] Step S16: annealing and pressure treatment are performed on the first pre-bonding structure to form a to-be-arrayed structure.

[0074] The annealing temperature of the annealing and pressure treatment is lower than the formation environment temperature of the first bonding layer 111 and the third bonding layer 121, and is higher than the formation environment temperature of the second bonding layer 112 and the fourth bonding layer 122. Because the annealing temperature is higher than the formation environment temperature of the second bonding layer 112 and the fourth bonding layer 122, the first pattern layer 113 formed by patterning the second bonding layer 112 and the second pattern layer 123 formed by patterning the fourth bonding layer 122 will grow during the annealing and pressure treatment, that is Figure 2e each first rectangle and each second rectangle in the formula (1) grows (x becomes larger and y becomes smaller), so that each gap in the first pre-bonding structure becomes narrower (i.e., the gap width decreases to a minimum value), so that the first pattern layer 113 and the second pattern layer 123 are bonded more closely, and the bonding strength is enhanced, as shown in Figure 2f It should be noted that the gap will not disappear, but the width will be extremely narrow, and dehydration will occur when the first pattern layer 113 and the second pattern layer 123 grow at high temperature, and water molecules will exist in the gap. The annealing temperature is lower than the formation environment temperature of the first bonding layer 111 and the third bonding layer 121 to ensure that the first bonding layer 111 and the third bonding layer 121 do not grow, thereby protecting the driving substrate 110 and the light-emitting device layer 120.

[0075] Step S17: arraying treatment is performed on the to-be-arrayed structure.

[0076] The arraying treatment includes arraying etching, hole filling, via hole, n-pole interconnection, and packaging steps performed on the to-be-arrayed structure in sequence.

[0077] In the above example, the driving substrate 110 sequentially forms the first bonding layer 111 and the second bonding layer 112, the light-emitting device layer 120 sequentially forms the third bonding layer 121 and the fourth bonding layer 122, the second bonding layer 112 and the fourth bonding layer 122 are patterned to obtain the first pattern layer 113 and the second pattern layer 123 which can be nested with each other, and the driving substrate 110 and the light-emitting device layer 120 are pre-bonded by the first pattern layer 113 and the second pattern layer 123 to form a first pre-bonding structure. The first pre-bonding structure is subjected to annealing and pressure treatment. At this time, since the annealing temperature is lower than the formation environment temperature of the first bonding layer 111 and the third bonding layer 121, and higher than the formation environment temperature of the second bonding layer 112 and the fourth bonding layer 122, the second bonding layer 112 and the fourth bonding layer 122 will grow at high temperature during annealing and pressure treatment, so that the bonding gap becomes smaller and the bonding is tight. The first bonding layer 111 and the second bonding layer 112 will not grow at the annealing temperature, thereby protecting the driving substrate 110 and the light-emitting device layer 120. After the annealing and pressure treatment, a micrometer light-emitting device is obtained. Since the first bonding layer 111, the second bonding layer 112, the third bonding layer 121 and the fourth bonding layer 122 are transparent conductive layers, they will not affect the brightness of the micrometer light-emitting device. Since they are conductive materials, they are extremely beneficial to the subsequent n-pole interconnection of the pixel array. In addition, the easy etching characteristics will make the process implementation more simple. After the annealing and pressure treatment to form the array structure, the array structure is arrayed to obtain an arrayed micrometer light-emitting device.

[0078] In one embodiment, the step S12 of sequentially forming the first bonding layer and the second bonding layer on the first surface of the driving substrate includes a step S121 and a step S122.

[0079] The step S121 comprises: depositing a first bonding material on the first surface of the driving substrate to form the first bonding layer in a first preset temperature environment.

[0080] The first preset temperature is the formation environment temperature of the first bonding layer in the above embodiment. The first preset temperature can be 600-650°C. The first bonding material is a transparent conductive material. Optionally, the first bonding material can be at least one of indium tin oxide, indium gallium tin oxide, zinc oxide and the like. The first bonding material can be deposited on the first surface of the driving substrate by at least one of electron beam evaporation, thermal evaporation and magnetron sputtering. The thickness of the first bonding layer can be 70-80 nm.

[0081] The step S122 comprises: depositing a second bonding material on the first surface of the first bonding layer to form the second bonding layer in a second preset temperature environment.

[0082] The second preset temperature is the forming environment temperature of the second bonding layer in the above embodiment, and the second preset temperature can be 25-35°C. The second bonding material is a transparent conductive material. Optionally, the second bonding material can be at least one of indium tin oxide, indium gallium tin oxide, zinc oxide, or the like. The second bonding material can be the same as or different from the first bonding material, which is not limited herein. The first surface of the first bonding layer is the surface of the first bonding layer away from the driving substrate. The second bonding material can be deposited on the first surface of the first bonding layer by at least one of electron beam evaporation, thermal evaporation, and magnetron sputtering. The thickness of the second bonding layer is less than the thickness of the first bonding layer, and the thickness of the second bonding layer can be 50-60 nm.

[0083] In step S13, a third bonding layer and a fourth bonding layer are sequentially formed on the first surface of the light emitting device layer, including steps S131 and S132.

[0084] In step S131, a third bonding material is deposited on the first surface of the light emitting device layer to form the third bonding layer at the first preset temperature.

[0085] The first preset temperature is the forming environment temperature of the third bonding layer in the above embodiment, and the first preset temperature can be 600-650°C. The third bonding material is a transparent conductive material. Optionally, the third bonding material can be at least one of indium tin oxide, indium gallium tin oxide, zinc oxide, or the like. The third bonding material can be deposited on the first surface of the light emitting device layer by at least one of electron beam evaporation, thermal evaporation, and magnetron sputtering. The thickness of the third bonding layer can be 70-80 nm.

[0086] In step S132, a fourth bonding material is deposited on the first surface of the third bonding layer to form the fourth bonding layer at the second preset temperature.

[0087] The second preset temperature is the forming environment temperature of the fourth bonding layer in the above embodiment, and the second preset temperature can be 25-35°C. The fourth bonding material is a transparent conductive material. Optionally, the fourth bonding material can be at least one of indium tin oxide, indium gallium tin oxide, zinc oxide, or the like. The fourth bonding material can be the same as or different from the third bonding material, which is not limited herein. The first surface of the third bonding layer is the surface of the third bonding layer away from the light emitting device layer. The fourth bonding material can be deposited on the first surface of the third bonding layer by at least one of electron beam evaporation, thermal evaporation, and magnetron sputtering. The thickness of the fourth bonding layer is less than the thickness of the third bonding layer, and the thickness of the fourth bonding layer can be 50-60 nm.

[0088] Optionally, the annealing temperature in the annealing and pressurizing process is lower than the first preset temperature and higher than the second preset temperature. The annealing temperature can be 550-600°C, and the annealing time can be 0.5-3h.

[0089] In the above examples, the formation environment temperature of the first bonding layer and the third bonding layer is the first preset temperature, which is higher than the second preset temperature of the second bonding layer and the fourth bonding layer, respectively. Therefore, the annealing temperature is set to be higher than the second preset temperature and lower than the first preset temperature, so that the second bonding layer and the fourth bonding layer grow in the annealing and pressurizing process to make the bonding more compact; and the first bonding layer and the third bonding layer do not grow, and the thickness of the first bonding layer is greater than that of the second bonding layer, so that the first bonding layer can buffer the stress of the growth of the second bonding layer to protect the driving substrate, and the thickness of the third bonding layer is greater than that of the fourth bonding layer, so that the third bonding layer can buffer the stress of the growth of the fourth bonding layer to protect the light-emitting device layer.

[0090] In one embodiment, referring to Figure 3 Before step S14, step S1301 is further included, and before step S15, step S1401 is further included.

[0091] Step S1301: performing thinning and polishing treatment on the second bonding layer and the fourth bonding layer, respectively.

[0092] The thinning and polishing treatment refers to reducing the surface roughness of the second bonding layer and the fourth bonding layer by mechanical, chemical or electrochemical action. Step S1301 is to perform thinning and polishing treatment on the first surface of the second bonding layer and the first surface of the fourth bonding layer, respectively, so that the roughness of the first surface of the second bonding layer is reduced to less than 0.5nm, and the roughness of the first surface of the fourth bonding layer is reduced to less than 0.5nm. The first surface of the second bonding layer is the surface of the second bonding layer away from the first bonding layer, and the first surface of the fourth bonding layer is the surface of the fourth bonding layer away from the third bonding layer. If chemical mechanical polishing is used for thinning and polishing treatment, the polishing liquid can use very small sol particles to make the roughness smaller.

[0093] Step S1401: performing activation treatment on the first surface of the second bonding layer and the first surface of the fourth bonding layer, respectively.

[0094] The activation treatment includes plasma activation treatment and high-activity sol immersion strengthening activation treatment. The first surface of the second bonding layer is the surface of the second bonding layer furthest from the first bonding layer, and the first surface of the fourth bonding layer is the surface of the fourth bonding layer furthest from the third bonding layer. The activation treatment aims to enhance the hydrophilicity of the first surfaces of the second and fourth bonding layers, thereby improving the bonding effect. The activation treatment reduces the surface contact angles of the first surfaces of the second and fourth bonding layers to 5°. The high-activity sol immersion strengthening activation treatment involves immersing the second and fourth bonding layers in a high-activity sol. The sol material is the same as the second and fourth bonding materials, and the solvent can be at least one of indium tin oxide, indium gallium tin oxide, or zinc oxide transparent conductive material.

[0095] In the above example, the surface roughness of the second and fourth bonding layers is reduced by thinning and polishing, making their surfaces smoother. The surface contact angle of the second and fourth bonding layers is reduced by activation, making their surfaces more hydrophilic. Through thinning and polishing and activation, the first patterned layer obtained after patterning the second bonding layer and the second patterned layer obtained after patterning the fourth bonding layer exhibit higher bonding strength and tighter bonding during bonding.

[0096] like Figure 4 As shown, in one embodiment, step S14 involves performing patterning processing on the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer, and forming a second pattern layer on the fourth bonding layer, which includes steps S141 to S146.

[0097] Step S141: Spin-coat the first photoresist onto the first surface of the second bonding layer to form the first photoresist layer.

[0098] The first photoresist can be either a positive or negative photoresist. After the first photoresist is spin-coated onto the first surface of the second bonding layer, it is cured by baking to form the first photoresist layer.

[0099] Step S142: Spin-coat the second photoresist onto the first surface of the fourth bonding layer to form the second photoresist layer.

[0100] The second photoresist can be either a positive or negative photoresist. After spin-coating the second photoresist onto the first surface of the fourth bonding layer, it is cured by baking to form the second photoresist layer. The first and second photoresists can be the same or different.

[0101] Step S143: Expose the first surface of the first photoresist layer with the first preset photomask to form the first development area.

[0102] A first preset mask is designed according to the first bonding region, and a light-transmitting part of the first preset mask is coincident with the first bonding region, and a non-light-transmitting part of the first preset mask is non-coincident with the first bonding region. The first preset mask is placed on the first surface of the first photoresist layer to perform exposure processing, and the first photoresist layer after the exposure processing is placed in a developing solution. If the first photoresist is a positive photoresist, the developing solution will react on the light-transmitting position of the photoresist to form a first developing region. If overexposure is used, the light-transmitting position will increase, and the range of the first developing region will increase. At this time, the orthographic projection of the first bonding region in the plane of the driving substrate is located in the orthographic projection of the first developing region in the plane of the driving substrate.

[0103] Step S144: The first surface of the second photoresist layer is exposed by a second preset mask to form a second developing region.

[0104] If the second photoresist is the same as the first photoresist, the second preset mask is a nested mask of the first preset mask, that is, the light-transmitting position and the non-light-transmitting position are opposite. If the second photoresist is different from the first photoresist, the second preset mask is the same as the first preset mask. Taking the first photoresist as a positive photoresist and the second photoresist as a negative photoresist as an example, the second preset mask is placed on the first surface of the second photoresist layer to perform exposure processing, and the second photoresist layer after the exposure processing is placed in a developing solution. Since the second photoresist is a positive photoresist, the developing solution will react on the non-light-transmitting position of the photoresist to form a second developing region. If low-energy exposure is used, the non-light-transmitting position will increase, and the range of the second developing region will increase. Since the first photoresist layer uses a positive photoresist and overexposure, and the second photoresist layer uses a negative photoresist and low-energy exposure, although the first photoresist layer and the second photoresist layer use the same shape mask, the first developing region and the second developing region can be obtained, which are not coincident in the projection in the plane of the driving substrate. And because the first developing region and the second developing region are caused to increase by high exposure and low exposure, the first pattern layer and the second pattern layer obtained in the subsequent steps have a gap after pre-bonding.

[0105] Optionally, if the photoresist is a positive photoresist, high-energy exposure is used, and if the photoresist is a negative photoresist, low-energy exposure is used.

[0106] Step S145: Etching is performed on the first developing region after development to form the first pattern layer.

[0107] The second bonding layer located in the first development area is etched away using high-power plasma etching. Then, the remaining second bonding layer is slowly etched away using a wet etching process. Finally, low-power, low-loss plasma etching is used to smooth the surface of the second bonding layer. The high-power etching thickness is 40 nm, and the wet etching thickness is 10-20 nm. Finally, the remaining first photoresist is removed using a resist remover to obtain the first patterned layer. The plasma etching uses at least one of oxygen, nitrogen, and argon gases.

[0108] Step S146: After developing the second development area, etch it to form the second pattern layer.

[0109] The fourth bonding layer located in the second development region was etched away using high-power plasma etching. Then, the remaining fourth bonding layer was slowly etched away using a wet etching process. Finally, low-power, low-loss plasma etching was used to smooth the surface of the fourth bonding layer. The high-power etching thickness was 40 nm, and the wet etching thickness was 10-20 nm. Finally, the remaining second photoresist was removed using a resist remover to obtain the second patterned layer. The plasma etching gas used was at least one of oxygen, nitrogen, and argon.

[0110] In the above example, if the first photoresist and the second photoresist are the same, a fully nested first preset photomask and a second preset photomask can be used for development to obtain a first development area and a second development area respectively. If the first photoresist and the second photoresist are different, identical first preset photomasks and second preset photomasks can be used for development to obtain a first development area and a second development area. By using different photoresists for the first and second photoresist layers, and thus different energy exposure methods, a certain distance is maintained between the first development area and the second development area in the orthographic projection of the plane where the driving substrate is located. This creates a gap between the pre-bonded first pattern layer and the second pattern layer to facilitate the growth process in subsequent annealing and pressure treatment.

[0111] like Figure 5 As shown, in one embodiment, the light-emitting device layer is a red light-emitting device layer. Before the arraying process of the structure to be arrayed in step S17, the fabrication method of the micron-sized light-emitting device further includes steps S21 to S30.

[0112] Step S21: Provide a green light-emitting device layer and a blue light-emitting device layer respectively.

[0113] like Figure 6 As shown, the red light-emitting device layer 210, the green light-emitting device layer 220, and the blue light-emitting device layer 230 are LED chip layers, respectively.

[0114] Step S22: A fifth bonding layer and a sixth bonding layer are sequentially formed on the second surface of the red light-emitting device layer.

[0115] The first surface and the second surface of the red light-emitting device layer 210 are opposite. The first surface of the red light-emitting device layer 210 can be the p-pole of the red light-emitting device layer 210, and the second surface of the red light-emitting device layer 210 can be the n-pole of the red light-emitting device layer 210. That is, the p-pole of the red light-emitting device layer 210 is bonded to the driving substrate in steps S11 to S16. The fifth bonding layer 211 and the sixth bonding layer are both transparent conductive materials, and the fifth bonding layer 211 and the sixth bonding layer can be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive material, respectively.

[0116] Step S23: forming a seventh bonding layer and an eighth bonding layer on the first surface of the green light-emitting device layer in sequence, and forming a ninth bonding layer and a tenth bonding layer on the second surface of the green light-emitting device layer in sequence.

[0117] The first surface and the second surface of the green light-emitting device layer 220 are opposite. The first surface of the green light-emitting device layer 220 can be the p-pole of the green light-emitting device layer 220, and the second surface of the green light-emitting device layer 220 can be the n-pole of the green light-emitting device layer 220. The seventh bonding layer 221, the eighth bonding layer, the ninth bonding layer 223, and the tenth bonding layer are all transparent conductive materials, and the seventh bonding layer 221, the eighth bonding layer, the ninth bonding layer 223, and the tenth bonding layer can be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive material, respectively.

[0118] Step S24: forming an eleventh bonding layer and a twelfth bonding layer on the first surface of the blue light-emitting device layer in sequence.

[0119] The first surface of the blue light-emitting device layer 230 can be the p-pole of the blue light-emitting device layer 230. The eleventh bonding layer 231 and the twelfth bonding layer are both transparent conductive materials, and the eleventh bonding layer 231 and the twelfth bonding layer can be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive material, respectively.

[0120] Step S25: performing a patterning process on the sixth bonding layer, the eighth bonding layer, the tenth bonding layer, and the twelfth bonding layer, respectively, to form a third pattern layer on the sixth bonding layer, a fourth pattern layer on the eighth bonding layer, a fifth pattern layer on the tenth bonding layer, and a sixth pattern layer on the twelfth bonding layer.

[0121] The pattern in the third pattern layer 212 and the pattern in the fourth pattern layer 222 can be nested with each other, and the pattern in the fifth pattern layer 224 and the pattern in the sixth pattern layer 232 can be nested with each other. The step of the patterning process in step S25 can be the same as the step of step S14.

[0122] Step S26: pre-bonding the third pattern layer and the fourth pattern layer to form a second pre-bonding structure.

[0123] The fourth pattern layer 222 is flipped to be opposite to the third pattern layer 212 and close to form the second pre-bonding structure.

[0124] Step S27: annealing and pressure processing the second pre-bonding structure.

[0125] The second pre-bonding structure can be placed in a bonder, the bonder is subjected to a vacuumizing operation, the temperature of the upper and lower heat-conducting graphite in the bonder is raised, the pre-bonding area of the second pre-bonding structure is subjected to pressure at the bonding temperature, and the pressure is maintained for a certain time to complete the bonding of the p-pole of the green light-emitting device layer 220 and the n-pole of the red light-emitting device layer 210. The vacuum degree is about 1mtorr, the bonding temperature is the annealing temperature in the above embodiment, which is in the range of 550-600℃, the bonding pressure is 20000N, and the bonding time is 2h.

[0126] Step S28: pre-bonding the fifth pattern layer and the sixth pattern layer to form a third pre-bonding structure.

[0127] The sixth pattern layer 232 is flipped to be opposite to the fifth pattern layer 224 and close to form the third pre-bonding structure.

[0128] Step S29: annealing and pressure processing the third pre-bonding structure to form a to-be-arrayed structure.

[0129] The p-pole of the blue light-emitting device layer 230 is bonded to the n-pole of the green light-emitting device layer 220 through the same annealing and pressure processing process as step S27 to form a micro light-emitting device as shown in FIG. 8. Figure 6

[0130] Step S17: arraying the to-be-arrayed structure.

[0131] In the above example, the red light-emitting device layer 210 is bonded on the driving substrate, the green light-emitting device layer 220 is bonded on the red light-emitting device layer 210, and the blue light-emitting device layer 230 is bonded on the green light-emitting device layer 220 to form a full-color Micro-LED wafer in vertical stacking. Such a full-color Micro-LED wafer bonded using transparent conductive material will greatly facilitate the subsequent arraying process and n-pole interconnection of the Micro-LED.

[0132] In one embodiment, a micro light-emitting device bonding structure is also provided, which is applied to the above method for implementing the micro light-emitting device and the preparation method thereof.

[0133] ​In the above example, the driving substrate sequentially forms the first bonding layer and the second bonding layer, and the light-emitting device layer sequentially forms the third bonding layer and the fourth bonding layer. The second bonding layer and the fourth bonding layer are patterned to obtain the first pattern layer and the second pattern layer which can be nested with each other. The driving substrate and the light-emitting device layer are pre-bonded by the first pattern layer and the second pattern layer to form a first pre-bonding structure by the hydrophilic bonding method. The first pre-bonding structure is subjected to annealing and pressure treatment. At this time, since the annealing temperature is lower than the formation environment temperature of the first bonding layer and the third bonding layer, and higher than the formation environment temperature of the second bonding layer and the fourth bonding layer, the second bonding layer and the fourth bonding layer grow at high temperature during annealing and pressure treatment, so that the bonding gap becomes smaller and the bonding is tight. The first bonding layer and the second bonding layer do not grow at the annealing temperature, thereby protecting the driving substrate and the light-emitting device layer. After the annealing and pressure treatment, a micro light-emitting device is obtained. Since the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent layers, they do not affect the brightness of the micro light-emitting device. Since they are conductive materials, they can be directly used as the n-poles of red, green and blue LEDs to realize the interconnection of the n-poles in the subsequent full-color Micro-LED array process. Then, the formed full-color Micro-LED wafer is subjected to array etching, hole filling, via hole, and electrical interconnection to form an active driving full-color array Micro-LED.

[0134] It should be understood that although each step in each flowchart of the present application is shown in sequence according to the direction of the arrow, these steps are not necessarily executed in sequence according to the direction of the arrow. Unless otherwise specified herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other sequences. Moreover, at least part of the steps in each flowchart can include multiple steps or stages, which are not necessarily executed at the same time, but can be executed at different times. The execution sequence of these steps or stages is not necessarily sequential, but can be executed in rotation or alternation with at least part of other steps or steps or stages in other steps.

[0135] In the description of the present specification, the description of the terms "some embodiments", "other embodiments", "ideal embodiments", and the like means that the specific features, structures, materials, or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0136] Any combination of the technical features in the above-described embodiments can be made, and for the sake of brevity, not all possible combinations are described, however, it is to be understood that the application encompasses all such possible combinations.

[0137] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, some modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.

Claims

1. A method for fabricating a micro light emitting device, comprising the steps of: The method comprises: ​ respectively providing a driving substrate and a light-emitting device layer; forming a first bonding layer and a second bonding layer on a first surface of the driving substrate in sequence; forming a third bonding layer and a fourth bonding layer on a first surface of the light-emitting device layer in sequence; wherein the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers respectively; respectively performing patterning treatment on the second bonding layer and the fourth bonding layer to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer; wherein the patterns in the first pattern layer and the patterns in the second pattern layer can be nested with each other; performing pre-bonding on the first pattern layer and the second pattern layer to form a first pre-bonding structure; performing annealing and pressurizing treatment on the first pre-bonding structure to form a to-be-arrayed structure; wherein the annealing temperature of the annealing and pressurizing treatment is lower than the forming environment temperature of the first bonding layer and the third bonding layer, and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer; performing arraying treatment on the to-be-arrayed structure; the light-emitting device layer is a red light-emitting device layer, and the method further comprises: respectively providing a green light-emitting device layer and a blue light-emitting device layer; forming a fifth bonding layer and a sixth bonding layer on a second surface of the red light-emitting device layer in sequence; wherein the first surface and the second surface of the red light-emitting device layer are opposite; forming a seventh bonding layer and an eighth bonding layer on a first surface of the green light-emitting device layer in sequence, and forming a ninth bonding layer and a tenth bonding layer on a second surface of the green light-emitting device layer in sequence; wherein the first surface and the second surface of the green light-emitting device layer are opposite; forming an eleventh bonding layer and a twelfth bonding layer on a first surface of the blue light-emitting device layer in sequence; respectively performing patterning treatment on the sixth bonding layer, the eighth bonding layer, the tenth bonding layer and the twelfth bonding layer to form a third pattern layer on the sixth bonding layer, a fourth pattern layer on the eighth bonding layer, a fifth pattern layer on the tenth bonding layer, and a sixth pattern layer on the twelfth bonding layer; wherein the patterns in the third pattern layer and the patterns in the fourth pattern layer can be nested with each other, and the patterns in the fifth pattern layer and the patterns in the sixth pattern layer can be nested with each other; performing pre-bonding on the third pattern layer and the fourth pattern layer to form a second pre-bonding structure; performing annealing and pressurizing treatment on the second pre-bonding structure; performing pre-bonding on the fifth pattern layer and the sixth pattern layer to form a third pre-bonding structure; performing annealing and pressurizing treatment on the third pre-bonding structure to form a to-be-arrayed structure.

2. The method for fabricating a micron-sized light-emitting device according to claim 1, characterized in that, The method comprises: depositing a first bonding material on the first surface of the driving substrate to form the first bonding layer in a first preset temperature environment; depositing a second bonding material on the first surface of the first bonding layer to form the second bonding layer in a second preset temperature environment; The first surface of the light emitting device layer is sequentially formed with a third bonding layer and a fourth bonding layer, comprising: In the first preset temperature environment, a third bonding material is deposited on the first surface of the light emitting device layer to form the third bonding layer; In the second preset temperature environment, a fourth bonding material is deposited on the first surface of the third bonding layer to form the fourth bonding layer.

3. The method for fabricating a micron-sized light-emitting device according to claim 2, characterized in that, The first bonding material, the second bonding material, the third bonding material and the fourth bonding material are transparent conductive materials, and the transparent conductive material comprises at least one of indium tin oxide, indium gallium tin oxide and zinc oxide.

4. The method for fabricating a micron-sized light-emitting device according to claim 2, characterized in that, The first preset temperature is 600-650 DEG C, and the second preset temperature is 25-35 DEG C.

5. The method for fabricating a micron-sized light-emitting device according to claim 1, characterized in that, Before the patterned processing of the second bonding layer and the fourth bonding layer, comprising: The second bonding layer and the fourth bonding layer are respectively subjected to thinning and polishing processing.

6. The method for fabricating a micron-sized light-emitting device according to claim 1, characterized in that, The patterned processing of the second bonding layer and the fourth bonding layer is performed to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer, comprising: A first photoresist is spin-coated on the first surface of the second bonding layer to form a first photoresist layer; A second photoresist is spin-coated on the first surface of the fourth bonding layer to form a second photoresist layer; The first surface of the first photoresist layer is exposed by a first preset mask to form a first developing area; The first surface of the second photoresist layer is exposed by a second preset mask to form a second developing area; After developing the first developing area, etching is performed to form the first pattern layer; After developing the second developing area, etching is performed to form the second pattern layer.

7. The method of claim 1, wherein the micro light emitting device is a micro light emitting diode. Before the pre-bonding of the first pattern layer and the second pattern layer to form a first pre-bonding structure, comprising: The first surface of the second bonding layer and the first surface of the fourth bonding layer are respectively subjected to activation processing; wherein the activation processing comprises plasma activation processing and high-activity sol immersion strengthening activation processing.

8. The method of claim 1, wherein the micro light emitting device is a micro light emitting diode. In the annealing and pressure processing, the annealing temperature is 550-600 DEG C, and the annealing time is 0.5-3 h.

9. A micron-sized light-emitting device, characterized in that, The micron light emitting device is prepared by the preparation method of any one of claims 1-8.

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