A method, system, device and dielectric for hybrid impedance modeling of frequency division.

Abstract

This invention proposes a method, system, equipment, and medium for modeling the mixed impedance of the frequency-division converter. It obtains the small-signal models of the main circuits on both sides of the frequency-division converter, the relationships between voltage, current, and duty cycle small-signal disturbances in the controller's synchronous rotating coordinate system and the system's synchronous rotating coordinate system, the mathematical relationships between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency-division converter and the output voltage disturbance of the frequency-division converter, the transfer function matrix of the frequency-division converter controller, the mathematical relationships between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency-division converter and the DC voltage and grid-side power small-signal disturbances of the frequency-division converter, and the time delay matrix of the frequency-division converter. Then, it models the obtained relationships and matrices to calculate the mixed impedance of the frequency-division converter, avoiding complex mathematical derivations and calculations and improving the accuracy of stability analysis of the frequency-division transmission system.

Description

Technical Field

[0001] This invention relates to the field of stability analysis technology for frequency division transmission systems, specifically to a method, system, equipment, and medium for modeling hybrid impedance of frequency division transmission systems. Background Technology

[0002] Frequency-divided transmission (FDPT), as a novel power transmission method, can be applied to offshore wind power grid connection. Compared to high-voltage AC transmission, FDPT reduces the capacitive charging current in submarine cables, significantly increasing transmission capacity and distance. Compared to DC transmission, FDPT eliminates the need for offshore converter stations, drastically reducing daily maintenance costs and complexity. Research shows that FDPT demonstrates outstanding technical and economic viability in offshore wind power transmission scenarios ranging from 70-200km, covering my country's medium- and long-distance offshore wind power resources. It is a core technology for future large-scale offshore wind power development and medium- to long-distance grid connection. However, as a typical "high-voltage and high-efficiency" power system, FDPT contains a large number of power electronic devices. The interaction between different power electronic devices and transmission lines can cause broadband oscillations, leading to equipment damage and even systemic risks. The frequency converter, as a core component of FDPT, contains numerous power electronic switching devices and is one of the main factors causing instability in FDPT systems.

[0003] Currently, stability analysis of power systems mainly includes two methods: state-space method and impedance analysis method. Compared with the state-space method, impedance analysis method has the following advantages: 1) Impedance analysis method has a clearer physical meaning, which can intuitively explain the oscillation mechanism that causes system instability, making it easier to understand; 2) It is not dependent on the internal structure and corresponding parameters of the target system, but only on the external measured impedance for analysis, thus fully protecting user privacy and trade secrets; 3) Because it does not require evaluation of the internal stability of the converter, but only focuses on the stability at the common coupling point between the converter and the grid, the dimensionality of the target system is greatly reduced, effectively avoiding the dimensionality curse caused by the increase in the number of converters; 4) Without needing to know the detailed model of the rest of the system, impedance analysis method can effectively identify the potential contribution of each converter to system stability. Impedance modeling is an important prerequisite for conducting system resonance stability analysis based on impedance analysis method.

[0004] Existing impedance models mainly include DC impedance models, AC impedance models, and hybrid AC / DC impedance models. DC impedance models were initially used to describe the external port impedance characteristics of DC-DC converters. In recent years, with the development of hybrid AC / DC power systems, more and more AC-DC converters have been connected to the DC grid, and DC impedance models have gradually expanded to describe the impedance characteristics of the DC ports of AC-DC converters. Hybrid AC / DC impedance models are mainly for interface converters—connection converters—in hybrid AC / DC power systems, which have both AC and DC ports. It should be noted that both DC impedance models and hybrid AC / DC impedance models are applicable to power electronic equipment (DC-DC or AC-DC converters) with DC ports, and are difficult to directly apply to the stability analysis of frequency-divided transmission systems. Although AC impedance models can characterize the impedance characteristics of the power frequency or frequency-divided ports of frequency-divided converters, they cannot simultaneously incorporate the power and frequency-divided ports into the converter port impedance model, making it difficult to independently characterize the self-admittance characteristics of the power / frequency-divided ports and the coupling characteristics between them, and to quantitatively describe the dynamic interaction and coupling characteristics between the power / frequency-divided ports. Furthermore, since the AC impedance of the power frequency port (or frequency division port) of the frequency divider is easily affected by the equivalent impedance of the frequency division grid (or the equivalent impedance of the power frequency grid), the assumption that the frequency divider can operate independently and stably cannot guarantee that the AC impedance of the power frequency port (or frequency division port) of the frequency divider does not include the right half-plane pole. Summary of the Invention

[0005] The purpose of this invention is to propose a method, system, device, and medium for modeling hybrid impedance between power frequency and frequency division converters. This overcomes the shortcomings of existing AC impedance models, which fragment the connection between power frequency and frequency division converter ports, making it difficult to independently characterize the self-admittance characteristics and coupling characteristics between them, and to quantitatively describe the dynamic interaction and coupling characteristics between them. This invention fully utilizes the characteristic of frequency division converters having two AC ports simultaneously, proposing the concept of hybrid impedance between power frequency and frequency division converters and establishing a hybrid impedance model for these converters. Compared to traditional AC impedance, the hybrid impedance model of frequency division converters depends only on the converter's own control structure and parameters, and is not affected by the equivalent impedance of the power frequency / frequency division converter grid to which the converter is connected. Furthermore, based on the general assumption that the converter can operate independently and stably, it can be guaranteed that the hybrid impedance does not contain any right-half-plane poles, thus laying the foundation for subsequent stability analysis of frequency division transmission systems and avoiding complex mathematical derivations and calculations.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A method for modeling hybrid impedance at both the power and frequency division points includes:

[0008] Obtain the small-signal models of the main circuits on both sides of the frequency divider inverter;

[0009] Obtain the relationship between voltage, current, and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system;

[0010] Obtain the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter;

[0011] Obtain the transfer function matrix of the frequency divider inverter controller;

[0012] Obtain the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the DC voltage and grid power small-signal disturbances on one side of the frequency divider inverter.

[0013] Obtain the time delay matrix of the frequency divider inverter;

[0014] The relationships and matrices obtained above are modeled to calculate the mixed impedance of the frequency divider inverter.

[0015] Preferably, the specific form of the small-signal model of the main circuits on both sides of the frequency divider inverter is as follows:

[0016]

[0017] in, This refers to the voltage disturbance at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. The output voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This refers to the current disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system.

[0018] Preferably, the specific form of the relationship between voltage, current, and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system is as follows:

[0019] The relationship between the small-signal disturbances of current and voltage in the synchronous rotating coordinate system of the frequency divider inverter system and the small-signal disturbance of current in the synchronous rotating coordinate system of the controller is as follows:

[0020]

[0021] in This refers to the voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This refers to the current disturbance at the common coupling point on both sides of the frequency divider inverter in the synchronous rotating coordinate system of the controller. This refers to the current disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This represents the transfer matrix from the voltage disturbance at the common coupling point on both sides of the frequency divider in the system's synchronous rotating coordinate system to the current disturbance in the controller's synchronous rotating coordinate system.

[0022] The relationship between the duty cycle disturbance, the small-signal voltage disturbance, and the small-signal duty cycle disturbance in the system's synchronous rotating coordinate system and the controller's synchronous rotating coordinate system:

[0023]

[0024] in, This refers to the duty cycle disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. The duty cycle disturbance phasor in the synchronous rotating coordinate system of the controller. This refers to the voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This represents the transfer function of the voltage disturbance at the common coupling point on both sides of the frequency divider in the synchronous rotating coordinate system to the duty cycle disturbance at the common coupling point on both sides of the frequency divider in the synchronous rotating coordinate system.

[0025] Preferably, the specific form of the mathematical relationship between the small-signal disturbances of the voltage and current at the common coupling point on both sides of the frequency divider inverter and the disturbance of the output voltage of the frequency divider inverter is as follows:

[0026]

[0027] in, and These represent the d-axis and q-axis output voltage disturbances of the frequency converter on the power frequency side, and the d-axis and q-axis output voltage disturbances on the frequency division side, respectively, in the synchronous rotating coordinate system of the system. and These represent the d-axis duty cycle disturbance, q-axis duty cycle disturbance, and d-axis duty cycle disturbance and q-axis duty cycle disturbance on the power frequency side of the frequency divider inverter in the synchronous rotating coordinate system of the system, respectively. and These represent the d-axis voltage disturbance, q-axis voltage disturbance, and d-axis voltage disturbance and q-axis voltage disturbance at the common coupling point on the power frequency side of the frequency divider inverter in the synchronous rotating coordinate system of the system, respectively. and V represents the d-axis current disturbance, q-axis current disturbance, and d-axis current disturbance and q-axis current disturbance at the common coupling point on the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system. dc G represents the DC voltage of the frequency divider inverter in steady state; u2vG represents the transfer function of the voltage disturbance at the common coupling point in the synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. i2v This represents the transfer function of the current disturbance at the common coupling point in the synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter.

[0028] Preferably, the transfer function matrix of the frequency divider inverter controller is in the following form:

[0029] The inner current loop employs PI control and dq-axis current decoupling control, and its transfer matrix takes the following form:

[0030]

[0031] Where, k pd1 and k id1 This represents the proportional gain and integral gain of the inner loop controller for the d-axis current on the power frequency side; k pq1 and k iq1 This represents the proportional gain and integral gain of the q-axis current inner loop controller on the power frequency side; k pd2 and k id2 This represents the proportional gain and integral gain of the inner loop controller for the d-axis current on the frequency divider side; k pq2 and k iq2 This represents the proportional gain and integral gain of the q-axis current inner loop controller on the frequency division side; 1 / s is the integral term.

[0032] The decoupling matrix of the current inner loop controller is:

[0033]

[0034] Wherein, ω1 and ω2 represent the angular frequencies of the power frequency side system and the frequency division side system, respectively.

[0035] The power / voltage outer loop controller of the frequency divider inverter adopts PI control, and its transfer function matrix is ​​in the following form:

[0036]

[0037] Where k pd3 and k id3 This represents the proportional gain and integral gain of the outer loop controller for the DC voltage on the power frequency side; k pq3 and k iq3 This represents the proportional gain and integral gain of the reactive power outer loop controller on the power frequency side; k pd4 and k id4 This represents the proportional gain and integral gain of the active power outer loop controller on the frequency division side; k pq4 and k iq4 This represents the proportional gain and integral gain of the reactive power outer loop controller on the frequency division side.

[0038] Preferably, the specific form of the mathematical relationship between the small-signal disturbances of the voltage and current at the common coupling point on both sides of the frequency divider inverter and the small-signal disturbances of the DC voltage and grid-side power of the frequency divider inverter is as follows:

[0039]

[0040] in Inject reactive power from the frequency divider inverter into the power frequency side. Inject active power into the frequency divider inverter on the frequency divider side. Inject reactive power into the frequency divider inverter on the frequency divider side. This represents the instantaneous value of the DC voltage across the DC capacitor in the DC link. This refers to the voltage disturbance at the common coupling point between the frequency divider inverter and the mains / frequency divider power grid in the system's synchronous rotating coordinate system. This refers to the current disturbance at the common coupling point between the frequency divider inverter and the mains / frequency divider power grid in the system's synchronous rotating coordinate system. This represents the transfer function of the voltage disturbance at the common coupling point in the synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances. It represents the transfer function of the current disturbance at the common coupling point in the synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances.

[0041] Preferably, the specific form for determining the mixed impedance of the frequency divider inverter is as follows:

[0042]

[0043] Among them, Z ac For the frequency division hybrid impedance matrix; I is the identity matrix; G u2v Let G be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. i2v Let G be the transfer function of the current disturbance at the common coupling point in the system's synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. ci Let G be the transfer function matrix of the current inner loop controller. dei This is the decoupling matrix for the inner current loop controller. Let be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system with respect to the DC voltage and reactive / active power disturbances. Let G be the transfer function of the common coupling point current disturbance in the system's synchronous rotating coordinate system with respect to the DC voltage and reactive / active power disturbances. cPQ The transfer function matrix of the power / voltage outer loop controller for the frequency divider inverter is G. del The time delay matrix of the frequency divider inverter. Let be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to the duty cycle disturbance in the same system's synchronous rotating coordinate system. This is the transfer matrix of voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to current disturbance in the controller's synchronous rotating coordinate system.

[0044] A hybrid impedance modeling system for frequency division, based on any one of the aforementioned hybrid impedance modeling methods for frequency division, includes:

[0045] Main circuit small-signal model acquisition module: used to acquire the small-signal models of the main circuits on both sides of the frequency divider inverter;

[0046] Small-signal disturbance acquisition module: Acquires the relationship between voltage, current and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system;

[0047] The frequency divider inverter output voltage disturbance relationship acquisition module is used to obtain the mathematical relationship between the small signal disturbance of voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter.

[0048] Transfer function matrix acquisition module: used to acquire the transfer function matrix of the frequency divider inverter controller;

[0049] The module for obtaining the small-signal disturbance relationship of the frequency divider inverter is used to obtain the mathematical relationship between the small-signal disturbance of the voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the small-signal disturbance of the DC voltage and grid power on one side of the frequency divider inverter.

[0050] Time Delay Matrix Acquisition Module: Used to acquire the time delay matrix of the frequency divider inverter.

[0051] Modeling module: Used to model the relationships and matrices obtained above, and to calculate the mixed impedance of the frequency divider inverter.

[0052] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, when the processor executes the computer program, it implements the steps of a frequency-division hybrid impedance modeling method for stability analysis of a frequency-division transmission system as described in any of the preceding claims.

[0053] A computer-readable storage medium storing a computer program, characterized in that, when executed by a processor, the computer program implements the steps of a frequency-division hybrid impedance modeling method for stability analysis of a frequency-division transmission system as described in any of the preceding claims.

[0054] Compared with existing technologies, the present invention has the following advantages: The present invention proposes a hybrid impedance modeling method for both the main circuits on both sides of the frequency divider inverter, the relationship between voltage, current and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system, the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter, the transfer function matrix of the frequency divider inverter controller, the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the DC voltage and grid-side power small-signal disturbances of the frequency divider inverter, and the time delay matrix of the frequency divider inverter. Then, the above-obtained relationships and matrices are modeled to obtain the hybrid impedance of the frequency divider inverter. Compared with the original model, the hybrid impedance model can independently characterize the self-admittance characteristics of the frequency divider / frequency divider ports and the coupling characteristics between the frequency divider / frequency divider ports, and thus explicitly quantify the impact of the dynamic interaction between the frequency divider / frequency divider ports on the system stability. Meanwhile, the frequency division hybrid impedance model does not contain any right half-plane zeros, which can avoid complex mathematical derivations and calculations and improve the accuracy of stability analysis of frequency division transmission systems. Attached Figure Description

[0055] Figure 1 This is a schematic diagram of the topology of the general-purpose frequency divider inverter in this invention;

[0056] Figure 2 This invention describes the topology and control strategy of the back-to-back frequency divider inverter.

[0057] Figure 3 This invention uses a phase-locked loop control structure.

[0058] Figure 4 This is a block diagram of the power frequency side current control of the back-to-back frequency divider inverter in this invention;

[0059] Figure 5 This is a block diagram of the frequency divider side current controller of the back-to-back frequency divider inverter in this invention;

[0060] Figure 6 This is the small-signal model of the back-to-back frequency divider inverter obtained in this invention.

[0061] Figure 7 These are the impedances calculated and the impedances obtained from simulation measurements in this invention. Detailed Implementation

[0062] The present invention will be further described in detail below with reference to specific embodiments. These descriptions are for explanation purposes only and are not intended to limit the scope of the invention.

[0063] This invention proposes the concept of hybrid impedance for frequency division and, based on this, a modeling method for hybrid impedance for frequency division. Figure 1 This is a schematic diagram of the topology of the general-purpose frequency divider inverter in this invention. The voltage and current at the point of common coupling (PCC) on both sides of the frequency divider inverter are projected onto the system's synchronous rotating coordinate system. The voltage perturbation phasor and current perturbation phasor at the PCC point in the system's synchronous rotating coordinate system are defined as follows: Duty cycle perturbation phasor is The output voltage perturbation phasor is The mixed impedance of the frequency divider inverter can be defined as follows:

[0064]

[0065] in, This represents the mixed impedance of the frequency divider inverter, specifically expressed as:

[0066]

[0067] in, and These represent the d-axis self-impedance, q-axis self-impedance, d-axis self-impedance, and q-axis self-impedance of the frequency divider port, respectively. and This represents the coupling impedance between the d-axis and q-axis of the power frequency port of the frequency divider inverter. and This represents the coupling impedance between the d-axis of the power frequency port and the d-axis of the frequency divider port of the frequency divider inverter. and This represents the coupling impedance between the d-axis of the power frequency port and the q-axis of the frequency division port of the frequency divider inverter. and This represents the coupling impedance between the q-axis of the power frequency port and the d-axis of the frequency divider port of the frequency divider inverter. and This represents the coupling impedance between the q-axis of the power frequency port and the q-axis of the frequency divider inverter. and This represents the coupling impedance between the d-axis and q-axis of the frequency division port of the frequency division converter station.

[0068] Corresponding to equation (1.1), the mixed admittance of the frequency divider inverter can be defined as follows:

[0069]

[0070] in, The mixed admittance of the frequency divider inverter is expressed as follows:

[0071]

[0072] in, and These represent the d-axis self-admittance, q-axis self-admittance, d-axis self-admittance, and q-axis self-admittance of the frequency divider port, respectively. and This represents the coupling admittance between the d-axis and q-axis of the power frequency port of the frequency divider inverter. and This represents the coupling admittance between the d-axis of the power frequency port and the d-axis of the frequency divider inverter. and This represents the coupling admittance between the d-axis of the power frequency port and the q-axis of the frequency divider inverter. and This represents the coupling admittance between the q-axis of the power frequency port and the d-axis of the frequency divider port of the frequency divider inverter. and This represents the coupling admittance between the q-axis of the power frequency port and the q-axis of the frequency divider inverter. and This represents the coupling admittance between the d-axis and q-axis of the frequency division port of the frequency division converter station. Since the mixed admittance of the frequency division and the frequency division is the inverse matrix of the mixed impedance of the frequency division and the frequency division, in order to avoid repetition, the following text will mainly focus on the concept of the mixed impedance of the frequency division and the frequency division.

[0073] Example 1:

[0074] Taking a back-to-back frequency divider inverter as an example, the corresponding mixed impedance modeling method for the mains and frequency dividers is as follows:

[0075] Figure 2 This invention presents the topology and control strategy of the back-to-back frequency divider inverter used in this invention. The back-to-back frequency divider inverter consists of two three-phase two-level converters and DC-side coupling capacitors. The control system collects parameters such as voltage and current at the PCC points on both sides of the frequency divider inverter to control physical quantities such as DC voltage on the DC side, reactive power on the power frequency side, and active and reactive power on the frequency divider side. The PLL (Phase Locked Loop) is used to lock the voltage phase at the PCC points on both sides of the frequency divider inverter.

[0076] Figure 3 This is the control structure of the phase-locked loop (PLL) used in this invention. Through the action of the PI controller, the q-axis component of the PLL input voltage is made zero, thus achieving the purpose of locking the phase of the voltage at the PCC point. The output of the PLL PI controller is the angular frequency of the system PCC point voltage, and the voltage phase is obtained through an integrator.

[0077] Figure 4 This is the power frequency side control loop of a back-to-back frequency divider inverter. The outer loop controls the DC voltage and the reactive power injected into the inverter from the power frequency side, while the inner current loop controls the d-axis and q-axis currents at the PCC point on the power frequency side.

[0078] Figure 5 This is the control loop for the frequency division side of a back-to-back frequency divider inverter. The outer loop controls the active and reactive power injected into the inverter on the frequency division side, while the inner current loop controls the d-axis and q-axis currents at the PCC point on the frequency division side.

[0079] The control strategy of the back-to-back frequency divider used in this invention includes:

[0080] 1) The back-to-back frequency divider inverter consists of two three-phase two-level converters connected by the DC side. The DC side circuit is a coupling capacitor used to stabilize the DC side voltage.

[0081] 2) The power frequency side adopts dual-loop control of DC voltage / reactive power and current. The outer loop of DC voltage / reactive power controls the DC voltage of the intermediate DC link and the reactive power injected into the frequency divider inverter on the power frequency side, respectively. The inner loop of current controls the d-axis current and q-axis current of the PCC point on the power frequency side.

[0082] 3) The frequency division side adopts dual-loop control of active / reactive power and current. The outer loop of active / reactive power controls the active power and reactive power injected into the frequency division inverter on the frequency division side, respectively, and the inner loop of current controls the d-axis current and q-axis current of the PCC point on the frequency division side, respectively.

[0083] Due to the dynamic characteristics of the phase-locked loop (PLL), two synchronous rotating coordinate systems exist in the modeling of the frequency divider inverter: the system synchronous rotating coordinate system and the controller synchronous rotating coordinate system. In a steady state, the two synchronous rotating coordinate systems coincide, and the PLL output error is zero. When grid voltage disturbances occur, the dynamic characteristics of the PLL cause an angular difference Δθ between the two synchronous rotating coordinate systems. To effectively distinguish the variables in the system synchronous rotating coordinate system and the controller synchronous rotating coordinate system, superscripts 's' and 'c' are introduced here. Here, 's' represents the variable in the system synchronous rotating coordinate system, and 'c' represents the variable in the controller synchronous rotating coordinate system.

[0084] The specific implementation process of establishing the hybrid impedance model for frequency division based on the proposed control strategy of the back-to-back frequency division inverter includes:

[0085] 1) The equivalent resistance and bridge arm reactance of the power frequency side of the frequency divider inverter are represented by R1 and L1, and the equivalent resistance and bridge arm reactance of the frequency divider side are represented by R2 and L2. The voltage disturbance phasor at the common coupling point between the frequency divider inverter and the power / frequency divider grid in the system's synchronous rotating coordinate system is defined as: The current perturbation phasor is Duty cycle perturbation phasor is The output voltage perturbation phasor is

[0086] 2) Define the positive direction of the current on both sides of the mains / division converter as flowing from the mains / division grid to the division converter. In a synchronous rotating coordinate system, according to Kirchhoff's voltage law, the small-signal model of the main circuit section on both sides of the division converter can be expressed as:

[0087]

[0088] Among them, Y ac The definition is as follows:

[0089]

[0090] 3) Considering the dynamic characteristics of the phase-locked loop (PLL), the voltage, current, and duty cycle disturbances in the system's synchronous rotating coordinate system affect the voltage, current, and duty cycle disturbances in the controller's synchronous rotating coordinate system. Therefore, the following technical solution is adopted to obtain the mathematical relationships between voltage, current, and duty cycle disturbances in different synchronous rotating coordinate systems:

[0091] Define the transfer function of the power frequency side phase-locked loop as follows:

[0092]

[0093]

[0094] Where, k ppll1 and k ipll1 V represents the proportional gain and integral gain of the power frequency side phase-locked loop controller. d1 This represents the steady-state value of the d-axis voltage at the PCC point on the power frequency side.

[0095] Define the transfer function of the frequency division side phase-locked loop as follows:

[0096]

[0097]

[0098] Where, k ppll2 and k ipll2 V represents the proportional gain and integral gain of the frequency division side phase-locked loop controller. d2 This represents the steady-state value of the d-axis voltage at the PCC point on the frequency divider side.

[0099] According to equations (1.7) and (1.9), the relationship between the current disturbance in the system's synchronous rotating coordinate system and the controller's synchronous rotating coordinate system can be expressed as follows:

[0100]

[0101] in, The transfer matrix representing the voltage disturbance at point PCC in the system's synchronous rotating coordinate system to the current disturbance in the controller's synchronous rotating coordinate system is defined as follows:

[0102]

[0103] Where I d1 I q1 I d2 and I q2 These represent the steady-state values ​​of the d-axis current on the power frequency side, the q-axis current on the power frequency side, the d-axis current on the frequency division side, and the q-axis current on the frequency division side, respectively.

[0104] The relationship between the duty cycle disturbance in the system's synchronous rotating coordinate system and the controller's synchronous rotating coordinate system is expressed as follows:

[0105]

[0106] in, The transfer function representing the voltage disturbance at point PCC in the system's synchronous rotating coordinate system to the duty cycle disturbance in the same system is defined as follows:

[0107]

[0108] Where D d1 D q1 D d2 and D q2 These represent the steady-state values ​​of the d-axis duty cycle on the power frequency side, the q-axis duty cycle on the power frequency side, the d-axis duty cycle on the frequency divider side, and the q-axis duty cycle on the frequency divider side, respectively.

[0109] 4) The voltage and current disturbances at the PCC points on both the power and frequency division sides of the frequency divider inverter affect the DC-side voltage of the inverter, thus affecting its output voltage. Considering this effect, the following technical solution is adopted to obtain the mathematical relationship between the voltage and current disturbances at the PCC points on both the power and frequency division sides of the frequency divider inverter and the output voltage disturbance.

[0110] As can be seen from the modulation process, the relationship between the output voltage and the duty cycle of the frequency divider inverter is as follows:

[0111]

[0112] Among them, v d1 v q1 v d2 and v q2 These represent the instantaneous values ​​of the d-axis and q-axis output voltages on the power frequency side of the frequency divider inverter, respectively; and the instantaneous values ​​of the d-axis and q-axis output voltages on the frequency divider side. dcd represents the instantaneous value of the DC voltage across the DC capacitor in the DC link; d1 d q1 d d2 and d q2 These represent the instantaneous values ​​of the d-axis duty cycle and q-axis duty cycle on the power frequency side of the frequency divider inverter, respectively, and the instantaneous values ​​of the d-axis duty cycle and q-axis duty cycle on the frequency divider side. Furthermore, based on the energy conservation between the AC and DC sides of the power / frequency divider inverter, we can obtain...

[0113]

[0114] Among them, C dc V represents the capacitance value of the DC capacitor in the intermediate DC link. dc This is the instantaneous value of the DC voltage across the DC capacitor in the DC link.

[0115] By performing small-signal linearization on equations (1.15) and (1.16), and substituting the DC voltage disturbance in equation (1.16) into equation (1.15), we can obtain...

[0116]

[0117] in, and These represent the d-axis and q-axis output voltage disturbances of the frequency converter on the power frequency side, and the d-axis and q-axis output voltage disturbances on the frequency division side, respectively, in the synchronous rotating coordinate system of the system. and These represent the d-axis duty cycle disturbance, q-axis duty cycle disturbance, and d-axis duty cycle disturbance and q-axis duty cycle disturbance on the power frequency side of the frequency divider inverter in the synchronous rotating coordinate system of the system, respectively. and These represent the d-axis voltage disturbance, q-axis voltage disturbance, and d-axis voltage disturbance and q-axis voltage disturbance at the PCC point on the power frequency side of the frequency divider inverter in the synchronous rotating coordinate system of the system, respectively. and G represents the d-axis current disturbance, q-axis current disturbance, and d-axis current disturbance and q-axis current disturbance at the PCC point on the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system, respectively. u2v The transfer function representing the voltage disturbance at point PCC in the system's synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter is defined as follows:

[0118]

[0119] G i2v G represents the transfer function of the current disturbance at point PCC in the synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter, neglecting the effect of the equivalent resistance of the frequency divider inverter. i2vThe specific definitions are as follows:

[0120]

[0121] 5) Considering the impact of the current inner loop controller on the mixed impedance of the frequency division converter, the following technical approach is adopted to obtain the transfer function matrix of the current inner loop of the back-to-back frequency division converter:

[0122] In this invention, the inner current loop of the back-to-back frequency divider inverter adopts PI control and dq-axis current decoupling control. Therefore, the transfer function matrix of the inner current loop controller is:

[0123]

[0124] Where, k pd1 and k id1 This represents the proportional gain and integral gain of the inner loop controller for the d-axis current on the power frequency side; k pq1 and k iq1 This represents the proportional gain and integral gain of the q-axis current inner loop controller on the power frequency side; k pd2 and k id2 This represents the proportional gain and integral gain of the inner loop controller for the d-axis current on the frequency divider side; k pq2 and k iq2 This represents the proportional gain and integral gain of the q-axis current inner loop controller on the frequency division side. The decoupling matrix of the current inner loop controller is:

[0125]

[0126] Wherein, ω1 and ω2 represent the angular frequencies of the power frequency side system and the frequency division side system, respectively.

[0127] 6) Considering the impact of voltage and current disturbances at the PCC points on both the working and dividing sides of the frequency divider on the DC voltage and injected power of the intermediate DC link of the frequency divider, the following technical solution is adopted to obtain the transfer matrix of voltage and current disturbances at the PCC points on both the working and dividing sides with respect to the small-signal disturbance of the converter grid-side power:

[0128] According to instantaneous power theory, the reactive power injected into the frequency divider inverter on the power frequency side is expressed as:

[0129]

[0130] Among them, u d1 u q1 i d1 and i q1 These represent the instantaneous values ​​of the d-axis voltage, q-axis voltage, d-axis current, and q-axis current at the PCC point on the power frequency side, respectively. The active and reactive power injected into the frequency divider inverter on the frequency divider side are expressed as follows:

[0131]

[0132] Among them, u d2 u q2 i d2 and i q2 These represent the instantaneous values ​​of the d-axis voltage, q-axis voltage, d-axis current, and q-axis current at the PCC point on the frequency divider side, respectively.

[0133] Combining equations (1.16), (1.22), and (1.23) and performing small-signal linearization, while ignoring higher-order terms, we obtain...

[0134]

[0135] in, The transfer function representing the voltage disturbance at point PCC in the system's synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances is defined as follows:

[0136]

[0137] This represents the transfer function of the current disturbance at point PCC in the synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances, neglecting the effect of the equivalent resistance of the frequency divider inverter. The specific definitions are as follows:

[0138]

[0139] 7) Considering the impact of the power / voltage outer loop controller on the mixed impedance of the power / voltage divider, the following technical approach is adopted to obtain the transfer function matrix of the power / voltage outer loop of the back-to-back divider inverter:

[0140] In this invention, the power / voltage outer loop controller of the back-to-back frequency divider inverter adopts PI control. Therefore, the transfer function matrix of the power / voltage outer loop controller is:

[0141]

[0142] Where, k pd3 and k id3 This represents the proportional gain and integral gain of the outer loop controller for the DC voltage on the power frequency side; k pq3 and k iq3 This represents the proportional gain and integral gain of the reactive power outer loop controller on the power frequency side; k pd4 and k id4 This represents the proportional gain and integral gain of the active power outer loop controller on the frequency division side; k pq4 and k iq4 This represents the proportional gain and integral gain of the reactive power outer loop controller on the frequency division side.

[0143] 8) Considering the time delay effect caused by the digital control and PWM modulation process, the time delay period caused by the digital control and PWM modulation process is defined as T. del Then the time delay matrix of the system is:

[0144]

[0145] 9) Based on steps 1)-8), small-signal modeling is performed on the system's main circuit, phase-locked loop, coordinate transformation, inner current loop, DC voltage / power outer loop, and modulation process. Ignoring the influence of the sampling stage, the small-signal model of the back-to-back frequency divider inverter is obtained, as detailed below. Figure 6 As shown. Solve Figure 6 The small-signal model of the frequency divider inverter shown is defined as follows: The expression for the mixed impedance of the frequency division and sub-frequency division can be obtained as follows:

[0146]

[0147] Corresponding to equation (1.29), the expression for the mixed admittance of the power frequency division is as follows:

[0148]

[0149] Figure 7 Bode plots of the calculated small-signal impedance and the small-signal impedance measured in the Matlab / Simulink environment are shown, with the position of each impedance corresponding to its position in the impedance matrix. The blue solid line represents the impedance calculated according to equation (1.29), and the red scatter points represent the impedance measured in the simulation. The good matching between the two proves the correctness of the established small-signal model.

[0150] Example 2:

[0151] A hybrid impedance modeling system for frequency division includes:

[0152] Main circuit small-signal model acquisition module: used to acquire the small-signal models of the main circuits on both sides of the frequency divider inverter;

[0153] Small-signal disturbance acquisition module: Acquires the relationship between voltage, current and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system;

[0154] The frequency divider inverter output voltage disturbance relationship acquisition module is used to obtain the mathematical relationship between the small signal disturbance of voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter.

[0155] Transfer function matrix acquisition module: used to acquire the transfer function matrix of the frequency divider inverter controller;

[0156] The module for obtaining the small-signal disturbance relationship of the frequency divider inverter is used to obtain the mathematical relationship between the small-signal disturbance of the voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the small-signal disturbance of the DC voltage and grid power on one side of the frequency divider inverter.

[0157] Time Delay Matrix Acquisition Module: Used to acquire the time delay matrix of the frequency divider inverter.

[0158] Modeling module: Used to model the relationships and matrices obtained above, and calculate the mixed impedance of the frequency divider inverter. Example 3:

[0159] An embodiment of the present invention provides a terminal device. This terminal device includes a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps in the various method embodiments described above. Alternatively, when the processor executes the computer program, it implements the functions of each module in the various device embodiments described above.

[0160] The computer program can be divided into one or more modules, which are stored in the memory and executed by the processor to complete the present invention.

[0161] The terminal device may be a desktop computer, laptop, handheld computer, or cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0162] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0163] The memory can be used to store the modules, and the processor can implement various functions of the terminal device by running or executing the modules stored in the memory and calling the data stored in the memory.

[0164] If the modules integrated into the terminal device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0165] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0166] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A method for modeling hybrid impedance at both the working frequency and the dividing frequency, characterized in that, include: Obtain the small-signal models of the main circuits on both sides of the frequency divider inverter; Obtain the relationship between voltage, current, and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system; Obtain the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter; Obtain the transfer function matrix of the frequency divider inverter controller; Obtain the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the DC voltage and grid-side power small-signal disturbances of the frequency divider inverter; Obtain the time delay matrix of the frequency divider inverter; Model the relationships and matrices obtained above to calculate the mixed impedance of the frequency divider inverter. The specific form for calculating the mixed impedance of the frequency divider inverter is as follows: in, This is a mixed impedance matrix for frequency division; It is the identity matrix; Let be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. Let be the transfer function of the current disturbance at the common coupling point in the system's synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. Let be the transfer function matrix of the current inner loop controller. This is the decoupling matrix for the inner current loop controller. Let be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system with respect to the DC voltage and reactive / active power disturbances. Let be the transfer function of the current disturbance at the common coupling point in the system's synchronous rotating coordinate system with respect to the DC voltage and reactive / active power disturbances. This is the transfer function matrix of the power / voltage outer loop controller for the frequency divider inverter; The time delay matrix of the frequency divider inverter. Let be the transfer function of the voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to the duty cycle disturbance in the same system's synchronous rotating coordinate system. This is the transfer matrix of voltage disturbance at the common coupling point in the system's synchronous rotating coordinate system to current disturbance in the controller's synchronous rotating coordinate system.

2. The method for modeling hybrid impedance at different frequencies according to claim 1, characterized in that, The specific form of the small-signal model of the main circuits on both sides of the frequency divider inverter is as follows: in, This refers to the voltage disturbance at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. The output voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This refers to the current disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system.

3. The method for modeling hybrid impedance at different frequencies according to claim 1, characterized in that, The specific form of the relationship between voltage, current, and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system is as follows: The relationship between the small-signal disturbances of current and voltage in the synchronous rotating coordinate system of the frequency divider inverter system and the small-signal disturbance of current in the synchronous rotating coordinate system of the controller is as follows: in This refers to the voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This refers to the current disturbance at the common coupling point on both sides of the frequency divider inverter in the synchronous rotating coordinate system of the controller. This refers to the current disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This represents the transfer matrix of voltage disturbance at the common coupling point on both sides of the frequency divider in the synchronous rotating coordinate system to current disturbance in the synchronous rotating coordinate system of the controller; The relationship between the duty cycle disturbance, the small-signal voltage disturbance, and the small-signal duty cycle disturbance in the system's synchronous rotating coordinate system and the controller's synchronous rotating coordinate system: in, This refers to the duty cycle disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. The duty cycle disturbance phasor in the synchronous rotating coordinate system of the controller. This refers to the voltage disturbance phasor at the common coupling point on both sides of the frequency divider inverter in the system's synchronous rotating coordinate system. This represents the transfer function of the voltage disturbance at the common coupling point on both sides of the frequency divider in the synchronous rotating coordinate system to the duty cycle disturbance at the common coupling point on both sides of the frequency divider in the synchronous rotating coordinate system.

4. The method for modeling hybrid impedance at different frequencies according to claim 1, characterized in that, The specific form of the mathematical relationship between the small-signal disturbances of the voltage and current at the common coupling point on both sides of the frequency divider inverter and the disturbance of the output voltage of the frequency divider inverter is as follows: in, , , and These represent the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system. Shaft output voltage disturbance. Shaft output voltage disturbance, frequency divider side Shaft output voltage disturbance and Shaft output voltage disturbance; , , and These represent the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system. Axis duty cycle disturbance Axis duty cycle disturbance, frequency division side Axis duty cycle disturbance and Axis duty cycle disturbance; , , and These represent the common coupling points on the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system. Shaft voltage disturbance. Shaft voltage disturbance, common coupling point on the frequency divider side shaft voltage disturbance and Shaft voltage disturbance; , , and These represent the common coupling points on the power frequency side of the frequency divider inverter in the system's synchronous rotating coordinate system. Shaft current disturbance. Shaft current disturbance, common coupling point on the frequency divider side shaft current disturbance and Shaft current disturbance. This represents the DC voltage of the frequency divider inverter in steady state. This represents the transfer function of the voltage disturbance at the common coupling point in the synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter. This represents the transfer function of the current disturbance at the common coupling point in the synchronous rotating coordinate system to the output voltage disturbance of the frequency divider inverter.

5. The method for modeling hybrid impedance at different frequencies according to claim 1, characterized in that, The specific form of the transfer function matrix of the frequency divider inverter controller is as follows: The inner current loop uses PI control and The transfer matrix of shaft current decoupling control is as follows: in, and Indicates power frequency side The proportional gain and integral gain of the inner loop controller for shaft current; and Indicates power frequency side The proportional gain and integral gain of the inner loop controller for shaft current; and Indicates the frequency division side The proportional gain and integral gain of the inner loop controller for shaft current; and Indicates the frequency division side The proportional gain and integral gain of the inner loop controller for shaft current; It is an integral term; The decoupling matrix of the current inner loop controller is: in, and These represent the angular frequencies of the power frequency side system and the frequency division side system, respectively. The power / voltage outer loop controller of the frequency divider inverter adopts PI control, and its transfer function matrix is ​​in the following form: in and This indicates the proportional gain and integral gain of the outer loop controller for the DC voltage on the power frequency side; and This represents the proportional gain and integral gain of the reactive power outer loop controller on the power frequency side; and This represents the proportional gain and integral gain of the active power outer loop controller on the frequency division side; and This represents the proportional gain and integral gain of the reactive power outer loop controller on the frequency division side.

6. The method for modeling hybrid impedance at different frequencies according to claim 1, characterized in that, The specific form of the mathematical relationship between the voltage and current small-signal disturbances at the common coupling point on both sides of the frequency divider inverter and the DC voltage and grid-side power small-signal disturbances of the frequency divider inverter is as follows: in Inject reactive power from the frequency divider inverter into the power frequency side. Inject active power into the frequency divider inverter on the frequency divider side. Inject reactive power into the frequency divider inverter on the frequency divider side. This represents the instantaneous value of the DC voltage across the DC capacitor in the DC link. This refers to the voltage disturbance at the common coupling point between the frequency divider inverter and the mains / frequency divider power grid in the system's synchronous rotating coordinate system. This refers to the current disturbance at the common coupling point between the frequency divider inverter and the mains / frequency divider power grid in the system's synchronous rotating coordinate system. This represents the transfer function of the voltage disturbance at the common coupling point in the synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances. It represents the transfer function of the current disturbance at the common coupling point in the synchronous rotating coordinate system to the DC voltage and reactive / active power disturbances.

7. A hybrid impedance modeling system for frequency division, characterized in that, A hybrid impedance modeling method based on any one of claims 1-6 includes: Main circuit small-signal model acquisition module: used to acquire the small-signal models of the main circuits on both sides of the frequency divider inverter; Small-signal disturbance acquisition module: Acquires the relationship between voltage, current and duty cycle small-signal disturbances in the controller synchronous rotating coordinate system and the system synchronous rotating coordinate system; The frequency divider inverter output voltage disturbance relationship acquisition module is used to obtain the mathematical relationship between the small signal disturbance of voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the output voltage disturbance of the frequency divider inverter. Transfer function matrix acquisition module: used to acquire the transfer function matrix of the frequency divider inverter controller; The module for obtaining the small-signal disturbance relationship of the frequency divider inverter is used to obtain the mathematical relationship between the small-signal disturbance of the voltage and current at the common coupling point on both the power and frequency divider sides of the frequency divider inverter and the small-signal disturbance of the DC voltage and grid power on one side of the frequency divider inverter. Time Delay Matrix Acquisition Module: Used to acquire the time delay matrix of the frequency divider inverter; Modeling module: Used to model the relationships and matrices obtained above, and to calculate the mixed impedance of the frequency divider inverter.

8. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the frequency division hybrid impedance modeling method for stability analysis of a frequency division transmission system as described in any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the frequency division hybrid impedance modeling method for stability analysis of a frequency division transmission system as described in any one of claims 1 to 6.

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